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2015-11-26[PR67753] adjust for padding when bypassing memory in assign_parm_setup_blockAlexandre Oliva2-3/+48
Storing a register in memory as a full word and then accessing the same memory address under a smaller-than-word mode amounts to right-shifting of the register word on big endian machines. So, if BLOCK_REG_PADDING chooses upward padding for BYTES_BIG_ENDIAN, and we're copying from the entry_parm REG directly to a pseudo, bypassing any stack slot, perform the shifting explicitly. This fixes the miscompile of function_return_val_10 in gcc.target/aarch64/aapcs64/func-ret-4.c for target aarch64_be-elf introduced in the first patch for 67753. for gcc/ChangeLog PR rtl-optimization/67753 PR rtl-optimization/64164 * function.c (assign_parm_setup_block): Right-shift upward-padded big-endian args when bypassing the stack slot. From-SVN: r230985
2015-11-26MIPS/GCC/doc: Reorder `-mcompact-branches='Maciej W. Rozycki2-25/+31
Move the `-mcompact-branches=' option out of the middle of a block of floating-point options. The option is not related to FP in any way. Place it immediately below other branch instruction selection options. * doc/invoke.texi (Option Summary) <MIPS Options>: Reorder `-mcompact-branches='. (MIPS Options): Likewise. From-SVN: r230984
2015-11-26Fix whitespacing.Mike Stump1-2/+2
From-SVN: r230983
2015-11-26* Makefile.in (build/genmatch.o): Depend on internal-fn.def.Jakub Jelinek2-10/+14
From-SVN: r230982
2015-11-26re PR c++/67238 ([C++11][C++14]cc1plus crash for nested decltype expression ↵Paolo Carlini2-0/+25
in parameter pack in trailing return type when '-g' enabled) 2015-11-26 Paolo Carlini <paolo.carlini@oracle.com> PR c++/67238 * g++.dg/cpp0x/pr67238.C: New. From-SVN: r230981
2015-11-26pr67876.C: Remove duplicate content.Martin Sebor2-16/+4
gcc/testsuite/ * g++.dg/pr67876.C: Remove duplicate content. From-SVN: r230980
2015-11-26cp-gimplify.c (genericize_cp_loop): Change LOOP_EXPR's location to start of ↵Andreas Arnez4-1/+94
loop body instead of start of loop. gcc/cp/ChangeLog: 2015-11-26 Andreas Arnez <arnez@linux.vnet.ibm.com> * cp-gimplify.c (genericize_cp_loop): Change LOOP_EXPR's location to start of loop body instead of start of loop. gcc/testsuite/ChangeLog: 2015-11-26 Andreas Arnez <arnez@linux.vnet.ibm.com> * g++.dg/guality/pr67192.C: New test. From-SVN: r230979
2015-11-26install.texi (Prerequisites): Increase ISL requirement to 0.14 or 0.15.David Edelsohn2-1/+6
* doc/install.texi (Prerequisites): Increase ISL requirement to 0.14 or 0.15. From-SVN: r230978
2015-11-26[AArch64] Add NEON intrinsics vqrdmlah_lane and vqrdmlsh_lane.Matthew Wahab6-0/+463
gcc/ * gcc/config/aarch64/arm_neon.h (vqrdmlah_laneq_s16, vqrdmlah_laneq_s32): New. (vqrdmlahq_laneq_s16, vqrdmlahq_laneq_s32): New. (vqrdmlsh_lane_s16, vqrdmlsh_lane_s32): New. (vqrdmlshq_laneq_s16, vqrdmlshq_laneq_s32): New. (vqrdmlah_lane_s16, vqrdmlah_lane_s32): New. (vqrdmlahq_lane_s16, vqrdmlahq_lane_s32): New. (vqrdmlahh_s16, vqrdmlahh_lane_s16, vqrdmlahh_laneq_s16): New. (vqrdmlahs_s32, vqrdmlahs_lane_s32, vqrdmlahs_laneq_s32): New. (vqrdmlsh_lane_s16, vqrdmlsh_lane_s32): New. (vqrdmlshq_lane_s16, vqrdmlshq_lane_s32): New. (vqrdmlshh_s16, vqrdmlshh_lane_s16, vqrdmlshh_laneq_s16): New. (vqrdmlshs_s32, vqrdmlshs_lane_s32, vqrdmlshs_laneq_s32): New. gcc/testsuite * gcc.target/aarch64/advsimd-intrinsics/vqrdmlXh_lane.inc: New file, support code for vqrdml{as}h_lane tests. * gcc.target/aarch64/advsimd-intrinsics/vqrdmlah_lane.c: New. * gcc.target/aarch64/advsimd-intrinsics/vqrdmlsh_lane.c: New. From-SVN: r230972
2015-11-26[AArch64] Add NEON intrinsics vqrdmlah and vqrdmlsh.Matthew Wahab6-0/+323
gcc/ * gcc/config/aarch64/arm_neon.h (vqrdmlah_s16, vqrdmlah_s32): New. (vqrdmlahq_s16, vqrdmlahq_s32): New. (vqrdmlsh_s16, vqrdmlsh_s32): New. (vqrdmlshq_s16, vqrdmlshq_s32): New. gcc/testsuite * gcc.target/aarch64/advsimd-intrinsics/vqrdmlXh.inc: New file, support code for vqrdml{as}h tests. * gcc.target/aarch64/advsimd-intrinsics/vqrdmlah.c: New. * gcc.target/aarch64/advsimd-intrinsics/vqrdmlsh.c: New. From-SVN: r230971
2015-11-26[AArch64][dejagnu] Dejagnu support for ARMv8.1 Adv.SIMD.Matthew Wahab2-1/+67
gcc/testsuite * lib/target-supports.exp (add_options_for_arm_v8_1a_neon): New. (check_effective_target_arm_arch_FUNC_ok) (add_options_for_arm_arch_FUNC) (check_effective_target_arm_arch_FUNC_multilib): Add "armv8.1-a" to the list to be generated. (check_effective_target_arm_v8_1a_neon_ok_nocache): New. (check_effective_target_arm_v8_1a_neon_ok): New. (check_effective_target_arm_v8_1a_neon_hw): New. From-SVN: r230970
2015-11-26[AArch64] Add ACLE feature macro for ARMv8.1 Adv.SIMD instructions.Matthew Wahab2-0/+6
* config/aarch64/aarch64-c.c (aarch64_update_cpp_builtins): Add ARM_FEATURE_QRDMX. From-SVN: r230969
2015-11-26DWARF: fix loc. descr. generation for DW_AT_static_linkPierre-Marie de Rodat3-9/+82
gcc/ChangeLog: PR debug/53927 * tree-nested.c (finalize_nesting_tree_1): Append a field to hold the frame base address. * dwarf2out.c (gen_subprogram_die): Generate for DW_AT_static_link a location description that computes the value of this field. From-SVN: r230968
2015-11-26Revert "Improve verification of loop->latch in verify_loop_structure"Tom de Vries4-52/+31
2015-11-26 Tom de Vries <tom@codesourcery.com> revert: 2015-11-25 Tom de Vries <tom@codesourcery.com> * cfgloop.c (find_single_latch): New function, factored out of ... (flow_loops_find): ... here. (verify_loop_structure): Improve verification of loop->latch. * cfgloop.h (find_single_latch): Declare. * omp-low.c (expand_omp_for_generic): Initialize latch of orig_loop. From-SVN: r230967
2015-11-26aarch64-simd-builtins.def: Add missing changes from r230962.Matthew Wahab2-0/+19
* config/aarch64/aarch64-simd-builtins.def: Add missing changes from r230962. From-SVN: r230966
2015-11-26nvptx.c (write_func_decl_from_insn): Replace callee arg with name.Nathan Sidwell4-110/+72
* config/nvptx/nvptx.c (write_func_decl_from_insn): Replace callee arg with name. Don't deal with split regs. Tweak formatting. (nvptx_expand_call): Adjust write_func_decl_from_insn call. (nvptx_output_call_insn): Don't deal with split regs here. testsuite/ * gcc.target/nvptx/proto-1.c: Adjust expected asm. From-SVN: r230965
2015-11-26re PR tree-optimization/68555 (gcc.dg/vect/bb-slp-10.c FAILs)Richard Biener2-1/+7
2015-11-26 Richard Biener <rguenther@suse.de> PR testsuite/68555 * gcc.dg/vect/bb-slp-10.c: Adjust pattern, use target selector and not XFAIL. From-SVN: r230963
2015-11-26[AArch64] Add builtins for ARMv8.1 Adv.SIMD instructions.Matthew Wahab1-0/+7
* config/aarch64/aarch64-simd-builtins.def (sqrdmlah, sqrdmlsh): New. (sqrdmlah_lane, sqrdmlsh_lane): New. (sqrdmlah_laneq, sqrdmlsh_laneq): New. From-SVN: r230962
2015-11-26re PR tree-optimization/68554 (gcc.dg/vect/bb-slp-subgroups-2.c FAILs)Richard Biener2-0/+6
2015-11-26 Richard Biener <rguenther@suse.de> PR testsuite/68554 * gcc.dg/vect/bb-slp-subgroups-2.c: Require vect_perm. From-SVN: r230961
2015-11-26[AArch64] Add sqrdmah, sqrdmsh instructions.Matthew Wahab3-2/+111
* config/aarch64/aarch64-simd.md (aarch64_sqmovun<mode>): Fix some white-space. (aarch64_<sur>qmovun<mode>): Likewise. (aarch64_sqrdml<SQRDMLH_AS:rdma_as>h<mode>): New. (aarch64_sqrdml<SQRDMLH_AS:rdma_as>h_lane<mode>): New. (aarch64_sqrdml<SQRDMLH_AS:rdma_as>h_laneq<mode>): New. * config/aarch64/iterators.md (UNSPEC_SQRDMLAH): New. (UNSPEC_SQRDMLSH): New. (SQRDMLH_AS): New. (rdma_as): New. From-SVN: r230959
2015-11-26* g++.dg/tree-ssa/pr61034.C: Scan tree dumps also for alpha*-*-*.Uros Bizjak1-2/+2
From-SVN: r230958
2015-11-26re PR tree-optimization/66721 (gcc.target/i386/pr61403.c FAILs)Richard Biener2-16/+105
2015-11-26 Richard Biener <rguenther@suse.de> PR tree-optimization/66721 * tree-vect-loop.c (vect_analyze_loop_2): Compute scalar iteration cost earlier. Re-do analysis without SLP when vectorization using SLP fails and without has a chance to succeed. From-SVN: r230956
2015-11-26genmatch.c (dt_simplify::gen_1): For generic wrap all multi-result-use ↵Richard Biener2-10/+9
captures in a SAVE_EXPR. 2015-11-26 Richard Biener <rguenther@suse.de> * genmatch.c (dt_simplify::gen_1): For generic wrap all multi-result-use captures in a SAVE_EXPR. From-SVN: r230955
2015-11-26[AArch64] Add support for ARMv8.1 Adv.SIMD instructions.Matthew Wahab2-0/+9
* config/aarch64/aarch64.h (AARCH64_ISA_RDMA): New. (TARGET_SIMD_RDMA): New. From-SVN: r230953
2015-11-26re PR c++/67249 ([concepts] ICE parsing f(pair<auto, concept>))Paolo Carlini2-0/+10
2015-11-26 Paolo Carlini <paolo.carlini@oracle.com> PR c++/67249 * g++.dg/concepts/pr67249.C: New. From-SVN: r230947
2015-11-26[combine] Only restrict pure simplification in mult-extend subst case, allow ↵Kyrylo Tkachov2-8/+10
other substitutions * combine.c (subst): Do not return clobber of zero in widening mult case. Just return x unchanged if it is a no-op substitution. From-SVN: r230946
2015-11-26re PR testsuite/66799 (gcc.dg/vect/pr20122.c FAILs)Richard Biener2-6/+15
2015-11-26 Richard Biener <rguenther@suse.de> PR testsuite/66799 * gcc.dg/vect/pr20122.c (main): Do not align Kernel, do not vectorize init loop and adjust expected outcome. From-SVN: r230943
2015-11-26re PR c++/68527 (ICE with -fdump-ada-spec on invalid C++ 11 code)Eric Botcazou2-4/+12
PR c++/68527 * c-ada-spec.c (dump_nested_types): Add guard for error_mark_node. (print_ada_struct_decl): Likewise. From-SVN: r230942
2015-11-26re PR testsuite/67203 (FAIL: g++.dg/tree-ssa/pr61034.C -std=gnu++11 ↵Richard Biener2-2/+16
scan-tree-dump-times fre2 "free" 10) 2015-11-26 Richard Biener <rguenther@suse.de> PR testsuite/67203 * g++.dg/tree-ssa/pr61034.C: Make expected optimization result dependent on PUSH_ARGS_REVERSED. Drop optimization level and also monitor final optimization result. From-SVN: r230940
2015-11-26re PR rtl-optimization/68249 (wrong code at -O2 and -O3 on x86_64-linux-gnu)Jakub Jelinek3-0/+81
PR rtl-optimization/68249 PR rtl-optimization/68321 * gcc.c-torture/execute/pr68249.c: New test. * gcc.c-torture/execute/pr68321.c: New test. From-SVN: r230939
2015-11-26re PR target/68416 ([MPX] GCC emits a lot of redundant bndmov instructions)Ilya Enkovich4-1/+21
gcc/ 2015-11-26 Vladimir Makarov <vmakarov@redhat.com> PR target/68416 * config/i386/i386.h (enum reg_class): Add bounds registers to ALL_REGS. gcc/testsuite/ 2015-11-26 Ilya Enkovich <enkovich.gnu@gmail.com> PR target/68416 * gcc.target/i386/mpx/pr68416.c: New test. From-SVN: r230938
2015-11-26Back out latest change.Eric Botcazou2-16/+0
From-SVN: r230935
2015-11-26re PR c++/67313 (ICE: in vague_linkage_p, at cp/decl2.c:1878 with -fno-weak ↵Paolo Carlini2-0/+18
and variadic template) 2015-11-26 Paolo Carlini <paolo.carlini@oracle.com> PR c++/67313 * g++.dg/cpp0x/no-weak1.C: New. From-SVN: r230934
2015-11-26re PR tree-optimization/68128 (A huge regression in Parboil v2.5 OpenMP ↵Jakub Jelinek8-13/+467
CUTCP test (2.5 times lower performance)) PR tree-optimization/68128 * tree.h (OMP_CLAUSE_SHARED_READONLY): Define. * gimplify.c: Include gimple-walk.h. (enum gimplify_omp_var_data): Add GOVD_WRITTEN. (omp_notice_variable): Set flags to n->value if n already exists in target region, but we need to jump to do_outer. (omp_shared_to_firstprivate_optimizable_decl_p, omp_mark_stores, omp_find_stores_op, omp_find_stores_stmt): New functions. (gimplify_adjust_omp_clauses_1): Set OMP_CLAUSE_SHARED_READONLY on OMP_CLAUSE_SHARED if it is a scalar non-addressable that is not modified in the body. Call omp_mark_stores for outer contexts on OMP_CLAUSE_SHARED clauses if they could be written in the body or on OMP_CLAUSE_LASTPRIVATE. (gimplify_adjust_omp_clauses): Add body argument, call omp_find_stores_{stmt,op} on the body through walk_gimple_seq. Set OMP_CLAUSE_SHARED_READONLY on OMP_CLAUSE_SHARED if it is a scalar non-addressable that is not modified in the body. Call omp_mark_stores for outer contexts on OMP_CLAUSE_SHARED clauses if they could be written in the body or on OMP_CLAUSE_LASTPRIVATE or on OMP_CLAUSE_LINEAR without OMP_CLAUSE_LINEAR_NO_COPYOUT or on OMP_CLAUSE_REDUCTION. (gimplify_oacc_cache, gimplify_omp_parallel, gimplify_omp_task, gimplify_omp_for, gimplify_omp_workshare, gimplify_omp_target_update, gimplify_expr): Adjust gimplify_adjust_omp_clauses callers. * tree-nested.c (convert_nonlocal_omp_clauses, convert_local_omp_clauses): Clear OMP_CLAUSE_SHARED_READONLY on non-local vars or local vars referenced from nested routines. * omp-low.c (scan_sharing_clauses): For OMP_CLAUSE_SHARED_READONLY attempt to optimize it into OMP_CLAUSE_FIRSTPRIVATE. Even for TREE_READONLY, don't call use_pointer_for_field with non-NULL second argument until we are sure we are keeping OMP_CLAUSE_SHARED. * gcc.dg/gomp/pr68128-1.c: New test. * gcc.dg/gomp/pr68128-2.c: New test. From-SVN: r230932
2015-11-26implement-c.texi (Integers Implementation): Make GCC's promises about signed ↵Paolo Bonzini2-3/+14
left shift stronger and clarify the cases when... 2015-11-26 Paolo Bonzini <bonzini@gnu.org> * doc/implement-c.texi (Integers Implementation): Make GCC's promises about signed left shift stronger and clarify the cases when they're broken. From-SVN: r230931
2015-11-26[calls.c] PR rtl-optimization/67226: Take into account pretend_args_size ↵Kyrylo Tkachov4-0/+63
when checking stack offsets for sibcall optimisation 2015-11-26 Kyrylo Tkachov <kyrylo.tkachov@arm.com> Bernd Schmidt <bschmidt@redhat.com> PR rtl-optimization/67226 * calls.c (store_one_arg): Take into account crtl->args.pretend_args_size when checking for overlap between arg->value and argblock + arg->locate.offset during sibcall optimization. * gcc.c-torture/execute/pr67226.c: New test. Co-Authored-By: Bernd Schmidt <bernds@redhat.com> From-SVN: r230929
2015-11-26re PR c++/68508 (Internal compiler error with parentheses around return ↵Jakub Jelinek6-6/+39
value in C++14 with ASan enabled) PR c++/68508 * cp-tree.h (cp_ubsan_maybe_instrument_downcast): Add INTYPE argument. * cp-ubsan.c (cp_ubsan_maybe_instrument_downcast): Likewise. Use it instead of or in addition to TREE_TYPE (op). Use is_properly_derived_from, return NULL_TREE if TREE_TYPE (intype) and TREE_TYPE (type) are the same type minus qualifiers. * typeck.c (build_static_cast_1): Adjust callers. * g++.dg/ubsan/pr68508.C: New test. From-SVN: r230928
2015-11-26[AArch64] Update patterns to support FP zeroWilco Dijkstra3-13/+23
2015-11-26 Wilco Dijkstra <wdijkstr@arm.com> * config/aarch64/aarch64.md (cbranch<mode>4): Use aarch64_fp_compare_operand. (store_pairsf): Use aarch64_reg_or_fp_zero. (store_pairdf): Likewise. (cstore<mode>4): Use aarch64_fp_compare_operand. (cmov<mode>6): Likewise. * config/aarch64/aarch64-ldpstp.md: Use aarch64_reg_or_fp_zero. From-SVN: r230927
2015-11-25PR c++/67876 - [6 Regression] ICE when compiling Firefox 38Martin Sebor4-2/+46
gcc/cp * pt.c (convert_template_argument): Make sure number of tree operands is greater than zero before attempting to extract one. gcc/testsuite/ * g++.dg/pr67876.C: New test. From-SVN: r230924
2015-11-26re PR go/61303 (gccgo: segfault, regression since 4.8.2)Ian Lance Taylor1-1/+1
PR go/61303 runtime: don't overallocate in select code If we've already allocated an fd_set, don't allocate another one. Also, don't bother to read from rdwake if it wasn't returned in select. Fixes https://gcc.gnu.org/PR61303. Reviewed-on: https://go-review.googlesource.com/17243 From-SVN: r230922
2015-11-26Daily bump.GCC Administrator1-1/+1
From-SVN: r230921
2015-11-26fix PR68453: recursively add phi nodes to merge pointsAditya Kumar4-88/+260
The patch adds close phi nodes to every outer loop exit, and to every loop guard. For loop guards it computes an initial value that determines where we stop inserting phi nodes. When the initial value is a constant, the initial value is considered to be defined in the entry of the code gen region. Co-Authored-By: Sebastian Pop <s.pop@samsung.com> From-SVN: r230918
2015-11-25PR c/66516 - missing diagnostic on taking the address of a builtin functionMartin Sebor3-6/+480
PR c/66516 - missing diagnostic on taking the address of a builtin function * g++.dg/addr_builtin-1.C: New test (accidentally omitted from initial commit). * gcc.dg/addr_builtin-1.c: Same. From-SVN: r230916
2015-11-25re PR lto/67548 (LTO drops weak binding with "ld -r")Jan Hubicka7-13/+116
PR lto/67548 * lto-plugin.c (linker_output, linker_output_set): New statics. (all_symbols_read_handler): Add -flinker-output option. (onload): Record linker_output info. * ipa-visibility.c (cgraph_externally_visible_p, varpool_node::externally_visible_p): When doing incremental linking, hidden symbols may be still used later. (update_visibility_by_resolution_info): Do not drop weak during incremental link. (function_and_variable_visibility): Fix formating. * flag-types.h (lto_linker_output): Declare. * common.opt 9flag_incremental_link): New flag. * lto-lang.c (lto_post_options): Process flag_lto_linker_output. * lang.opt (lto_linker_output): New enum. (flinker_output): New flag. From-SVN: r230915
2015-11-25update changelogMichael Meissner1-1/+0
From-SVN: r230914
2015-11-25<patch #10>Michael Meissner9-32/+542
[gcc] 2015-11-25 Michael Meissner <meissner@linux.vnet.ibm.com> <patch #10> * config/rs6000/constraints.md (wb constraint): New constraint for ISA 3.0 d-form scalar addressing. * config/rs6000/rs6000.c (mode_supports_vmx_dform): Add support for ISA 3.0 D-form addressing to load SFmode/DFmode scalars into Altivec registers. Add wb constraint for Altivec registers with D-form addressing. If we have ISA 3.0 d-form support, undo secondary reload support for using FPR registers if we want to do D-form addressing. (rs6000_debug_reg_global): Likewise. (rs6000_setup_reg_addr_masks): Likewise. (rs6000_init_hard_regno_mode_ok): Likewise. (rs6000_secondary_reload): Likewise. (rs6000_preferred_reload_class): Likewise. (rs6000_secondary_reload_class): Likewise. * config/rs6000/rs6000.h (enum r6000_reg_class_enum): Add wb constraint. * config/rs6000/rs6000.md (f32_lr2 mode attribute): Add support for ISA 3.0 SFmode/DFmode d-form addressing to Altivec registers. (f32_lm2): Likewise. (f32_li2): Likewise. (f32_sr2): Likewise. (f32_sm2): Likewise. (f32_si2): Likewise. (f64_p9): Likewise. (extendsfdf2_fpr): Likewise. (mov<mode>_hardfloat): Likewise. (mov<mode>_hardfloat32): Likewise. (mov<mode>_hardfloat64): Likewise. * doc/md.texi (RS/6000 constraints): Document wb constraint. Fixup we constraint documentation. [gcc/testsuite] 2015-11-25 Michael Meissner <meissner@linux.vnet.ibm.com> * gcc.target/powerpc/dform-1.c: New test. * gcc.target/powerpc/dform-2.c: Likewise. From-SVN: r230913
2015-11-25lto-symtab.c: Include alias.hJan Hubicka6-70/+170
* lto-symtab.c: Include alias.h (warn_type_compatibility_p): Replace types_compatible_p checks by TBAA and size checks; set bit 2 if locations are TBAA incompatible. (lto_symtab_merge): Compare DECL sizes. (lto_symtab_merge_decls_2): Warn about TBAA in compatibility. * gfortran.dg/lto/bind_c-6_0.f90: New testcase. * gfortran.dg/lto/bind_c-6_1.c: New testcase. From-SVN: r230911
2015-11-25* g++.dg/init/self1.C: Remove dg-do run.Jason Merrill1-1/+0
From-SVN: r230910
2015-11-25re PR c++/68434 ([concepts] function tsubst sets TYPE_CANONICAL before ↵Ryan Burn3-6/+33
setting a type's PLACEHOLDER_TYPE_CONSTRAINTS) PR c++/68434 * pt.c (tsubst): Set PLACEHOLDER_TYPE_CONSTRAINTS before calling canonical_type_parameter. From-SVN: r230909
2015-11-25lambda.c (maybe_add_lambda_conv_op): Only set no_sanitize_undefined if ↵Jason Merrill2-5/+11
SANITIZE_NULL. * lambda.c (maybe_add_lambda_conv_op): Only set no_sanitize_undefined if SANITIZE_NULL. From-SVN: r230908
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