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2016-11-25gimple-fold.c (fold_stmt_1): Check may_propagate_copy before valueizing ↵Richard Biener2-1/+7
return stmts. 2016-11-25 Richard Biener <rguenther@suse.de> * gimple-fold.c (fold_stmt_1): Check may_propagate_copy before valueizing return stmts. From-SVN: r242873
2016-11-25re PR tree-optimization/78343 (Loop is not eliminated)Richard Biener9-16/+53
2016-11-24 Richard Biener <rguenther@suse.de> PR tree-optimization/78343 * passes.def: Add CD-DCE pass after loop splitting. * tree-ssa-dce.c (find_obviously_necessary_stmts): Move SCEV init/finalize ... (perform_tree_ssa_dce): ... here. Deal with being executed inside the loop pipeline in aggressive mode. * gcc.dg/tree-ssa/sccp-2.c: New testcase. * gcc.dg/autopar/uns-outer-6.c: Adjust. * gcc.dg/tree-ssa/20030808-1.c: Likewise. * gcc.dg/tree-ssa/20040305-1.c: Likewise. * gcc.dg/vect/pr38529.c: Likewise. From-SVN: r242872
2016-11-25Remove conflict markerEric Botcazou1-1/+0
From-SVN: r242871
2016-11-25Improve comment for struct symbolic_number in bswap passThomas Preud'homme2-16/+27
2016-11-25 Thomas Preud'homme <thomas.preudhomme@arm.com> gcc/ * tree-ssa-math-opts.c (struct symbolic_number): Improve comment. From-SVN: r242870
2016-11-25Fix PR77673: bswap loads passed end of objectThomas Preud'homme4-14/+70
2016-11-25 Thomas Preud'homme <thomas.preudhomme@arm.com> gcc/ PR tree-optimization/77673 * tree-ssa-math-opts.c (struct symbolic_number): Add new src field. (init_symbolic_number): Initialize src field from src parameter. (perform_symbolic_merge): Select most dominated statement as the source statement. Set src field of resulting n structure from the input src with the lowest address. (find_bswap_or_nop): Rename source_stmt into ins_stmt. (bswap_replace): Rename src_stmt into ins_stmt. Initially get source of load from src field rather than insertion statement. Cancel optimization if statement analyzed is not dominated by the insertion statement. (pass_optimize_bswap::execute): Rename src_stmt to ins_stmt. Compute dominance information. gcc/testsuite/ PR tree-optimization/77673 * gcc.dg/pr77673.c: New test. From-SVN: r242869
2016-11-25re PR ada/67205 (eliminate No_Implicit_Dynamic_Code restriction violations)Eric Botcazou2-0/+9
PR ada/67205 * config/mips/mips.c (TARGET_CUSTOM_FUNCTION_DESCRIPTORS): Define. From-SVN: r242868
2016-11-25[PR 70965] Schedule extra rebuild_cgraph_edgesMartin Jambor4-0/+32
2016-11-25 Martin Jambor <mjambor@suse.cz> PR tree-optimization/70965 * passes.def (pass_build_ssa_passes): Add pass_rebuild_cgraph_edges. gcc/testsuite/ * g++.dg/pr70965.C: New test. From-SVN: r242867
2016-11-25[Patch i386] PR78509 - TARGET_C_EXCESS_PRECISION should not returnJames Greenhalgh4-14/+39
"unpredictable" for EXCESS_PRECISION_TYPE_STANDARD gcc/ PR target/78509 * config/i386/i386.c (i386_excess_precision): Do not return FLT_EVAL_METHOD_UNPREDICTABLE when "type" is EXCESS_PRECISION_TYPE_STANDARD. * target.def (excess_precision): Document that targets should not return FLT_EVAL_METHOD_UNPREDICTABLE when "type" is EXCESS_PRECISION_TYPE_STANDARD or EXCESS_PRECISION_TYPE_FAST. Fix typo in first sentence. * doc/tm.texi: Regenerate. From-SVN: r242866
2016-11-25re PR tree-optimization/78396 (gcc.dg/vect/bb-slp-cond-1.c FAILs after fix ↵Richard Biener2-1/+17
for PR77848) 2016-11-25 Richard Biener <rguenther@suse.de> PR tree-optimization/78396 * tree-vectorizer.c (vectorize_loops): When the if-converted body contains masked loads or stores do not attempt to basic-block-vectorize it. From-SVN: r242865
2016-11-25re PR gcov-profile/78467 (gcc.dg/tree-prof/comp-goto-1.c FAILs)Jakub Jelinek2-1/+8
PR gcov-profile/78467 * gcc.dg/tree-prof/comp-goto-1.c (insn_t): Change offset to signed int. Co-Authored-By: Andreas Schwab <schwab@linux-m68k.org> From-SVN: r242864
2016-11-25Tweak LRA handling of shared spill slotsRichard Sandiford4-40/+51
The previous code processed the users of a stack slot in order of decreasing size and allocated the slot based on the first user. This seems a bit dangerous, since the ordering is based on the mode of the biggest reference while the allocation is based also on the size of the register itself (which I think could be larger). That scheme doesn't scale well to polynomial sizes, since there's no guarantee that the order of the sizes is known at compile time. This patch instead records an upper bound on the size required by all users of a slot. It also records the maximum alignment requirement. gcc/ 2016-11-15 Richard Sandiford <richard.sandiford@arm.com> Alan Hayward <alan.hayward@arm.com> David Sherwood <david.sherwood@arm.com> * function.h (spill_slot_alignment): Declare. * function.c (spill_slot_alignment): New function. * lra-spills.c (slot): Add align and size fields. (assign_mem_slot): Use them in the call to assign_stack_local. (add_pseudo_to_slot): Update the fields. (assign_stack_slot_num_and_sort_pseudos): Initialise the fields. Co-Authored-By: Alan Hayward <alan.hayward@arm.com> Co-Authored-By: David Sherwood <david.sherwood@arm.com> From-SVN: r242863
2016-11-25Set mode of decimal floats before calling layout_typeRichard Sandiford4-7/+20
Previously decimal floating-point types were created and laid out as binary floating-point types, then the caller changed the mode to a decimal mode later. The problem with that approach is that not all targets support an equivalent binary floating-point mode. When they didn't, we would give the type BLKmode and lay it out as a zero-sized type. This probably had no effect in practice. If a target doesn't support a binary mode then it's unlikely to support the decimal equivalent either. However, with the stricter mode checking added by later patches, we would assert if a scalar floating- point type didn't have a scalar floating-point mode. gcc/ 2016-11-16 Richard Sandiford <richard.sandiford@arm.com> Alan Hayward <alan.hayward@arm.com> David Sherwood <david.sherwood@arm.com> * stor-layout.c (layout_type): Allow the caller to set the mode of a float type. Only choose one here if the mode is still VOIDmode. * tree.c (build_common_tree_nodes): Set the type mode of decimal floats before calling layout_type. * config/rs6000/rs6000.c (rs6000_init_builtins): Likewise. Co-Authored-By: Alan Hayward <alan.hayward@arm.com> Co-Authored-By: David Sherwood <david.sherwood@arm.com> From-SVN: r242862
2016-11-25Add run tests for recent sibcall patchesRichard Sandiford3-0/+163
gcc/testsuite/ * gcc.dg/tree-ssa/tailcall-7-run.c: New test. * gcc.dg/tree-ssa/tailcall-8-run.c: Likewise. From-SVN: r242861
2016-11-25Tighten check for whether sibcall references local variablesRichard Sandiford4-2/+93
This loop: /* Make sure the tail invocation of this function does not refer to local variables. */ FOR_EACH_LOCAL_DECL (cfun, idx, var) { if (TREE_CODE (var) != PARM_DECL && auto_var_in_fn_p (var, cfun->decl) && (ref_maybe_used_by_stmt_p (call, var) || call_may_clobber_ref_p (call, var))) return; } triggered even for local variables that are passed by value. This meant that we didn't allow local aggregates to be passed to a sibling call but did (for example) allow global aggregates to be passed. I think the loop is really checking for indirect references, so should be able to skip any variables that never have their address taken. gcc/ * tree-tailcall.c (find_tail_calls): Allow calls to reference local variables if all references are known to be direct. gcc/testsuite/ * gcc.dg/tree-ssa/tailcall-8.c: New test. From-SVN: r242860
2016-11-25Fix bogus pr64277.c failure for avrSenthil Kumar Selvaraj2-3/+14
The smaller int size for the avr target breaks the test's expectation on the number of iterations. The failure goes away if 32 bit ints are used in place of a plain int. Fix by conditionally typedef int32_t to __INT32_TYPE__ for targets with int size < 4, and then use int32_t everywhere. gcc/testsuite 016-11-25 Senthil Kumar Selvaraj <senthil_kumar.selvaraj@atmel.com> * gcc.dg/pr64277.c: Use __INT32_TYPE__ for targets with sizeof(int) < 4. From-SVN: r242859
2016-11-25re PR middle-end/78501 (SEGV in vrp_val_max)Jakub Jelinek2-9/+21
2016-11-25 Jakub Jelinek <jakub@redhat.com> Prathamesh Kulkarni <prathamesh.kulkarni@linaro.org> PR middle-end/78501 * tree-vrp.c (extract_range_basic): Check for ptrdiff_type_node to be non null and it's precision matches precision of lhs's type. Co-Authored-By: Prathamesh Kulkarni <prathamesh.kulkarni@linaro.org> From-SVN: r242858
2016-11-25Daily bump.GCC Administrator1-1/+1
From-SVN: r242857
2016-11-24PR tree-optimization/78476 - snprintf(0, 0, ...) with known arguments not ↵Martin Sebor4-13/+170
optimized away gcc/testsuite/ChangeLog: PR tree-optimization/78476 * gcc.dg/tree-ssa/builtin-sprintf-5.c: New test. gcc/ChangeLog: PR tree-optimization/78476 * gimple-ssa-sprintf.c (struct pass_sprintf_length::call_info): Add a member. (handle_gimple_call): Adjust signature. (try_substitute_return_value): Remove calls to bounded functions with zero buffer size whose result is known. (pass_sprintf_length::execute): Adjust call to handle_gimple_call. From-SVN: r242854
2016-11-24Fix bootstrap with !ASM_OUTPUT_MAX_SKIP_ALIGNRainer Orth2-0/+7
* varasm.c (assemble_start_function): Wrap align_log definition in ASM_OUTPUT_MAX_SKIP_ALIGN. From-SVN: r242853
2016-11-24i386.md (wide AND insn to QImode splitter): Use explicit mode macros.Uros Bizjak2-20/+27
* config/i386/i386.md (wide AND insn to QImode splitter): Use explicit mode macros. (wide OR insn to QImode splitter): Ditto. From-SVN: r242852
2016-11-24* config/i386/i386.md: Move some more patterns around.Uros Bizjak1-106/+106
From-SVN: r242850
2016-11-24re PR rtl-optimization/77541 (wrong code with 512bit vectors of int128 @ -O1)Vladimir Makarov4-31/+92
2016-11-24 Vladimir Makarov <vmakarov@redhat.com> PR rtl-optimization/77541 * lra-constraints.c (struct input_reload): Add field match_p. (get_reload_reg): Check modes of input reloads to generate unique value reload pseudo. (match_reload): Add input reload pseudo for the current insn. 2016-11-24 Vladimir Makarov <vmakarov@redhat.com> PR rtl-optimization/77541 * gcc.target/i386/pr77541.c: New. From-SVN: r242848
2016-11-24re PR fortran/78500 (ICE in gfc_check_vardef_context, at fortran/expr.c:5289)Steven G. Kargl5-2/+20
2016-11-24 Steven G. Kargl <kargl@gcc.gnu.org> PR fortran/78500 * expr.c (gfc_check_vardef_contextm): Fix NULL pointer dereference. * interface.c (matching_typebound_op): Ditto. 2016-11-24 Steven G. Kargl <kargl@gcc.gnu.org> PR fortran/78500 * gfortran.dg/class_result_4.f90: New test. From-SVN: r242846
2016-11-24[Patch AArch64 13/17] Enable _Float16 for AArch64James Greenhalgh7-2/+239
gcc/ * config/aarch64/aarch64-c.c (aarch64_update_cpp_builtins): Update __FLT_EVAL_METHOD__ and __FLT_EVAL_METHOD_C99__ when we switch architecture levels. * config/aarch64/aarch64.c (aarch64_promoted_type): Only promote the aarch64_fp16_type_node, not all HFmode types. (aarch64_libgcc_floating_mode_supported_p): Support HFmode. (aarch64_scalar_mode_supported_p): Likewise. (aarch64_excess_precision): New. (TARGET_LIBGCC_FLOATING_MODE_SUPPORTED_P): Define. (TARGET_SCALAR_MODE_SUPPORTED_P): Likewise. (TARGET_C_EXCESS_PRECISION): Likewise. gcc/testsuite/ * gcc.target/aarch64/_Float16_1.c: New. * gcc.target/aarch64/_Float16_2.c: Likewise. * gcc.target/aarch64/_Float16_3.c: Likewise. From-SVN: r242845
2016-11-24[Patch libgcc AArch64 12/17] Enable hfmode soft-float conversions and ↵James Greenhalgh2-0/+19
truncations gcc/ * config/aarch64/aarch64-c.c (aarch64_scalar_mode_supported_p): New. (TARGET_SCALAR_MODE_SUPPORTED_P): Define. libgcc/ * config/aarch64/sfp-machine.h (_FP_NANFRAC_H): Define. (_FP_NANSIGN_H): Likewise. * config/aarch64/t-softfp (softfp_extensions): Add hftf. (softfp_truncations): Add tfhf. (softfp_extras): Add required conversion functions. From-SVN: r242844
2016-11-24[Patch AArch64 11/17] Add floatdihf2 and floatunsdihf2 patternsJames Greenhalgh4-1/+100
gcc/ * config/aarch64/aarch64.md (<optab>sihf2): Convert to expand. (<optab>dihf2): Likewise. (aarch64_fp16_<optab><mode>hf2): New. gcc/testsuite/ * gcc.target/aarch64/floatdihf2_1.c: New. From-SVN: r242843
2016-11-24Allow -fopenmp in NVPTX mkoffloadAlexander Monakov2-2/+7
PR target/67822 * config/nvptx/mkoffload.c (main): Allow -fopenmp. From-SVN: r242842
2016-11-24sparc-common.c (sparc_option_optimization_table): Enable REE at -O2 and higher.Eric Botcazou3-0/+14
* common/config/sparc/sparc-common.c (sparc_option_optimization_table): Enable REE at -O2 and higher. * config/sparc/sparc.c (sparc_option_override): Disable it by default in 32-bit mode. From-SVN: r242841
2016-11-24[TER] PR target/48863 : Don't replace expressions across local register ↵Kyrylo Tkachov4-4/+74
variable definitions PR target/48863 PR inline-asm/70184 * tree-ssa-ter.c (temp_expr_table): Add reg_vars_cnt field. (new_temp_expr_table): Initialise reg_vars_cnt. (free_temp_expr_table): Release reg_vars_cnt. (process_replaceable): Add reg_vars_cnt argument, set reg_vars_cnt field of TAB. (find_replaceable_in_bb): Use the above to record register variable write occurrences and cancel replacement across them. * gcc.target/arm/pr48863.c: New test. From-SVN: r242840
2016-11-24re PR rtl-optimization/78437 (invalid sign-extend conversion in REE pass)Eric Botcazou2-0/+54
PR rtl-optimization/78437 * ree.c (get_uses): New function. (combine_reaching_defs): When a copy is needed, return false if any reaching use of the source register reads it in a mode larger than the mode it is set in and WORD_REGISTER_OPERATIONS is true. From-SVN: r242839
2016-11-24Dump probability for edges a frequency for BBsMartin Liska13-21/+107
* gimple-pretty-print.c (dump_edge_probability): New function. (dump_gimple_switch): Dump label edge probabilities. (dump_gimple_cond): Likewise. (dump_gimple_label): Dump (dump_gimple_bb_header): Dump basic block frequency. (pp_cfg_jump): Replace e->dest argument with e. (dump_implicit_edges): Likewise. * tree-ssa-loop-ivopts.c (get_scaled_computation_cost_at): Use gimple_bb (at) instead of at->bb. * gcc.dg/builtin-unreachable-6.c: Update test to not to scan parts for frequencies/probabilities. * gcc.dg/pr34027-1.c: Likewise. * gcc.dg/strict-overflow-2.c: Likewise. * gcc.dg/tree-ssa/20040703-1.c: Likewise. * gcc.dg/tree-ssa/builtin-sprintf-2.c: Likewise. * gcc.dg/tree-ssa/pr32044.c: Likewise. * gcc.dg/tree-ssa/vector-3.c: Likewise. * gcc.dg/tree-ssa/vrp101.c: Likewise. * gcc.dg/tree-ssa/dump-2.c: New test. From-SVN: r242837
2016-11-24common.opt (flimit-function-alignment): New.Bernd Schmidt8-4/+43
gcc/ * common.opt (flimit-function-alignment): New. * doc/invoke.texi (-flimit-function-alignment): Document. * emit-rtl.h (struct rtl_data): Add max_insn_address field. * final.c (shorten_branches): Set it. * varasm.c (assemble_start_function): Limit alignment if requested. gcc/testsuite/ * gcc.target/i386/align-limit.c: New test. From-SVN: r242836
2016-11-24re PR tree-optimization/71595 (ICE on valid code at -O2 and -O3 on ↵Richard Biener6-13/+55
x86_64-linux-gnu: in check_loop_closed_ssa_use, at tree-ssa-loop-manip.c:704) 2016-11-24 Richard Biener <rguenther@suse.de> PR tree-optimization/71595 * cfgloopmanip.h (remove_path): Add irred_invalidated and loop_closed_ssa_invalidated parameters, defaulted to NULL. * cfgloopmanip.c (remove_path): Likewise, pass them along to called functions. Only fix irred flags if the caller didn't request state. * tree-ssa-loop-ivcanon.c (unloop_loops): Use add_bb_to_loop. (unloop_loops): Pass irred_invalidated and loop_closed_ssa_invalidated to remove_path. * gcc.dg/torture/pr71595.c: New testcase. From-SVN: r242835
2016-11-24re PR rtl-optimization/78120 (If conversion no longer performed)Bernd Schmidt4-10/+61
PR rtl-optimization/78120 * ifcvt.c (noce_conversion_profitable_p): Check original cost in all cases, and additionally test against max_seq_cost for speed optimization. (noce_process_if_block): Compute an estimate for the original cost when optimizing for speed, using the minimum of then and else block costs. testsuite/ PR rtl-optimization/78120 * gcc.target/i386/pr78120.c: New test. From-SVN: r242834
2016-11-24re PR rtl-optimization/78120 (If conversion no longer performed)Bernd Schmidt2-1/+4
PR rtl-optimization/78120 * rtlanal.c (insn_rtx_cost): Use set_rtx_cost. From-SVN: r242833
2016-11-24re PR rtl-optimization/78120 (If conversion no longer performed)Bernd Schmidt2-1/+23
PR rtl-optimization/78120 * config/i386/i386.c (ix86_rtx_costs): Fully handle SETs. From-SVN: r242832
2016-11-24match.pd: Refine type conversion in result expr for below pattern: (cond ↵Bin Cheng2-3/+9
(cmp (convert1? * match.pd: Refine type conversion in result expr for below pattern: (cond (cmp (convert1? x) c1) (convert2? x) c2) -> (minmax (x c)). From-SVN: r242831
2016-11-24re PR middle-end/78429 (ICE in set_value_range, at tree-vrp.c on ↵Eric Botcazou5-7/+50
non-standard boolean) PR middle-end/78429 * tree.h (wi::fits_to_boolean_p): New predicate. (wi::fits_to_tree_p): Use it for boolean types. * tree.c (int_fits_type_p): Likewise. From-SVN: r242829
2016-11-24cp_parser_range_for: use safe_push instead of quick_push (PRMartin Liska4-4/+26
PR bootstrap/78493 * parser.c (cp_parser_range_for): Use safe_push instead of quick_push. PR bootstrap/78493 * g++.dg/cpp1z/decomp18.C: New test. From-SVN: r242828
2016-11-24ldp_stp_1.c: Add -mcpu=generic.Naveen H.S3-2/+7
2016-11-23 Naveen H.S <Naveen.Hurugalawadi@caviumnetworks.com> * gcc.target/aarch64/ldp_stp_1.c : Add -mcpu=generic. * gcc.target/aarch64/store-pair-1.c : Likewise. From-SVN: r242827
2016-11-24re PR middle-end/71762 (~X & Y to X < Y doesn't work for uninitialized values)Richard Biener1-1/+3
2016-11-23 Richard Biener <rguenther@suse.de> PR middle-end/71762 * match.pd ((~X & Y) -> X < Y, (X & ~Y) -> Y < X, (~X | Y) -> X <= Y, (X | ~Y) -> Y <= X): Remove. * gcc.dg/torture/pr71762-1.c: New testcase. * gcc.dg/torture/pr71762-2.c: Likewise. * gcc.dg/torture/pr71762-3.c: Likewise. * gcc.dg/tree-ssa/forwprop-28.c: XFAIL. From-SVN: r242822
2016-11-24fmaxmin.c: Add -fno-vect-cost-model.Naveen H.S13-12/+27
2016-11-23 Naveen H.S <Naveen.Hurugalawadi@caviumnetworks.com> * gcc.target/aarch64/fmaxmin.c : Add -fno-vect-cost-model. * gcc.target/aarch64/fmul_fcvt_2.c : Likewise. * gcc.target/aarch64/vect-abs-compile.c : Likewise. * gcc.target/aarch64/vect-clz.c : Likewise. * gcc.target/aarch64/vect-fcm-eq-d.c : Likewise. * gcc.target/aarch64/vect-fcm-ge-d.c : Likewise. * gcc.target/aarch64/vect-fcm-gt-d.c : Likewise. * gcc.target/aarch64/vect-fmovd-zero.c : Likewise. * gcc.target/aarch64/vect-fmovd.c : Likewise. * gcc.target/aarch64/vect-fmovf-zero.c : Likewise. * gcc.target/aarch64/vect-fmovf.c : Likewise. * gcc.target/aarch64/vect_ctz_1.c : Likewise. From-SVN: r242821
2016-11-24Fix print_node for CONSTRUCTORsMartin Liska3-29/+25
* print-tree.c (struct bucket): Remove. (print_node): Add new argument which drives whether a tree node is printed briefly or not. (debug_tree): Replace a custom hash table with hash_set<T>. * print-tree.h (print_node): Add the argument. From-SVN: r242820
2016-11-24nios2.c (nios2_init_libfuncs): Add ATTRIBUTE_UNUSED.Chung-Lin Tang2-1/+5
2016-11-24 Chung-Lin Tang <cltang@codesourcery.com> * config/nios2/nios2.c (nios2_init_libfuncs): Add ATTRIBUTE_UNUSED. From-SVN: r242819
2016-11-23re PR target/78458 (LRA ICE building libgcc for powerpc-linux-gnuspe e500v2)Peter Bergner4-3/+31
gcc/ PR target/78458 * config/rs6000/rs6000.h (HARD_REGNO_CALLER_SAVE_MODE): Return MODE if it is at least NREGS wide. gcc/testsuite/ PR target/78458 * gcc.target/powerpc/pr78458.c: New. From-SVN: r242818
2016-11-24Daily bump.GCC Administrator1-1/+1
From-SVN: r242817
2016-11-23Fix e500 offset handling for TImode.Joseph Myers2-4/+9
Given my previous fix for a missing insn pattern for e500, building glibc runs into an assembler error "Error: operand out of range (256 is not between 0 and 248)". This comes from an insn: (insn 115 1209 1210 (set (reg:DF 27 27 [orig:294 _129 ] [294]) (subreg:DF (mem/c:TI (plus:SI (reg/f:SI 1 1) (const_int 256 [0x100])) [14 %sfp+256 S16 A128]) 0)) 1909 {*frob_df_ti} (nil)) This patch adjusts the offset handling for TImode - and TDmode and PTImode in case such subregs can arise for them - to be the same as for TFmode, so that proper SPE offset checks are made in the TARGET_E500_DOUBLE case. This allows the glibc build to complete. Testing shows 372 FAILs across the gcc, g++ and libstdc++ testsuites; more cleanup is certainly needed, but this gets to the point where the toolchain at least builds so it's possible to compare test results when fixing bugs. * config/rs6000/rs6000.c (rs6000_legitimate_offset_address_p): For TARGET_E500_DOUBLE. handle TDmode, TImode and PTImode the same as TFmode, IFmode and KFmode. From-SVN: r242814
2016-11-23Add another e500 subreg pattern.Joseph Myers4-0/+28
Building glibc for powerpc-linux-gnuspe --enable-e500-double, given the patch <https://gcc.gnu.org/ml/gcc-patches/2016-11/msg02404.html> applied, fails with errors such as: ../sysdeps/ieee754/ldbl-128ibm/s_modfl.c: In function '__modfl': ../sysdeps/ieee754/ldbl-128ibm/s_modfl.c:91:1: error: unrecognizable insn: } ^ (insn 31 30 32 2 (set (reg:DF 203) (subreg:DF (reg:TI 202) 8)) "../sysdeps/ieee754/ldbl-128ibm/s_modfl.c":44 -1 (nil)) ../sysdeps/ieee754/ldbl-128ibm/s_modfl.c:91:1: internal compiler error: in extract_insn, at recog.c:2311 This patch adds an insn pattern similar to various patterns already present to handle extracting such a subreg. This allows the glibc build to get further, until it runs into an assembler error for which I have another patch. gcc: * config/rs6000/spe.md (*frob_<SPE64:mode>_ti_8): New insn pattern. gcc/testsuite: * gcc.c-torture/compile/20161123-1.c: New test. From-SVN: r242813
2016-11-24combine: Query can_change_dest_mode before changing dest modeSegher Boessenkool2-1/+7
As reported in https://gcc.gnu.org/ml/gcc-patches/2016-11/msg02388.html . Changing the mode of a hard register can lead to problems, or at least it can make worse code if the result will need reloads. * combine.c (change_zero_ext): Only change the mode of a hard register destination if can_change_dest_mode holds for that. From-SVN: r242812
2016-11-23* varasm.c (assemble_name): Increase buffer size for name.Jeff Law2-1/+3
From-SVN: r242810
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