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2020-05-19PR c++/94923 - False positive -Wclass-memaccess with trivially copyable ↵Martin Sebor6-36/+183
std::optional gcc/cp/ChangeLog: PR c++/94923 * call.c ((maybe_warn_class_memaccess): Use is_byte_access_type. * cp-tree.h (is_dummy_object): Return bool. (is_byte_access_type): Declare new function. * tree.c (is_dummy_object): Return bool. (is_byte_access_type): Define new function. gcc/testsuite/ChangeLog: PR c++/94923 * g++.dg/Wclass-memaccess.C: Add tests for std::byte.
2020-05-19preprocessor: Reimplement raw string lexing [pr95149]Nathan Sidwell4-35/+38
pr95149 is a false positive static analysis checker. But it encouranged me to fix raw string lexing, which does contain a complicated macro and pointers to local variables. The reimplementation does away with that macro. Part of the complication is we need to undo some of the fresh line processing -- trigraph notes and escaped line continuations. But the undone characters need to go through the raw string processing, as they can legitimately be part of the prefix marker. however, in this reformulation we only process one line marker at a time[*], so there's a limited number of undone characters. We can arrange the buffering to make sure we don't split such an append sequence, and then simply take the characters from the append buffer. The prefix scanner had a switch statement, which I discovered was not optimized as well as an if of a bunch of explicit comparisons (pr 95208 filed). Finally I adjusted the failure mode. When we get a bad prefix, we lex up until the next '"', thus often swallowing the whole raw string. Previously we'd bail and then the lexer would usually generate stupid tokens, particularly when meeting the ending '"'. libcpp/ * lex.c (struct lit_accum): New. (bufring_append): Replace by lit_accum::append. (lex_raw_string): Reimplement, using fragments of the old version. (lex_string): Adjust lex_raw_string call. gcc/testsuite/ * c-c++-common/raw-string-14.c: Adjust errors. * c-c++-common/raw-string-16.c: Likewise. * c-c++-common/raw-string-5.c: Likewise.
2020-05-19Fix FAIL: gcc.target/i386/pr92645-4.cRichard Biener2-3/+7
This adjusts the testcase for the introduced vector promotion/demotion support. 2020-05-19 Richard Biener <rguenther@suse.de> * gcc.target/i386/pr92645-4.c: Adjust expected pattern.
2020-05-19preprocessor: Fix ICE with EOF in macro args [pr95182]Nathan Sidwell4-0/+27
This was another latent case of us losing an EOF token, but succeeding anyway. Since my patch to make us pay more attention to EOFs it came to light. We also need to keep the EOF if we fall off the end of the main file. Forced includes look like regular nested includes at this point. PR preprocessor/95182 libcpp/ * macro.c (collect_args): Preserve EOFif we fell out of the main file. (cpp_get_token_1): Reformat a couple of short lines.
2020-05-19TESTSUITE: Fix tests for 16-bit targetsJozef Lawrynowicz114-450/+790
gcc/ChangeLog: 2020-05-19 Jozef Lawrynowicz <jozef.l@mittosystems.com> * doc/sourcebuild.texi: Document new short_eq_int, ptr_eq_short, msp430_small, msp430_large and size24plus DejaGNU effective targets. Improve grammar in descriptions for size20plus and size32plus effective targets. gcc/testsuite/ChangeLog: 2020-05-19 Jozef Lawrynowicz <jozef.l@mittosystems.com> * c-c++-common/builtin-has-attribute-7.c: Require size24plus. * c-c++-common/cpp/pr63831-1.c: Store result in _has_cpp_attribute in a long. * c-c++-common/pr81376.c: Skip scan-tree-dump for short_eq_int. Extend test for short_eq_int. * g++.dg/abi/scoped1.C: Skip dg-warning tests for short_eq_int. * g++.dg/cpp0x/constexpr-70001-1.C: Require size24plus. * g++.dg/cpp0x/constexpr-bitfield3.C: Require int32plus. * g++.dg/cpp0x/enum13.C: Skip dg-warning for short_eq_int. * g++.dg/cpp0x/initlist5.C: Add dg-error for short_eq_int. * g++.dg/cpp0x/initlist7.C: Add dg-warning for !int32plus. * g++.dg/cpp0x/nullptr04.C: Skip dg-error for ptr_eq_short. * g++.dg/cpp0x/variadic-value1.C: Add typedef for int32_t. * g++.dg/cpp1y/constexpr-arith-overflow.C: Fix test for sizeof(int) == sizeof(short). * g++.dg/cpp1y/digit-sep-neg.C: Add typedef for int32_t. * g++.dg/cpp1y/pr57644.C: Add typedef for uint32_t. * g++.dg/cpp1y/pr77321.C: Require size24plus. * g++.dg/cpp1y/var-templ4.C: Add typedef for int32_t. * g++.dg/cpp1z/direct-enum-init1.C: Skip dg-error for short_eq_int. * g++.dg/delayedfold/fwrapv1.C: Skip for int16. * g++.dg/expr/bitfield9.C: Add typedef for int32_t. * g++.dg/ext/attribute-test-1.C: Add typedef for uint32_t. * g++.dg/ext/bitfield1.C: Add typedef for int32_t. * g++.dg/ext/flexary13.C: Add typedef for int32_t. * g++.dg/ext/utf-cvt.C: Adjust dg-warning for int16. * g++.dg/ext/vector28.C: Add typedef for int32_t. * g++.dg/ext/vla15.C: Add typedef for int32_t. * g++.dg/init/array11.C: Require size32plus. * g++.dg/init/array15.C: Require size24plus. * g++.dg/init/array4.C: Require size20plus. * g++.dg/init/const7.C: Skip dg-message for ptr_eq_short. * g++.dg/init/new38.C: Relax regex in dg-error. * g++.dg/init/new44.C: Skip dg-error for msp430_small. Adjust test for 16-bit size_t. Add special case for msp430 -mlarge. * g++.dg/init/value9.C: Add typedef for int32_t. * g++.dg/ipa/pr77333.C: Add typedef for int32_t. * g++.dg/lto/20080908-1_0.C: Add typedef for int32_t. * g++.dg/opt/pr55717.C: Add typedef for uint32_t. * g++.dg/opt/pr60597.C: Add typedef for int32_t. * g++.dg/opt/pr81715.C: Require size20plus. * g++.dg/opt/reload3.C: Add typedef for uint32_t. * g++.dg/opt/temp2.C: Require size20plus. * g++.dg/opt/thunk1.C: Likewise. * g++.dg/other/error23.C: Dont assume __SIZEOF_INT__ == 4. * g++.dg/other/pr31078.C: Adjust typedef for 32-bit int. * g++.dg/parse/concat1.C: Skip dg-error for size20plus. * g++.dg/parse/defarg5.C: Add typedef for int32_t and uint32_t. * g++.dg/pr48484.C: Add typedef for int32_t. * g++.dg/pr53037-2.C: Likewise. * g++.dg/pr53037-3.C: Likewise. * g++.dg/pr66655.C: Use int32_t. * g++.dg/pr66655.h: Add typedef for int32_t. * g++.dg/pr66655_1.cc: Use int32_t. * g++.dg/pr67351.C: Define 32-bit uint. * g++.dg/template/array30.C: Add typedef for int32_t. * g++.dg/template/constant1.C: Extend test for 8-bit and 16-bit int. * g++.dg/template/constant2.C: Likewise. * g++.dg/template/friend18.C: Add typedef for int32_t. * g++.dg/template/pr68978.C: Likewise. * g++.dg/torture/pr37421.C: Require int_eq_float. * g++.dg/torture/pr88861.C: Handle 16-bit int. * g++.dg/tree-ssa/pr19807.C: Likewise. * g++.dg/tree-ssa/pr27291.C: Fix typedef for uint32_t. * g++.dg/tree-ssa/pr49516.C: Fix typedefs for int{16,32}_t and uint{32,64}_t. * g++.dg/warn/Wconversion-integer.C: Add typedefs for {u,}int32_t. * g++.dg/warn/Wconversion-null-2.C: Adjust g() declaration. * g++.dg/warn/Wconversion-null.C: Likewise. * g++.dg/warn/Wconversion3.C: Skip dg-warning for short_eq_int. * g++.dg/warn/Wduplicated-branches1.C: Add dg-warning for short_eq_int. * g++.dg/warn/Wplacement-new-size-5.C: Add typedef for int32_t. * g++.dg/warn/Wplacement-new-size.C: Likewise. * g++.dg/warn/Wstrict-aliasing-5.C: Add typedef for uint32_t. * g++.dg/warn/Wstrict-aliasing-bogus-signed-unsigned.C: Add typedef for {u,}int32_t. * g++.dg/warn/Wtype-limits-Wextra.C: Adjust dg-warning for short_eq_int. * g++.dg/warn/Wtype-limits.C: Likewise. * g++.old-deja/g++.brendan/enum11.C: Add typedef for uint32_t. * g++.old-deja/g++.bugs/900227_01.C: Skip dg-error for ptr_eq_short. * g++.old-deja/g++.mike/ns15.C: Require size20plus. * g++.old-deja/g++.other/exprstmt1.C: Add typedef for uint32_t. * g++.old-deja/g++.other/inline12.C: Adjust udword typedef. * g++.old-deja/g++.other/new6.C: Add typedef for int32_t. * g++.old-deja/g++.pt/crash16.C: Skip for int16. * g++.old-deja/g++.robertl/eb76.C: Likewise. * g++.old-deja/g++.warn/flow1.C: Add typedef for int32_t. * gcc.dg/Walloca-14.c: Adjust -Walloca-larger-than= parameter for !ptr32plus. * gcc.dg/Warray-bounds-32.c: Adjust dg-warning for size20plus. * gcc.dg/Wbuiltin-declaration-mismatch-4.c: Adjust dg-warning for short_eq_int. Handle case where ptrdiff_t/size_t is __int20. * gcc.dg/concat2.c: Skip dg-error for size20plus. * gcc.dg/fold-convmaxconv-1.c: Add typedef for {u,}int32_t. * gcc.dg/fold-convminconv-1.c: Likewise. * gcc.dg/graphite/scop-4.c: Require size20plus. * gcc.dg/loop-versioning-1.c: Adjust test for small size_t. * gcc.dg/loop-versioning-2.c: Require size20plus. * gcc.dg/lto/20081210-1_0.c: Adjust typedef for uintptr_t. * gcc.dg/lto/pr85870_0.c: Add typedef for uint32_t. * gcc.dg/lto/pr85870_1.c: Likewise. * gcc.dg/pr36227.c: Adjust typedef for ptrcast. * gcc.dg/pr42611.c: First check for size_t equality with void * before trying other types. * gcc.dg/pr59963-2.c: Skip dg-warning for int16 instead of xfail. * gcc.dg/pr68317.c: Add typedef for int32_t. * gcc.dg/pr78973.c: Adjust dg-warning for int16. * gcc.dg/pr85859.c: Cast using __INTPTR_TYPE__ instead of long. * gcc.dg/pr86179.c: Add typedef for {u,}int32_t. * gcc.dg/torture/20181024-1.c: Require size32plus. * gcc.dg/torture/pr71598-2.c: Skip for short_eq_int. * gcc.dg/torture/pr86034.c: Add typedef for int32_t. * gcc.dg/tree-ssa/builtin-sprintf-warn-3.c: Adjust dg-warning for int16 and msp430 -mlarge. * gcc.dg/tree-ssa/integer-addr.c: Use __INTPTR_MAX__ for a large constant that is a valid address. * gcc.dg/tree-ssa/loop-interchange-10.c: Add typedef for int32_t. * gcc.dg/tree-ssa/pr84436-3.c: Adjust dg-final for int16. * gcc.dg/tree-ssa/pr84648.c: Add typedef for uint32_t. * gcc.dg/tree-ssa/scev-8.c: Cast to char if sizeof(int) == sizeof(short). * gcc.dg/tree-ssa/ssa-dom-thread-8.c: Adjust test for msp430 -mlarge. * lib/target-supports.exp (check_effective_target_size24plus): New. (check_effective_target_short_eq_int): New. (check_effective_target_ptr_eq_short): New. (check_effective_target_msp430_small): New. (check_effective_target_msp430_large): New.
2020-05-19bpf: do not save/restore callee-saved registers in function prolog/epilogJose E. Marchesi6-58/+129
BPF considers that every call to a function allocates a fresh set of registers that are available to the callee, of which the first five may have bee initialized with the function arguments. This is implemented by both interpreter and JIT in the Linux kernel. This is enforced by the kernel BPF verifier, which will reject any code in which non-initialized registers are accessed before being written. Consequently, the spill instructions generated in function prologue were causing the verifier to reject our compiled programs. This patch makes GCC to not save/restore callee-saved registers in function prologue/epilogue, unless xBPF mode is enabled. 2020-05-19 Jose E. Marchesi <jose.marchesi@oracle.com> gcc/ * config/bpf/bpf.c (bpf_compute_frame_layout): Include space for callee saved registers only in xBPF. (bpf_expand_prologue): Save callee saved registers only in xBPF. (bpf_expand_epilogue): Likewise for restoring. * doc/invoke.texi (eBPF Options): Document this is activated by -mxbpf. gcc/testsuite/ * gcc.target/bpf/xbpf-callee-saved-regs-1.c: New test. * gcc.target/bpf/xbpf-callee-saved-regs-2.c: Likewise.
2020-05-19bpf: add support for the -mxbpf optionJose E. Marchesi3-1/+17
This patch adds support for a new option -mxbpf. This tells GCC to generate code for an expanded version of BPF that relaxes some of the restrictions imposed by BPF. 2020-05-19 Jose E. Marchesi <jose.marchesi@oracle.com> gcc/ * config/bpf/bpf.opt (mxbpf): New option. * doc/invoke.texi (Option Summary): Add -mxbpf. (eBPF Options): Document -mxbbpf.
2020-05-19Add missing ChangeLog entries.Uros Bizjak2-0/+29
2020-05-19i386: Add missing vector zero/sign extend expanders [PR92658]Uros Bizjak4-0/+805
2020-05-19 Uroš Bizjak <ubizjak@gmail.com> gcc/ChangeLog: PR target/92658 * config/i386/sse.md (<code>v16qiv16hi2): New expander. (<code>v32qiv32hi2): Ditto. (<code>v8qiv8hi2): Ditto. (<code>v16qiv16si2): Ditto. (<code>v8qiv8si2): Ditto. (<code>v4qiv4si2): Ditto. (<code>v16hiv16si2): Ditto. (<code>v8hiv8si2): Ditto. (<code>v4hiv4si2): Ditto. (<code>v8qiv8di2): Ditto. (<code>v4qiv4di2): Ditto. (<code>v2qiv2di2): Ditto. (<code>v8hiv8di2): Ditto. (<code>v4hiv4di2): Ditto. (<code>v2hiv2di2): Ditto. (<code>v8siv8di2): Ditto. (<code>v4siv4di2): Ditto. (<code>v2siv2di2): Ditto. gcc/testsuite/ChangeLog: PR target/92658 * gcc.target/i386/pr92658-sse4.c: New test. * gcc.target/i386/pr92658-avx2.c: New test. * gcc.target/i386/pr92658-avx512bw.c: New test.
2020-05-19Add missing ChangeLog entry.Martin Liska1-0/+4
2020-05-19Fix typo in c-parser.c.Martin Liska1-1/+1
gcc/c/ChangeLog: * c-parser.c: Fix typo.
2020-05-19RISC-V: Handle implied extension for -march parser.Kito Cheng8-12/+122
- Implied rule are introduced into latest RISC-V ISA spec. - Only implemented D implied F-extension. Zicsr and Zifence are not implement yet, so the rule not included in this patch. - Pass preprocessed arch string to arch. - Verified with binutils 2.30 and 2.34. gcc/ChangeLog * common/config/riscv/riscv-common.c (riscv_implied_info_t): New. (riscv_implied_info): New. (riscv_subset_list): Add handle_implied_ext. (riscv_subset_list::to_string): New parameter version_p to control output format. (riscv_subset_list::handle_implied_ext): New. (riscv_subset_list::parse_std_ext): Call handle_implied_ext. (riscv_arch_str): New parameter version_p to control output format. (riscv_expand_arch): New. * config/riscv/riscv-protos.h (riscv_arch_str): New parameter, version_p. * config/riscv/riscv.h (riscv_expand_arch): New, (EXTRA_SPEC_FUNCTIONS): Define. (ASM_SPEC): Transform -march= via riscv_expand_arch. gcc/testsuite/ChangeLog * gcc.target/riscv/arch-6.c: New. * gcc.target/riscv/attribute-11.c: New. * gcc.target/riscv/attribute-12.c: New.
2020-05-19RISC-V: Update march parserKito Cheng6-23/+42
- The arch string rule has changed in latest spec, it introduced new multi-letter extension prefix with 'h' and 'z', and drop `sx`. also adjust parsing order for 's' and 'x'. gcc/ChangeLog * riscv-common.c (parse_sv_or_non_std_ext): Rename to parse_multiletter_ext. (parse_multiletter_ext): Add parsing `h` and `z`, drop `sx`, adjust parsing order for 's' and 'x'. gcc/testsuite/ChangeLog * gcc.target/riscv/arch-3.c: Adjust option. * gcc.target/riscv/arch-5.c: New. * gcc.target/riscv/attribute-9.c: Adjust option and test condition.
2020-05-19cost invariant nodes from vect_slp_analyze_node_operations SLP walkRichard Biener4-89/+107
2020-05-19 Richard Biener <rguenther@suse.de> * tree-vectorizer.h (_slp_tree::vectype): Add field. (SLP_TREE_VECTYPE): New. * tree-vect-slp.c (vect_create_new_slp_node): Initialize SLP_TREE_VECTYPE. (vect_create_new_slp_node): Likewise. (vect_prologue_cost_for_slp): Move here from tree-vect-stmts.c and simplify. (vect_slp_analyze_node_operations): Walk nodes children for invariant costing. (vect_get_constant_vectors): Use local scope op variable. * tree-vect-stmts.c (vect_prologue_cost_for_slp_op): Remove here. (vect_model_simple_cost): Adjust. (vect_model_store_cost): Likewise. (vectorizable_store): Likewise.
2020-05-18c++: Enable spec_hasher table sanitization [PR87847]Patrick Palka2-3/+6
It looks like hash table sanitization is now safe to enable for the decl_specializations and type_specializations tables, probably ever since PR94454 was fixed. gcc/cp/ChangeLog: PR c++/87847 * pt.c (init_template_processing): Enable sanitization for decl_specializations and type_specializations.
2020-05-18c++: Explain fn template argument type/value mismatches [PR66439]Patrick Palka7-2/+34
In fn_type_unifcation, we are passing NULL_TREE as the 'in_decl' parameter to coerce_template_parms, and this is causing template type/value mismatch error messages to get suppressed regardless of the value of 'complain'. This means that when substitution into a function template fails due to a type/value mismatch between a template parameter and the provided template argument, we just say "template argument deduction/substitution failed:" without a followup explanation of the failure. Fix this by passing 'fn' instead of NULL_TREE to coerce_template_parms. gcc/cp/ChangeLog: PR c++/66439 * pt.c (fn_type_unification): Pass 'fn' instead of NULL_TREE as the 'in_decl' parameter to coerce_template_parms. gcc/testsuite/ChangeLog: PR c++/66439 * g++.dg/cpp2a/concepts-ts4.C: Expect a "type/value mismatch" diagnostic. * g++.dg/cpp2a/concepts-ts6.C: Likewise. * g++.dg/template/error56.C: Likewise. * g++.dg/template/error59.C: New test. libstdc++-v3/ChangeLog: PR c++/66439 * testsuite/20_util/pair/astuple/get_neg.cc: Prune "type/value mismatch" messages. * testsuite/20_util/tuple/element_access/get_neg.cc: Likewise.
2020-05-19Daily bump.GCC Administrator1-1/+1
2020-05-18c++: ICE when shortening right shift [PR94955]Marek Polacek4-1/+26
Since r10-6527 fold_for_warn calls maybe_constant_value, which means it can fold more than it previously could. In this testcase it means that cp_build_binary_op/RSHIFT_EXPR set short_shift because now we were able to fold op1 to an INTEGER_CST. But then when actually performing the shortening we crashed because cp_fold_rvalue wasn't able to fold as much as f_f_w and so tree_int_cst_sgn crashed on a NOP_EXPR. Therefore the calls should probably match. PR c++/94955 * typeck.c (cp_build_binary_op): Use fold_for_warn instead of cp_fold_rvalue. * g++.dg/cpp0x/constexpr-shift2.C: New test.
2020-05-18c++: ICE with -Wall and constexpr if [PR94937]Marek Polacek6-13/+62
An ICE arises here because we call cp_get_callee_fndecl_nofold in a template, and we've got a CALL_EXPR whose CALL_EXPR_FN is a BASELINK. This tickles the INDIRECT_TYPE_P assert in cp_get_fndecl_from_callee. Fixed by turning the assert into a condition and returning NULL_TREE in that case. PR c++/94937 * cvt.c (cp_get_fndecl_from_callee): Return NULL_TREE if the function type is not INDIRECT_TYPE_P. * decl.c (omp_declare_variant_finalize_one): Call cp_get_callee_fndecl_nofold instead of looking for the function decl manually. * g++.dg/cpp1z/constexpr-if34.C: New test. * g++.dg/cpp2a/is-constant-evaluated10.C: New test.
2020-05-18PR middle-end/92815 - spurious -Wstringop-overflow writing into a flexible ↵Martin Sebor2-2/+8
array of an extern struct Adjust test to avoid failures in ILP32 mode. gcc/testsuite/ChangeLog: PR middle-end/92815 * gcc.dg/builtin-object-size-20.c: Adjust to avoid failures in ILP32 mode.
2020-05-18c++: Sorry about type-dependent arg for __builtin_has_attribute [PR90915]Marek Polacek4-1/+25
Until 92104 is fixed, let's sorry rather than crash. PR c++/90915 * parser.c (cp_parser_has_attribute_expression): Sorry on a type-dependent argument. * g++.dg/ext/builtin-has-attribute.C: New test.
2020-05-18PR middle-end/92815 - spurious -Wstringop-overflow writing into a flexible ↵Martin Sebor7-17/+439
array of an extern struct gcc/ChangeLog: PR middle-end/92815 * tree-object-size.c (decl_init_size): New function. (addr_object_size): Call it. * tree.h (last_field): Declare. (first_field): Add attribute nonnull. gcc/testsuite/ChangeLog: PR middle-end/92815 * gcc.dg/Warray-bounds-56.c: Remove xfails. * gcc.dg/builtin-object-size-20.c: New test. * gcc.dg/builtin-object-size-21.c: New test.
2020-05-18PR middle-end/94940 - spurious -Warray-bounds for a zero length array member ↵Martin Sebor5-39/+237
of union gcc/testsuite/ChangeLog: PR middle-end/94940 * gcc.dg/Warray-bounds-61.c: New test. gcc/ChangeLog: PR middle-end/94940 * tree-vrp.c (vrp_prop::check_mem_ref): Remove unreachable code. * tree.c (component_ref_size): Correct the handling or array members of unions. Drop a pointless test. Rename a local variable.
2020-05-18Update gcc sv.po.Joseph Myers2-412/+255
* sv.po: Update.
2020-05-18c++: Implement DR 1512, Pointer comparison vs qual convs [PR87699]Marek Polacek11-87/+287
This patch resolves DR 1512 (and, by turn, DR 583). This entails: 1) Relational pointer comparisons against null pointer constants have been made ill-formed: void f(char *p) { if (p > 0) // ... } was always invalid in C but was -- accidentally -- allowed in C++. 2) This was ill-formed: bool foo(int** x, const int** y) { return x < y; } because 'int**' couldn't be converted to 'const int**'. This was fixed by re-defining a generic composite pointer type. The composite type of these two pointers will be 'const int *const *', to which both pointers can be converted. 3) The overload descriptions for built-in operators were adjusted, because objects of type std::nullptr_t cannot be used with relational operators any more. I fixed 1) by adjusting cp_build_binary_op; we already had a warning for it so made it a hard error now. Then 2) required tweaking composite_pointer_type_r. [expr.type] defines the composite pointer type by using the "cv-combined type." We didn't implement the [conv.qual]/3.3 part; previously the composite type of 'int**' and 'const int**' was 'const int**', so this didn't compile: void f(const int **p, int **q) { true ? p : q; } I wrote a more extensive test for this which uses decltype and some template magic to check the composite type, see composite-ptr-type.C. We still don't handle everything that [expr.type] requires us to, but it's pretty close. And finally 3) was handled in add_builtin_candidate. Turned out we weren't creating built-in operator candidates when the type was std::nullptr_t at all. We should, for == and !=. Tested in builtin4.C. In passing, I'm fixing some of the comments too. DR 1512 PR c++/87699 * call.c (add_builtin_candidate) <case EQ_EXPR>: Create candidate operator functions when type is std::nullptr_t for ==/!=. * typeck.c (composite_pointer_type_r): Add bool a * parameter. Use it to maybe add "const" to the pointer type. (composite_pointer_type): Update the call to composite_pointer_type_r. (cp_build_binary_op): Turn two warning_at into error_at. Print the types. * g++.dg/cpp0x/constexpr-array-ptr10.C: Change dg-warning to dg-error and adjust the expected messages in dg-error. * g++.dg/expr/composite-ptr-type.C: New test. * g++.dg/expr/ptr-comp1.C: New test. * g++.dg/expr/ptr-comp2.C: New test. * g++.dg/expr/ptr-comp3.C: New test. * g++.dg/overload/builtin4.C: New test. * g++.dg/warn/Wextra-3.C: Change dg-warning to dg-error.
2020-05-18c++: Create fewer SAVE_EXPR.Jason Merrill2-4/+8
In a couple of places in build_over_call we were calling cp_stabilize_reference but only using the result once, so it isn't needed. gcc/cp/ChangeLog 2020-05-18 Jason Merrill <jason@redhat.com> * call.c (build_over_call): Remove unnecessary cp_stabilize_reference.
2020-05-18c++: Don't add built-in operator for ++ on bool.Marek Polacek4-8/+42
This feels extremely obscure but at least it's an opportunity to fix the comments. P0002R1 removed deprecated operator++(bool) in C++17 so let's avoid adding a builtin overload candidate for ++ when the type is bool. * call.c (add_builtin_candidate): Don't create a builtin overload candidate for ++ when type is bool in C++17. * g++.dg/overload/builtin5.C: New test.
2020-05-18c++: Regenerate cp/cfns.h.Marek Polacek2-18/+22
Current cfns.h includes register-qualified variables and that wouldn't play well when bootstrapping with GCC that uses the C++17 dialect, because 'register' was removed in C++17. Regenerating it using the command specified in cfns.h luckily cleaned this up. * cfns.h: Regenerated.
2020-05-18Require powerpc_vsx_ok in gcc.target/powerpc/pr71763.cDouglas Rupp2-0/+5
We're getting an error when running this test on PowerPC VxWorks 7, due to an unexpected warning: | Excess errors: | cc1: warning: '-mvsx' and '-mno-altivec' are incompatible The warning comes from a combination of factors: - The test itself uses -mvsx explicitly via the following directive: // { dg-options "-O1 -mvsx" } - Our toolchain was configured so as to make -mno-altivec the default; - These two options are mutually exclusive. This commit adds a powerpc_vsx_ok dg-require-effective-target directive to that test, and thus making it UNSUPPORTED instead. Tested on PowerPC VxWorks 7. Also tested on PowerPC ELF as well, a platform where we do not make -mno-altivec the default, to verify that the test continues to run as usual in that case. gcc/testsuite/ * gcc.target/powerpc/pr71763.c: Require powerpc_vsx_ok.
2020-05-18bootstrap: Update requirement to C++11.Jason Merrill5-9/+1019
There was general agreement last November that we would move to allowing C++11 features to be used in GCC 11; this patch implements that direction. ChangeLog 2020-05-18 Jason Merrill <jason@redhat.com> * configure.ac: Update bootstrap dialect to -std=c++11. config/ChangeLog 2020-05-18 Jason Merrill <jason@redhat.com> * ax_cxx_compile_stdcxx.m4: Import from autoconf archive with an adjustment to try the default mode. gcc/ChangeLog 2020-05-18 Jason Merrill <jason@redhat.com> * aclocal.m4: Add ax_cxx_compile_stdcxx.m4. * configure.ac: Use AX_CXX_COMPILE_STDCXX(11).
2020-05-18PR fortran/95053 - division by zero constantsHarald Anlauf8-37/+63
Partially revert the fix for PR93499. Replace by checks for valid expressions in the declaration of array shape and PDT KIND and LEN expressions at a later stage. gcc/fortran/ 2020-05-18 Harald Anlauf <anlauf@gmx.de> PR fortran/95053 * arith.c (gfc_divide): Revert hunk introduced by patch for PR93499. * decl.c (variable_decl): Generate error for array shape not being an INTEGER constant. (gfc_get_pdt_instance): Generate error if KIND or LEN expressions in declaration of a PDT instance do not simplify to INTEGER constants. gcc/testsuite/ 2020-05-18 Harald Anlauf <anlauf@gmx.de> PR fortran/95053 * gfortran.dg/dec_structure_23.f90: Adjust to new error messages. * gfortran.dg/pr93499.f90: Adjust to new error messages. * gfortran.dg/pr95053_2.f90: New test. * gfortran.dg/pr95053_3.f90: New test.
2020-05-18tree-optimization: Fix use of uninitialized variables warnings [PR94952]Stefan Schulze Frielinghaus2-2/+9
While bootstrapping GCC on S/390 with --enable-checking=release several warnings about use of uninitialized variables bitpos, bitregion_start, and bitregion_end of function pass_store_merging::process_store are raised. According to PR94952 these seem to be false positives which are silenced by initialising the mentioned variables. Bootstrapped on S/390. Ok for master and releases/gcc-10 assuming that regtest succeeds (still running but I don't see a reason why it should fail)? gcc/ChangeLog: 2020-05-18 Stefan Schulze Frielinghaus <stefansf@linux.ibm.com> PR tree-optimization/94952 * gimple-ssa-store-merging.c (pass_store_merging::process_store): Initialize variables bitpos, bitregion_start, and bitregion_end in order to silence warnings about use of uninitialized variables.
2020-05-18c++: Add test for c++/95143Marek Polacek2-0/+37
Already fixed by r10-8124-gceae6a13366d9646e172fc943fe8e221b70f0920. PR c++/95143 * g++.dg/cpp0x/sfinae66.C: New test.
2020-05-18pr94833, fix vec_first_match_index for nullsCarl Love3-2/+128
gcc/ChangeLog 2020-04-30 Carl Love <cel@us.ibm.com> PR target/94833 * config/rs6000/vsx.md (define_expand): Fix instruction generation for first_match_index_<mode>. * testsuite/gcc.target/powerpc/builtins-8-p9-runnable.c (main): Add additional test cases with zero vector elements.
2020-05-18i386: Avoid reversing a non-trapping comparison to a trapping one [PR95169]Uros Bizjak4-10/+57
gcc/ChangeLog: PR target/95169 * config/i386/i386-expand.c (ix86_expand_int_movcc): Avoid reversing a non-trapping comparison to a trapping one. testsuite/ChangeLog: PR target/95169 * gcc.target/i386/pr95169.c: New test.
2020-05-18[arm] Don't generate invalid LDRD insnsAlex Coplan5-12/+64
This fixes a bug in the arm backend where GCC generates invalid LDRD instructions. The LDRD instruction requires the first transfer register to be even, but GCC attempts to use odd registers here. For example, with the following C code: struct c { double a; } __attribute((aligned)) __attribute((packed)); struct c d; struct c f(struct c); void e() { f(d); } The struct d is passed in registers r1 and r2 to the function f, and GCC attempted to do this with a LDRD instruction when compiling with -march=armv7-a on a soft float toolchain. The fix is analogous to the corresponding one for STRD in the same function: https://gcc.gnu.org/git/?p=gcc.git;a=commit;h=52057dc4ac5295caebf83147f688d769c93cbc8d 2020-05-18 Alex Coplan <alex.coplan@arm.com> gcc/: * config/arm/arm.c (output_move_double): Fix codegen when loading into a register pair with an odd base register. gcc/testsuite/: * gcc.c-torture/compile/packed-aligned-1.c: New test. * gcc.c-torture/execute/packed-aligned.c: New test.
2020-05-18i386: Improve vector mode and TFmode ABS and NEG patternsUros Bizjak4-112/+80
gcc/ChangeLog: 2020-05-18 Uroš Bizjak <ubizjak@gmail.com> * config/i386/i386-expand.c (ix86_expand_fp_absneg_operator): Do not emit FLAGS_REG clobber for TFmode. * config/i386/i386.md (*<code>tf2_1): Rewrite as define_insn_and_split. Mark operands 1 and 2 commutative. (*nabstf2_1): Ditto. (absneg SSE splitter): Use MODEF mode iterator instead of SSEMODEF. Do not swap memory operands. Simplify RTX generation. (neg abs SSE splitter): Ditto. * config/i386/sse.md (*<code><mode>2): Mark operands 1 and 2 commutative. Do not swap operands. Simplify RTX generation. (*nabs<mode>2): Ditto.
2020-05-18fixup BB vectorization constant generation placeRichard Biener3-19/+29
This adjusts the way we compute the stmt insert location for invariants in BB vectorization context to deal with eventually sharing invariant SLP nodes for multiple uses. We can no longer use a single use stmt location then but there's a simple way out. 2020-05-18 Richard Biener <rguenther@suse.de> * tree-vect-slp.c (vect_slp_bb): Start after labels. (vect_get_constant_vectors): Really place init stmt after scalar defs. * tree-vect-stmts.c (vect_init_vector_1): Insert before region begin.
2020-05-18x86: Update Intel processor detectionH.J. Lu2-1/+35
Add cpu model numbers for Intel Airmont, Tremont, Comet Lake, Ice Lake and Tiger Lake processor families. * config/i386/driver-i386.c (host_detect_local_cpu): Support Intel Airmont, Tremont, Comet Lake, Ice Lake and Tiger Lake processor families.
2020-05-18middle-end/95171 - inlining of trapping compare into non-call EH fnRichard Biener4-0/+60
This fixes always-inlining across -fnon-call-exception boundaries for conditions which we do not allow to throw. 2020-05-18 Richard Biener <rguenther@suse.de> PR middle-end/95171 * tree-inline.c (remap_gimple_stmt): Split out trapping compares when inlining into a non-call EH function. * gcc.dg/pr95171.c: New testcase.
2020-05-18tree-optimization/95172 - avoid mixing conditionalized and ordered SMRichard Biener4-5/+38
The following testcase shows a missed optimization that then leads to wrong-code when issueing SMed stores on exits. When we were able to compute an ordered sequence of stores for an exit we need to emit that in the correct order and we can emit it disregarding to any conditional for whether a store actually happened (we know it did). We can also improve detection as of whether we need conditional processing at all. Both parts fix the testcase. 2020-05-18 Richard Biener <rguenther@suse.de> PR tree-optimization/95172 * tree-ssa-loop-im.c (execute_sm): Get flag whether we eventually need the conditional processing. (execute_sm_exit): When processing an orderd sequence avoid doing any conditional processing. (hoist_memory_references): Pass down whether all edges have ordered processing for a ref to execute_sm. * gcc.dg/torture/pr95172.c: New testcase.
2020-05-18Daily bump.GCC Administrator1-1/+1
2020-05-17coroutines: Avoid a maybe used uninitialized warning. NFC.Iain Sandoe2-1/+6
This avoids a (bogus) warning that occurs with some bootstrap compilers. gcc/cp/ChangeLog: 2020-05-17 Iain Sandoe <iain@sandoe.co.uk> * coroutines.cc (morph_fn_to_coro): Initialize the gro variable.
2020-05-17Use pc_or_label_operand to collapse a couple more patterns in preparation ↵Jeff Law5-245/+236
for the cc0->CC_REG transition. * config/h8300/predicates.md (pc_or_label_operand): New predicate. * config/h8300/jumpcall.md (branch_true, branch_false): Consolidate into a single pattern using pc_or_label_operand. * config/h8300/combiner.md (bit branch patterns): Likewise. * config/h8300/peepholes.md (HImode and SImode branches): Likewise.
2020-05-17x86: Allow V1TI vector register pushesH.J. Lu10-121/+203
Add V1TI vector register push and split it after reload to a sequence of: (set (reg:P SP_REG) (plus:P SP_REG) (const_int -8))) (set (match_dup 0) (match_dup 1)) so that STV pass can convert TI mode integer push to V1TI vector register push. Rename has_non_address_hard_reg to pseudo_reg_set, combine calls of single_set and has_non_address_hard_reg to pseudo_reg_set, to ignore pseudo register push. Remove c-c++-common/dfp/func-vararg-mixed-2.c since it is compiled with -mpreferred-stack-boundary=2 and leads to segfault: Dump of assembler code for function __bid_nesd2: 0x08049210 <+0>: endbr32 0x08049214 <+4>: push %esi 0x08049215 <+5>: push %ebx 0x08049216 <+6>: call 0x8049130 <__x86.get_pc_thunk.bx> 0x0804921b <+11>: add $0x8de5,%ebx 0x08049221 <+17>: sub $0x20,%esp 0x08049224 <+20>: mov 0x30(%esp),%esi 0x08049228 <+24>: pushl 0x2c(%esp) 0x0804922c <+28>: call 0x804e600 <__bid32_to_bid64> 0x08049231 <+33>: mov %esi,(%esp) 0x08049234 <+36>: movd %edx,%xmm1 0x08049238 <+40>: movd %eax,%xmm0 0x0804923c <+44>: punpckldq %xmm1,%xmm0 => 0x08049240 <+48>: movaps %xmm0,0x10(%esp) 0x08049245 <+53>: call 0x804e600 <__bid32_to_bid64> 0x0804924a <+58>: push %edx 0x0804924b <+59>: push %eax 0x0804924c <+60>: pushl 0x1c(%esp) 0x08049250 <+64>: pushl 0x1c(%esp) 0x08049254 <+68>: call 0x804b260 <__bid64_quiet_not_equal> 0x08049259 <+73>: add $0x34,%esp 0x0804925c <+76>: pop %ebx 0x0804925d <+77>: pop %esi 0x0804925e <+78>: ret when libgcc is compiled with -msse2. According to GCC manual: '-mpreferred-stack-boundary=NUM' Attempt to keep the stack boundary aligned to a 2 raised to NUM byte boundary. If '-mpreferred-stack-boundary' is not specified, the default is 4 (16 bytes or 128-bits). *Warning:* If you use this switch, then you must build all modules with the same value, including any libraries. This includes the system libraries and startup modules. c-c++-common/dfp/func-vararg-mixed-2.c, which was added by commit 3b2488ca6ece182f2136a20ee5fa0bb92f935b0f Author: H.J. Lu <hongjiu.lu@intel.com> Date: Wed Jul 30 19:24:02 2008 +0000 func-vararg-alternate-d128-2.c: New. 2008-07-30 H.J. Lu <hongjiu.lu@intel.com> Joey Ye <joey.ye@intel.com> * gcc.dg/dfp/func-vararg-alternate-d128-2.c: New. * gcc.dg/dfp/func-vararg-mixed-2.c: Likewise. isn't expected to work with libgcc. gcc/ PR target/95021 * config/i386/i386-features.c (has_non_address_hard_reg): Renamed to ... (pseudo_reg_set): This. Return the SET expression. Ignore pseudo register push. (general_scalar_to_vector_candidate_p): Combine single_set and has_non_address_hard_reg calls to pseudo_reg_set. (timode_scalar_to_vector_candidate_p): Likewise. * config/i386/i386.md (*pushv1ti2): New pattern. gcc/testsuite/ PR target/95021 * c-c++-common/dfp/func-vararg-mixed-2.c: Removed. * gcc.target/i386/pr95021-1.c: New test. * gcc.target/i386/pr95021-2.c: Likewise. * gcc.target/i386/pr95021-3.c: Likewise. * gcc.target/i386/pr95021-4.c: Likewise. * gcc.target/i386/pr95021-5.c: Likewise.
2020-05-17x86: Add gcc.target/i386/strncmp-1.cH.J. Lu2-0/+51
Add a strncmp test for the cmpstrn pattern with neither of the strings is a constant string. We can expand the cmpstrn pattern to "repz cmpsb" only if one of the strings is a constant so that expand_builtin_strncmp() can write the length argument to be the minimum of the const string length and the actual length argument. Otherwise, "repz cmpsb" may pass the 0 byte. * gcc.target/i386/strncmp-1.c: New test.
2020-05-17Revert previous patch:Aldy Hernandez4-26/+36
2020-05-17 Aldy Hernandez <aldyh@redhat.com> * tree-vrp.c (operand_less_p): Move to... * vr-values.c (operand_less_p): ...here. * tree-vrp.h (operand_less_p): Remove.
2020-05-17Move operand_less_p to vr-values.c.Aldy Hernandez4-27/+32
2020-05-17Remove vrp_insert::live_on_edge declaration.Aldy Hernandez2-3/+5
* tree-vrp.c (class vrp_insert): Remove prototype for live_on_edge.
2020-05-17More refactoring of tree-vrp.c.Aldy Hernandez2-169/+247
New class live_names to maintain the set of SSA names live. Fix whitespace in vrp_insert. Move a few more methods related to ASSERT_EXPR insertion into vrp_insert.
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