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2020-03-13PR c/94040 - ICE on a call to an invalid redeclaration of strftimeMartin Sebor8-27/+198
gcc/c/ChangeLog: PR c/94040 * c-decl.c (builtin_structptr_type_count): New constant. (match_builtin_function_types): Reject decls that are incompatible in types pointed to by pointers. (diagnose_mismatched_decls): Adjust comments. gcc/testsuite/ChangeLog: PR c/94040 * gcc.dg/Wbuiltin-declaration-mismatch-12.c: Relax test to look for warning name rather than the exact text. * gcc.dg/Wbuiltin-declaration-mismatch-14.c: New test. * gcc.dg/Wbuiltin-declaration-mismatch-15.c: New test. * gcc.dg/pr62090.c: Prune expected warning. * gcc.dg/pr89314.c: Look for warning name rather than text.
2020-03-13testsuite: Assorted x32 testsuite fixesUros Bizjak4-6/+18
* gcc.target/i386/pr64409.c: Do not limit compilation to x32 targets. (dg-error): Quote 'ms_abi' attribute. * gcc.target/i386/pr71958.c: Do not limit compilation to x32 targets. Require maybe_x32 effective target. (dg-options): Add -mx32. (dg-error): Quote 'ms_abi' attribute. * gcc.target/i386/pr90096.c (dg-error): Update relative location of target x32 error.
2020-03-13df: Don't abuse bb->aux (PR94148, PR94042)Segher Boessenkool2-17/+28
The df dataflow solvers use the aux field in the basic_block struct, although that is reserved for any use by passes. And not only that, it is required that you set all such fields to NULL before calling the solvers, or you quietly get wrong results. This changes the solvers to use a local array for last_change_age instead, just like it already had a local array for last_visit_age. PR rtl-optimization/94148 PR rtl-optimization/94042 * df-core.c (BB_LAST_CHANGE_AGE): Delete. (df_worklist_propagate_forward): New parameter last_change_age, use that instead of bb->aux. (df_worklist_propagate_backward): Ditto. (df_worklist_dataflow_doublequeue): Use a local array last_change_age.
2020-03-13c++: Redundant -Wdeprecated-declarations warning in build_over_call [PR67960]Patrick Palka5-0/+43
In build_over_call, we are emitting a redundant -Wdeprecated-declarations warning about the deprecated callee function, first from mark_used and again from build_addr_func <- decay_conversion <- cp_build_addr_expr <- mark_used. It seems this second deprecation warning coming from build_addr_func will always be redundant, so we can safely use a warning_sentinel to disable it before calling build_addr_func. (And any deprecation warning that could come from build_addr_func would be for FN, so we wouldn't be suppressing too much.) gcc/cp/ChangeLog: PR c++/67960 * call.c (build_over_call): Use a warning_sentinel to disable warn_deprecated_decl before calling build_addr_func. gcc/testsuite/ChangeLog: PR c++/67960 * g++.dg/diagnostic/pr67960.C: New test. * g++.dg/diagnostic/pr67960-2.C: New test.
2020-03-13tree-optimization/94163 constrain alignment set by PRERichard Biener2-1/+8
This avoids HWI -> unsigned truncation to end up with zero alignment which set_ptr_info_alignment ICEs on. 2020-03-13 Richard Biener <rguenther@suse.de> PR tree-optimization/94163 * tree-ssa-pre.c (create_expression_by_pieces): Check whether alignment would be zero.
2020-03-13Do not strcat to result of getenv.Martin Liska4-1/+19
PR lto/94157 * lto-wrapper.c (run_gcc): Use concat for appending to collect_gcc_options. PR lto/94157 * gcc.dg/lto/pr94157_0.c: New test.
2020-03-13[testsuite] Fix PR93935 to guard case under vect_hw_misalignKewen Lin2-1/+7
This patch is to apply the same fix as r267528 to another similar case bb-slp-over-widen-2.c which requires misaligned vector access. gcc/testsuite/ChangeLog PR testsuite/93935 * gcc.dg/vect/bb-slp-over-widen-2.c: Expect basic block vectorized messages only on vect_hw_misalign targets.
2020-03-13aarch64: Fix another bug in aarch64_add_offset_1 [PR94121]Jakub Jelinek2-1/+8
> I'm getting this ICE with -mabi=ilp32: > > during RTL pass: fwprop1 > /opt/gcc/gcc-20200312/gcc/testsuite/gcc.dg/pr94121.c: In function 'bar': > /opt/gcc/gcc-20200312/gcc/testsuite/gcc.dg/pr94121.c:16:1: internal compiler error: in decompose, at rtl.h:2279 That is a preexisting issue, caused by another bug in the same function. When mode is SImode and moffset is 0x80000000 (or anything else with the bit 31 set), we need to sign-extend it. 2020-03-13 Jakub Jelinek <jakub@redhat.com> PR target/94121 * config/aarch64/aarch64.c (aarch64_add_offset_1): Use gen_int_mode instead of GEN_INT.
2020-03-13i386: Use ix86_output_ssemov for DFmode TYPE_SSEMOVH.J. Lu7-41/+53
There is no need to set mode attribute to XImode nor V8DFmode since ix86_output_ssemov can properly encode xmm16-xmm31 registers with and without AVX512VL. gcc/ PR target/89229 * config/i386/i386.c (ix86_output_ssemov): Handle MODE_DF. * config/i386/i386.md (*movdf_internal): Call ix86_output_ssemov for TYPE_SSEMOV. Remove TARGET_AVX512F, TARGET_PREFER_AVX256, TARGET_AVX512VL and ext_sse_reg_operand check. gcc/testsuite/ PR target/89229 * gcc.target/i386/pr89229-4a.c: New test. * gcc.target/i386/pr89229-4b.c: Likewise. * gcc.target/i386/pr89229-4c.c: Likewise.
2020-03-13aarch64: Add --params to control the number of recip steps [PR94154]Bu Le4-3/+34
-mlow-precision-div hard-coded the number of iterations to 2 for double and 1 for float. This patch adds a --param to control the number. 2020-03-13 Bu Le <bule1@huawei.com> gcc/ PR target/94154 * config/aarch64/aarch64.opt (-param=aarch64-float-recp-precision=) (-param=aarch64-double-recp-precision=): New options. * doc/invoke.texi: Document them. * config/aarch64/aarch64.c (aarch64_emit_approx_div): Use them instead of hard-coding the choice of 1 for float and 2 for double.
2020-03-13Fix incorrect filling of delay slots in branchy code at -O2Eric Botcazou4-8/+49
The issue is that relax_delay_slots can streamline the CFG in some cases, in particular remove BARRIERs, but removing BARRIERs changes the way the instructions are associated with (basic) blocks by the liveness analysis code in resource.c (find_basic_block) and thus can cause entries in the cache maintained by resource.c to become outdated, thus producing wrong answers downstream. The fix is to invalidate the cache entries affected by the removal of BARRIERs in relax_delay_slots, i.e. for the instructions down to the next BARRIER. PR rtl-optimization/94119 * resource.h (clear_hashed_info_until_next_barrier): Declare. * resource.c (clear_hashed_info_until_next_barrier): New function. * reorg.c (add_to_delay_list): Fix formatting. (relax_delay_slots): Call clear_hashed_info_until_next_barrier on the next instruction after removing a BARRIER.
2020-03-13Fix unaligned load with small memcpy on the ARMEric Botcazou4-30/+50
store_integral_bit_field is ready to handle BLKmode fields, there is even a subtlety with their handling on big-endian targets, see e.g. PR middle-end/50325, but not if they are unaligned, so the fix is simply to call extract_bit_field for them in order to generate an unaligned load. As a bonus, this subsumes the big-endian specific path that was added under PR middle-end/50325. PR middle-end/92071 * expmed.c (store_integral_bit_field): For fields larger than a word, call extract_bit_field on the value if the mode is BLKmode. Remove specific path for big-endian targets and tidy things up a little bit.
2020-03-13Daily bump.GCC Administrator1-1/+1
2020-03-12Remove no-op register to register copies in CSE just like we remove no-op ↵Richard Sandiford4-6/+45
memory to memory copies. PR rtl-optimization/90275 * cse.c (cse_insn): Delete no-op register moves too. PR rtl-optimization/90275 * gcc.c-torture/compile/pr90275.c: New test.
2020-03-12Support for the CPEN control register was removed in rev .50 of the RXv1 ↵Jeff Law3-2/+5
Instruction Set Architecture manual in Feb 2009. This patch removes it from GCC. * config/rx/rx.md (CTRLREG_CPEN): Remove. * config/rx/rx.c (rx_print_operand): Remove CTRLREG_CPEN support.
2020-03-12tree-optimization/94103 avoid CSE of loads with paddingRichard Biener4-7/+44
VN currently replaces a load of a 16 byte entity 128 bits of precision (TImode) with the result of a load of a 16 byte entity with 80 bits of mode precision (XFmode). That will go downhill since if the padding bits are not actually filled with memory contents those bits are missing. 2020-03-12 Richard Biener <rguenther@suse.de> PR tree-optimization/94103 * tree-ssa-sccvn.c (visit_reference_op_load): Avoid type punning when the mode precision is not sufficient. * gcc.target/i386/pr94103.c: New testcase.
2020-03-12i386: Use ix86_output_ssemov for MMX TYPE_SSEMOVH.J. Lu3-27/+30
There is no need to set mode attribute to XImode since ix86_output_ssemov can properly encode xmm16-xmm31 registers with and without AVX512VL. PR target/89229 * config/i386/i386.c (ix86_output_ssemov): Handle MODE_DI, MODE_V1DF and MODE_V2SF. * config/i386/mmx.md (MMXMODE:*mov<mode>_internal): Call ix86_output_ssemov for TYPE_SSEMOV. Remove ext_sse_reg_operand check.
2020-03-12[Fortran, OpenACC] Reject vars of different scope in $acc declare (PR94120)Tobias Burnus9-17/+94
2020-03-12 Tobias Burnus <tobias@codesourcery.com> PR middle-end/94120 * openmp.c (gfc_match_oacc_declare): Accept function-result variables; reject variables declared in a different scoping unit. 2020-03-12 Tobias Burnus <tobias@codesourcery.com> PR middle-end/94120 * gfortran.dg/goacc/pr78260-2.f90: Correct scan-tree-dump-times. Extend test case to result variables. * gfortran.dg/goacc/declare-2.f95: Actually check module-declaration restriction of OpenACC. * gfortran.dg/goacc/declare-3.f95: Remove case where this restriction is violated. * gfortran.dg/goacc/pr94120-1.f90: New. * gfortran.dg/goacc/pr94120-2.f90: New. * gfortran.dg/goacc/pr94120-3.f90: New.
2020-03-12doc: Fix up ASM_OUTPUT_ALIGNED_DECL_LOCAL descriptionJakub Jelinek3-6/+11
When looking into PR94134, I've noticed bugs in the ASM_OUTPUT_ALIGNED_DECL_LOCAL documentation. varasm.c has: #if defined ASM_OUTPUT_ALIGNED_DECL_LOCAL unsigned int align = symtab_node::get (decl)->definition_alignment (); ASM_OUTPUT_ALIGNED_DECL_LOCAL (asm_out_file, decl, name, size, align); return true; #elif defined ASM_OUTPUT_ALIGNED_LOCAL unsigned int align = symtab_node::get (decl)->definition_alignment (); ASM_OUTPUT_ALIGNED_LOCAL (asm_out_file, name, size, align); return true; #else ASM_OUTPUT_LOCAL (asm_out_file, name, size, rounded); return false; #endif and the ASM_OUTPUT_ALIGNED_LOCAL documentation properly mentions: Like @code{ASM_OUTPUT_LOCAL} and mentions the same macro in another place. The ASM_OUTPUT_ALIGNED_DECL_LOCAL description mentions non-existing macros ASM_OUTPUT_ALIGNED_DECL and ASM_OUTPUT_DECL instead of the right ones ASM_OUTPUT_ALIGNED_LOCAL and ASM_OUTPUT_LOCAL. 2020-03-12 Jakub Jelinek <jakub@redhat.com> * doc/tm.texi.in (ASM_OUTPUT_ALIGNED_DECL_LOCAL): Change ASM_OUTPUT_ALIGNED_DECL in description to ASM_OUTPUT_ALIGNED_LOCAL and ASM_OUTPUT_DECL to ASM_OUTPUT_LOCAL. * doc/tm.texi: Regenerated.
2020-03-12tree-dse: Fix mem* head trimming if call has lhs [PR94130]Jakub Jelinek4-6/+44
As the testcase shows, if DSE decides to head trim {mem{set,cpy,move},strncpy} and the call has lhs, it is incorrect to leave the lhs as is, because it will then point to the adjusted address (base + head_trim) instead of the original base. The following patch fixes that by dropping the lhs of the call and assigning lhs the original base in a following statement. 2020-03-12 Jakub Jelinek <jakub@redhat.com> PR tree-optimization/94130 * tree-ssa-dse.c: Include gimplify.h. (increment_start_addr): If stmt has lhs, drop the lhs from call and set it after the call to the original value of the first argument. Formatting fixes. (decrement_count): Formatting fix. * gcc.c-torture/execute/pr94130.c: New test.
2020-03-12c++: Tweak reshape_init_array_1 [PR94124]Jakub Jelinek2-5/+23
Isn't it wasteful to first copy perhaps a large constructor (recursively) and then truncate it to very few elts (zero in this case)? > We should certainly avoid copying if they're the same. The code above for > only copying the bits that aren't going to be thrown away seems pretty > straightforward, might as well use it even if the savings aren't likely to > be large. Calling vec_safe_truncate with the same number of elts the vector already has is a nop, so IMHO we just should make sure we only unshare if it changed. 2020-03-12 Jakub Jelinek <jakub@redhat.com> PR c++/94124 * decl.c (reshape_init_array_1): Don't unshare constructor if there aren't any trailing zero elts, otherwise only unshare the first nelts.
2020-03-11[rs6000] Fix a wrong GC issueBin Bin Lv3-4/+5
The source file rs6000.c was split up into several smaller source files through commit 1acf024. However, variable "altivec_builtin_mask_for_load" and "builtin_mode_to_type[MAX_MACHINE_MODE][2]" were marked with the wrong syntax "GTY(([options])) type name", which led these two variables were not marked as roots correctly and wrongly GCed. And when "altivec_builtin_mask_for_load" was wrongly GCed, the compiling for openJDK is failed with ICEs enabling precompiled header under mcpu=power7. So roots must be declared using one of the following syntaxes: "extern GTY(([options])) type name;" and "static GTY(([options])) type name;". And the following patch adds variable "altivec_builtin_mask_for_load" and "builtin_mode_to_type[MAX_MACHINE_MODE][2]" into the roots array. Bootstrap and regression tests were done on powerpc64le-linux-gnu (LE) with no regressions. gcc/ChangeLog 2020-03-11 Bin Bin Lv <shlb@linux.ibm.com> * config/rs6000/rs6000-internal.h (altivec_builtin_mask_for_load, builtin_mode_to_type): Remove the declaration. * config/rs6000/rs6000.h (altivec_builtin_mask_for_load, builtin_mode_to_type): Add an extern GTY(()) declaration. * config/rs6000/rs6000.c (altivec_builtin_mask_for_load, builtin_mode_to_type): Remove the GTY(()) declaration.
2020-03-12testsuite: Fix concepts-using2.C failure on 32-bit targets [PR93907]Jakub Jelinek2-0/+10
The test FAILs on 32-bit targets that don't have __int128 type. 2020-03-12 Jakub Jelinek <jakub@redhat.com> PR c++/93907 * g++.dg/cpp2a/concepts-using2.C (cc): Use long long instead of __int128 if __SIZEOF_INT128__ isn't defined.
2020-03-12Daily bump.GCC Administrator1-1/+1
2020-03-11c++: Fix ICE with concepts and aliases [PR93907].Jason Merrill5-2/+58
The problem here was that we were checking satisfaction once with 'e', a typedef of 'void', and another time with 'void' directly, and treated them as different for hashing based on the assumption that canonicalize_type_argument would have already removed a typedef that wasn't a complex dependent alias. But that wasn't happening here, so let's add a call. gcc/cp/ChangeLog 2020-03-11 Jason Merrill <jason@redhat.com> PR c++/93907 * constraint.cc (tsubst_parameter_mapping): Canonicalize type argument.
2020-03-11c++: Fix wrong modifying const object error for COMPONENT_REF [PR94074]Marek Polacek9-1/+203
I got a report that building Chromium fails with the "modifying a const object" error. After some poking I realized it's a bug in GCC, not in their codebase. Much like with ARRAY_REFs, which can be const even though the array itself isn't, COMPONENT_REFs can be const although neither the object nor the field were declared const. So let's dial down the checking. Here the COMPONENT_REF was const because of the "const_cast<const U &>(m)" thing -- cxx_eval_component_reference then builds a COMPONENT_REF with TREE_TYPE (t). While looking into this I noticed that we don't detect modifying a const object in certain cases like in <https://gcc.gnu.org/bugzilla/show_bug.cgi?id=94074#c2>. That's because we never evaluate an X::X() CALL_EXPR -- there's none. Fixed as per Jason's suggestion by setting TREE_READONLY on a CONSTRUCTOR after initialization in cxx_eval_store_expression. 2020-03-11 Marek Polacek <polacek@redhat.com> Jason Merrill <jason@redhat.com> PR c++/94074 - wrong modifying const object error for COMPONENT_REF. * constexpr.c (cref_has_const_field): New function. (modifying_const_object_p): Consider a COMPONENT_REF const only if any of its fields are const. (cxx_eval_store_expression): Mark a CONSTRUCTOR of a const type as readonly after its initialization has been done. * g++.dg/cpp1y/constexpr-tracking-const17.C: New test. * g++.dg/cpp1y/constexpr-tracking-const18.C: New test. * g++.dg/cpp1y/constexpr-tracking-const19.C: New test. * g++.dg/cpp1y/constexpr-tracking-const20.C: New test. * g++.dg/cpp1y/constexpr-tracking-const21.C: New test. * g++.dg/cpp1y/constexpr-tracking-const22.C: New test.
2020-03-11Bug fix: cannot convert 'const short int*' to 'const __bf16*'Delia Burduv3-13/+32
This patch fixes a bug introduced by my earlier patch ( https://gcc.gnu.org/pipermail/gcc-patches/2020-March/541680.html ). It introduces a new scalar builtin type that was missing in the original patch. Bootstrapped cleanly on arm-none-linux-gnueabihf. Tested for regression on arm-none-linux-gnueabihf. No regression from before the original patch. Tests that failed or became unsupported because of the original tests now work as they did before it. * config/arm/arm-builtins.c (arm_init_simd_builtin_scalar_types): New. * config/arm/arm_neon.h (vld2_bf16): Used new builtin type. (vld2q_bf16): Used new builtin type. (vld3_bf16): Used new builtin type. (vld3q_bf16): Used new builtin type. (vld4_bf16): Used new builtin type. (vld4q_bf16): Used new builtin type. (vld2_dup_bf16): Used new builtin type. (vld2q_dup_bf16): Used new builtin type. (vld3_dup_bf16): Used new builtin type. (vld3q_dup_bf16): Used new builtin type. (vld4_dup_bf16): Used new builtin type. (vld4q_dup_bf16): Used new builtin type.
2020-03-11pdp11: Fix handling of common (local and global) vars [PR94134]Jakub Jelinek4-1/+28
As mentioned in the PR, the generic code decides to put the a variable into lcomm_section, which is a NOSWITCH section and thus the generic code doesn't switch into a particular section before using ASM_OUTPUT{_ALIGNED{,_DECL}_}_LOCAL, on many targets that results just in .lcomm (or for non-local .comm) directives which don't need a switch to some section, other targets put switch_to_section (bss_section) at the start of that macro. pdp11 doesn't do that (and doesn't have bss_section), and so emits the lcomm/comm variables in whatever section is current (it has only .text/.data and for DEC assembler rodata). The following patch fixes that by putting it always into data section, and additionally avoids emitting an empty line in the assembly for the lcomm vars. 2020-03-11 Jakub Jelinek <jakub@redhat.com> PR target/94134 * config/pdp11/pdp11.c (pdp11_asm_output_var): Call switch_to_section at the start to switch to data section. Don't print extra newline if .globl directive has not been emitted. * gcc.c-torture/execute/pr94134.c: New test.
2020-03-12RISC-V: Fix testsuite regression due to recent IRA changes.Kito Cheng2-4/+4
After IRA changes, atomic version will use one more register, but non-atomic still use 2 registers, however this testcase isn't testing for atomic feature, so I decide change the testcase to always use COUNT++ to test. ChangeLog gcc/testsuite/ Kito Cheng <kito.cheng@sifive.com> * gcc.target/riscv/interrupt-2.c: Update testcase and expected output.
2020-03-11fold undefined pointer offsettingRichard Biener4-0/+44
This avoids breaking the old broken pointer offsetting via (T)(ptr - ((T)0)->x) which should have used offsetof. Breakage was exposed by the introduction of POINTER_DIFF_EXPR and making PTA not considering that producing a pointer. The mitigation for simple cases is to canonicalize _2 = _1 - 8B; o_9 = (struct obj *) _2; to o_9 = &MEM[_1 + -8B]; eliding one statement and the offending pointer subtraction. 2020-03-11 Richard Biener <rguenther@suse.de> * match.pd ((T *)(ptr - ptr-cst) -> &MEM[ptr + -ptr-cst]): New pattern. * gcc.dg/torture/20200311-1.c: New testcase.
2020-03-11[testsuite] Add @ lines to check-function-bodies fluffMatthew Malcomson2-1/+6
When using `check-function-bodies`, the subroutine `parse_function_bodies` uses the `fluff` regexp to remove uninteresting assembly lines. Arm targets generate assembly with some lines prefixed by `@`, these lines are left by this process. As an example of some lines prefixed by `@': the assembly output from the `stacktest1` function in "bfloat16_simd_3_1.c" is: .align 2 .global stacktest1 .arch armv8.2-a .syntax unified .arm .fpu neon-fp-armv8 .type stacktest1, %function stacktest1: @ args = 0, pretend = 0, frame = 8 @ frame_needed = 0, uses_anonymous_args = 0 @ link register save eliminated. sub sp, sp, #8 add r3, sp, #6 vst1.16 {d0[0]}, [r3] vld1.16 {d0[0]}, [r3] add sp, sp, #8 @ sp needed bx lr .size stacktest1, .-stacktest1 It seems that previous uses of `check-function-bodies` in the arm backend have avoided problems with such lines since they use the `...` regexp in each place such fluff occurs. I'm currently writing a patch that I'd like to match the entire function body, so I'd like to remove such `@` lines automatically. gcc/testsuite/ChangeLog: 2020-03-11 Matthew Malcomson <matthew.malcomson@arm.com> * lib/scanasm.exp (parse_function_bodies): Lines starting with '@' also counted as fluff.
2020-03-11Fix GIMPLE verification failure in LTO mode on Ada codeEric Botcazou3-1/+17
The issue is that tree_is_indexable doesn't return the same result for a FIELD_DECL with QUAL_UNION_TYPE and the QUAL_UNION_TYPE, resulting in two instances of the QUAL_UNION_TYPE in the bytecode. The result for the type is the correct one (false, since it is variably modified) while the result for the field is falsely true because: else if (TREE_CODE (t) == FIELD_DECL && lto_variably_modified_type_p (DECL_CONTEXT (t))) return false; is not satisfied. The reason for this is that the DECL_QUALIFIER of fields of a QUAL_UNION_TYPE depends on a discriminant in Ada, which means that the size of the type does too (CONTAINS_PLACEHOLDER_P), which in turn means that it is reset to a mere PLACEHOLDER_EXPR by free_lang_data, which finally means that the size of DECL_CONTEXT is too, so RETURN_TRUE_IF_VAR is false. In other words, the CONTAINS_PLACEHOLDER_P property of the DECL_QUALIFIER of fields of a QUAL_UNION_TYPE hides the variably_modified_type_p property of these fields, if you look from the outside. PR middle-end/93961 * tree.c (variably_modified_type_p) <RECORD_TYPE>: Recurse into fields whose type is a qualified union.
2020-03-11Fix internal error on locally-defined subpoolsEric Botcazou4-1/+99
If the type is derived in the current compilation unit, and Allocate is not overridden on derivation (as is typically the case with Root_Storage_Pool_With_Subpools), the entity for Allocate of the derived type is an alias for System.Storage_Pools.Subpools.Allocate. The main assertion in gnat_to_gnu_entity fails in this case, since this is not a definition and Is_Public is false (since the entity is nested in the same compilation unit). 2020-03-11 Richard Wai <richard@annexi-strayline.com> * gcc-interface/decl.c (gnat_to_gnu_entity): Also test Is_Public on the Alias of the entitiy, if is present, in the main assertion.
2020-03-11aarch64: Fix ICE in aarch64_add_offset_1 [PR94121]Jakub Jelinek4-1/+24
abs_hwi asserts that the argument is not HOST_WIDE_INT_MIN and as the (invalid) testcase shows, the function can be called with such an offset. The following patch is IMHO minimal fix, absu_hwi unlike abs_hwi allows even that value and will return (unsigned HOST_WIDE_INT) HOST_WIDE_INT_MIN in that case. The function then uses moffset in two spots which wouldn't care if the value is (unsigned HOST_WIDE_INT) HOST_WIDE_INT_MIN or HOST_WIDE_INT_MIN and wouldn't accept it (!moffset and aarch64_uimm12_shift (moffset)), then in one spot where the signedness of moffset does matter and using unsigned is the right thing - moffset < 0x1000000 - and finally has code which will handle even this value right; the assembler doesn't really care for DImode immediates if mov x1, -9223372036854775808 or mov x1, 9223372036854775808 is used and similarly it doesn't matter if we add or sub it in DImode. 2020-03-11 Jakub Jelinek <jakub@redhat.com> PR target/94121 * config/aarch64/aarch64.c (aarch64_add_offset_1): Use absu_hwi instead of abs_hwi, change moffset type to unsigned HOST_WIDE_INT. * gcc.dg/pr94121.c: New test.
2020-03-11value-prof: Fix abs uses in value-prof.c [PR93962]Jakub Jelinek2-2/+7
Jeff has recently fixed dump_histogram_value to use std::abs instead of abs, because on FreeBSD apparently the ::abs isn't overloaded and only has int abs (int); Seems on Solaris /usr/include/iso/stdlib_iso.h abs has: int abs (int); long abs (long); overloads but already not long long abs (long long); and there is another abs use in get_nth_most_common_value, also on int64_t. The long long std::abs (long long); overload is there only in C++11 and we in GCC10 still support C++98. Martin has said that a counter should never be INT64_MIN, so IMHO it is better to use abs_hwi which will assert that. 2020-03-11 Jakub Jelinek <jakub@redhat.com> PR bootstrap/93962 * value-prof.c (dump_histogram_value): Use abs_hwi instead of std::abs. (get_nth_most_common_value): Use abs_hwi instead of abs.
2020-03-11dfp: Fix decimal_to_binary [PR94111]Jakub Jelinek4-3/+27
As e.g. decimal_from_decnumber shows, the REAL_VALUE_TYPE representation contains a decimal128 embedded in ->sig only if it is rvc_normal, for other kinds like rvc_inf or rvc_nan, ->sig is ignored and everything is contained in the REAL_VALUE_TYPE flags (cl, sign, signalling and decimal). decimal_to_binary which is used when folding a decimal{32,64,128} constant to a binary floating point type ignores this and thus folds infinities and NaNs into +0.0. The following patch fixes that by only doing that for rvc_normal. Similarly to the binary to decimal folding, it goes through a string, in order to e.g. deal with canonical NaN mantissas, or binary float formats that don't support infinities and/or NaNs. 2020-03-11 Jakub Jelinek <jakub@redhat.com> PR middle-end/94111 * dfp.c (decimal_to_binary): Only use decimal128ToString if from->cl is rvc_normal, otherwise use real_to_decimal to print the number to string. * gcc.dg/dfp/pr94111.c: New test.
2020-03-11ldist: Further fixes for -ftrapv [PR94114]Jakub Jelinek4-3/+29
As the testcase shows, arithmetics that for -ftrapv would need multiple basic blocks can show up not just in nb_bytes expressions where we are calling rewrite_to_non_trapping_overflow for a while already, but also in the pointer expression to the start of the region. While the testcase covers just the first hunk and I've failed to create a testcase for the latter, it is at least in theory possible too, so I've adjusted that hunk too. 2020-03-11 Jakub Jelinek <jakub@redhat.com> PR tree-optimization/94114 * tree-loop-distribution.c (generate_memset_builtin): Call rewrite_to_non_trapping_overflow even on mem. (generate_memcpy_builtin): Call rewrite_to_non_trapping_overflow even on dest and src. * gcc.dg/pr94114.c: New test.
2020-03-10Fix length computation for movsi_insv which resulted in regressions due to ↵Jeff Law2-1/+6
out of range branches on the bfin port. * config/bfin/bfin.md (movsi_insv): Add length attribute.
2020-03-10c++: Fix wrong conversion error with non-viable overload [PR94124]Marek Polacek4-0/+33
This is a bad interaction between sharing a constructor for an array and stripping its trailing zero-initializers. Here we reuse a ctor and then strip its 0s. This breaks overload resolution in this test: D can be initialized from {} but not from {0}, so if we truncate the constructor not to include the zero, the F(D) overload becomes valid and then we get the ambiguous conversion error. PR c++/94124 - wrong conversion error with non-viable overload. * decl.c (reshape_init_array_1): Unshare a constructor if we stripped trailing zero-initializers. * g++.dg/cpp0x/initlist-overload1.C: New test.
2020-03-10c++: Fix deferred noexcept on constructor [PR93901].Jason Merrill2-7/+12
My change in r10-4394 to only update clones when we actually instantiate a deferred noexcept-spec broke this because deferred parsing updates the primary function but not the clones. For GCC 10, let's just revert it. gcc/cp/ChangeLog 2020-03-10 Jason Merrill <jason@redhat.com> PR c++/93901 * pt.c (maybe_instantiate_noexcept): Always update clones.
2020-03-10c++: Fix ICE with omitted template args [PR93956].Jason Merrill3-1/+13
reshape_init only wants to work on BRACE_ENCLOSED_INITIALIZER_P, i.e. raw initializer lists, and here was getting a CONSTRUCTOR that had already been processed for type A<int>. maybe_aggr_guide should also use that test. gcc/cp/ChangeLog 2020-03-10 Jason Merrill <jason@redhat.com> PR c++/93956 * pt.c (maybe_aggr_guide): Check BRACE_ENCLOSED_INITIALIZER_P.
2020-03-11rs6000: Check -+0 and NaN for smax/smin generationJiufu Guo4-1/+33
PR93709 mentioned regressions on maxlocval_4.f90 and minlocval_f.f90 which relates to max of '-inf' and 'nan'. This regression occur on P9 because P9 new instruction 'xsmaxcdp' is generated. And for C code `a < b ? b : a` is also generated as `xsmaxcdp` under -O2 for P9. While this instruction behavior more like C/C++ semantic (a>b?a:b). This generates prevents 'xsmaxcdp' to be generated for those cases. 'xsmincdp' also is handled in patch. gcc/ 2020-03-10 Jiufu Guo <guojiufu@linux.ibm.com> PR target/93709 * gcc/config/rs6000/rs6000.c (rs6000_emit_p9_fp_minmax): Check NAN and SIGNED_ZEROR for smax/smin. gcc/testsuite 2020-03-10 Jiufu Guo <guojiufu@linux.ibm.com> PR target/93709 * gcc.target/powerpc/p9-minmax-3.c: New test.
2020-03-11Daily bump.GCC Administrator1-1/+1
2020-03-10c++: Add tests for PR93922 and PR94041.Jason Merrill2-0/+47
2020-03-10c++: Partially revert patch for PR66139.Jason Merrill6-177/+11
The patch for 66139 exposed a long-standing bug with split_nonconstant_init (since 4.7, apparently): initializion of individual elements of an aggregate are not a full-expressions, but split_nonconstant_init was making full-expressions out of them. My fix for 66139 extended the use of split_nonconstant_init, and thus the bug, to aggregate initialization of temporaries within an expression, in which context (PR94041) the bug is more noticeable. PR93922 is a problem with my implementation strategy of splitting out at gimplification time, introducing function calls that weren't in the GENERIC. So I'm going to revert the patch now and try again for GCC 11. gcc/cp/ChangeLog 2020-03-10 Jason Merrill <jason@redhat.com> PR c++/93922 PR c++/94041 PR c++/52320 PR c++/66139 * cp-gimplify.c (cp_gimplify_init_expr): Partially revert patch for 66139: Don't split_nonconstant_init. Remove pre_p parameter.
2020-03-10PR90763: PowerPC vec_xl_len should take const argument.Will Schmidt4-0/+112
PR target/90763 * config/rs6000/rs6000-c.c (altivec_resolve_overloaded_builtin): Add clause to handle P9V_BUILTIN_VEC_LXVL with const arguments. * gcc.target/powerpc/pr90763.c: New.
2020-03-10loop-iv: make find_simple_exit staticRoman Zhuykov3-2/+6
Function 'find_simple_exit' is used only from loop-iv.c In 2004-2006 it was also used in predict.c, but since r118694 (992c31e62304ed5d34247dbdef2db276d08fac05) it does not. gcc/ChangeLog: * loop-iv.c (find_simple_exit): Make it static. * cfgloop.h: Remove the corresponding prototype.
2020-03-10minor: fix intendation in ddg.cRoman Zhuykov2-17/+23
gcc/ChangeLog: * ddg.c (create_ddg): Fix intendation. (set_recurrence_length): Likewise. (create_ddg_all_sccs): Likewise.
2020-03-10testsuite: Scan for SSE reg-reg moves only in pr80481.CUros Bizjak2-2/+6
The function needs more than 8 SSE registers, avoid false positives triggered by SSE spills for 32bit targets. * g++.dg/pr80481.C (dg-final): Scan for SSE reg-reg moves only.
2020-03-10Revert "Fix regression reported by tester due to recent IRA changes"Jeff Law2-1/+8
This reverts commit d48e1175279a551bf90aa5b165fc46a1d5a2c07e. 2020-03-10 Jeff Law <law@redhat.com> Revert: 2020-02-29 Jeff Law <law@redhat.com> * gcc.target/xstormy16/sfr/06_sfrw_to_var.c: Update expected output.