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2020-03-01PR middle-end/93926 - ICE on a built-in redeclaration returning an integer ↵Martin Sebor4-27/+132
instead of a pointer gcc/c/ChangeLog: PR middle-end/93926 * c-decl.c (types_close_enough_to_match): New function. (match_builtin_function_types): (diagnose_mismatched_decls): Add missing inform call to a warning. gcc/testsuite/ChangeLog: PR middle-end/93926 * gcc.dg/Wbuiltin-declaration-mismatch-13.c: New test.
2020-03-01PR c/93812 - ICE on redeclaration of an attribute format function without ↵Martin Sebor4-3/+124
protoype gcc/c/ChangeLog: PR c/93812 * c-typeck.c (build_functype_attribute_variant): New function. (composite_type): Call it. gcc/testsuite/ChangeLog: PR c/93812 * gcc.dg/format/proto.c: New test.
2020-03-01PR middle-end/93829 - bogus -Wstringop-overflow on memcpy of a struct with a ↵Martin Sebor4-9/+81
pointer member from another with a long string gcc/testsuite/ChangeLog: PR middle-end/93829 * gcc.dg/Wstringop-overflow-32.c: New test. gcc/ChangeLog: PR middle-end/93829 * tree-ssa-strlen.c (count_nonzero_bytes): Set the size to that of a pointer in the outermost ADDR_EXPRs.
2020-03-02Daily bump.GCC Administrator1-1/+1
2020-03-01Fix test for pr68805.Segher Boessenkool2-4/+4
PR testsuite/91797 * gcc.target/pwoerpc/pr68805.c: Update expected output.
2020-03-01Fix test for pr88233.Segher Boessenkool2-3/+10
PR testsuite/91799 * gcc.target/powerpc/pr88233.c: Update expected output and add target selector.
2020-03-01coroutines: Test that we correctly use class data members.Iain Sandoe2-0/+65
Improve test coverage, NFC. gcc/testsuite/ChangeLog: 2020-03-01 Iain Sandoe <iain@sandoe.co.uk> * g++.dg/coroutines/torture/class-07-data-member.C: New test.
2020-03-01Patch and ChangeLogs for PR92976Paul Thomas4-2/+50
2020-03-01ChangeLogs for PR92959Paul Thomas2-0/+13
2020-03-01Patch for PR92959Paul Thomas2-12/+46
2020-03-01Daily bump.GCC Administrator1-1/+1
2020-02-29coroutines: Add a test for non-trivial await_resume return type.Iain Sandoe3-0/+67
Improve test coverage. gcc/testsuite/ChangeLog: 2020-02-29 Iain Sandoe <iain@sandoe.co.uk> * g++.dg/coroutines/coro1-ret-int-yield-int.h: Add templated awaitable. * g++.dg/coroutines/torture/co-await-15-return-non-triv.C: New test.
2020-02-29Make STATIC_CHAIN_REGNUM a call used register.Jeff Law3-3/+10
* config/v850/v850.h (STATIC_CHAIN_REGNUM): Change to r19. * config/v850/v850.c (v850_asm_trampoline_template): Update accordingly.
2020-02-29Disable gnat.dg/socket1.adb on hppa*-*-hpux*.John David Anglin2-1/+4
2020-02-29 John David Anglin <danglin@gcc.gnu.org> PR ada/91100 * gnat.dg/socket1.adb: Disable on hppa*-*-hpux*.
2020-02-29Fix/skip various tests for hppa*-*-hpux*.John David Anglin9-0/+17
2020-02-29 John David Anglin <danglin@gcc.gnu.org> * g++.dg/pr90981.C: Skip on hppa*-*-hpux*. * gcc.dg/gnu2x-attrs-1.c: Add dg-require-alias. * gcc.dg/pr90756.c: Add -fno-common option on hppa*-*-hpux*. * gcc.dg/torture/20190327-1.c: Likewise. * gcc.dg/spellcheck-options-21.c: Skip on 32-bit hppa*-*-hpux*. * gcc.dg/strlenopt-68.c: Skip on hppa*-*-hpux*. * gcc.dg/torture/pr90020.c: Likewise. * gcc.dg/ucnid-16-utf8.c: Add dg-require-iconv "latin1".
2020-02-29XFAIL IPA tests that are not supported on 32-bit hppa*-*-hpux*.John David Anglin4-5/+13
2020-02-29 John David Anglin <danglin@gcc.gnu.org> PR ipa/92548 * gcc.dg/ipa/ipa-sra-12.c: xfail parameter split test on 32-bit hppa*-*-hpux*. * gcc.dg/ipa/ipa-sra-14.c: Likewise. * gcc.dg/ipa/ipcp-agg-12.c: xfail adding extra caller test.
2020-02-29Fix typo in last entry.John David Anglin1-1/+1
2020-02-29Add dg-require-visibility to tests that require visibility support.John David Anglin4-0/+9
2020-02-29 John David Anglin <danglin@gcc.gnu.org> * /g++.dg/ext/visibility/ref-temp1.C: Require visibility. * gfortran.dg/pr90988_4.f: Likewise. * gfortran.dg/pr91372.f90: Likewise.
2020-02-29Fix trivial regression from recent IRA changesJeff Law2-1/+3
* gcc.target/or1k/return-2.c: Update expected output.
2020-02-29Fix regression reported by tester due to recent IRA changesJeff Law2-1/+5
* gcc.target/xstormy16/sfr/06_sfrw_to_var.c: Update expected output.
2020-02-29c++: implement C++20 Disambiguating Nested-Requirements (P2092R0)Jason Merrill3-2/+14
The rule change in the title matches GCC's current behavior, so no change was needed. But the paper also makes 'typename' optional in a requirement-parameter-list, so this implements that. gcc/cp/ChangeLog 2020-02-28 Jason Merrill <jason@redhat.com> Implement P2092R0, Disambiguating Nested-Requirements * parser.c (cp_parser_requirement_parameter_list): Pass CP_PARSER_FLAGS_TYPENAME_OPTIONAL.
2020-02-29Daily bump.GCC Administrator1-1/+1
2020-02-28coroutines: Update func-params-08.C to suspend three times.Iain Sandoe2-1/+6
The awaitable initially committed was returning "always ready" which meant that the suspension code was not used. Update the test to suspend at each co_await, since this exercises more of the infrastructure. gcc/testsuite/ChangeLog: 2020-02-28 Iain Sandoe <iain@sandoe.co.uk> * g++.dg/coroutines/torture/func-params-08.C: Update to suspend for each co_await operation.
2020-02-28runtime: handle linux/arm64 signal registereric fang1-1/+1
Set sigpc and implement dumpregs for linux/arm64. Without this change, cmd/vet tool test will fail randomly. Updates golang/go#20931 Reviewed-on: https://go-review.googlesource.com/c/gofrontend/+/220543
2020-02-28c++: Fix constrained conversion op.Jason Merrill3-0/+24
We don't want to promote a conversion from viable == 0 to viable == -1. Found in ranges-v3. gcc/cp/ChangeLog 2020-02-28 Jason Merrill <jason@redhat.com> * call.c (build_user_type_conversion_1): Don't look at the second conversion of a non-viable candidate.
2020-02-28Commit for PR92785Paul Thomas4-1/+78
2020-02-28Fix target/93937Michael Meissner2-22/+6
2020-02-28 Michael Meissner <meissner@linux.ibm.com> PR target/93937 * config/rs6000/vsx.md (vsx_extract_<mode>_<VS_scalar>mode_var): Delete, the insn will never work.
2020-02-28Improve detection of ld_date.Martin Liska3-2/+9
PR other/93965 * configure.ac: Improve detection of ld_date by requiring either two dashes or none. * configure: Regenerate.
2020-02-28c++: Further tweak for P1937R2 - const{expr,eval} inconsistenciesJakub Jelinek5-2/+21
Seems I've missed one thing, as the first hunk in https://github.com/cplusplus/draft/commit/c8e68ed202b4a9260616bcee8a9768b5dca4bbca changes the wording so that only potentially-evaluated id-expressions that denote immediate functions must appear only in the specified contexts. That IMO means that in unevaluated contexts there aren't such restrictions anymore, so I think in unevaluated contexts one should be able to take the address of an immediate function. 2020-02-28 Jakub Jelinek <jakub@redhat.com> P1937R2 - Fixing inconsistencies between const{expr,eval} functions * typeck.c (cp_build_addr_expr_1): Allow taking address of immediate functions in unevaluated contexts. * g++.dg/cpp2a/consteval3.C: Change dg-error about taking address of immediate function in unevaluated contexts into dg-bogus. * g++.dg/cpp2a/consteval16.C: New test.
2020-02-28One more patch for PR93564: Prefer smaller hard regno when we do not honor ↵Vladimir N. Makarov2-1/+9
reg alloc order. 2020-02-28 Vladimir Makarov <vmakarov@redhat.com> PR rtl-optimization/93564 * ira-color.c (assign_hard_reg): Prefer smaller hard regno when we do not honor reg alloc order.
2020-02-28Fix misleading aarch64 mcpu/march warning stringJoel Hutton2-2/+8
The message for conflicting mcpu and march previously printed the architecture of the CPU instead of the CPU name, as well as omitting the extensions to the march string. This patch corrects both errors. This patch fixes PR target/87612. 2020-02-27 Joel Hutton <Joel.Hutton@arm.com> PR target/87612 * config/aarch64/aarch64.c (aarch64_override_options): Fix misleading warning string.
2020-02-28testsuite: Fix up g++.dg/torture/pr92152.C test for ilp32 targetsJakub Jelinek2-2/+9
2020-02-28 Jakub Jelinek <jakub@redhat.com> PR middle-end/92152 * g++.dg/torture/pr92152.C (size_t): Use decltype (sizeof (0)) instead of hardcoding unsigned long. (uint64_t): Use unsigned long long instead of unsigned long.
2020-02-28Daily bump.GCC Administrator1-1/+1
2020-02-27Document that -Wbuiltin-declaration-mismatch is enabled by default.Martin Sebor2-1/+5
gcc/ChangeLog: * doc/invoke.texi (-Wbuiltin-declaration-mismatch): Fix a typo.
2020-02-27Update gcc fr.po.Joseph Myers2-3695/+2410
* fr.po: Update.
2020-02-27Fix PR target/93932Michael Meissner4-32/+107
[gcc] 2020-02-27 Michael Meissner <meissner@linux.ibm.com> PR target/93932 * config/rs6000/vsx.md (vsx_extract_<mode>_var, VSX_D iterator): Split the insn into two parts. This insn only does variable extract from a register. (vsx_extract_<mode>_var_load, VSX_D iterator): New insn, do variable extract from memory. (vsx_extract_v4sf_var): Split the insn into two parts. This insn only does variable extract from a register. (vsx_extract_v4sf_var_load): New insn, do variable extract from memory. (vsx_extract_<mode>_var, VSX_EXTRACT_I iterator): Split the insn into two parts. This insn only does variable extract from a register. (vsx_extract_<mode>_var_load, VSX_EXTRACT_I iterator): New insn, do variable extract from memory. [gcc/testsuite] 2020-02-27 Michael Meissner <meissner@linux.ibm.com> PR target/93932 * gcc.target/powerpc/fold-vec-extract-longlong.p8.c: Adjust instruction counts.
2020-02-27Compare ARGUMENT_PACKS [pr93933]Nathan Sidwell5-20/+59
This implements Jason's suggested approach: 'I'd think that the bug is that we're treating them as types in the first place; they aren't types, so they shouldn't reach comptypes. I'd lean toward adding an assert to that effect and fixing the caller to use e.g. template_args_equal.' PR c++/93933 * pt.c (template_args_equal): Pass ARGUMENT_PACKS through to cp_tree_equal. * tree.c (cp_tree_equal): Compare ARGUMENT_PACKS here, * typeck.c (comptypes): Assert we don't get any argument packs.
2020-02-27ipa-cp: Avoid an ICE processing self-recursive cloned edges (PR 93707)Martin Jambor4-24/+79
2020-02-27 Martin Jambor <mjambor@suse.cz> Feng Xue <fxue@os.amperecomputing.com> PR ipa/93707 * ipa-cp.c (same_node_or_its_all_contexts_clone_p): Replaced with new function calls_same_node_or_its_all_contexts_clone_p. (cgraph_edge_brings_value_p): Use it. (cgraph_edge_brings_value_p): Likewise. (self_recursive_pass_through_p): Return false if caller is a clone. (self_recursive_agg_pass_through_p): Likewise. testsuite/ * gcc.dg/ipa/pr93707.c: New test.
2020-02-27middle-end: Fix wrong code caused by disagreemed between FRE and access path ↵Jan Hubicka11-88/+317
oracle [PR 92152] FRE is checking stores for equivalence based on their address, value and base+ref alias sets. Because ref alias set is not always the alias set of innermost type, but it may be one of refs in the access path (as decided by component_uses_parent_alias_set_from) it means that we can not really rely on the remaining part of access path to be meaningful in any way except for offset+size computation. The patch makes alias (which is used by FRE to validate transform) and tree-ssa-alias to share same logic for ending the access path relevant for TBAA. tree-ssa-alias previously ended access paths on VIEW_CONVERT_EXPR and BIT_FIELD_REF so it is not hard to wire in common predicate. However it led to additional issues (I tried to read the code quite carefully for possible extra fun, so I hope I found it all): 1) alias_component_refs_walk compares base and reference sizes to see if one access path may continue by another. This check can be confused by an union containing structure with zero sized array. In this case we no longer see the refernece to zero sized array and think that ref size is 0. In an access path there can be at most one (valid) trailing/zero sized array access, so the sizes in the access path are decreasing with the this exception. This is already handled by the logic, however the access is not expected to happen past the end of TBAA segment. I suppose this was kind of latent problem before because one can think of access path doing traling array past VIEW_CONVERT_EXPR, but since in C code we don't VCE and in non-C we don't do trailing arrays, we did not hit the problem. I fixed this by tracking if the trailing array references appearing after the end of TBAA access path and mostly punt in the second case (because we need to support kind of all type puning here). I do not think we can assume much of sanity here, in particular, we no longer know there is only one because FRE may mix things up. An exception is the walk that looks for occurence of basetype of path1 within TBAA relevant part of path2. Here we realy care about TBAA relevant parts of paths and thus do not need to give up. I broke out the logic into ends_tbaa_access_path_p to avoid duplication and to let me stick some detailed comments. This became much more complex than I originally imagined (still it is useful to make oracle both faster and more precise). Note that logic in aliasing_component_refs_walk is safe since it works on TBAA relevant segments of paths only. 2) nonoverlapping_refs_since_match_p is using TBAA only in the corner case that the paths got out of sync and re-synchronize of types of same size are found. I thus extended it to whole paths (not only TBAA relevant parts) and track if the TBAA part can be used by counting of number of TBAA relevant res on the stack. I have noticed that in one case we call nonoverlapping_refs_since_match_p before checking for view converting MEM_REFs and in others we check after. I think we want to just disable TBAA part if view convert is in there but still disambiguate. I will do this incrementaly. 3) nonoverlapping_component_refs_p uses TBAA so it needs to punt on end of TBAA path. It deals with no sizes and thus there is not the issue as in 1). I am also attaching one (most probably) valid C++ testcase (by Mark Williams) where we incorrectly disambiguated while the code is valid by the common initial sequence rule. This happens to be fixed by same patch. Here one access goes through union and follows by access path trhough one filed, while other access path start by different field of the union with common initial sequence. This made aliasing_component_refs_p to not find the overlapping type (because there is none) and disambiguate. Now we cut the first access path by the union reference and this makes us to find the path continuation in alias_component_refs_walk. If FRE is ever made more careful about access paths past the fist union reference (I think that would be good idea since unions are quite common in C++ and we throw away quite useful info) then we will need to teach access path oracle about the common initial sequence rule (which, as Mark pointed out, is part of both C and C++ standards). Only argument that can possibly invalidate this testcase is that I do not see that stadnard is clear about the situation where one access path contains the union but other starts after the union. Clearly if both start after the union reference we are right to disambiguate (since there is no union unvolved). If both starts before union then there is common initial sequence and by standard it is defined. This case works on current trunk because aliasing_component_refs_p resorts to base+offset after finding the match. But even that is more or less an accident I would say. I had to xfail three testcases. While alias-access-path ones are artificial and odd, 20030807-7 is derived from gcc and shows that we give up on disambiguations of tree_node union, so this patch disables useful transform in real world code. I am still planning to collect some data on the effect of this change to TBAA, but unless we want to reorganize FRE, I do not think there is better solution. gcc/ChangeLog: 2020-02-26 Jan Hubicka <hubicka@ucw.cz> PR middle-end/92152 * alias.c (ends_tbaa_access_path_p): Break out from ... (component_uses_parent_alias_set_from): ... here. * alias.h (ends_tbaa_access_path_p): Declare. * tree-ssa-alias.c (access_path_may_continue_p): Break out from ...; handle trailing arrays past end of tbaa access path. (aliasing_component_refs_p): ... here; likewise. (nonoverlapping_refs_since_match_p): Track TBAA segment of the access path; disambiguate also past end of it. (nonoverlapping_component_refs_p): Use only TBAA segment of the access path. gcc/testsuite/ChangeLog: 2020-02-26 Jan Hubicka <hubicka@ucw.cz> PR middle-end/92152 * gcc.dg/tree-ssa/alias-access-path-12.c: New testcase. * g++.dg/torture/pr92152.C: New testcase. * gcc.dg/torture/pr92152.c: New testcase. * gcc.dg/tree-ssa/20030807-7.c: xfail. * gcc.dg/tree-ssa/alias-access-path-4.c: xfail one case. * gcc.dg/tree-ssa/alias-access-path-5.c: xfail one case.
2020-02-27 [GCC][PATCH][ARM] Add vreinterpret, vdup, vget and vset bfloat16 intrinsicsMihail Ionescu8-28/+1158
This patch adds support for the bf16 vector create, get, set, duplicate and reinterpret intrinsics. ACLE documents are at https://developer.arm.com/docs/101028/latest ISA documents are at https://developer.arm.com/docs/ddi0596/latest gcc/ChangeLog: 2020-02-27 Mihail Ionescu <mihail.ionescu@arm.com> * (__ARM_NUM_LANES, __arm_lane, __arm_lane_q): Move to the beginning of the file. (vcreate_bf16, vcombine_bf16): New. (vdup_n_bf16, vdupq_n_bf16): New. (vdup_lane_bf16, vdup_laneq_bf16): New. (vdupq_lane_bf16, vdupq_laneq_bf16): New. (vduph_lane_bf16, vduph_laneq_bf16): New. (vset_lane_bf16, vsetq_lane_bf16): New. (vget_lane_bf16, vgetq_lane_bf16): New. (vget_high_bf16, vget_low_bf16): New. (vreinterpret_bf16_u8, vreinterpretq_bf16_u8): New. (vreinterpret_bf16_u16, vreinterpretq_bf16_u16): New. (vreinterpret_bf16_u32, vreinterpretq_bf16_u32): New. (vreinterpret_bf16_u64, vreinterpretq_bf16_u64): New. (vreinterpret_bf16_s8, vreinterpretq_bf16_s8): New. (vreinterpret_bf16_s16, vreinterpretq_bf16_s16): New. (vreinterpret_bf16_s32, vreinterpretq_bf16_s32): New. (vreinterpret_bf16_s64, vreinterpretq_bf16_s64): New. (vreinterpret_bf16_p8, vreinterpretq_bf16_p8): New. (vreinterpret_bf16_p16, vreinterpretq_bf16_p16): New. (vreinterpret_bf16_p64, vreinterpretq_bf16_p64): New. (vreinterpret_bf16_f32, vreinterpretq_bf16_f32): New. (vreinterpret_bf16_f64, vreinterpretq_bf16_f64): New. (vreinterpretq_bf16_p128): New. (vreinterpret_s8_bf16, vreinterpretq_s8_bf16): New. (vreinterpret_s16_bf16, vreinterpretq_s16_bf16): New. (vreinterpret_s32_bf16, vreinterpretq_s32_bf16): New. (vreinterpret_s64_bf16, vreinterpretq_s64_bf16): New. (vreinterpret_u8_bf16, vreinterpretq_u8_bf16): New. (vreinterpret_u16_bf16, vreinterpretq_u16_bf16): New. (vreinterpret_u32_bf16, vreinterpretq_u32_bf16): New. (vreinterpret_u64_bf16, vreinterpretq_u64_bf16): New. (vreinterpret_p8_bf16, vreinterpretq_p8_bf16): New. (vreinterpret_p16_bf16, vreinterpretq_p16_bf16): New. (vreinterpret_p64_bf16, vreinterpretq_p64_bf16): New. (vreinterpret_f32_bf16, vreinterpretq_f32_bf16): New. (vreinterpretq_p128_bf16): New. * config/arm/arm_neon_builtins.def (VDX): Add V4BF. (V_elem): Likewise. (V_elem_l): Likewise. (VD_LANE): Likewise. (VQX) Add V8BF. (V_DOUBLE): Likewise. (VDQX): Add V4BF and V8BF. (V_two_elem, V_three_elem, V_four_elem): Likewise. (V_reg): Likewise. (V_HALF): Likewise. (V_double_vector_mode): Likewise. (V_cmp_result): Likewise. (V_uf_sclr): Likewise. (V_sz_elem): Likewise. (Is_d_reg): Likewise. (V_mode_nunits): Likewise. * config/arm/neon.md (neon_vdup_lane): Enable for BFloat. gcc/testsuite/ChangeLog: 2020-02-27 Mihail Ionescu <mihail.ionescu@arm.com> * gcc.target/arm/bf16_dup.c: New test. * gcc.target/arm/bf16_reinterpret.c: Likewise.
2020-02-27amdgcn: sub-dword vector min/max/shift/bit operatorsAndrew Stubbs3-15/+90
2020-02-27 Andrew Stubbs <ams@codesourcery.com> gcc/ * config/gcn/gcn-valu.md (VEC_SUBDWORD_MODE): New mode iterator. (<expander><mode>2<exec>): Change modes to VEC_ALL1REG_INT_MODE. (<expander><mode>3<exec>): Likewise. (<expander><mode>3): New. (v<expander><mode>3): New. (<expander><mode>3): New. (<expander><mode>3<exec>): Rename to ... (<expander>v64si3<exec>): ... this, and change modes to V64SI. * config/gcn/gcn.md (mnemonic): Use '%B' for not.
2020-02-27PowerPC Add has_arch_pwr* checksWill Schmidt3-1/+63
testsuite/ 2020-02-25 Will Schmidt <will_schmidt@vnet.ibm.com> * lib/target_supports.exp (check_effective_target_has_arch_pwr5): New. (check_effective_target_has_arch_pwr6): New. (check_effective_target_has_arch_pwr7): New. (check_effective_target_has_arch_pwr8): New. (check_effective_target_has_arch_pwr9): New. * gcc.target/powerpc/pr92132-fp-1.c: Add target check.
2020-02-27Use -mno-pcrel for tests requiring TOC.Bill Schmidt3-2/+7
2020-02-27 Bill Schmidt <wschmidt@linux.ibm.com> * gcc.target/powerpc/ppc64-abi-1.c: Compile with -mno-pcrel. * gcc.target/powerpc/ppc64-abi-2.c: Likewise.
2020-02-27define NO_DOT_IN_LABEL only in vxworks6Alexandre Oliva2-6/+13
There was a mistake in forward-porting and contributing some vxworks7r2 changes, that caused a conditional to be dropped around a couple of preprocessor directives, needed only up to vxworks6, that change the compiler's behavior WRT introducing dollars and dots in symbol names. This deviates GCC's behavior from the native system compiler, in a way that appears to have ABI implications, so we'd like to correct that, even at this late stage in the development cycle. for gcc/ChangeLog * config/vx-common.h (NO_DOLLAR_IN_LABEL, NO_DOT_IN_LABEL): Leave them alone on vx7.
2020-02-27work-around system header namespace pollutionAlexandre Oliva2-0/+5
Including limits.h on vxworks pollutes the global namespace with SH and many other platform names; work around it. for gcc/testsuite/ChangeLog * gcc.target/aarch64/vect-mull.x (SH): Undefine.
2020-02-27Fix broken type comparison assertNathan Sidwell3-2/+10
In implementing Jason's suggested direction for 93933, the compiler exploded in a surprising way. Turns out an assert had been passing NULLS to comptypes, and therefore not checking what it intended. Further comptypes, could silently accept such nulls under most circumstances. * class.c (adjust_clone_args): Correct arg-checking assert. * typeck.c (comptypes): Assert not nulls.
2020-02-27tree-optimization/93508 - make VN translate through _chk and valueize lengthRichard Biener4-4/+39
Value-numbering failed to handle __builtin_{memcpy,memset,...}_chk variants when removing abstraction and also failed to use the value-numbering lattice when requiring the length argument of the call to be constant. 2020-02-27 Richard Biener <rguenther@suse.de> PR tree-optimization/93508 * tree-ssa-sccvn.c (vn_reference_lookup_3): Handle _CHK like non-_CHK variants. Valueize their length arguments. * gcc.dg/tree-ssa/ssa-fre-85.c: New testcase.
2020-02-27tree-optimization/93953 - avoid reference into hash-mapRichard Biener4-3/+32
When possibly expanding a hash-map avoid keeping a reference to an entry. 2020-02-27 Richard Biener <rguenther@suse.de> PR tree-optimization/93953 * tree-vect-slp.c (slp_copy_subtree): Avoid keeping a reference to the hash-map entry. * gcc.dg/pr93953.c: New testcase.
2020-02-27amdgcn: fix ICE on subreg of BI reg.Andrew Stubbs2-0/+29
BImode usually only requires one bit, but instructions that write to VCC also clobber the reset of the DImode register pair, so gcn_class_max_nregs reports that two registers are needed for BImode. Paradoxically, accessing VCC via SImode is therefore uses fewer registers than accessing via BImode. The LRA checking code takes this into account, but the DF liveness data also looks at the subreg, so it says (subreg:SI (reg:BI VCC) 0) only makes the low part live. Both are "correct", but they disagree, which causes an ICE. This doesn't happen when writing conditions to VCC; it happens when accessing VCC_LO via a regular move to a regular SImode register. If we transform the subregs so that BImode is always the outer mode then it basically means the same thing, except that now both LRA and DF calculate nregs the same, and ICE goes away. As soon as LRA is done the subregs all evaporate anyway. 2020-02-27 Andrew Stubbs <ams@codesourcery.com> gcc/ * config/gcn/gcn.md (mov<mode>): Add transformations for BI subregs.
2020-02-27fix -fdebug-prefix-map without gas .file supportRichard Biener4-2/+15
This applies file mapping when emitting the directory table directly instead of using the assemblers .file directive where we already correctly apply the map. Notably the non-assembler path is used for the early debug emission for LTO. 2020-02-27 Mark Williams <mwilliams@fb.com> * dwarf2out.c (file_name_acquire): Call remap_debug_filename. * lto-opts.c (lto_write_options): Drop -fdebug-prefix-map, -ffile-prefix-map and -fmacro-prefix-map. * lto-streamer-out.c: Include file-prefix-map.h. (lto_output_location): Remap the file part of locations.
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