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2025-08-08vect: Add target hook to prefer gather/scatter instructionsdevel/omp/gcc-15Andrew Stubbs7-13/+73
For AMD GCN, the instructions available for loading/storing vectors are always scatter/gather operations (i.e. there are separate addresses for each vector lane), so the current heuristic to avoid gather/scatter operations with too many elements in get_group_load_store_type is counterproductive. Avoiding such operations in that function can subsequently lead to a missed vectorization opportunity whereby later analyses in the vectorizer try to use a very wide array type which is not available on this target, and thus it bails out. This patch adds a target hook to override the "single_element_p" heuristic in the function as a target hook, and activates it for GCN. This allows much better code to be generated for affected loops. Co-authored-by: Julian Brown <julian@codesourcery.com> gcc/ * doc/tm.texi.in (TARGET_VECTORIZE_PREFER_GATHER_SCATTER): Add documentation hook. * doc/tm.texi: Regenerate. * target.def (prefer_gather_scatter): Add target hook under vectorizer. * hooks.cc (hook_bool_mode_int_unsigned_false): New function. * hooks.h (hook_bool_mode_int_unsigned_false): New prototype. * tree-vect-stmts.cc (vect_use_strided_gather_scatters_p): Add parameters group_size and single_element_p, and rework to use targetm.vectorize.prefer_gather_scatter. (get_group_load_store_type): Move some of the condition into vect_use_strided_gather_scatters_p. * config/gcn/gcn.cc (gcn_prefer_gather_scatter): New function. (TARGET_VECTORIZE_PREFER_GATHER_SCATTER): Define hook. (cherry picked from commit 36c5a7aa9a6dbaed07e3a2482c66743ddcb3e776)
2025-07-30Don't pass vector params through to offload targetsAndrew Stubbs3-5/+26
The optimization options are deliberately passed through to the LTO compiler, but when the same mechanism is reused for offloading it ends up forcing the host compiler settings onto the device compiler. Maybe this should be removed completely, but this patch just fixes a few of them. In particular, param_vect_partial_vector_usage is disabled by x86 and this really hurts amdgcn. I also fixed an ambiguous else warning in the generated file by adding braces. gcc/ChangeLog: * config/gcn/gcn.cc (gcn_option_override): Add note to set default for param_vect_partial_vector_usage to "1". * optc-save-gen.awk: Don't pass through options marked "NoOffload". * params.opt (-param=vect-epilogues-nomask): Add NoOffload. (-param=vect-partial-vector-usage): Likewise. (-param=vect-inner-loop-cost-factor): Likewise. (cherry picked from commit b31fa1ce19542e14bea10f46240f39cb37277b80)
2025-07-30amdgcn: add DImode offsets for gather/scatterAndrew Stubbs2-12/+103
Add new variant of he gather_load and scatter_store instructions that take the offsets in DImode. This is not the natural width for offsets in the instruction set, but we can use them to compute a vector of absolute addresses, which does work. This enables the autovectorizer to use gather/scatter in a number of additional scenarios (one of which shows up in the SPEC HPC lbm benchmark). gcc/ChangeLog: * config/gcn/gcn-valu.md (gather_load<mode><vndi>): New. (scatter_store<mode><vndi>): New. (mask_gather_load<mode><vndi>): New. (mask_scatter_store<mode><vndi>): New. * config/gcn/gcn.cc (gcn_expand_scaled_offsets): Support DImode. (cherry picked from commit 351fa55c58a036f148d13bca972e687a0bacd113)
2025-07-30amdgcn: Add ashlvNm, mulvNm macrosAndrew Stubbs1-27/+41
I need some extra shift varieties in the mode-independent code, but the macros don't permit insns that don't have QI/HI variants. This fixes the problem, and adds the new functions for the follow-up patch to use. gcc/ChangeLog: * config/gcn/gcn.cc (GEN_VNM_NOEXEC): Use USE_QHF. (GEN_VNM): Likewise, and call for new ashl and mul variants. (cherry picked from commit f194924984c4eb9c8be5310f78b191b35e576ab8)
2025-07-30amdgcn: add more insn patterns using vec_duplicateAndrew Stubbs2-6/+179
These new insns allow more efficient use of scalar inputs to 64-bit vector add and mul. Also, the patch adjusts the existing mul.._dup because it was actually a dup2 (the vec_duplicate is on the second input), and that was inconveniently inconsistent. The patterns are generally useful, but will be used directly by a follow-up patch. gcc/ChangeLog: * config/gcn/gcn-valu.md (add<mode>3_dup): New. (add<mode>3_dup_exec): New. (<su>mul<mode>3_highpart_dup<exec>): New. (mul<mode>3_dup): Move the vec_duplicate to operand 1. (mul<mode>3_dup_exec): New. (vec_series<mode>): Adjust call to gen_mul<mode>3_dup. * config/gcn/gcn.cc (gcn_expand_vector_init): Likewise. (cherry picked from commit bdc4062a0796788e44d5e6ecd753268a8b453cc7)
2025-07-30amdgcn: Fix various unrecognized pattern issues with add<mode>3_vcc_dupAndrew Stubbs1-11/+11
The patterns did not accept inline immediate constants, even though the hardware instructions do, which has lead to some errors in some patches I'm working on. Also the VCC update RTL was using the wrong operands in the wrong places. This appears to have been harmless(?) but is definitely not intended. gcc/ChangeLog: * config/gcn/gcn-valu.md (add<mode>3_vcc_dup<exec_vcc>): Change operand 2 to allow gcn_alu_operand. Swap the operands in the VCC update RTL. (add<mode>3_vcc_zext_dup): Likewise. (add<mode>3_vcc_zext_dup_exec): Likewise. (add<mode>3_vcc_zext_dup2): Likewise. (add<mode>3_vcc_zext_dup2_exec): Likewise. (cherry picked from commit 4a0967f7509b5fad1c9bda432f71deb0d342a879)
2025-07-30amdgcn: fix vec_ucmp infinite recursionAndrew Stubbs1-3/+3
I suppose this pattern doesn't get used much! The unsigned compare was meant to be defined using the signed compare pattern, but actually ended up trying to recursively call itself. This patch fixes the issue in the obvious way. gcc/ChangeLog: * config/gcn/gcn-valu.md (vec_cmpu<mode>di_exec): Call gen_vec_cmp*, not gen_vec_cmpu*. (cherry picked from commit d8680bac95c68002d7e4b13ae1dab1116fdfefc6)
2025-07-30amdgcn: Don't clobber VCC if we don't need toAndrew Stubbs2-30/+21
This is a hold-over from GCN3 where v_add always wrote to the condition register, whether you wanted it or not. This hasn't been true since GCN5, and we dropped support for GCN3 a little while ago, so let's fix it. There was actually a latent bug here because some other post-reload splitters were generating v_add instructions without declaring the VCC clobber (at least mul did this), so this should fix some wrong-code bugs also. gcc/ChangeLog: * config/gcn/gcn-valu.md (add<mode>3<exec_clobber>): Rename ... (add<mode>3<exec>): ... to this, remove the clobber, and change the instruction from v_add_co_u32 to v_add_u32. (add<mode>3_dup<exec_clobber>): Rename ... (add<mode>3_dup<exec>): ... to this, and likewise. (sub<mode>3<exec_clobber>): Rename ... (sub<mode>3<exec>): ... to this, and likewise * config/gcn/gcn.md (addsi3): Remove the DI clobber, and change the instruction from v_add_co_u32 to v_add_u32. (addsi3_scc): Likewise. (subsi3): Likewise, but for v_sub_co_u32. (muldi3): Likewise. (cherry picked from commit 0eee2dd2865faf61d9d74425510421e20434ec03)
2025-07-22ChangeLog.omp bumpThomas Schwinge3-1/+46
2025-07-21nvptx: Support '-march=sm_61'Thomas Schwinge11-12/+95
gcc/ * config/nvptx/nvptx-sm.def: Add '61'. * config/nvptx/nvptx-gen.h: Regenerate. * config/nvptx/nvptx-gen.opt: Likewise. * config/nvptx/nvptx.cc (first_ptx_version_supporting_sm): Adjust. * config/nvptx/nvptx.opt (-march-map=sm_61, -march-map=sm_62): Likewise. * config.gcc: Likewise. * doc/invoke.texi (Nvidia PTX Options): Document '-march=sm_61'. * config/nvptx/gen-multilib-matches-tests: Extend. gcc/testsuite/ * gcc.target/nvptx/march-map=sm_61.c: Adjust. * gcc.target/nvptx/march-map=sm_62.c: Likewise. * gcc.target/nvptx/march=sm_61.c: New. libgomp/ * testsuite/libgomp.c/declare-variant-3-sm61.c: New. * testsuite/libgomp.c/declare-variant-3.h: Adjust. (cherry picked from commit 7b53b88381179c5c8152bcb890460f66d9c88fac)
2025-07-21nvptx: Support '-mptx=5.0'Thomas Schwinge6-0/+29
gcc/ * config/nvptx/nvptx-opts.h (enum ptx_version): Add 'PTX_VERSION_5_0'. * config/nvptx/nvptx.cc (ptx_version_to_string) (ptx_version_to_number): Adjust. * config/nvptx/nvptx.h (TARGET_PTX_5_0): New. * config/nvptx/nvptx.opt (Enum(ptx_version)): Add 'EnumValue' '5.0' for 'PTX_VERSION_5_0'. * doc/invoke.texi (Nvidia PTX Options): Document '-mptx=5.0'. gcc/testsuite/ * gcc.target/nvptx/mptx=5.0.c: New. (cherry picked from commit 97616687149f115e0ab946b9a05a9f8c1e47429e)
2025-07-03ChangeLog.omp bumpThomas Schwinge2-1/+9
2025-07-03OpenMP: Add omp_get_initial_device/omp_get_num_devices builtins: Fix test casesThomas Schwinge2-4/+4
With this fix-up for commit 387209938d2c476a67966c6ddbdbf817626f24a2 "OpenMP: Add omp_get_initial_device/omp_get_num_devices builtins", we progress: PASS: c-c++-common/gomp/omp_get_num_devices_initial_device.c (test for excess errors) PASS: c-c++-common/gomp/omp_get_num_devices_initial_device.c scan-tree-dump-not optimized "abort" -FAIL: c-c++-common/gomp/omp_get_num_devices_initial_device.c scan-tree-dump-times optimized "omp_get_num_devices;" 1 +PASS: c-c++-common/gomp/omp_get_num_devices_initial_device.c scan-tree-dump-times optimized "omp_get_num_devices" 1 PASS: c-c++-common/gomp/omp_get_num_devices_initial_device.c scan-tree-dump optimized "_1 = __builtin_omp_get_num_devices \\(\\);[\\r\\n]+[ ]+return _1;" ... etc. for offloading configurations. gcc/testsuite/ * c-c++-common/gomp/omp_get_num_devices_initial_device.c: Fix. * gfortran.dg/gomp/omp_get_num_devices_initial_device.f90: Likewise. (cherry picked from commit 13c766066e23eb6ddf6bad7a5664b9d3ca8c1974)
2025-06-17ChangeLog.omp bumpTobias Burnus2-1/+10
2025-06-17OpenMP: Fix implicit 'declare target' for <ostream>Tobias Burnus1-1/+2
libstdc++-v3/include/std/ostream contains: namespace std _GLIBCXX_VISIBILITY(default) { ... template<typename _CharT, typename _Traits> inline basic_ostream<_CharT, _Traits>& endl(basic_ostream<_CharT, _Traits>& __os) { return flush(__os.put(__os.widen('\n'))); } ... #include <bits/ostream.tcc> and the latter, libstdc++-v3/include/bits/ostream.tcc, has: // Inhibit implicit instantiations for required instantiations, // which are defined via explicit instantiations elsewhere. #if _GLIBCXX_EXTERN_TEMPLATE extern template class basic_ostream<char>; extern template ostream& endl(ostream&); Before this commit, omp_discover_declare_target_tgt_fn_r marked 'endl' as (implicitly) declare target - but not the calls in it due to the 'extern' (DECL_EXTERNAL). Thanks to inlining and as 'endl' is (therefore) not used and, hence, discarded by the linker; hencet, it works with -O0 and -O1. However, as the (unused) function still exits, IPA CP (enabled by -O2) will try to do constant-value propagation and fails as the definition of 'widen' is not available. Solution is to still walk 'endl' despite being an 'extern(al)' decl; this has been restricted for now to DECL_DECLARED_INLINE_P. gcc/ChangeLog: * omp-offload.cc (omp_discover_declare_target_tgt_fn_r): Also walk external functions that are declare inline (and have a DECL_SAVED_TREE). libgomp/ChangeLog: * testsuite/libgomp.c++/declare_target-2.C: New test. (cherry picked from commit ea43b99537591b1103da3961c61f1cbfae968859)
2025-06-17Merge branch 'releases/gcc-15' into devel/omp/gcc-15Tobias Burnus29-463/+906
Merge up to r15-9840-g9803e23a212962 (June 17, 2025)
2025-06-17Daily bump.GCC Administrator1-1/+1
2025-06-16Daily bump.GCC Administrator1-1/+1
2025-06-15Daily bump.GCC Administrator3-1/+16
2025-06-14AVR: Fix PR120423 / PR116389.Georg-Johann Lay4-0/+116
The problem with PR120423 and PR116389 is that reload might assign an invalid hard register to a paradoxical subreg. For example with the test case from the PR, it assigns (REG:QI 31) to the inner of (subreg:HI (QI) 0) which is valid, but the subreg will be turned into (REG:HI 31) which is invalid and triggers an ICE in postreload. The problem only occurs with the old reload pass. The patch maps the paradoxical subregs to a zero-extends which will be allocated correctly. For the 120423 testcases, the code is the same like with -mlra (which doesn't implement the fix), so the patch doesn't even introduce a performance penalty. The patch is only needed for v15: v14 is not affected, and in v16 reload will be removed. PR rtl-optimization/120423 PR rtl-optimization/116389 gcc/ * config/avr/avr.md [-mno-lra]: Add pre-reload split to transform (left shift of) a paradoxical subreg to a (left shift of) zero-extend. gcc/testsuite/ * gcc.target/avr/torture/pr120423-1.c: New test. * gcc.target/avr/torture/pr120423-2.c: New test. * gcc.target/avr/torture/pr120423-116389.c: New test.
2025-06-14Daily bump.GCC Administrator4-1/+70
2025-06-13Fix test case for PR117811 which failed for int < 32 bit.Georg-Johann Lay1-0/+5
PR middle-end/117811 PR testsuite/52641 gcc/testsuite/ * gcc.dg/torture/pr117811.c: Fix for int < 32 bit. (cherry picked from commit 07f229c2d7ee6b604e5a86092e675d5d36c1ba4e)
2025-06-13recip: Reset range info when replacing sqrt with rsqrt [PR120638]Jakub Jelinek2-0/+32
This pass reuses a SSA_NAME on the lhs of sqrt etc. call as lhs of .RSQRT etc. call. The following testcase is miscompiled since my recent ranger cast changes, because we compute (correct) range for sqrtf argument as well as result but then recip pass keeps using that range for the .RQSRT call which returns 1. / sqrt, so the function then returns 0.5f unconditionally. Note, on foo this is a regression from GCC 15, but on bar it regressed already with the r14-536 change. 2025-06-12 Jakub Jelinek <jakub@redhat.com> PR tree-optimization/120638 * tree-ssa-math-opts.cc (pass_cse_reciprocals::execute): Call reset_flow_sensitive_info on arg1. * gcc.dg/pr120638.c: New test. (cherry picked from commit 8804e5b5b127b27d099d0c361fa2161d0b13edef)
2025-06-13real: Fix up real_from_integer [PR120547]Jakub Jelinek2-12/+41
The function has 2 problems, one is _BitInt specific and the other is most likely also reproduceable only with it. The first issue is that I've missed updating the function for _BitInt, maxbitlen as MAX_BITSIZE_MODE_ANY_INT + HOST_BITS_PER_WIDE_INT obviously isn't guaranteed to be larger than any integral type we might want to convert at compile time from wide_int to REAL_VALUE_FORMAT. Just using len instead of it works fine, at least when used after HOST_BITS_PER_WIDE_INT is added to it and it is truncated to multiples of HOST_BITS_PER_WIDE_INT. The other bug is that if the value has too many significant bits (formerly maxbitlen - cnt_l_z, now len - cnt_l_z), the code just shifts it right and adds the shift count to the future exponent. That isn't correct for rounding as the testcase attempts to show, the internal real format has more bits than any precision in supported format, but we still need to distinguish bewtween values exactly half way between representable floating point values (those should be rounded to even) and the case when we've shifted away some non-zero bits, so the value was tiny bit larger than half way and then we should round up. The patch uses something like e.g. soft-fp uses in these cases, right shift with sticky bit in the least significant bit. 2025-06-05 Jakub Jelinek <jakub@redhat.com> PR middle-end/120547 * real.cc (real_from_integer): Remove maxbitlen variable, use len instead of that. When shifting right, or in 1 if any of the shifted away bits are non-zero. Formatting fix. * gcc.dg/bitint-123.c: New test. (cherry picked from commit ea9ea72e448e391d4be781b74956a0190f93afc8)
2025-06-13tree-chrec: Use signed_type_for in convert_affine_scevJakub Jelinek1-1/+1
On s390x-linux I've run into the gcc.dg/torture/bitint-27.c test ICEing in build_nonstandard_integer_type called from convert_affine_scev (not sure why it doesn't trigger on x86_64/aarch64). The problem is clear, when ct is a BITINT_TYPE with some large TYPE_PRECISION, build_nonstandard_integer_type won't really work on it. The patch fixes it similarly what has been done for GCC 14 in various other spots. 2025-05-20 Jakub Jelinek <jakub@redhat.com> * tree-chrec.cc (convert_affine_scev): Use signed_type_for instead of build_nonstandard_integer_type. (cherry picked from commit e38027c8ff449ffadaca449004bb891b9094ad00)
2025-06-13Fortran: Fix missing substring ref for allocatable saved vars [PR120483]Andre Vehreschild2-3/+26
Compute a substring ref on an allocatable static character array using pointer arithmetic. Using an array type corrupts type layouting and crashes omp generation. PR fortran/120483 gcc/fortran/ChangeLog: * trans-expr.cc (gfc_conv_substring): Use pointer arithmetic on static allocatable char arrays. gcc/testsuite/ChangeLog: * gfortran.dg/save_8.f90: New test. (cherry picked from commit 5c9bdfd2748b8159856a37404ab7b34d977242ce)
2025-06-13Daily bump.GCC Administrator5-1/+55
2025-06-12Update gcc es.poJoseph Myers1-106/+87
* es.po: Update.
2025-06-12ipa: When inlining, don't combine PT JFs changing signedness (PR120295)Martin Jambor2-0/+94
In GCC 15 we allowed jump-function generation code to skip over a type-cast converting one integer to another as long as the latter can hold all the values of the former or has at least the same precision. This works well for IPA-CP where we do then evaluate each jump function as we propagate values and value-ranges. However, the test-case in PR 120295 shows a problem with inlining, where we combine pass-through jump-functions so that they are always relative to the function which is the root of the inline tree. Unfortunately, we are happy to combine also those with type-casts to a different signedness which makes us use sign zero extension for the expected value ranges where we should have used sign extension. When the value-range which then leads to wrong insertion of a call to builtin_unreachable is being computed, the information about an existence of a intermediary signed type has already been lost during previous inlining. This patch simply blocks combining such jump-functions so that it is back-portable to GCC 15. Once we switch pass-through jump functions to use a vector of operations rather than having room for just one, we will be able to address this situation with adding an extra conversion instead. gcc/ChangeLog: 2025-05-19 Martin Jambor <mjambor@suse.cz> PR ipa/120295 * ipa-prop.cc (update_jump_functions_after_inlining): Do not combine pass-through jump functions with type-casts changing signedness. gcc/testsuite/ChangeLog: 2025-05-19 Martin Jambor <mjambor@suse.cz> PR ipa/120295 * gcc.dg/ipa/pr120295.c: New test. (cherry picked from commit 0b004c92f5ea239936a403a2a757e12ca82ce6d8)
2025-06-12ada: Fix documentation of Generalized Finalization extensionEric Botcazou2-259/+162
The current documentation does not reflect the implementation present in the compiler and contains various other inaccuracies. gcc/ada/ChangeLog: * doc/gnat_rm/gnat_language_extensions.rst (Generalized Finalization): Document the actual implementation. (No_Raise): Move to separate section. * gnat_rm.texi: Regenerate.
2025-06-12ada: Fix wrong visibility over discriminantsRonan Desplanques1-4/+12
This patch fixes an issue where the compiler was incorrectly allowing references to discriminants of the ancestor type in private type extensions. gcc/ada/ChangeLog: * sem_ch3.adb (Build_Derived_Private_Type): Fix test. (Build_Derived_Record_Type): Adjust error recovery paths.
2025-06-12ada: Tweak special handling of synchronized type scopesRonan Desplanques1-8/+20
Exp_Util.Insert_Actions handles scopes of synchronized types specially, but the condition it tested before this patch was not quite correct in some cases, for example during some expansion operations made under Expand_N_Task_Type_Declaration. This patch refines the test. gcc/ada/ChangeLog: * exp_util.adb (Insert_Actions): Refine test.
2025-06-12ada: Small tweak to latest changeEric Botcazou2-5/+3
gcc/ada/ChangeLog: * doc/gnat_ugn/building_executable_programs_with_gnat.rst (Compiler switches) <-O>: Fix long line. * gnat_ugn.texi: Regenerate.
2025-06-12ada: Document supported GCC optimization switchesEric Botcazou4-67/+119
In particular the most recently added ones, namely -Og and -Oz. But -Ofast is not documented because it disregards strict compliance with standards. gcc/ada/ChangeLog: * usage.adb (Usage): Justify the documentation of common switches like that of other switches. Rework that of the -O switch. * doc/gnat_ugn/building_executable_programs_with_gnat.rst (Compiler switches) <-O>: Rework and document 'z' and 'g' operands. * doc/gnat_ugn/gnat_and_program_execution.rst (Optimization Levels): Rework and document -Oz and -Og switches. * gnat_ugn.texi: Regenerate.
2025-06-12Daily bump.GCC Administrator1-1/+1
2025-06-11Daily bump.GCC Administrator3-1/+53
2025-06-10ChangeLog.omp bumpTobias Burnus2-1/+20
2025-06-10gcn: Add experimental MI300 (gfx942) supportTobias Burnus9-76/+192
As gfx942 and gfx950 belong to gfx9-4-generic, the latter two are also added. Note that there are no specific optimizations for MI300, yet. For none of the mentioned devices, any multilib is build by default; use '--with-multilib-list=' when configuring GCC to build them alongside. gfx942 was added in LLVM (and its mc assembler, used by GCC) in version 18, generic support in LLVM 19 and gfx950 in LLVM 20. gcc/ChangeLog: * config/gcn/gcn-devices.def: Add gfx942, gfx950 and gfx9-4-generic. * config/gcn/gcn-opts.h (TARGET_CDNA3, TARGET_CDNA3_PLUS, TARGET_GLC_NAME, TARGET_TARGET_SC_CACHE): Define. (TARGET_ARCHITECTED_FLAT_SCRATCH): Use also for CDNA3. * config/gcn/gcn.h (gcn_isa): Add ISA_CDNA3 to the enum. * config/gcn/gcn.cc (print_operand): Update 'g' to use TARGET_GLC_NAME; add 'G' to print TARGET_GLC_NAME unconditionally. * config/gcn/gcn-valu.md (scatter, gather): Use TARGET_GLC_NAME. * config/gcn/gcn.md: Use %G<num> instead of glc; use 'buffer_inv sc1' for TARGET_TARGET_SC_CACHE. * doc/invoke.texi (march): Add gfx942, gfx950 and gfx9-4-generic. * doc/install.texi (amdgcn*-*-*): Add gfx942, gfx950 and gfx9-4-generic. * config/gcn/gcn-tables.opt: Regenerate. libgomp/ChangeLog: * testsuite/libgomp.c/declare-variant-4.h (gfx942): New variant function. * testsuite/libgomp.c/declare-variant-4-gfx942.c: New test. (cherry picked from commit 37b454b7e171bd8a792cbe4c57ea0f9702afa22d)
2025-06-10Merge branch 'releases/gcc-15' into devel/omp/gcc-15Tobias Burnus29-433/+1360
Merge up to r15-9819-g5327eef7b003f6 (June 10, 2025)
2025-06-10vectorizer: Fix riscv build [PR120042]Andrew Pinski1-0/+1
r15-9859-ga6cfde60d8c added a call to dominated_by_p to tree-vectorizer.h but dominance.h is not always included; and you get a build failure on riscv building riscv-vector-costs.cc. Let's add the include of dominance.h to tree-vectorizer.h Pushed as obvious after builds for riscv and x86_64. gcc/ChangeLog: PR target/120042 * tree-vectorizer.h: Include dominance.h. Signed-off-by: Andrew Pinski <quic_apinski@quicinc.com> (cherry picked from commit 299d48ff4a34c00a6ef964b694fb9b1312683049)
2025-06-10ada: Error on subtype with static predicate used in case_expressionGary Dismukes2-4/+6
The compiler improperly flags an error on the use of a subtype with a static predicate as a choice in a case expression alternative, complaining that the subtype has a nonstatic predicate. The fix for this is to add a test for the subtype not having a static predicate. gcc/ada/ChangeLog: * einfo.ads: Revise comment about Dynamic_Predicate flag to make it more accurate. * sem_case.adb (Check_Choices): Test "not Has_Static_Predicate_Aspect" as additional guard for error about use of subtype with nonstatic predicate as a case choice. Improve related error message.
2025-06-10ada: Fix fallout of latest changeEric Botcazou1-1/+7
Freeze_Static_Object needs to deal with the objects that have been created by Insert_Conditional_Object_Declaration. gcc/ada/ChangeLog: * freeze.adb (Freeze_Static_Object): Do not issue any error message for compiler-generated entities.
2025-06-10ada: Fix wrong initialization of library-level object by conditional expressionEric Botcazou2-4/+15
The previous fix was not robust enough in the presence of transient scopes. gcc/ada/ChangeLog: * exp_ch4.adb (Insert_Conditional_Object_Declaration): Deal with a transient scope being created around the declaration. * freeze.adb (Freeze_Entity): Do not call Freeze_Static_Object for a renaming declaration.
2025-06-10ada: Storage_Error on Ordered_Maps container aggregate with enumeration Key_TypeGary Dismukes1-1/+1
The compiler fails with a Storage_Error when compiling a container aggregate for a Map type coming from an instantiation of Ada.Containers.Ordered_Maps that specifies an enumeration type for the Key_Type formal. gcc/ada/ChangeLog: * exp_aggr.adb (Build_Container_Aggr_Code.To_Int): Apply Enumeration_Pos to Entity (Expr) rather than Expr.
2025-06-10ada: Fix infinite loop with aggregate in generic unitEric Botcazou1-4/+1
Root_Type does not return the same type for the private and the full view of a derived private tagged type when both derive from an interface type. gcc/ada/ChangeLog: * sem_ch12.adb (Copy_Generic_Node): Do not call Root_Type to find the root type of an aggregate of a derived tagged type.
2025-06-10ada: Fix use-after-free in Compute_All_TasksRonan Desplanques1-1/+4
This patch fixes a bug in System.Stack_Usage.Tasking.Compute_All_Tasks where it would attempt to read the stack of threads that had already completed. gcc/ada/ChangeLog: * libgnarl/s-stusta.adb (Compute_All_Tasks): Skip terminated tasks.
2025-06-10ext-dce: Don't refine live width with SUBREG mode if ↵Xi Ruoyao1-2/+15
!TRULY_NOOP_TRUNCATION_MODES_P [PR 120050] If we see a promoted subreg and TRULY_NOOP_TRUNCATION says the truncation is not a noop, then all bits of the inner reg are live. We cannot reduce the live mask to that of the mode of the subreg. gcc/ChangeLog: PR rtl-optimization/120050 * ext-dce.cc (ext_dce_process_uses): Break early if a SUBREG in rhs is promoted and the truncation from the inner mode to the outer mode is not a noop when handling SETs. (cherry picked from commit 65f3a439c4f76fe780a30ac66969f51035c4bf98)
2025-06-10Daily bump.GCC Administrator4-1/+81
2025-06-09c++: recursive template with deduced return [PR120555]Jason Merrill2-3/+60
Here since r15-4120 we were prematurely complaining about the use of func within its own definiton, which is fine at instantiation time. So don't require this for function templates that are currently being defined. But keep the error for instantiations of templates that are not currently being defined, which we similarly did not diagnose before r15-4120 but other implementations do. Both of these follow the general principle from [temp.res.general]/6 that we only error in a template body if no instatiation could be well-formed. Also remove a redundant call to require_deduced_type. PR c++/120555 gcc/cp/ChangeLog: * decl2.cc (fn_being_defined, fn_template_being_defined): New. (mark_used): Check fn_template_being_defined. gcc/testsuite/ChangeLog: * g++.dg/cpp1z/constexpr-if39.C: New test. (cherry picked from commit 8d204f2a536f7253e4251aca7bc12af524800b4c)
2025-06-09c++: constexpr prvalues vs genericize [PR120502]Jason Merrill3-9/+41
Here constexpr evaluation was getting confused by the result of split_nonconstant_init, which leaves an INIT_EXPR from an empty CONSTRUCTOR to be followed by member initialization. As a result CONSTRUCTOR_NO_CLEARING was set for the time_zone, and cxx_eval_store_expression didn't set it again for the initial clobber in the basic_string constructor, so when cxx_fold_indirect_ref wants to check whether the anonymous union active member had type non_trivial_if, we see that we don't currently have a value for the anonymous union, try to add one, and fail. So let's do constexpr evaluation before split_nonconstant_init. PR c++/120502 gcc/cp/ChangeLog: * cp-gimplify.cc (cp_fold_r) [TARGET_EXPR]: Do constexpr evaluation before genericize. * constexpr.cc (cxx_eval_store_expression): Add comment. gcc/testsuite/ChangeLog: * g++.dg/cpp2a/constexpr-prvalue2.C: New test.
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