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2023-03-30Generate vpblendd instead of vpblendw for V4SI under AVX2.liuhongt2-5/+15
gcc/ChangeLog: * config/i386/i386-expand.cc (expand_vec_perm_blend): Generate vpblendd instead of vpblendw for V4SI under avx2. gcc/testsuite/ChangeLog: * gcc.target/i386/pr88828-0.c: Adjust testcase.
2023-03-30Daily bump.GCC Administrator5-1/+132
2023-03-30CRIS: Make rtx-cost 0 for many CONST_INT "quick" operandsHans-Peter Nilsson1-1/+22
Stepping through a gdb session inspecting costs that cause gcc.dg/tree-ssa/slsr-13.c to fail, exposed that before this patch, cris_rtx_costs told that a shift of 1 of a register costs 5, while adding two registers costs 4. Making the cost of a quick-immediate constant equal to using a register (default 0) reflects actual performance and size-cost better. It also happens to make gcc.dg/tree-ssa/slsr-13.c pass with what looks like better code being generated, and improves coremark performance by 0.4%. But, blindly doing this for *all* valid operands that fit the "quick-immediate" addressing mode, trips interaction with other factors*, with the end result mixed at best. So, do this only for MINUS and logical operations for the time being, and only for modes that fit in one register. *) Examples of "other factors": - A bad default implementation of insn_cost or actually, pattern_cost, that looks only at the set_src_cost and furthermore sees such a cost of 0 as invalid. (Compare to the more sane set_rtx_cost.) This naturally tripped up combine and ifcvt, causing all sorts of changes, good and bad. - Having the same cost, to compare a register with 0 as with -31..31, means a compare insn of an eliminable form no longer looks preferable. * config/cris/cris.cc (cris_rtx_costs) [CONST_INT]: Return 0 for many quick operands, for register-sized modes.
2023-03-29PR modula2/109336 - The -fmod= and -fdef= options do not workGaius Mulley10-40/+167
The -fmod= and -fdef= options do not work. After the linking re-implementation and subsequent restructuring the -fmod= amd -fdef= are now broken. This patch adds -fmod= and -fdef= processing into gm2spec.cc. It also reduces the complexity of extension handling within M2Search by storing the preceeding "." in the extension. gcc/m2/ChangeLog: PR modula2/109336 PR modula2/109315 * gm2-compiler/M2FileName.mod (CalculateFileName): Simplified by ensuring the extension contains the ".". (CalculateStemName): Re-formatted. (ExtractExtension): Re-formatted. (ExtractModule): Re-formatted. * gm2-compiler/M2Options.def (setdefextension): Add block comment. (setmodextension): Add block comment. Re-formatted. * gm2-compiler/M2Options.mod (setdefextension): Add block comment. (setmodextension): Add block comment. Re-formatted. * gm2-compiler/M2Search.mod (FindSourceDefFile): Use DefaultDefExt. (DefaultDefExt): New constant. (DefaultModExt): New constant. (FindSourceModFile): Use DefaultModExt. * gm2-gcc/m2decl.cc (m2decl_DeclareKnownVariable): Correct spelling. * gm2spec.cc (M2SOURCE): New constant. (LANGSPEC): New value. (MATHLIB): New value. (WITHLIBC): New value. (SKIPOPT): New value. (lang_specific_driver): Replace seen_module_extension bool with module_extension char *. Detect -fmod= and remember extension. Use the extension to detect modula-2 source and mark it as such. gcc/testsuite/ChangeLog: PR modula2/109336 * gm2/link/nondefaultext/pass/hello.md: New test. * gm2/link/nondefaultext/pass/liba.dm: New test. * gm2/link/nondefaultext/pass/liba.md: New test. * gm2/link/nondefaultext/pass/link-nondefaultext-pass.exp: New test. Signed-off-by: Gaius Mulley <gaiusmod2@gmail.com>
2023-03-29RISC-V: Add Z*inx imcompatible check in gccJiawei2-0/+9
Z*inx is conflict with float extensions, add incompatible check when z*inx and f extension both enabled. Since all float extension imply f extension and all z*inx extension imply zfinx extension, so we just need to check f with zfinx extension as the base case. Co-Authored by: Kito Cheng <kito.cheng@gmail.com> gcc/ChangeLog: * common/config/riscv/riscv-common.cc (riscv_subset_list::parse): New check. gcc/testsuite/ChangeLog: * gcc.target/riscv/arch-19.c: New test.
2023-03-29configure: deprecate --enable-link-mutex optionMartin Liska2-0/+3
PR bootstrap/109310 gcc/ChangeLog: * configure.ac: Emit a warning for deprecated option --enable-link-mutex. * configure: Regenerate.
2023-03-29tree-optimization/109331 - make sure to clean up the CFG after forwpropRichard Biener2-1/+21
When forwprop discovers unreachable code or makes decisions based on unreachable edges make sure to cleanup the CFG since otherwise SSA form can become invalid. PR tree-optimization/109331 * tree-ssa-forwprop.cc (pass_forwprop::execute): When we discover a taken edge make sure to cleanup the CFG. * gcc.dg/torture/pr109331.c: New testcase.
2023-03-29scan generic vector tests before loweringRichard Biener1-2/+2
The g++.dg/pr94920.C testcase looks for a specific number of ABS_EXPRs but the vector example is prone to vector lowering so the following instead of scanning the optimized dump scans the forwprop1 dump which is before vector lowering and the point the transforms should have happened. * g++.dg/pr94920.C: Scan forwprop1 instead of optimized.
2023-03-29tree-optimization/109327 - forwprop stmt removal issueRichard Biener2-0/+19
There's interfering between the to_removed queue and other mechanisms removing stmts, in this case remove_prop_source_from_use. The following makes the to_remove queue draining more permissive. PR tree-optimization/109327 * tree-ssa-forwprop.cc (pass_forwprop::execute): Deal with already removed stmts when draining to_remove. * gcc.dg/pr109327.c: New testcase.
2023-03-29ipa/106124 - ICE with -fkeep-inline-functions and OpenMPRichard Biener2-0/+20
The testcases in this bug reveal cases where an early generated type is collected because it was unused but gets attempted to be recreated later when a late DIE for a function (an OpenMP reduction) is created. That's unexpected and possibly the fault of OpenMP but the following allows the re-creation of the context type to succeed. PR ipa/106124 * dwarf2out.cc (lookup_type_die): Reset TREE_ASM_WRITTEN so we can re-create the DIE for the type if required. * g++.dg/gomp/pr106124.C: New testcase.
2023-03-29tree-ssa-math-opts: Move PROP_gimple_opt_math from sincos pass to powcabs ↵Jakub Jelinek2-2/+15
[PR109301] The following testcase ICEs since the sincos and vect pass order has been swapped. It is not valid to replace vector sqrt (sqrt (x)) with pow (x, 0.25) because build_real on vector type is invalid (could be handled by using build_uniform_cst and adjusting type passed to build_real) but more importantly because nothing checks if we can actually do vector pow. While we have pow_optab, apparently no target defines it, so it doesn't seem to be worth bothering with for now and the patch just punts on non-scalar sqrts. I think the other simplifications next to it are fine, as they mostly use CBRT which doesn't even have internal function (so is a builtin only and therefore always scalar), or have already pow in the IL (which doesn't have optab and shouldn't be thus vector either). It is true that with <bits/math-vector.h> we do vectorize some calls to pow or cbrt (but don't handle others strangely), but those aren't using internal functions but simd clones and so match.pd doesn't know anything about those (at least for now). The following patch fixes it by mostly restoring the state before r13-1763 where canonicalize_math_p () was true only until the end of the pass which transformed pow or pow-like calls before vectorization (formerly sincos pass, now it is powcabs pass). powcabs is a pass in the spot sincos was happening before, so the only change was defer the sin+cos simplification into cexpi to a later new pass (except for the name moving with it) and none of the canonicalize_math_p () guarded simplification in match.pd seem to rely on those sin+cos -> cexpi simplifications and canonicalize_math_p is the only user of this property. 2023-03-29 Jakub Jelinek <jakub@redhat.com> Richard Biener <rguenther@suse.de> PR tree-optimization/109301 * tree-ssa-math-opts.cc (pass_data_cse_sincos): Change properties_provided from PROP_gimple_opt_math to 0. (pass_data_expand_powcabs): Change properties_provided from 0 to PROP_gimple_opt_math. * gcc.dg/pr109301.c: New test.
2023-03-29tree-optimization/109154 - improve if-conversion for vectorizationRichard Biener1-5/+19
With multi-argument PHIs and now doing VN on the if-converted blocks the optimization of CSEing condition and negated condition doesn't work well anymore. The following restores this a little bit for the case of a single inverted condition into a COND_EXPR where we can instead swap the COND_EXPR arms. The same optimization is already done for the case of two-argument PHIs. This avoids one comparison/mask for the testcase at hand. PR tree-optimization/109154 * tree-if-conv.cc (gen_phi_arg_condition): Handle single inverted condition specially by inverting at the caller. (gen_phi_arg_condition): Swap COND_EXPR arms if requested.
2023-03-28c++: alias ctad refinements [PR109321]Jason Merrill3-14/+64
The two hunks fix missing handling demonstrated by the two testcases: first, if we omit one alias template parm but include another, we need to rewrite the deduced template args to reflect the new position of the included parm. Second, if we can't deduce any template args for a parameter pack, it is deduced to an empty pack. PR c++/109321 PR c++/109320 gcc/cp/ChangeLog: * pt.cc (alias_ctad_tweaks): Rewrite deduced args. (type_targs_deducible_from): Handle null pack deduction. gcc/testsuite/ChangeLog: * g++.dg/cpp2a/class-deduction-alias16.C: New test. * g++.dg/cpp2a/class-deduction-alias17.C: New test.
2023-03-28compiler: mark Call_expression multiple results as a result structIan Lance Taylor2-1/+2
In https://go.dev/cl/343873 we stopped padding zero-sized trailing fields in functions that return multiple results where the last result is zero-sized. This CL makes the corresponding change on the caller side. The test case is https://go.dev/cl/479898. Fixes golang/go#55242 Reviewed-on: https://go-review.googlesource.com/c/gofrontend/+/479955
2023-03-29Daily bump.GCC Administrator8-1/+297
2023-03-28Update gcc de.poJoseph Myers1-1317/+868
* de.po: Update.
2023-03-28Enable 'gfortran.dg/weak-2.f90' for nvptx targetThomas Schwinge1-4/+6
Follow-up to commit bcbeebc498126c50d73809ec8a4bd0bff27ee97b "Fortran: Add support for WEAK attribute for variables". gcc/testsuite/ * gfortran.dg/weak-2.f90: Enable for nvptx target.
2023-03-28Don't emit -Wxor-used-as-pow on macro expansions [PR107002]David Malcolm9-9/+55
PR c/107002 reports an assertion failure from deep inside the diagnostic_shows_locus when attempting to print fix-it hints relating to -Wxor-used-as-pow. The case involves macro expansions with -ftrack-macro-expansion=0. It doesn't seem to make much sense to emit this warning for macro expansions, so this patch updates the warning not to (which seems to also be clang's behavior). The patch also adds some bulletproofing to diagnostic-show-locus.cc to be more robust against such invalid fix-it hints. Doing so fixes the ICE. gcc/c-family/ChangeLog: PR c/107002 * c-common.h (check_for_xor_used_as_pow): Add "rhs_loc" param. * c-warn.cc (check_for_xor_used_as_pow): Add "rhs_loc" param. Reject cases where involving macro expansions. gcc/c/ChangeLog: PR c/107002 * c-typeck.cc (parser_build_binary_op): Update for new param of check_for_xor_used_as_pow. gcc/cp/ChangeLog: PR c/107002 * parser.cc (cp_parser_binary_expression): Update for new param of check_for_xor_used_as_pow. gcc/ChangeLog: PR c/107002 * diagnostic-show-locus.cc (column_range::column_range): Factor out assertion conditional into... (column_range::valid_p): ...this new function. (line_corrections::add_hint): Don't attempt to consolidate hints if it would lead to invalid column_range instances. gcc/testsuite/ChangeLog: PR c/107002 * c-c++-common/Wxor-used-as-pow-1.c: Add macro test. * c-c++-common/Wxor-used-as-pow-pr107002-0.c: New test. * c-c++-common/Wxor-used-as-pow-pr107002-1.c: New test. * c-c++-common/Wxor-used-as-pow-pr107002-2.c: New test. Signed-off-by: David Malcolm <dmalcolm@redhat.com>
2023-03-28c++: Allow translations of check_postcondition_result messages [PR109309]Jakub Jelinek1-11/+10
As mentioned in the PR, constructing a message from two parts by concatenating them prevents translations, unless one of the parts is a keyword which should be never translated. The following patch fixes that. 2023-03-28 Jakub Jelinek <jakub@redhat.com> PR c++/109309 * contracts.cc: Include intl.h. (check_postcondition_result): Don't form diagnostics from two halves of an English message to allow translations.
2023-03-28c-family: -Wsequence-point and COMPONENT_REF [PR107163]Jason Merrill2-1/+43
The patch for PR91415 fixed -Wsequence-point to treat shifts and ARRAY_REF as sequenced in C++17, and COMPONENT_REF as well. But this is unnecessary for COMPONENT_REF, since the RHS is just a FIELD_DECL with no actual evaluation, and in this testcase handling COMPONENT_REF as sequenced blows up fast in a deep inheritance tree. Instead, look through it. PR c++/107163 gcc/c-family/ChangeLog: * c-common.cc (verify_tree): Don't use sequenced handling for COMPONENT_REF. gcc/testsuite/ChangeLog: * g++.dg/warn/Wsequence-point-5.C: New test.
2023-03-28RISC-V: Define __riscv_v_intrinsic [PR109312]Kito Cheng2-4/+25
RVV intrinsic has defined a macro to identity the version of RVV intrinsic spec, we missed that before, thanksful we are catch this before release. gcc/ChangeLog: PR target/109312 * config/riscv/riscv-c.cc (riscv_ext_version_value): New. (riscv_cpu_cpp_builtins): Define __riscv_v_intrinsic and minor refactor. gcc/testsuite/ChangeLog: PR target/109312 * gcc.target/riscv/predef-__riscv_v_intrinsic.c: New test.
2023-03-28haifa-sched: fix autopref_rank_for_schedule comparator [PR109187]Alexander Monakov2-1/+9
Do not attempt to use a plain subtraction for generating a three-way comparison result in autopref_rank_for_schedule qsort comparator, as offsets are not restricted and subtraction may overflow. Open-code a safe three-way comparison instead. gcc/ChangeLog: PR rtl-optimization/109187 * haifa-sched.cc (autopref_rank_for_schedule): Avoid use of overflowing subtraction in three-way comparison. gcc/testsuite/ChangeLog: PR rtl-optimization/109187 * gcc.dg/pr109187.c: New test.
2023-03-28Fix compute_operand when op1 == op2 symbolically.Andrew MacLeod4-23/+92
First, class value_relation should not sanitize records. just create what is asked. Second., if there is not a relation record, compute_operand was creating one for op1 == op2 if op1 and op2 were the same symbol. This is not the correct way to communicate the information, as that record will continue to be passed along the GORI unwind chain. Instead, simply pass that information locally to the opX_range routine for only the current statement. PR tree-optimization/109265 PR tree-optimization/109274 gcc/ * gimple-range-gori.cc (gori_compute::compute_operand_range): Do not create a relation record is op1 and op2 are the same symbol. (gori_compute::compute_operand1_range): Pass op1 == op2 to the handler for this stmt, but create a new record only if this statement generates a relation based on the ranges. (gori_compute::compute_operand2_range): Ditto. * value-relation.h (value_relation::set_relation): Always create the record that is requested. gcc/testsuite/ * gcc.dg/pr109274.c: New. * gfortran.dg/pr109265.f90: New.
2023-03-28tree-optimization/107087 - missed CCP after forwpropRichard Biener2-6/+77
When forwprop simplifies the CFG the 2nd order opportunities by exposed degenerate PHIs are not realized. The following improves this by properly tracking executable edges and thus handling this for non-cyclic CFGs at least. This avoids the bogus diagnostic reported for the testcase in this PR. PR tree-optimization/107087 * tree-ssa-forwprop.cc (pass_forwprop::execute): Track executable regions to avoid useless work and to better propagate degenerate PHIs. * g++.dg/pr107087.C: New testcase.
2023-03-28mingw: Fix comments in x-mingw32-utf8Costas Argyris1-5/+9
This is a comment-only change that I should have done with the previous commit (304c7d44a) but forgot to do so. gcc/ChangeLog: * config/i386/x-mingw32-utf8: update comments. Signed-off-by: Jonathan Yong <10walls@gmail.com>
2023-03-28aarch64: Restore vectorisation of vld1 inputs [PR109072]Richard Sandiford6-4/+435
Before GCC 12, we would vectorize: int32_t arr[] = { x, x, x, x }; at -O3. Vectorizing the store on its own is often a loss, particularly for integers, so g:4963079769c99c4073adfd799885410ad484cbbe suppressed it. This was necessary to fix regressions from enabling vectorisation at -O2, However, the vectorisation is important if the code subsequently loads from the array using vld1: return vld1q_s32 (arr); This approach of initialising an array and loading from it is the recommend endian-agnostic way of constructing an ACLE vector. As discussed in the PR notes, the general fix would be to fold the store and load-back to a constructor (preferably before vectorisation). But that's clearly not stage 4 material. This patch instead delays folding vld1 until after inlining and records which decls a vld1 loads from. It then treats vector stores to those decls as free, on the optimistic assumption that they will be removed later. The patch also brute-forces vectorization of plain constructor+store sequences, since some of the CPU costs make that (dubiously) expensive even when the store is discounted. Delaying folding showed that we were failing to update the vops. The patch fixes that too. Thanks to Tamar for discussion & help with testing. gcc/ PR target/109072 * config/aarch64/aarch64-protos.h (aarch64_vector_load_decl): Declare. * config/aarch64/aarch64.h (machine_function::vector_load_decls): New variable. * config/aarch64/aarch64-builtins.cc (aarch64_record_vector_load_arg): New function. (aarch64_general_gimple_fold_builtin): Delay folding of vld1 until after inlining. Record which decls are loaded from. Fix handling of vops for loads and stores. * config/aarch64/aarch64.cc (aarch64_vector_load_decl): New function. (aarch64_accesses_vector_load_decl_p): Likewise. (aarch64_vector_costs::m_stores_to_vector_load_decl): New member variable. (aarch64_vector_costs::add_stmt_cost): If the function has a vld1 that loads from a decl, treat vector stores to those decls as zero cost. (aarch64_vector_costs::finish_cost): ...and in that case, if the vector code does nothing more than a store, give the prologue a zero cost as well. gcc/testsuite/ PR target/109072 * gcc.target/aarch64/pr109072_1.c: New test. * gcc.target/aarch64/pr109072_2.c: Likewise.
2023-03-28bootstrap/84402 - improve (match ...) code generationRichard Biener1-12/+53
The following avoids duplicating matching code for (match ...) in match.pd when possible. That's more easily possible for (match ...) than simplify because we do not need to handle common matches (those would be diagnosed only during compiling) nor is the result able to inspect the active operator. Specifically this reduces the size of the generated matches for the atomic ops as noted in PR108129. gimple-match.cc shrinks from 245k lines to 209k lines with this patch. PR bootstrap/84402 PR tree-optimization/108129 * genmatch.cc (lower_for): For (match ...) delay substituting into the match operator if possible. (dt_operand::gen_gimple_expr): For user_id look at the first substitute for determining how to access operands. (dt_operand::gen_generic_expr): Likewise. (dt_node::gen_kids): Properly sort user_ids according to their substitutes. (dt_node::gen_kids_1): Code-generate user_id matching.
2023-03-28gcov-tool: Use subcommand rather than sub-command in function commentsJakub Jelinek1-4/+4
Follow-up to the recently committed fix of fixing the "subcomand" typos in diagnostics. 2023-03-28 Jakub Jelinek <jakub@redhat.com> Jonathan Wakely <jwakely@redhat.com> * gcov-tool.cc (do_merge, do_merge_stream, do_rewrite, do_overlap): Use subcommand rather than sub-command in function comments.
2023-03-28openmp: Fix typo in diagnostics [PR109314]Jakub Jelinek1-1/+1
Trivial typo fix. 2023-03-28 Jakub Jelinek <jakub@redhat.com> PR fortran/109314 * openmp.cc (gfc_omp_absent_contains_clause): Fix typo in diagnostics - composit -> composite.
2023-03-28range-op-float: Only flush_denormals_to_zero for +-*/ [PR109154]Jakub Jelinek3-3/+3
As discussed in the PR, flushing denormals to zero on every frange::set might be harmful for e.g. x < 0.0 comparisons, because we then on both sides use ranges that include zero [-Inf, -0.0] on the true side, and [-0.0, +Inf] NAN on the false side, rather than [-Inf, nextafter (-0.0, -Inf)] on the true side. The following patch does it only in range_operator_float::fold_range which is right now used for +-*/ (both normal and reverse ops of those). Though, I don't see any difference on the testcase in the PR, but not sure what I should be looking at and the reduced testcase there has undefined behavior. 2023-03-28 Jakub Jelinek <jakub@redhat.com> PR tree-optimization/109154 * value-range.h (frange::flush_denormals_to_zero): Make it public rather than private. * value-range.cc (frange::set): Don't call flush_denormals_to_zero here. * range-op-float.cc (range_operator_float::fold_range): Call flush_denormals_to_zero.
2023-03-28sanopt: Return TODO_cleanup_cfg if any .{UB,HWA,A}SAN_* calls were lowered ↵Jakub Jelinek2-1/+20
[PR106190] The following testcase ICEs, because without optimization eh lowering decides not to duplicate finally block of try/finally and so we end up with variable guarded cleanup. The sanopt pass creates a cfg that ought to be cleaned up (some IFN_UBSAN_* functions are lowered in this case with constant conditions in gcond and when not allowing recovery some bbs which end with noreturn calls actually have successor edges), but the cfg cleanup is actually (it is -O0) done only during the optimized pass. We notice there that the d[1][a] = 0; statement which has an EH edge is unreachable (because ubsan would always abort on the out of bounds d[1] access), remove the EH landing pad and block, but because that block just sets a variable and jumps to another one which tests that variable and that one is reachable from normal control flow, the __builtin_eh_pointer (1) later in there is kept in the IL and we ICE during expansion of that statement because the EH region has been removed. The following patch fixes it by doing the cfg cleanup already during sanopt pass if we create something that might need it, while the EH landing pad is then removed already during sanopt pass, there is ehcleanup later and we don't ICE anymore. 2023-03-28 Jakub Jelinek <jakub@redhat.com> PR middle-end/106190 * sanopt.cc (pass_sanopt::execute): Return TODO_cleanup_cfg if any of the IFN_{UB,HWA,A}SAN_* internal fns are lowered. * gcc.dg/asan/pr106190.c: New test.
2023-03-28range-op-float: Use get_nan_state in float_widen_lhs_rangeJakub Jelinek1-6/+1
On Wed, Mar 22, 2023 at 07:32:44AM +0100, Aldy Hernandez wrote: > * value-range.cc (frange::set): Add nan_state argument. > * value-range.h (class nan_state): New. > (frange::get_nan_state): New. The following patch makes use of those changes in float_widen_lhs_range. 2023-03-28 Jakub Jelinek <jakub@redhat.com> * range-op-float.cc (float_widen_lhs_range): Use pass get_nan_state as 4th argument to set to avoid clear_nan and union_ calls.
2023-03-28Fix line endingEric Botcazou4-76/+76
gcc/testsuite/ * gcc.target/sparc/20230328-1.c: New test. * gcc.target/sparc/20230328-2.c: Likewise. * gcc.target/sparc/20230328-3.c: Likewise. * gcc.target/sparc/20230328-4.c: Likewise.
2023-03-28i386: Require just 32-bit alignment for SLOT_FLOATxFDI_387 -m32 ↵Jakub Jelinek2-1/+22
-mpreferred-stack-boundary=2 DImode temporaries [PR109276] The following testcase ICEs since r11-2259 because assign_386_stack_local -> assign_stack_local -> ix86_local_alignment now uses 64-bit alignment for DImode temporaries rather than 32-bit as before. Most of the spots in the backend which ask for DImode temporaries are during expansion and those apparently are handled fine with -m32 -mpreferred-stack-boundary=2, we dynamically realign the stack in that case (most of the spots actually don't need that alignment but at least one does), then 2 spots are in STV which I assume also work correctly. But during splitting we can create a DImode slot which doesn't need to be 64-bit alignment (it is nicer for performance though), when we apparently aren't able to detect it for dynamic stack realignment purposes. The following patch just makes the slot 32-bit aligned in that rare case. 2023-03-28 Jakub Jelinek <jakub@redhat.com> PR target/109276 * config/i386/i386.cc (assign_386_stack_local): For DImode with SLOT_FLOATxFDI_387 and -m32 -mpreferred-stack-boundary=2 pass align 32 rather than 0 to assign_stack_local. * gcc.target/i386/pr109276.c: New test.
2023-03-28Fix PR target/109140Eric Botcazou6-22/+122
This is a regression present on the mainline and 12 branch at -O2, but the issue is related to vectorization so was present at -O3 in earlier versions. The vcondu expander that was added for VIS 3 more than a decade ago does not fully work, because it does not filter out the unsigned condition codes (the instruction is an UNSPEC that accepts only signed condition codes). While I was at it, I also added the missing vcond and vcondu expanders for the new comparison instructions that were added in VIS 4. gcc/ PR target/109140 * config/sparc/sparc.cc (sparc_expand_vcond): Call signed_condition on operand #3 to get the final condition code. Use std::swap. * config/sparc/sparc.md (vcondv8qiv8qi): New VIS 4 expander. (fucmp<gcond:code>8<P:mode>_vis): Move around. (fpcmpu<gcond:code><GCM:gcm_name><P:mode>_vis): Likewise. (vcondu<GCM:mode><GCM:mode>): New VIS 4 expander. gcc/testsuite/ * gcc.target/sparc/20230328-1.c: New test. * gcc.target/sparc/20230328-2.c: Likewise. * gcc.target/sparc/20230328-3.c: Likewise. * gcc.target/sparc/20230328-4.c: Likewise.
2023-03-28Modula-2: fix documentation layout againEric Botcazou1-6/+6
Nothing really serious this time. gcc/ * doc/gm2.texi: Add missing Next, Previous and Top fields to most top-level sections.
2023-03-28testsuite: Fix weak_undefined handling on DarwinRainer Orth2-1/+2
The patch that introduced the weak_undefined effective-target keyword and corresponding dg-add-options support commit 378ec7b87a5265dbe2d489c245fac98ef37fa638 Author: Alexandre Oliva <oliva@adacore.com> Date: Thu Mar 23 00:45:05 2023 -0300 [testsuite] test for weak_undefined support and add options badly broke the affected tests on macOS like so: ERROR: gcc.dg/addr_equal-1.c: unknown dg option: 89 for " dg-add-options 5 weak_undefined " ERROR: gcc.dg/addr_equal-1.c: unknown dg option: 89 for " dg-add-options 5 weak_undefined " add_options_for_weak_undefined tries to call an non-existant proc "89". Even after fixing this by escaping the brackets, two tests still failed to link since they lacked the corresponding calls do dg-add-options weak_undefined. Tested on x86_64-apple-darwin20.6.0 and i386-pc-solaris2.11. 2023-03-27 Rainer Orth <ro@CeBiTec.Uni-Bielefeld.DE> gcc/testsuite: * lib/target-supports.exp (add_options_for_weak_undefined): Escape brackets. * gcc.dg/visibility-22.c: Add weak_undefined options. libgomp: * testsuite/libgomp.oacc-c-c++-common/routine-nohost-2.c: Add weak_undefined options.
2023-03-28Extend UTF-8 support to the 32-bit mingw host.Costas Argyris3-4/+8
Prevent any name mangling in HOST_EXTRA_OBJS_SYMBOL such that the linker always finds it by that name. Also add the .manifest file as an explicit dependency in the make rule such that the object gets re-built if it changes. gcc/ChangeLog: * config.host: Pull in i386/x-mingw32-utf8 Makefile fragment and reference utf8rc-mingw32.o explicitly for mingw hosts. * config/i386/sym-mingw32.cc: prevent name mangling of stub symbol. * config/i386/x-mingw32-utf8: Make utf8rc-mingw32.o depend on manifest file explicitly. Signed-off-by: Jonathan Yong <10walls@gmail.com>
2023-03-28Revert "rtl-optimization/109237 - speedup bb_is_just_return"Richard Biener1-1/+1
This reverts commit 776a5bb5894315ab144dc74222fc580fde8fdd87. PR rtl-optimization/109311 * cfgcleanup.cc (bb_is_just_return): Revert previous change.
2023-03-28Remove Negative(gwarf-) from gdwarfRichard Biener1-1/+1
Prior to the removal of STABS support the gdwarf, gstabs, ... options formed a cycle with their Negative(..) option attribute. But that didn't actually have any effect since most of the options also are Joined or JoinedOrMissing for which there's no pruning of options and so once ran into the set_debug_level diagnostics reporting conflicting debug formats. The following removes the remains of that cycle, which is a Negative option from gdwarf to gdwarf-. With RejectNegative added the expected effect of -gdwarf-4 -gdwarf would be to enable DWARF5 support (but this doesn't happen for some reason). I think the more sensible behavior is that seen and implemented in opts.cc, the more specific -gdwarf-4 determines the DWARF level and a later or earlier -gdwarf becomes a no-op. So the Negative(..) annotation on gdwarf is just confusing. * common.opt (gdwarf): Remove Negative(gdwarf-).
2023-03-28Disallow -gno-dwarf, gno-dwarf-N, -gno-gdb and -gno-vmsRichard Biener1-4/+4
The following adds RejectNegative to the gdwarf, gdwarf-, ggdb and gvms options since the current behavior is to treat the negative variant the same as the positive variant. In particular -ggdb -gno-gdb do not cancel, and plain -gno-dwarf will enable (dwarf!) debug output. Rejecting the negative forms avoids interpreting sensible behavior to combinations of options like -gdwarf-5 -gno-dwarf-3 and sticks to the behavior that later -g options simply override earlier ones and the only negative form is -g0. * common.opt (gdwarf): Add RejectNegative. (gdwarf-): Likewise. (ggdb): Likewise. (gvms): Likewise.
2023-03-28CRIS: Correct "T" to define_memory_constraint, not define_constraintHans-Peter Nilsson1-1/+1
This patch has no effect on builds using reload of libgcc, newlib libc, my own at-a-glance-testsuite and coremark. That somewhat surprisingly also goes for LRA builds, even with all CRIS reload_in_progress augmented to include lra_in_progress. I just noticed it when checking because another port had a similar fix, where it mattered for LRA. * config/cris/constraints.md ("T"): Correct to define_memory_constraint.
2023-03-28CRIS: Add peephole2 to handle gcc.target/cris/rld-legit1.c for LRAHans-Peter Nilsson1-0/+50
The test-case gcc.target/cris/rld-legit1.c is a reduced test-case that required defining LEGITIMIZE_RELOAD_ADDRESS to stop the address from being decomposed into several insns by reload. Valid but suboptimal code was generated. (Before implementing that hook for CRIS, the same test-case also exposed a bug in reload, and a fix was committed to avoid an ICE; see e.g. git r0-71992-gff0d9879ab0f30 and related commits. But, post-cc0, reload no longer handles this test-case without LEGITIMIZE_RELOAD_ADDRESS helping and there'd again an be ICE for CRIS (again: only if LEGITIMIZE_RELOAD_ADDRESS is disabled). There's a patch to reload to fix that, at https://gcc.gnu.org/pipermail/gcc-patches/2023-February/612039.html) But, LRA also does not handle that test-case gracefully, and like reload without LEGITIMIZE_RELOAD_ADDRESS for CRIS, decomposes the address into a suboptimal (but valid) sequence, about as messy as that from reload, and gcc.target/cris/rld-legit1.c would regress for LRA. There's nothing equivalent to LEGITIMIZE_RELOAD_ADDRESS for LRA. (Stepping through LRA, I can't find an obvious place where to put such a hook. Granted, I haven't seen this kind of messy decomposition in other code, so I'm not insisting a LEGITIMIZE_RELOAD_ADDRESS-like hook is a good idea.) These new peephole2's are required to not regress gcc.target/cris/rld-legit1.c with LRA enabled for CRIS. They don't appear to otherwise make a difference for neither libgcc, newlib libc, my own at-a-glance tests nor coremark, for neither LRA nor reload. * config/cris/cris.md (BW2): New mode-iterator. (lra_szext_decomposed, lra_szext_decomposed_indirect_with_offset): New peephole2s.
2023-03-28CRIS: Improve bailing for eliminable compares for "addi" vs. "add"Hans-Peter Nilsson1-1/+52
This patch affects a post-reload define_split for CRIS that transforms a condition-code-clobbering addition into a non-clobbering addition. (A "two-operand" addition between registers is the only insn that has both a condition-code-clobbering and a non-clobbering variant for CRIS.) Many more "add.d":s are replaced by non-condition-code- clobbering "addi":s after this patch, but most of the transformations don't matter. CRIS with LRA generated code that exposed a flaw with the original patch: it bailed too easily, on *any* insn using the result of the addition. To wit, more effort than simply applying reg_mentioned_p is needed to inspect the user, in the code to avoid munging an insn sequence that cmpelim is supposed to handle. With this patch coremark score for CRIS (*with reload*) improves by less than 0.01% (a single "nop" is eliminated in core_state_transition, in an execution path that affects ~1/20 of all of the 10240 calls). However, the original cause for this patch is to not regress gcc.target/cris/pr93372-44.c for LRA, where otherwise a needless "cmpq" is emitted. For CRIS with LRA, the performance effect on coremark isn't even measurable, except by reducing the size of the executable due to affecting non-called library code. * config/cris/cris.md ("*add<mode>3_addi"): Improve to bail only for possible eliminable compares.
2023-03-28CRIS: Remove unused constraint "R".Hans-Peter Nilsson1-10/+0
* config/cris/constraints.md ("R"): Remove unused constraint.
2023-03-28Daily bump.GCC Administrator3-1/+82
2023-03-27gcov: Fix "subcomand" typos [PR109297]Jonathan Wakely1-3/+3
gcc/ChangeLog: PR gcov-profile/109297 * gcov-tool.cc (merge_usage): Fix "subcomand" typo. (merge_stream_usage): Likewise. (overlap_usage): Likewise.
2023-03-27tree-optimization/54498 - testcase for the bugRichard Biener1-0/+57
I realized I never added a testcase for the fix of this bug. Now done after verifying it still fails when reverting the fix. PR tree-optimization/54498 * g++.dg/torture/pr54498.C: New testcase.
2023-03-27tree-optimization/108357 - add testcaseRichard Biener1-0/+22
The following adds the testcase for the bug which was recently fixed. PR tree-optimization/108357 * gcc.dg/tree-ssa/pr108357.c: New testcase.
2023-03-27target/109296 - riscv: Add missing mode specifiers for XTheadMemPairChristoph Müllner1-8/+8
This patch adds missing mode specifiers for XTheadMemPair INSNs. gcc/ChangeLog: PR target/109296 * config/riscv/thead.md: Add missing mode specifiers. Signed-off-by: Christoph Müllner <christoph.muellner@vrull.eu>