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Dump ICF-unified decls, thunks, aliases and whatnot along with their
ultimate targets, with edges from the alias to the target.
Add support for dropping the source file's suffix when forming from
dump-base, so that auxiliary files can be scanned, such as the .ci
files generated by -fcallgraph-info, as in the testcase.
for gcc/ChangeLog
* toplev.cc (dump_final_alias_vcg): New.
(dump_final_node_vcg): Dump aliases along with node.
for gcc/testsuite/ChangeLog
* lib/scandump.exp (dump-base): Support {} in dump base suffix
to drop it.
* gcc.dg/callgraph-info-1.c: New.
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When none of mprefer-vector-width, avx256_optimal/avx128_optimal,
avx256_store_by_pieces/avx512_store_by_pieces is specified, GCC will
set ix86_{move_max,store_max} as max available vector length except
for AVX part.
if (TARGET_AVX512F_P (opts->x_ix86_isa_flags)
&& TARGET_EVEX512_P (opts->x_ix86_isa_flags2))
opts->x_ix86_move_max = PVW_AVX512;
else
opts->x_ix86_move_max = PVW_AVX128;
So for -mavx2, vectorizer will choose 256-bit for vectorization, but
128-bit is used for struct copy, there could be a potential STLF issue
due to this "misalign".
The patch fixes that.
gcc/ChangeLog:
* config/i386/i386-options.cc (ix86_option_override_internal):
set ix86_{move_max,store_max} to PVW_AVX256 when TARGET_AVX
instead of PVW_AVX128.
gcc/testsuite/ChangeLog:
* gcc.target/i386/pieces-memcpy-10.c: Add -mprefer-vector-width=128.
* gcc.target/i386/pieces-memcpy-6.c: Ditto.
* gcc.target/i386/pieces-memset-38.c: Ditto.
* gcc.target/i386/pieces-memset-40.c: Ditto.
* gcc.target/i386/pieces-memset-41.c: Ditto.
* gcc.target/i386/pieces-memset-42.c: Ditto.
* gcc.target/i386/pieces-memset-43.c: Ditto.
* gcc.target/i386/pieces-strcpy-2.c: Ditto.
* gcc.target/i386/pieces-memcpy-22.c: New test.
* gcc.target/i386/pieces-memset-51.c: New test.
* gcc.target/i386/pieces-strcpy-3.c: New test.
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This patch would like to add test cases for the unsigned vector
.SAT_TRUNC form 3. Aka:
Form 3:
#define DEF_VEC_SAT_U_TRUNC_FMT_3(NT, WT) \
void __attribute__((noinline)) \
vec_sat_u_trunc_##NT##_##WT##_fmt_3 (NT *out, WT *in, unsigned limit) \
{ \
unsigned i; \
for (i = 0; i < limit; i++) \
{ \
WT max = (WT)(NT)-1; \
out[i] = in[i] <= max ? (NT)in[i] : (NT)max; \
} \
}
DEF_VEC_SAT_U_TRUNC_FMT_3 (uint32_t, uint64_t)
The below test is passed for this patch.
* The rv64gcv regression test.
gcc/testsuite/ChangeLog:
* gcc.target/riscv/rvv/autovec/vec_sat_arith.h: Add test helper macros.
* gcc.target/riscv/rvv/autovec/unop/vec_sat_u_trunc-13.c: New test.
* gcc.target/riscv/rvv/autovec/unop/vec_sat_u_trunc-14.c: New test.
* gcc.target/riscv/rvv/autovec/unop/vec_sat_u_trunc-15.c: New test.
* gcc.target/riscv/rvv/autovec/unop/vec_sat_u_trunc-16.c: New test.
* gcc.target/riscv/rvv/autovec/unop/vec_sat_u_trunc-17.c: New test.
* gcc.target/riscv/rvv/autovec/unop/vec_sat_u_trunc-18.c: New test.
* gcc.target/riscv/rvv/autovec/unop/vec_sat_u_trunc-run-13.c: New test.
* gcc.target/riscv/rvv/autovec/unop/vec_sat_u_trunc-run-14.c: New test.
* gcc.target/riscv/rvv/autovec/unop/vec_sat_u_trunc-run-15.c: New test.
* gcc.target/riscv/rvv/autovec/unop/vec_sat_u_trunc-run-16.c: New test.
* gcc.target/riscv/rvv/autovec/unop/vec_sat_u_trunc-run-17.c: New test.
* gcc.target/riscv/rvv/autovec/unop/vec_sat_u_trunc-run-18.c: New test.
Signed-off-by: Pan Li <pan2.li@intel.com>
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This patch would like to add test cases for the unsigned vector
.SAT_TRUNC form 2. Aka:
Form 2:
#define DEF_VEC_SAT_U_TRUNC_FMT_2(NT, WT) \
void __attribute__((noinline)) \
vec_sat_u_trunc_##NT##_##WT##_fmt_2 (NT *out, WT *in, unsigned limit) \
{ \
unsigned i; \
for (i = 0; i < limit; i++) \
{ \
WT max = (WT)(NT)-1; \
out[i] = in[i] > max ? (NT)max : (NT)in[i]; \
} \
}
DEF_VEC_SAT_U_TRUNC_FMT_2 (uint32_t, uint64_t)
The below test is passed for this patch.
* The rv64gcv regression test.
gcc/testsuite/ChangeLog:
* gcc.target/riscv/rvv/autovec/vec_sat_arith.h: Add test helper macros.
* gcc.target/riscv/rvv/autovec/unop/vec_sat_u_trunc-10.c: New test.
* gcc.target/riscv/rvv/autovec/unop/vec_sat_u_trunc-11.c: New test.
* gcc.target/riscv/rvv/autovec/unop/vec_sat_u_trunc-12.c: New test.
* gcc.target/riscv/rvv/autovec/unop/vec_sat_u_trunc-7.c: New test.
* gcc.target/riscv/rvv/autovec/unop/vec_sat_u_trunc-8.c: New test.
* gcc.target/riscv/rvv/autovec/unop/vec_sat_u_trunc-9.c: New test.
* gcc.target/riscv/rvv/autovec/unop/vec_sat_u_trunc-run-10.c: New test.
* gcc.target/riscv/rvv/autovec/unop/vec_sat_u_trunc-run-11.c: New test.
* gcc.target/riscv/rvv/autovec/unop/vec_sat_u_trunc-run-12.c: New test.
* gcc.target/riscv/rvv/autovec/unop/vec_sat_u_trunc-run-7.c: New test.
* gcc.target/riscv/rvv/autovec/unop/vec_sat_u_trunc-run-8.c: New test.
* gcc.target/riscv/rvv/autovec/unop/vec_sat_u_trunc-run-9.c: New test.
Signed-off-by: Pan Li <pan2.li@intel.com>
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Another RTL checking failure in ext-dce. An easy one to fix this time.
When we optimize an extension we have to go back and cleanup with
SUBREG_PROMOTED state. So we record the destination register into a bitmap as
we make changes, then later do a single pass over the IL fixing any associated
subreg expressions.
The optimization is changing the SET_SRC and largely ignores the destination.
The LHS could be a REG, SUBREG, or ZERO_EXTRACT. If the LHS is a SUBREG or
ZERO_EXTRACT we can just strip them.
Bootstrapped and ran the testsuite with an RTL checking compiler and verified
no ext-dce RTL checking failures tripped. Also bootstrapped and regression
tested x86_64 in the usual way.
Pushing to the trunk.
PR rtl-optimization/116437
gcc/
* ext-dce.cc (ext_dce_try_optimize_insn): Handle SUBREG and
ZERO_EXTRACT destinations.
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The testcase contains a VNx2QImode pseudo that is live across a call
and that cannot be allocated a call-preserved register. LRA quite
reasonably tried to save it before the call and restore it afterwards.
Unfortunately, the target told it to do that in SImode, even though
punning between SImode and VNx2QImode is disallowed by both
TARGET_CAN_CHANGE_MODE_CLASS and TARGET_MODES_TIEABLE_P.
The natural class to use for SImode is GENERAL_REGS, so this led
to an unsalvageable situation in which we had:
(set (subreg:VNx2QI (reg:SI A) 0) (reg:VNx2QI B))
where A needed GENERAL_REGS and B needed FP_REGS. We therefore ended
up in a reload loop.
The hooks above should ensure that this situation can never occur
for incoming subregs. It only happened here because the target
explicitly forced it.
The decision to use SImode for modes smaller than 4 bytes dates
back to the beginning of the port, before 16-bit floating-point
modes existed. I'm not sure whether promoting to SImode really
makes sense for any FPR, but that's a separate performance/QoI
discussion. For now, this patch just disallows using SImode
when it is wrong for correctness reasons, since that should be
safer to backport.
gcc/
PR testsuite/116238
* config/aarch64/aarch64.cc (aarch64_hard_regno_caller_save_mode):
Only return SImode if we can convert to and from it.
gcc/testsuite/
PR testsuite/116238
* gcc.target/aarch64/sve/pr116238.c: New test.
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When CSSC is not enabled, 128bit popcount can be implemented
just via the vector (v16qi) cnt instruction followed by a reduction,
like how the 64bit one is currently implemented instead of
splitting into 2 64bit popcount.
Changes since v1:
* v2: Make operand 0 be DImode instead of TImode and simplify.
Build and tested for aarch64-linux-gnu.
PR target/113042
gcc/ChangeLog:
* config/aarch64/aarch64.md (popcountti2): New define_expand.
gcc/testsuite/ChangeLog:
* gcc.target/aarch64/popcnt10.c: New test.
* gcc.target/aarch64/popcnt9.c: New test.
Signed-off-by: Andrew Pinski <quic_apinski@quicinc.com>
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The following does away with the idea to use non-symmetrical
testing of mode_can_transfer_bits in hash-table equality testing.
It isn't feasible to always control query order to maintain
consistency.
PR tree-optimization/116406
* tree-ssa-sccvn.cc (vn_reference_eq): Never equate
float and int when the float mode cannot transfer bits.
Do not try to anticipate which is the mode we actually load
from.
* gcc.dg/tree-ssa/pr116406.c: New testcase.
* gcc.dg/tree-ssa/ssa-pre-30.c: On x86 dd -msse -mfpmath=sse.
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PR 58416 shows that storing non-floating point data to floating point
scalar registers can lead to miscompilations when the data is
normalized or otherwise processed upon loading to a register. To
avoid that risk, this patch detects situations where we have multiple
types and a we decide to represent the data in a type with a mode that
is known to not be able to transfer actual bits reliably using the new
TARGET_MODE_CAN_TRANSFER_BITS hook.
gcc/ChangeLog:
2024-08-19 Martin Jambor <mjambor@suse.cz>
PR target/58416
* tree-sra.cc (types_risk_mangled_binary_repr_p): New function.
(sort_and_splice_var_accesses): Use it.
(propagate_subaccesses_from_rhs): Likewise.
gcc/testsuite/ChangeLog:
2024-08-19 Martin Jambor <mjambor@suse.cz>
PR target/58416
* gcc.dg/torture/pr58416.c: New test.
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When updating LC PHIs after copying loops we have to handle defs
defined outside of the loop appropriately (by not setting them to
NULL ...). This mimics how we handle this in the SSA updating
code of the vectorizer.
PR tree-optimization/116380
* tree-loop-distribution.cc (copy_loop_before): Handle
out-of-loop defs appropriately.
* gcc.dg/torture/pr116380.c: New testcase.
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The corank was propagated to array components in derived types. Fix
this by setting a zero corank when the array component is not a pointer.
For pointer typed array components propagate the corank of the derived
type to allow associating the component to a coarray.
gcc/fortran/ChangeLog:
PR fortran/86468
* trans-intrinsic.cc (conv_intrinsic_move_alloc): Correct
comment.
* trans-types.cc (gfc_sym_type): Pass coarray rank, not false.
(gfc_get_derived_type): Only propagate codimension for coarrays
and pointers to array components in derived typed coarrays.
gcc/testsuite/ChangeLog:
* gfortran.dg/coarray_lib_this_image_2.f90: Fix array rank in
tree dump scan.
* gfortran.dg/coarray_lib_token_4.f90: Same.
* gfortran.dg/coarray/move_alloc_2.f90: New test.
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This performs the same basic check that is done by finish_function
to catch cases where the function is so badly malformed that we
do not have a consistent binding level.
gcc/cp/ChangeLog:
* coroutines.cc (split_coroutine_body_from_ramp): Check
that the binding level is as expected before attempting
to outline the function body.
Signed-off-by: Iain Sandoe <iain@sandoe.co.uk>
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The new g++.target/i386/pr116275-2.C test FAILs on 32-bit Solaris/x86:
FAIL: g++.target/i386/pr116275-2.C scan-assembler vpslld
This happens because Solaris defaults to -mstackrealign, disabling -mstv.
Fixed by disabling the former and enabling the latter.
Tested on i386-pc-solaris2.11 and x86_64-pc-linux-gnu.
2024-08-20 Rainer Orth <ro@CeBiTec.Uni-Bielefeld.DE>
gcc/testsuite:
* g++.target/i386/pr116275-2.C (dg-options): Add -mstv
-mno-stackrealign.
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Use se's class_container where present in sizeof().
PR fortran/77518
gcc/fortran/ChangeLog:
* trans-intrinsic.cc (gfc_conv_intrinsic_sizeof): Use
class_container of se when set.
gcc/testsuite/ChangeLog:
* gfortran.dg/coarray/sizeof_1.f90: New test.
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Since *vsx_le_perm_store_* can be split into vector
permute and vector store, after reload_completed, we reuse
the operand 1 as the destination of vector permute, so we
set operand 1 with constraint modifier "+". But since
it's taken as pure input in DF and most passes as Richard
pointed out in [1], to ensure it's correct when operand 1
is still live, we actually restore the operand 1's value
after the store with vector permute, that is:
op1 = vector permute op1 (doubleword swapping)
op0 = op2
op1 = vector permute op1 (doubleword swapping)
, it means op1's value isn't changed by this insn.
So according to the comments from Richard and Segher in
that thread, this patch is to remove the "+" constraint
modifier of operand 1 from *vsx_le_perm_store_* insns.
[1] https://gcc.gnu.org/pipermail/gcc-patches/2024-August/660145.html
gcc/ChangeLog:
* config/rs6000/vsx.md (define_insn *vsx_le_perm_store_{<VSX_D:mode>,
<VSX_W:mode>,v8hi,v16qi,<VSX_LE_128:mode>}): Remove constraint modifier
"+" from operand 1.
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For vsx_le_perm_store_* we have two splitters, one is for
!reload_completed and the other is for reload_completed.
As Richard pointed out in [1], operand 1 here is a pure
input for DF and most passes, but it could be used as the
vector rotation (64 bit) destination of itself, so we
re-compute the source (back to the original value) for
the case reload_completed, while for !reload_completed we
generate one new pseudo, so both cases are fine if operand
1 is still live after this insn. But according to the
source code, for !reload_completed case, it can logically
reuse the operand 1 as the new pseudo generation is
conditional on can_create_pseudo_p, then it can cause
wrong result once operand 1 is live. So considering this
and there is no splitting for this when reload_in_progress,
this patch is to fix the code to assert can_create_pseudo_p
there, so that both !reload_completed and reload_completed
cases would ensure operand 1 is unchanged (pure input), it
is also prepared for the following up patch which would
strip the unnecessary INOUT constraint modifier "+".
This also fixes an oversight in the splitter for VSX_LE_128
(!reload_completed), it should use operand 1 rather than
operand 0.
[1] https://gcc.gnu.org/pipermail/gcc-patches/2024-August/660145.html
gcc/ChangeLog:
* config/rs6000/vsx.md (*vsx_le_perm_store_{<VSX_D:mode>,<VSX_W:mode>,
v8hi,v16qi,<VSX_LE_128:mode>} !reload_completed splitters): Assert
can_create_pseudo_p and always generate one new pseudo for operand 1.
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Similar to r15-710-g458b23bc8b3e2b which removed all uses of
powerpc-*-linux*paired*, this patch is to remove the remaining
powerpc-*paired* uses which I missed to catch with "*linux*"
in search keyword.
gcc/testsuite/ChangeLog:
* lib/target-supports.exp (check_vect_support_and_set_flags): Remove
the if arm checking powerpc-*paired*.
(check_750cl_hw_available): Remove.
(check_effective_target_vect_unpack): Remove the check on
powerpc-*paired*.
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> It's not obvious to me why movv16qi requires a nonimmediate_operand
> > source, especially since ix86_expand_vector_mode does have code to
> > cope with constant operand[1]s. emit_move_insn_1 doesn't check the
> > predicates anyway, so the predicate will have little effect.
> >
> > A workaround would be to check legitimate_constant_p instead of the
> > predicate, but I'm not sure that that should be necessary.
> >
> > Has this already been discussed? If not, we should loop in the x86
> > maintainers (but I didn't do that here in case it would be a repeat).
>
> I also noticed it. Not sure why movv16qi requires a
> nonimmediate_operand, while ix86_expand_vector_mode could deal with
> constant op. Looking forward to Hongtao's comments.
The code has been there since 2005 before I'm involved.
It looks to me at the beginning both mov<mode> and
*mov<mode>_internal only support nonimmediate_operand for the
operands[1].
And r0-75606-g5656a184e83983 adjusted the nonimmediate_operand to
nonimmediate_or_sse_const_operand for *mov<mode>_internal, but not for
mov<mode>. I think we can align the predicate between mov<mode>
and *mov<mode>_internal.
gcc/ChangeLog:
* config/i386/sse.md (mov<mode>): Align predicates for
operands[1] between mov<mode> and *mov<mode>_internal.
* config/i386/mmx.md (mov<mode>): Ditto.
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supports an optab for it
On aarch64 (without !CSSC instructions), since popcount is implemented using the SIMD instruction cnt,
instead of using two SIMD cnt (V8QI mode), it is better to use one 128bit cnt (V16QI mode). And only one
reduction addition instead of 2. Currently fold_builtin_bit_query will expand always without checking
if there was an optab for the type, so this changes that to check the optab to see if we should expand
or have the backend handle it.
Bootstrapped and tested on x86_64-linux-gnu and built and tested for aarch64-linux-gnu.
gcc/ChangeLog:
* builtins.cc (fold_builtin_bit_query): Don't expand double
`unsigned long long` typess if there is an optab entry for that
type.
Signed-off-by: Andrew Pinski <quic_apinski@quicinc.com>
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Sometimes initialize_sanitizer_builtins is not called before emitting
the asan builtins with hwasan. In the case of the bug report, there
was a path with the fortran front-end where it was not called.
So let's call it in asan_instrument before calling transform_statements
and from hwasan_finish_file.
Built and tested for aarch64-linux-gnu with no regressions.
Changes since v1:
* v2: Add call of asan_instrument to hwasan_finish_file also.
gcc/ChangeLog:
PR sanitizer/115205
* asan.cc (asan_instrument): Call initialize_sanitizer_builtins
for hwasan.
(hwasan_finish_file): Likewise.
Signed-off-by: Andrew Pinski <quic_apinski@quicinc.com>
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Fix one typo `sat_truc` to `sat_trunc`, as well as `SAT_TRUC` to `SAT_TRUNC`.
gcc/testsuite/ChangeLog:
* gcc.target/riscv/sat_arith.h: Fix SAT_TRUNC typo.
* gcc.target/riscv/sat_u_trunc-1.c: Ditto.
* gcc.target/riscv/sat_u_trunc-13.c: Ditto.
* gcc.target/riscv/sat_u_trunc-14.c: Ditto.
* gcc.target/riscv/sat_u_trunc-15.c: Ditto.
* gcc.target/riscv/sat_u_trunc-2.c: Ditto.
* gcc.target/riscv/sat_u_trunc-3.c: Ditto.
* gcc.target/riscv/sat_u_trunc-4.c: Ditto.
* gcc.target/riscv/sat_u_trunc-5.c: Ditto.
* gcc.target/riscv/sat_u_trunc-6.c: Ditto.
* gcc.target/riscv/sat_u_trunc-7.c: Ditto.
* gcc.target/riscv/sat_u_trunc-8.c: Ditto.
* gcc.target/riscv/sat_u_trunc-9.c: Ditto.
* gcc.target/riscv/sat_u_trunc-run-1.c: Ditto.
* gcc.target/riscv/sat_u_trunc-run-13.c: Ditto.
* gcc.target/riscv/sat_u_trunc-run-14.c: Ditto.
* gcc.target/riscv/sat_u_trunc-run-15.c: Ditto.
* gcc.target/riscv/sat_u_trunc-run-2.c: Ditto.
* gcc.target/riscv/sat_u_trunc-run-3.c: Ditto.
* gcc.target/riscv/sat_u_trunc-run-4.c: Ditto.
* gcc.target/riscv/sat_u_trunc-run-5.c: Ditto.
* gcc.target/riscv/sat_u_trunc-run-6.c: Ditto.
* gcc.target/riscv/sat_u_trunc-run-7.c: Ditto.
* gcc.target/riscv/sat_u_trunc-run-8.c: Ditto.
* gcc.target/riscv/sat_u_trunc-run-9.c: Ditto.
Signed-off-by: Pan Li <pan2.li@intel.com>
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It was pointed out to me that the current error referencing an internal
linkage entity reads almost like an ICE message, with the message
finishing with the unhelpful:
m.cpp:1:8: error: failed to write compiled module: Bad file data
1 | export module M;
| ^~~~~~
Similarly, whenever we decide not to emit a module CMI due to other
errors we currently emit the following message:
m.cpp:1:8: warning: not writing module ‘M’ due to errors
1 | export module M;
| ^~~~~~
Neither of these messages really add anything useful; users already
understand that when an error is reported then the normal outputs will
not be created, so these messages are just noise.
There is one case we still need this latter message, however; when an
error in a template has been silenced with '-Wno-template-body' we still
don't want to write a module CMI, so emit an error now instead.
This patch also removes a number of dg-prune-output directives in the
testsuite that are no longer needed with this change.
gcc/cp/ChangeLog:
* module.cc (module_state::write_begin): Return a boolean to
indicate errors rather than just doing set_error().
(finish_module_processing): Prevent emission of unnecessary
errors; only indicate module writing occurred if write_begin
succeeds.
gcc/testsuite/ChangeLog:
* g++.dg/modules/export-1.C: Remove message.
* g++.dg/modules/internal-1.C: Remove message.
* g++.dg/modules/ambig-2_b.C: Remove unnecessary pruning.
* g++.dg/modules/atom-decl-2.C: Likewise.
* g++.dg/modules/atom-pragma-3.C: Likewise.
* g++.dg/modules/atom-preamble-2_f.C: Likewise.
* g++.dg/modules/block-decl-2.C: Likewise.
* g++.dg/modules/dir-only-4.C: Likewise.
* g++.dg/modules/enum-12.C: Likewise.
* g++.dg/modules/exp-xlate-1_b.C: Likewise.
* g++.dg/modules/export-3.C: Likewise.
* g++.dg/modules/friend-3.C: Likewise.
* g++.dg/modules/friend-5_b.C: Likewise.
* g++.dg/modules/inc-xlate-1_e.C: Likewise.
* g++.dg/modules/linkage-2.C: Likewise.
* g++.dg/modules/local-extern-1.C: Likewise.
* g++.dg/modules/main-1.C: Likewise.
* g++.dg/modules/map-2.C: Likewise.
* g++.dg/modules/mod-decl-1.C: Likewise.
* g++.dg/modules/mod-decl-3.C: Likewise.
* g++.dg/modules/pr99174.H: Likewise.
* g++.dg/modules/pr99468.H: Likewise.
* g++.dg/modules/token-1.C: Likewise.
* g++.dg/modules/token-3.C: Likewise.
* g++.dg/modules/token-4.C: Likewise.
* g++.dg/modules/token-5.C: Likewise.
* g++.dg/modules/using-10.C: Likewise.
* g++.dg/modules/using-12.C: Likewise.
* g++.dg/modules/using-3.C: Likewise.
* g++.dg/modules/using-9.C: Likewise.
* g++.dg/modules/using-enum-2.C: Likewise.
* g++.dg/modules/permissive-error-1.C: New test.
* g++.dg/modules/permissive-error-2.C: New test.
Signed-off-by: Nathaniel Shead <nathanieloshead@gmail.com>
Reviewed-by: Jason Merrill <jason@redhat.com>
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After the conversion for phiopt's conditional operand
to use maybe_push_res_to_seq, it was found that gimple_extract
will extract out from REALPART_EXPR/IMAGPART_EXPR/VCE and BIT_FIELD_REF,
a memory load. But that extraction was not needed as memory loads are not
simplified in match and simplify. So gimple_extract should return false
in those cases.
Changes since v1:
* Move the rejection to gimple_extract from factor_out_conditional_operation.
Bootstrapped and tested on x86_64-linux-gnu.
PR tree-optimization/116412
gcc/ChangeLog:
* gimple-match-exports.cc (gimple_extract): Return false if op0
was not a SSA name nor a min invariant for REALPART_EXPR/IMAGPART_EXPR/VCE
and BIT_FIELD_REF.
gcc/testsuite/ChangeLog:
* gcc.dg/torture/pr116412-1.c: New test.
Signed-off-by: Andrew Pinski <quic_apinski@quicinc.com>
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factor_out_conditional_operation [PR 116409]
The code was assuming that maybe_push_res_to_seq would not fail if the gimple_extract_op returned true.
But for some cases when the function is pure rather than const, then it can fail.
This change moves around the code to check the result of maybe_push_res_to_seq instead of assuming it will
always work.
Changes since v1:
* v2: Instead of directly testing non-pure builtin functions change to test if maybe_push_res_to_seq fails.
Bootstrapped and tested on x86_64-linux-gnu with no regressions.
PR tree-optimization/116409
gcc/ChangeLog:
* tree-ssa-phiopt.cc (factor_out_conditional_operation): Move
maybe_push_res_to_seq before creating the phi node and the debug dump.
Return false if maybe_push_res_to_seq fails.
gcc/testsuite/ChangeLog:
* gcc.dg/torture/pr116409-1.c: New test.
* gcc.dg/torture/pr116409-2.c: New test.
Signed-off-by: Andrew Pinski <quic_apinski@quicinc.com>
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array type rather than declarator [PR110345]
For C++ 26 P2552R3 I went through all the spots (except modules) where
attribute-specifier-seq appears in the grammar and tried to construct
a testcase in all those spots, for now for [[deprecated]] attribute.
This is the second issue I found. The comment already correctly says that
attributes after closing ] appertain to the array type, but we were
appending them to returned_attrs, so effectively applying them to the
declarator (as if they appeared right after declarator-id).
2024-08-20 Jakub Jelinek <jakub@redhat.com>
PR c++/110345
* decl.cc (grokdeclarator): Apply declarator->std_attributes
for cdk_array to type, rather than chaining it to returned_attrs.
* g++.dg/cpp0x/gen-attrs-82.C: New test.
* g++.dg/gomp/attrs-3.C (foo): Expect different diagnostics for
omp::directive attribute after closing square bracket of an automatic
declaration and add a test with the attribute after array's
declarator-id.
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For C++ 26 P2552R3 I went through all the spots (except modules) where
attribute-specifier-seq appears in the grammar and tried to construct
a testcase in all those spots, for now for [[deprecated]] attribute.
This is the third issue I found.
https://eel.is/c++draft/class.derived#general-1 has attribute-specifier-seq
at the start of base-specifier. The following patch parses it there and
warns about those.
2024-08-20 Jakub Jelinek <jakub@redhat.com>
PR c++/110345
* parser.cc (cp_parser_base_specifier): Parse standard attributes
at the start and emit a warning if there are any non-ignored ones.
* g++.dg/cpp0x/gen-attrs-83.C: New test.
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The testcase has been modified to include the -fwrapv flag which now
causes the test to pass. Remove the xfail exception
gcc/testsuite/ChangeLog:
* gcc.dg/signbit-5.c: Remove riscv xfail exception
Signed-off-by: Edwin Lu <ewlu@rivosinc.com>
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This commit is contains change in code for the tree-eh.cc, tree-eh.h, MAINTAINERS and tree-cfg.cc files.
Specifically it contains four functions -
1. void extract_exception_types_for_call which extracts the exception types in a call stmt and adds them into a vector tree.
2. bool stmt_throw_types does the same as stmt_could_throw the difference being that it also gives the list of exception types as given by the
extract_exception_types_for_call function.
3. bool match_lp checks if a landing pad can handle any of the exception types given as input parameters by looking into the catch handlers.
4. update_stmt_eh_region is the function that walks up the EH tree and changes the landing pad for the last statement in a basic block in the control
flow graph so that when the edge by make_eh_edge is created it points to the correct handlers.
Further work to be done regarding RESX stmts.
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PR c++/101232
gcc/cp/ChangeLog:
* parser.cc (cp_parser_postfix_expression): Commit to the
parse in case we know its either a cast or invalid syntax.
(cp_parser_braced_list): Add a heuristic to inform about
missing comma or operator.
gcc/testsuite/ChangeLog:
* g++.dg/cpp0x/initlist-err1.C: New test.
* g++.dg/cpp0x/initlist-err2.C: New test.
* g++.dg/cpp0x/initlist-err3.C: New test.
Signed-off-by: Franciszek Witt <franek.witt@gmail.com>
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We generally do not use a hyphen between project name and version.
gcc:
* doc/install.texi (Specific) <c6x-*-*>: Normalize reference to
binutils.
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This adds a pattern to convert `(a ? b : 0) | (a ? 0 : c)` into `a ? b : c`
which is simplier. It adds both for cond and vec_cond; even though vec_cond is
handled via a different pattern currently but requires extra steps for matching
so this should be slightly faster.
Also handle it for xor and plus too since those can be handled the same way.
Bootstrapped and tested on x86_64-linux-gnu with no regressions.
PR tree-optimization/103660
gcc/ChangeLog:
* match.pd (`(a ? b : 0) | (a ? 0 : c)`): New pattern.
gcc/testsuite/ChangeLog:
* g++.dg/tree-ssa/pr103660-4.C: New test.
* gcc.dg/tree-ssa/pr103660-4.c: New test.
Signed-off-by: Andrew Pinski <quic_apinski@quicinc.com>
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support ^ and + [PR103660]
r13-4620-g4d9db4bdd458 Added a few patterns and some of them can be extended to support XOR and PLUS.
This extends the patterns to support XOR and PLUS instead of just IOR.
Bootstrapped and tested on x86_64-linux-gnu.
PR tree-optimization/103660
gcc/ChangeLog:
* match.pd (`((a CMP b) ? c : 0) | ((a CMP' b) ? d : 0)`): Extend to support
XOR and PLUS.
gcc/testsuite/ChangeLog:
* g++.dg/tree-ssa/pr103660-2.C: New test.
* g++.dg/tree-ssa/pr103660-3.C: New test.
* gcc.dg/tree-ssa/pr103660-2.c: New test.
* gcc.dg/tree-ssa/pr103660-3.c: New test.
Signed-off-by: Andrew Pinski <quic_apinski@quicinc.com>
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IOR part of the bug report was fixed by r13-4620-g4d9db4bdd458 but
that added only aarch64 specific testcases. This adds 4
generic testcases for this to check to make sure they are optimized.
The C++ testcases are the vector type versions.
PR tree-optimization/103660
gcc/testsuite/ChangeLog:
* g++.dg/tree-ssa/pr103660-0.C: New test.
* g++.dg/tree-ssa/pr103660-1.C: New test.
* gcc.dg/tree-ssa/pr103660-0.c: New test.
* gcc.dg/tree-ssa/pr103660-1.c: New test.
Signed-off-by: Andrew Pinski <quic_apinski@quicinc.com>
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On Tue, 9 Jan 2024, Jason Merrill wrote:
> On 1/5/24 15:01, Patrick Palka wrote[1]:
> > Here during default template argument substitution we wrongly consider
> > the (substituted) default arguments v and vt<int> as value-dependent[1]
> > which ultimately leads to deduction failure for the calls.
> >
> > The bogus value_dependent_expression_p result aside, I noticed
> > type_unification_real during default targ substitution keeps track of
> > whether all previous targs are known and non-dependent, as is the case
> > for these calls. And in such cases it should be safe to avoid checking
> > dependence of the substituted default targ and just assume it's not.
> > This patch implements this optimization, which lets us accept both
> > testcases by sidestepping the value_dependent_expression_p issue
> > altogether.
>
> Hmm, maybe instead of substituting and asking if it's dependent, we should
> specifically look for undeduced parameters.
This patch implements this refinement, which incidentally fixes PR101463
just as well.
[1]: https://gcc.gnu.org/pipermail/gcc-patches/2024-January/641957.html
PR c++/101463
gcc/cp/ChangeLog:
* pt.cc (type_unification_real): Directly look for undeduced
parameters in the default argument instead of doing a trial
substitution.
gcc/testsuite/ChangeLog:
* g++.dg/cpp1z/nontype6.C: New test.
* g++.dg/cpp1z/nontype6a.C: New test.
Reviewed-by: Jason Merrill <jason@redhat.com>
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The following tries to address that the vectorizer fails to have
precise knowledge of argument and return calling conventions and
views some accesses as loads and stores that are not.
This is mainly important when doing basic-block vectorization as
otherwise loop indexing would force such arguments to memory.
On x86 the reduction in the number of apparent loads and stores
often dominates cost analysis so the following tries to mitigate
this aggressively by adjusting only the scalar load and store
cost, reducing them to the cost of a simple scalar statement,
but not touching the vector access cost which would be much
harder to estimate. Thereby we error on the side of not performing
basic-block vectorization.
PR tree-optimization/116274
* tree-vect-slp.cc (vect_bb_slp_scalar_cost): Cost scalar loads
and stores as simple scalar stmts when they access a non-global,
not address-taken variable that doesn't have BLKmode assigned.
* gcc.target/i386/pr116274-2.c: New testcase.
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fortran/trans-intrinsic.c:1950 [PR84246]
Fix ICE caused by converted expression already being pointer by checking
for its type. Lift rewrite to caf_send completely into resolve and
prevent more temporary arrays.
PR fortran/84246
gcc/fortran/ChangeLog:
* resolve.cc (caf_possible_reallocate): Detect arrays that may
be reallocated by caf_send.
(resolve_ordinary_assign): More reliably detect assignments
where a rewrite to caf_send is needed.
* trans-expr.cc (gfc_trans_assignment_1): Remove rewrite to
caf_send, because this is done by resolve now.
* trans-intrinsic.cc (conv_caf_send): Prevent unneeded temporary
arrays.
libgfortran/ChangeLog:
* caf/single.c (send_by_ref): Created array's lbound is now 1
and the offset set correctly.
gcc/testsuite/ChangeLog:
* gfortran.dg/coarray_allocate_7.f08: Adapt to array being
allocate by caf_send.
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The patch modifies optc-save-gen.awk to generate if (!lto_stream_offload_p)
check before streaming out target-specific opt in cl_optimization_stream_out,
when offloading is enabled.
Also, it modifies cl_optimization_stream_in to issue an error during build time
if accelerator backend defines a target-specific Optimization option. This
restriction currently is in place to maintain consistency for streaming of
Optimization options between host and accelerator. A proper fix would be
to merge target-specific Optimization options for host and accelerators
enabled for offloading.
gcc/ChangeLog:
* optc-save-gen.awk: New array var_target_opt. Use it to generate
if (!lto_stream_offload_p) check in cl_optimization_stream_out,
and generate a diagnostic with #error if accelerator backend uses
Optimization for target-specifc options in cl_optimization_stream_in.
Signed-off-by: Prathamesh Kulkarni <prathameshk@nvidia.com>
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[PR115020]
The error in the linked PR is caused because 'DECL_THIS_STATIC' is true
for the static member function, causing the streaming code to assume
that this is an internal linkage GM entity that needs to be explicitly
streamed, which then on read-in gets marked as a vague linkage function
(despite being non-inline) causing import_export_decl to complain.
However, I don't see any reason why we should care about this:
definitions in the GMF should just be emitted as per usual regardless of
whether they're internal-linkage or not. Actually the only thing we
care about here are header modules, since they have no TU to write
definitions into. As such this patch removes these conditions from
'has_definition' and updates some comments to clarify.
PR c++/115020
gcc/cp/ChangeLog:
* module.cc (has_definition): Only force writing definitions for
header_module_p.
gcc/testsuite/ChangeLog:
* g++.dg/modules/pr115020_a.C: New test.
* g++.dg/modules/pr115020_b.C: New test.
Signed-off-by: Nathaniel Shead <nathanieloshead@gmail.com>
Reviewed-by: Jason Merrill <jason@redhat.com>
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Currently we implement [temp.deduct.guide] p1 by forcing all deduction
guides to be considered as exported. However this is not sufficient:
for transitive non-exported imports we will still hide the deduction
guide from name lookup, causing errors.
This patch instead adjusts name lookup to have a new ANY_REACHABLE flag
to allow for this case. Currently this is only used by deduction guides
but there are some other circumstances where this may be useful in the
future (e.g. finding existing temploid friends).
PR c++/116403
gcc/cp/ChangeLog:
* pt.cc (deduction_guides_for): Use ANY_REACHABLE for lookup of
deduction guides.
* module.cc (depset::hash::add_deduction_guides): Likewise.
(module_state::write_cluster): No longer override deduction
guides as exported.
* name-lookup.cc (name_lookup::search_namespace_only): Ignore
visibility when LOOK_want::ANY_REACHABLE is specified.
(check_module_override): Ignore visibility when checking for
ambiguating deduction guides.
* name-lookup.h (LOOK_want): New flag 'ANY_REACHABLE'.
gcc/testsuite/ChangeLog:
* g++.dg/modules/dguide-4_a.C: New test.
* g++.dg/modules/dguide-4_b.C: New test.
* g++.dg/modules/dguide-4_c.C: New test.
Signed-off-by: Nathaniel Shead <nathanieloshead@gmail.com>
Reviewed-by: Jason Merrill <jason@redhat.com>
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When reading an NTTP we call get_template_parm_object which delegates
setting of DECL_INITIAL to the general cp_finish_decl procedure, which
calls check_initializer to validate and record it.
Apart from being unnecessary (it must have already been validated by the
writing module), this also causes errors in cases like the linked PR, as
validating may end up needing to call lazy_load_pendings to determine
any specialisations that may exist which violates assumptions of the
modules streaming code.
This patch works around the issue by adding a flag to
get_template_parm_object to disable these checks when not needed.
PR c++/116382
gcc/cp/ChangeLog:
* cp-tree.h (get_template_parm_object): Add check_init param.
* module.cc (trees_in::tree_node): Pass check_init=false when
building NTTPs.
* pt.cc (get_template_parm_object): Prevent cp_finish_decl from
validating the initializer when check_init=false.
gcc/testsuite/ChangeLog:
* g++.dg/modules/tpl-nttp-1_a.C: New test.
* g++.dg/modules/tpl-nttp-1_b.C: New test.
Signed-off-by: Nathaniel Shead <nathanieloshead@gmail.com>
Reviewed-by: Jason Merrill <jason@redhat.com>
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We need to use the DECL_TEMPLATE_INSTANTIATIONS property to find
reachable specialisations from a template to ensure that any GM
specialisations are properly marked as reachable.
Currently the modules code uses the decl when rebuilding this property,
but this is not always correct; it appears that for type specialisations
we need to use the TREE_TYPE of the decl instead so that the
specialisation is correctly found. This patch makes the required
adjustments.
PR c++/116364
gcc/cp/ChangeLog:
* cp-tree.h (get_mergeable_specialization_flags): Adjust
signature.
* module.cc (trees_out::decl_value): Indicate whether this is a
type or decl specialisation.
* pt.cc (get_mergeable_specialization_flags): Match against the
type of a non-decl specialisation.
(add_mergeable_specialization): Use the already calculated spec
instead of always adding decl to DECL_TEMPLATE_INSTANTIATIONS.
gcc/testsuite/ChangeLog:
* g++.dg/modules/tpl-spec-9_a.C: New test.
* g++.dg/modules/tpl-spec-9_b.C: New test.
* g++.dg/modules/tpl-spec-9_c.C: New test.
Signed-off-by: Nathaniel Shead <nathanieloshead@gmail.com>
Reviewed-by: Jason Merrill <jason@redhat.com>
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PR target/113939
* config/m68k/m68k.opt (mlra): New target option.
* config/m68k/m68k.cc (m68k_use_lra_p): New function.
(TARGET_LRA_P): Use it.
* config/m68k/m68k.opt.urls: Regenerate.
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Here we initialize an enumerator with a class prvalue with a conversion
function. When we fold it in build_enumerator, we create a TARGET_EXPR
for the object, and subsequently crash in tsubst_expr, which should not
see such a code.
Normally, we fix similar problems by using an IMPLICIT_CONV_EXPR but here
I may get away with not using the result of fold_non_dependent_expr unless
the result is a constant. A TARGET_EXPR is not constant.
PR c++/115657
gcc/cp/ChangeLog:
* decl.cc (build_enumerator): Call maybe_fold_non_dependent_expr
instead of fold_non_dependent_expr.
gcc/testsuite/ChangeLog:
* g++.dg/cpp1y/constexpr-recursion2.C: New test.
* g++.dg/template/conv21.C: New test.
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Here we ICE since r14-8291 in C++11/C++14 modes. Fortunately
this is an easy one.
The important bit of r14-8291 is this:
@@ -20056,9 +20071,12 @@ tsubst_expr (tree t, tree args, tsubst_flags_t complain, tree in_decl)
RETURN (retval);
}
if (IMPLICIT_CONV_EXPR_NONTYPE_ARG (t))
- /* We'll pass this to convert_nontype_argument again, we don't need
- to actually perform any conversion here. */
- RETURN (expr);
+ {
+ tree r = convert_nontype_argument (type, expr, complain);
+ if (r == NULL_TREE)
+ r = error_mark_node;
+ RETURN (r);
+ }
which obviously means that instead of returning right away we go
to convert_nontype_argument. When type is error_mark_node and we're
in C++17, in convert_nontype_argument we go down this path:
else if (INTEGRAL_OR_ENUMERATION_TYPE_P (type)
|| cxx_dialect >= cxx17)
{
expr = build_converted_constant_expr (type, expr, complain);
if (expr == error_mark_node)
return (complain & tf_error) ? NULL_TREE : error_mark_node;
// ...
}
but pre-C++17, we take a different route and end up crashing on
gcc_unreachable.
It would of course also work to check for error_mark_node early in
build_converted_constant_expr.
PR c++/116384
gcc/cp/ChangeLog:
* pt.cc (tsubst_expr) <case IMPLICIT_CONV_EXPR>: Bail if tsubst
returns error_mark_node.
gcc/testsuite/ChangeLog:
* g++.dg/cpp0x/vt-116384.C: New test.
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The availability of ls64 intrinsics and data types were determined
solely by the globally specified architecture features, which did not
reflect any changes specified in target pragmas or attributes.
This patch removes the initialisation-time guards for the intrinsics,
and replaces them with checks at use time. We also get better error
messages when ls64 is not available (matching the existing error
messages for SVE intrinsics).
The data512_t type is made always available; this is consistent with the
present behaviour for Neon fp16/bf16 types.
gcc/ChangeLog:
PR target/112108
* config/aarch64/aarch64-builtins.cc (handle_arm_acle_h): Remove
feature check at initialisation.
(aarch64_general_check_builtin_call): Check ls64 intrinsics.
* config/aarch64/arm_acle.h: (data512_t) Make always available.
gcc/testsuite/ChangeLog:
PR target/112108
* gcc.target/aarch64/acle/ls64_guard-1.c: New test.
* gcc.target/aarch64/acle/ls64_guard-2.c: New test.
* gcc.target/aarch64/acle/ls64_guard-3.c: New test.
* gcc.target/aarch64/acle/ls64_guard-4.c: New test.
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The availability of memtag intrinsics and data types were determined
solely by the globally specified architecture features, which did not
reflect any changes specified in target pragmas or attributes.
This patch removes the initialisation-time guards for the intrinsics,
and replaces them with checks at use time. It also removes the macro
indirection from the header file - this simplifies the header, and
allows the missing extension error reporting to find the user-facing
intrinsic names.
gcc/ChangeLog:
PR target/112108
* config/aarch64/aarch64-builtins.cc (aarch64_init_memtag_builtins):
Define intrinsic names directly.
(aarch64_general_init_builtins): Move memtag intialisation...
(handle_arm_acle_h): ...to here, and remove feature check.
(aarch64_general_check_builtin_call): Check memtag intrinsics.
* config/aarch64/arm_acle.h (__arm_mte_create_random_tag)
(__arm_mte_exclude_tag, __arm_mte_ptrdiff)
(__arm_mte_increment_tag, __arm_mte_set_tag, __arm_mte_get_tag):
Remove.
gcc/testsuite/ChangeLog:
PR target/112108
* gcc.target/aarch64/acle/memtag_guard-1.c: New test.
* gcc.target/aarch64/acle/memtag_guard-2.c: New test.
* gcc.target/aarch64/acle/memtag_guard-3.c: New test.
* gcc.target/aarch64/acle/memtag_guard-4.c: New test.
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The availability of tme intrinsics was previously gated at both
initialisation time (using global target options) and usage time
(accounting for function-specific target options). This patch removes
the check at initialisation time, and also moves the intrinsics out of
the header file to allow for better error messages (matching the
existing error messages for SVE intrinsics).
gcc/ChangeLog:
PR target/112108
* config/aarch64/aarch64-builtins.cc (aarch64_init_tme_builtins):
Define intrinsic names directly.
(aarch64_general_init_builtins): Move tme initialisation...
(handle_arm_acle_h): ...to here, and remove feature check.
(aarch64_general_check_builtin_call): Check tme intrinsics.
* config/aarch64/arm_acle.h (__tstart, __tcommit, __tcancel)
(__ttest): Remove.
(_TMFAILURE_*): Define unconditionally.
gcc/testsuite/ChangeLog:
PR target/112108
* gcc.target/aarch64/acle/tme_guard-1.c: New test.
* gcc.target/aarch64/acle/tme_guard-2.c: New test.
* gcc.target/aarch64/acle/tme_guard-3.c: New test.
* gcc.target/aarch64/acle/tme_guard-4.c: New test.
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