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2022-10-13Daily bump.GCC Administrator6-1/+164
2022-10-12preprocessor: Fix tracking of system header state [PR60014,PR60723]Lewis Hyatt7-7/+52
The token_streamer class (which implements gcc mode -E and -save-temps/-no-integrated-cpp) needs to keep track whether the last tokens output were in a system header, so that it can generate line marker annotations as necessary for a downstream consumer to reconstruct the state. The logic for tracking it, which was added by r5-1863 to resolve PR60723, has some edge case issues as revealed by the three new test cases. The first, coming from the original PR60014, was incidentally fixed by r9-1926 for unrelated reasons. The other two were still failing on master prior to this commit. Such code paths were not realizable prior to r13-1544, which made it possible for the token streamer to see CPP_PRAGMA tokens in more contexts. The two main issues being corrected here are: 1) print.prev_was_system_token needs to indicate whether the previous token output was in a system location. However, it was not being set on every token, only on those that triggered the main code path; specifically it was not triggered on a CPP_PRAGMA token. Testcase 2 covers this case. 2) The token_streamer uses a variable "line_marker_emitted" to remember whether a line marker has been emitted while processing a given token, so that it wouldn't be done more than once in case multiple conditions requiring a line marker are true. There was no reason for this to be a member variable that retains its value from token to token, since it is just needed for tracking the state locally while processing a single given token. The fact that it could retain its value for a subsequent token is rather difficult to observe, but testcase 3 demonstrates incorrect behavior resulting from that. Moving this to a local variable also simplifies understanding the control flow going forward. gcc/c-family/ChangeLog: PR preprocessor/60014 PR preprocessor/60723 * c-ppoutput.cc (class token_streamer): Remove member line_marker_emitted to... (token_streamer::stream): ...a local variable here. Set print.prev_was_system_token on all code paths. gcc/testsuite/ChangeLog: PR preprocessor/60014 PR preprocessor/60723 * gcc.dg/cpp/pr60014-1.c: New test. * gcc.dg/cpp/pr60014-1.h: New test. * gcc.dg/cpp/pr60014-2.c: New test. * gcc.dg/cpp/pr60014-2.h: New test. * gcc.dg/cpp/pr60014-3.c: New test. * gcc.dg/cpp/pr60014-3.h: New test.
2022-10-12c++: Remove maybe-rvalue OR in implicit moveMarek Polacek10-97/+41
This patch removes the two-stage overload resolution when performing implicit move, whereby the compiler does two separate overload resolutions: one treating the operand as an rvalue, and then (if that resolution fails) another one treating the operand as an lvalue. In the standard this was introduced via CWG 1579 and implemented in gcc in r251035. In r11-2412, we disabled the fallback OR in C++20 (but not in C++17). Then C++23 P2266 removed the fallback overload resolution, and changed the implicit move rules once again. So we wound up with three different behaviors. The two overload resolutions approach was complicated and quirky, so users should transition to the newer model. Removing the maybe-rvalue OR also allows us to simplify our code, for instance, now we can get rid of LOOKUP_PREFER_RVALUE altogether. This change means that code that previously didn't compile in C++17 will now compile, for example: struct S1 { S1(S1 &&); }; struct S2 : S1 {}; S1 f (S2 s) { return s; // OK, derived-to-base, use S1::S1(S1&&) } And conversely, code that used to work in C++17 may not compile anymore: struct W { W(); }; struct F { F(W&); F(W&&) = delete; }; F fn () { W w; return w; // use w as rvalue -> use of deleted function F::F(W&&) } I plan to add a note to porting_to.html. gcc/cp/ChangeLog: * call.cc (standard_conversion): Remove LOOKUP_PREFER_RVALUE code. (reference_binding): Honor clk_implicit_rval even pre-C++20. (implicit_conversion_1): Remove LOOKUP_PREFER_RVALUE code. (build_user_type_conversion_1): Likewise. (convert_like_internal): Likewise. (build_over_call): Likewise. * cp-tree.h (LOOKUP_PREFER_RVALUE): Remove. (LOOKUP_NO_NARROWING): Adjust definition. * except.cc (build_throw): Don't perform two overload resolutions. * typeck.cc (maybe_warn_pessimizing_move): Don't use LOOKUP_PREFER_RVALUE. (check_return_expr): Don't perform two overload resolutions. gcc/testsuite/ChangeLog: * g++.dg/cpp0x/Wredundant-move10.C: Adjust dg-warning. * g++.dg/cpp0x/Wredundant-move7.C: Likewise. * g++.dg/cpp0x/move-return2.C: Remove dg-error. * g++.dg/cpp0x/move-return4.C: Likewise. * g++.dg/cpp0x/ref-qual20.C: Adjust expected return value. * g++.dg/cpp0x/move-return5.C: New test.
2022-10-12Add range-op entry for floating point NEGATE_EXPR.Aldy Hernandez1-0/+62
gcc/ChangeLog: * range-op-float.cc (class foperator_negate): New. (floating_op_table::floating_op_table): Add NEGATE_EXPR (range_op_float_tests): Add negate tests.
2022-10-12Fortran: check types of operands of arithmetic binary operations [PR107217]Harald Anlauf2-0/+33
gcc/fortran/ChangeLog: PR fortran/107217 * arith.cc (gfc_arith_plus): Compare consistency of types of operands. (gfc_arith_minus): Likewise. (gfc_arith_times): Likewise. (gfc_arith_divide): Likewise. (arith_power): Check that both operands are of numeric type. gcc/testsuite/ChangeLog: PR fortran/107217 * gfortran.dg/pr107217.f90: New test.
2022-10-12c++: defer all consteval in default args [DR2631]Jason Merrill10-111/+95
The proposed resolution of CWG2631 extends our current handling of source_location::current to all consteval functions: default arguments are not evaluated until they're used in a call, the same should apply to evaluation of immediate invocations. And similarly for default member initializers. Previously we folded source_location::current in cp_fold_r; now we fold all consteval calls in default arguments/member initializers in bot_replace. DR 2631 gcc/cp/ChangeLog: * cp-tree.h (source_location_current_p): Remove. * name-lookup.h (struct cp_binding_level): Remove immediate_fn_ctx_p. * call.cc (in_immediate_context): All default args and DMI are potentially immediate context. (immediate_invocation_p): Don't treat source_location specially. (struct in_consteval_if_p_temp_override): Move to cp-tree.h. * constexpr.cc (get_nth_callarg): Move to cp-tree.h. * cp-gimplify.cc (cp_fold_r): Don't fold consteval. * name-lookup.cc (begin_scope): Don't set immediate_fn_ctx_p. * parser.cc (cp_parser_lambda_declarator_opt): Likewise. (cp_parser_direct_declarator): Likewise. * pt.cc (tsubst_default_argument): Open sk_function_parms level. * tree.cc (source_location_current_p): Remove. (bot_replace): Fold consteval here. (break_out_target_exprs): Handle errors. gcc/testsuite/ChangeLog: * g++.dg/cpp2a/consteval-defarg3.C: New test.
2022-10-12RISC-V: Remove TUPLE size macro define. [NFC]Ju-Zhe Zhong1-3/+0
gcc/ChangeLog: * config/riscv/riscv-vector-builtins.h: Remove unused macro.
2022-10-12RISC-V: Apply clang-format for riscv-vector-builtins.* [NFC]Ju-Zhe Zhong3-7/+6
gcc/ChangeLog: * config/riscv/riscv-vector-builtins.cc (DEF_RVV_TYPE): Apply clang-format. (add_vector_type_attribute): Ditto. * config/riscv/riscv-vector-builtins.def (DEF_RVV_TYPE): Apply clang-format. * config/riscv/riscv-vector-builtins.h (DEF_RVV_TYPE): Apply clang-format.
2022-10-12RISC-V: Refine register_builtin_types function. [NFC]Ju-Zhe Zhong2-40/+50
gcc/ChangeLog: * config/riscv/riscv-vector-builtins.cc (builtin_types): Redefine vector types. (build_const_pointer): New function. (register_builtin_type): Ditto. (DEF_RVV_TYPE): Simplify macro. (register_vector_type): Refine implementation. * config/riscv/riscv-vector-builtins.h (rvv_builtin_types_t): New.
2022-10-12RISC-V: Move function place to make it looks better. [NFC]Ju-Zhe Zhong2-19/+19
gcc/ChangeLog: * config/riscv/riscv-vector-builtins.h (class rvv_switcher): Move to this to .... * config/riscv/riscv-vector-builtins.cc (class rvv_switcher): here.
2022-10-12Merge branch 'master' into devel/modula-2.Gaius Mulley387-2434/+16169
2022-10-12Remove AVX512_VP2INTERSECT from PTA_SAPPHIRERAPIDSCui,Lili3-16/+12
gcc/ChangeLog: * config/i386/driver-i386.cc (host_detect_local_cpu): Move sapphirerapids out of AVX512_VP2INTERSECT. * config/i386/i386.h: Remove AVX512_VP2INTERSECT from PTA_SAPPHIRERAPIDS * doc/invoke.texi: Remove AVX512_VP2INTERSECT from SAPPHIRERAPIDS
2022-10-12gcov: rename gcov_write_summaryMartin Liska2-5/+5
gcc/ChangeLog: * gcov-io.cc (gcov_write_summary): Rename to ... (gcov_write_object_summary): ... this. * gcov-io.h (GCOV_TAG_OBJECT_SUMMARY_LENGTH): Rename from ... (GCOV_TAG_SUMMARY_LENGTH): ... this. libgcc/ChangeLog: * libgcov-driver.c: Use new function. * libgcov.h (gcov_write_summary): Rename to ... (gcov_write_object_summary): ... this.
2022-10-12regenerate configure filesMartin Liska1-2/+2
Needed after a recent change. gcc/ChangeLog: * configure: Regenerate. libatomic/ChangeLog: * configure: Regenerate. libbacktrace/ChangeLog: * configure: Regenerate. libcc1/ChangeLog: * configure: Regenerate. libffi/ChangeLog: * configure: Regenerate. libgfortran/ChangeLog: * configure: Regenerate. libgomp/ChangeLog: * configure: Regenerate. libitm/ChangeLog: * configure: Regenerate. libobjc/ChangeLog: * configure: Regenerate. liboffloadmic/ChangeLog: * configure: Regenerate. * plugin/configure: Regenerate. libphobos/ChangeLog: * configure: Regenerate. libquadmath/ChangeLog: * configure: Regenerate. libsanitizer/ChangeLog: * configure: Regenerate. libssp/ChangeLog: * configure: Regenerate. libstdc++-v3/ChangeLog: * configure: Regenerate. libvtv/ChangeLog: * configure: Regenerate. lto-plugin/ChangeLog: * configure: Regenerate. zlib/ChangeLog: * configure: Regenerate.
2022-10-12Add stubs for floating point range-op tests.Aldy Hernandez2-0/+29
gcc/ChangeLog: * range-op-float.cc (frange_float): New. (range_op_float_tests): New. * range-op.cc (range_op_tests): Call range_op_float_tests.
2022-10-12Add method to query the sign of a NAN.Aldy Hernandez1-0/+17
In writing some range-op entries I noticed we don't have a way to query the sign of the NAN in a range, unless the range only contains NAN, in which case you can just use frange::signbit_p. This patch adds a method that returns TRUE if there exists the possiblity of a NAN and we know its sign. gcc/ChangeLog: * value-range.h (frange::nan_signbit_p): New.
2022-10-12Disable tree to bool conversion in frange::update_nan.Aldy Hernandez2-1/+2
We have a set_nan(type) method which can be confused with update_nan(bool) because of the silent conversion of pointers to bool. Currently, if you call update_nan(tree), you'll set the possibility of NAN with a sign of true if tree is non-null. This is prone to error and this patch disallows this behavior. gcc/ChangeLog: * value-range.cc (frange::set_nonnegative): Pass bool to update_nan. * value-range.h: Disallow conversion to bool in update_nan().
2022-10-12Add an frange(type) constructor analogous to the irange version.Aldy Hernandez1-0/+8
gcc/ChangeLog: * value-range.h (frange::frange): Add constructor taking type.
2022-10-12Add default relation_kind to floating point range-op entries.Aldy Hernandez1-40/+40
The methods from which these derive all have a default relation_kind. This patch just adds the default, to make it easier to write unit tests later. gcc/ChangeLog: * range-op-float.cc: Add relation_kind = VREL_VARYING to all methods.
2022-10-12Daily bump.GCC Administrator6-1/+353
2022-10-12Enable support for atomic primitives on SPARC/LinuxEric Botcazou1-0/+1
The SPARC/Linux port is very similar to the SPARC/Solaris port nowadays so it makes sense to copy the setting of the support for atomic primitives. This fixes the single regression in the gnat.dg testsuite: FAIL: gnat.dg/prot7.adb (test for excess errors) gcc/ada/ * libgnat/system-linux-sparc.ads (Support_Atomic_Primitives): New constant set to True.
2022-10-11Fortran: check types of source expressions before conversion [PR107215]Harald Anlauf2-0/+50
gcc/fortran/ChangeLog: PR fortran/107215 * arith.cc (gfc_int2int): Check validity of type of source expr. (gfc_int2real): Likewise. (gfc_int2complex): Likewise. (gfc_real2int): Likewise. (gfc_real2real): Likewise. (gfc_complex2int): Likewise. (gfc_complex2real): Likewise. (gfc_complex2complex): Likewise. (gfc_log2log): Likewise. (gfc_log2int): Likewise. (gfc_int2log): Likewise. gcc/testsuite/ChangeLog: PR fortran/107215 * gfortran.dg/pr107215.f90: New test.
2022-10-11c++ modules: ICE with templated friend and std namespace [PR100134]Patrick Palka3-0/+25
The function depset::hash::add_binding_entity has an assert verifying that if a namespace contains an exported entity, then the namespace must have been opened in the module purview: if (data->hash->add_namespace_entities (decl, data->partitions)) { /* It contains an exported thing, so it is exported. */ gcc_checking_assert (DECL_MODULE_PURVIEW_P (decl)); DECL_MODULE_EXPORT_P (decl) = true; } We're tripping over this assert in the below testcase because by instantiating and exporting std::A<int>, we in turn define and export the hidden friend std::f(A<int>) without ever having opened the enclosing namespace std within the module purview, and thus DECL_MODULE_PURVIEW_P for std is false. It's important that the enclosing namespace is std here: if we use a different namespace then the ICE disappears. This probably has something to do with us predefining std via push_namespace from cxx_init_decl_processing (which makes it look like we've opened it within the TU), whereas with another namespace we would instead lazily create its NAMESPACE_DECL from add_imported_namespace. Since templated friend functions are special in that they give us a way to introduce a namespace-scope function without having to explicitly open the namespace, this patch proposes to fix this ICE by propagating DECL_MODULE_PURVIEW_P from the introduced function to the enclosing namespace during tsubst_friend_function. PR c++/100134 gcc/cp/ChangeLog: * pt.cc (tsubst_friend_function): Propagate DECL_MODULE_PURVIEW_P from the introduced namespace-scope function to the namespace. gcc/testsuite/ChangeLog: * g++.dg/modules/tpl-friend-8_a.H: New test. * g++.dg/modules/tpl-friend-8_b.C: New test.
2022-10-11c++ modules: lazy loading from within template [PR99377]Patrick Palka3-0/+22
Here when lazily loading the binding for f due to its first use from the template g, processing_template_decl is set which causes the call to note_vague_linkage_fn from module_state::read_cluster to have no effect, and thus we never push f onto deferred_fns and end up never emitting its definition despite needing it. The behavior of the lazy loading machinery shouldn't be sensitive to whether we're inside a template, so to that end this patch makes us clear processing_template_decl in the entrypoints lazy_load_binding and lazy_load_pendings. PR c++/99377 gcc/cp/ChangeLog: * module.cc (lazy_load_binding): Clear processing_template_decl. (lazy_load_pendings): Likewise. gcc/testsuite/ChangeLog: * g++.dg/modules/pr99377-2_a.C: New test. * g++.dg/modules/pr99377-2_b.C: New test.
2022-10-11Avoid calling tracer.trailer() twice.Aldy Hernandez1-2/+6
gcc/ChangeLog: * gimple-range-gori.cc (gori_compute::logical_combine): Avoid calling tracer.trailer().
2022-10-11i386: Fix up RTL checking ICE [PR107185]Jakub Jelinek1-1/+1
On Tue, Oct 11, 2022 at 04:03:16PM +0800, liuhongt via Gcc-patches wrote: > gcc/ChangeLog: > > * config/i386/i386.md (*notxor<mode>_1): New post_reload > define_insn_and_split. > (*notxorqi_1): Ditto. > --- a/gcc/config/i386/i386.md > +++ b/gcc/config/i386/i386.md > @@ -10826,6 +10826,39 @@ (define_insn "*<code><mode>_1" > (set_attr "type" "alu, alu, msklog") > (set_attr "mode" "<MODE>")]) > > +(define_insn_and_split "*notxor<mode>_1" > + [(set (match_operand:SWI248 0 "nonimmediate_operand" "=rm,r,?k") > + (not:SWI248 > + (xor:SWI248 > + (match_operand:SWI248 1 "nonimmediate_operand" "%0,0,k") > + (match_operand:SWI248 2 "<general_operand>" "r<i>,<m>,k")))) > + (clobber (reg:CC FLAGS_REG))] > + "ix86_binary_operator_ok (XOR, <MODE>mode, operands)" > + "#" > + "&& reload_completed" > + [(parallel > + [(set (match_dup 0) > + (xor:SWI248 (match_dup 1) (match_dup 2))) > + (clobber (reg:CC FLAGS_REG))]) > + (set (match_dup 0) > + (not:SWI248 (match_dup 1)))] > +{ > + if (MASK_REGNO_P (REGNO (operands[0]))) This causes --enable-checking=yes,rtl,extra regression on gcc.dg/store_merging_13.c test on x86_64-linux: .../gcc/testsuite/gcc.dg/store_merging_13.c: In function 'f13': .../gcc/testsuite/gcc.dg/store_merging_13.c:189:1: internal compiler error: RTL check: expected code 'reg', have 'mem' in rhs_regno, at rtl.h:1932 0x7b0c8f rtl_check_failed_code1(rtx_def const*, rtx_code, char const*, int, char const*) ../../gcc/rtl.cc:916 0x8e74be rhs_regno ../../gcc/rtl.h:1932 0x9785fd rhs_regno ./genrtl.h:120 0x9785fd gen_split_260(rtx_insn*, rtx_def**) ../../gcc/config/i386/i386.md:10846 0x23596dc split_insns(rtx_def*, rtx_insn*) ../../gcc/config/i386/i386.md:16392 0xfccd5a try_split(rtx_def*, rtx_insn*, int) ../../gcc/emit-rtl.cc:3799 0x132e9d8 split_insn ../../gcc/recog.cc:3384 0x13359d5 split_all_insns() ../../gcc/recog.cc:3488 0x1335ae8 execute ../../gcc/recog.cc:4412 Please submit a full bug report, with preprocessed source (by using -freport-bug). Please include the complete backtrace with any bug report. See <https://gcc.gnu.org/bugs/> for instructions. Fixed thusly. 2022-10-11 Jakub Jelinek <jakub@redhat.com> PR target/107185 * config/i386/i386.md (*notxor<mode>_1): Use MASK_REG_P (x) instead of MASK_REGNO_P (REGNO (x)).
2022-10-11Implement ABS_EXPR operator for frange.Aldy Hernandez2-0/+108
Implementing ABS_EXPR allows us to fold certain __builtin_inf calls since they are expanded into calls to involving ABS_EXPR. This is an adaptation of the integer version. gcc/ChangeLog: * range-op-float.cc (class foperator_abs): New. (floating_op_table::floating_op_table): Add ABS_EXPR entry. gcc/testsuite/ChangeLog: * gcc.dg/tree-ssa/vrp-float-abs-1.c: New test.
2022-10-11Implement op1_range operators for unordered comparisons.Aldy Hernandez1-0/+205
gcc/ChangeLog: * range-op-float.cc (foperator_unordered_le::op1_range): New. (foperator_unordered_le::op2_range): New. (foperator_unordered_gt::op1_range): New. (foperator_unordered_gt::op2_range): New. (foperator_unordered_ge::op1_range): New. (foperator_unordered_ge::op2_range): New. (foperator_unordered_equal::op1_range): New.
2022-10-11Share common ordered comparison code with UN*_EXPR.Aldy Hernandez1-12/+128
Most unordered comparisons can use the result from the ordered version, if the operands are known not to be NAN or if the result is true. gcc/ChangeLog: * range-op-float.cc (class foperator_unordered_lt): New. (class foperator_relop_unknown): Remove (class foperator_unordered_le): New. (class foperator_unordered_gt): New. (class foperator_unordered_ge): New. (class foperator_unordered_equal): New. (floating_op_table::floating_op_table): Replace all UN_EXPR entries with their appropriate fop_unordered_* counterpart.
2022-10-11Move TRUE case first in range-op.cc.Aldy Hernandez1-21/+21
It's incredibly annoying that some of the BRS_TRUE cases come after BRS_FALSE, if only because we're not consistent. Having random ordering increases the changes of thinkos when adapting the irange code to floats. gcc/ChangeLog: * range-op.cc (operator_equal::op1_range): Move BRS_TRUE case up. (operator_lt::op2_range): Same. (operator_le::op2_range): Same. (operator_gt::op2_range): Same. (operator_ge::op2_range): Same.
2022-10-11tree-optimization/107212 - SLP reduction of reduction pathsRichard Biener3-7/+63
The following fixes an issue with how we handle epilogue generation for SLP reductions of reduction paths where the actual live lanes are not "canonical". We need to make sure to identify all live lanes as reductions and thus have to iterate over all participating SLP lanes when walking the reduction SSA use-def chain. Also the previous attempt likely to mitigate such issue in vectorizable_live_operation is misguided and has to be removed. PR tree-optimization/107212 * tree-vect-loop.cc (vectorizable_reduction): Make sure to set STMT_VINFO_REDUC_DEF for all live lanes in a SLP reduction. (vectorizable_live_operation): Do not pun to the SLP node representative for reduction epilogue generation. * gcc.dg/vect/pr107212-1.c: New testcase. * gcc.dg/vect/pr107212-2.c: Likewise.
2022-10-11amdgcn: vector testsuite tweaksAndrew Stubbs14-14/+31
The testsuite needs a few tweaks following my patches to add multiple vector sizes for amdgcn. gcc/testsuite/ChangeLog: * gcc.dg/pr104464.c: Xfail on amdgcn. * gcc.dg/signbit-2.c: Likewise. * gcc.dg/signbit-5.c: Likewise. * gcc.dg/vect/bb-slp-68.c: Likewise. * gcc.dg/vect/bb-slp-cond-1.c: Change expectations on amdgcn. * gcc.dg/vect/bb-slp-subgroups-3.c: Likewise. * gcc.dg/vect/no-vfa-vect-depend-2.c: Change expectations for multiple vector sizes. * gcc.dg/vect/pr33953.c: Likewise. * gcc.dg/vect/pr65947-12.c: Likewise. * gcc.dg/vect/pr65947-13.c: Likewise. * gcc.dg/vect/pr80631-2.c: Likewise. * gcc.dg/vect/slp-reduc-4.c: Likewise. * gcc.dg/vect/trapv-vect-reduc-4.c: Likewise. * lib/target-supports.exp (available_vector_sizes): Add more sizes for amdgcn.
2022-10-11amdgcn: Add vector integer negate insnAndrew Stubbs1-0/+13
Another example of the vectorizer needing explicit insns where the scalar expander just works. gcc/ChangeLog: * config/gcn/gcn-valu.md (neg<mode>2): New define_expand.
2022-10-11amdgcn: vec_init for multiple vector sizesAndrew Stubbs2-26/+143
Implements vec_init when the input is a vector of smaller vectors, or of vector MEM types, or a smaller vector duplicated several times. gcc/ChangeLog: * config/gcn/gcn-valu.md (vec_init<V_ALL:mode><V_ALL_ALT:mode>): New. * config/gcn/gcn.cc (GEN_VN): Add andvNsi3, subvNsi3. (GEN_VNM): Add gathervNm_expr. (GEN_VN_NOEXEC): Add vec_seriesvNsi. (gcn_expand_vector_init): Add initialization of vectors from smaller vectors.
2022-10-11amdgcn: Add vec_extract for partial vectorsAndrew Stubbs3-1/+44
Add vec_extract expanders for all valid pairs of vector types. gcc/ChangeLog: * config/gcn/gcn-protos.h (get_exec): Add prototypes for two variants. * config/gcn/gcn-valu.md (vec_extract<V_ALL:mode><V_ALL_ALT:mode>): New define_expand. * config/gcn/gcn.cc (get_exec): Export the existing function. Add a new overload variant.
2022-10-11amdgcn: Resolve insn conditions at compile timeAndrew Stubbs2-4/+30
GET_MODE_NUNITS isn't a compile time constant, so we end up with many impossible insns in the machine description. Adding MODE_VF allows the insns to be eliminated completely. gcc/ChangeLog: * config/gcn/gcn-valu.md (<cvt_name><VCVT_MODE:mode><VCVT_FMODE:mode>2<exec>): Use MODE_VF. (<cvt_name><VCVT_FMODE:mode><VCVT_IMODE:mode>2<exec>): Likewise. * config/gcn/gcn.h (MODE_VF): New macro.
2022-10-11amdgcn: add multiple vector sizesAndrew Stubbs4-425/+938
The vectors sizes are simulated using implicit masking, but they make life easier for the autovectorizer and SLP passes. gcc/ChangeLog: * config/gcn/gcn-modes.def (VECTOR_MODE): Add new modes V32QI, V32HI, V32SI, V32DI, V32TI, V32HF, V32SF, V32DF, V16QI, V16HI, V16SI, V16DI, V16TI, V16HF, V16SF, V16DF, V8QI, V8HI, V8SI, V8DI, V8TI, V8HF, V8SF, V8DF, V4QI, V4HI, V4SI, V4DI, V4TI, V4HF, V4SF, V4DF, V2QI, V2HI, V2SI, V2DI, V2TI, V2HF, V2SF, V2DF. (ADJUST_ALIGNMENT): Likewise. * config/gcn/gcn-protos.h (gcn_full_exec): Delete. (gcn_full_exec_reg): Delete. (gcn_scalar_exec): Delete. (gcn_scalar_exec_reg): Delete. (vgpr_1reg_mode_p): Use inner mode to identify vector registers. (vgpr_2reg_mode_p): Likewise. (vgpr_vector_mode_p): Use VECTOR_MODE_P. * config/gcn/gcn-valu.md (V_QI, V_HI, V_HF, V_SI, V_SF, V_DI, V_DF, V_QIHI, V_1REG, V_INT_1REG, V_INT_1REG_ALT, V_FP_1REG, V_2REG, V_noQI, V_noHI, V_INT_noQI, V_INT_noHI, V_ALL, V_ALL_ALT, V_INT, V_FP): Add additional vector modes. (V64_SI, V64_DI, V64_ALL, V64_FP): New iterators. (scalar_mode, SCALAR_MODE, vnsi, VnSI, vndi, VnDI, sdwa): Add additional vector mode mappings. (mov<mode>): Implement vector length conversions. (ldexp<mode>3<exec>): Use VnSI. (frexp<mode>_exp2<exec>): Likewise. (VCVT_MODE, VCVT_FMODE, VCVT_IMODE): Add additional vector modes. (reduc_<reduc_op>_scal_<mode>): Use V64_ALL. (fold_left_plus_<mode>): Use V64_FP. (*<reduc_op>_dpp_shr_<mode>): Use V64_1REG. (*<reduc_op>_dpp_shr_<mode>): Use V64_DI. (*plus_carry_dpp_shr_<mode>): Use V64_INT_1REG. (*plus_carry_in_dpp_shr_<mode>): Use V64_SI. (*plus_carry_dpp_shr_<mode>): Use V64_DI. (mov_from_lane63_<mode>): Use V64_2REG. * config/gcn/gcn.cc (VnMODE): New function. (gcn_can_change_mode_class): Support multiple vector sizes. (gcn_modes_tieable_p): Likewise. (gcn_operand_part): Likewise. (gcn_scalar_exec): Delete function. (gcn_scalar_exec_reg): Delete function. (gcn_full_exec): Delete function. (gcn_full_exec_reg): Delete function. (gcn_inline_fp_constant_p): Support multiple vector sizes. (gcn_fp_constant_p): Likewise. (A): New macro. (GEN_VN_NOEXEC): New macro. (GEN_VNM_NOEXEC): New macro. (GEN_VN): New macro. (GEN_VNM): New macro. (GET_VN_FN): New macro. (CODE_FOR): New macro. (CODE_FOR_OP): New macro. (gen_mov_with_exec): Delete function. (gen_duplicate_load): Delete function. (gcn_expand_vector_init): Support multiple vector sizes. (strided_constant): Likewise. (gcn_addr_space_legitimize_address): Likewise. (gcn_expand_scalar_to_vector_address): Likewise. (gcn_expand_scaled_offsets): Likewise. (gcn_secondary_reload): Likewise. (gcn_valid_cvt_p): Likewise. (gcn_expand_builtin_1): Likewise. (gcn_make_vec_perm_address): Likewise. (gcn_vectorize_vec_perm_const): Likewise. (gcn_vector_mode_supported_p): Likewise. (gcn_autovectorize_vector_modes): New hook. (gcn_related_vector_mode): Support multiple vector sizes. (gcn_expand_dpp_shr_insn): Add FIXME comment. (gcn_md_reorg): Support multiple vector sizes. (print_reg): Likewise. (print_operand): Likewise. (TARGET_VECTORIZE_AUTOVECTORIZE_VECTOR_MODES): New hook.
2022-10-11vect: Teach vectorizer how to handle bitfield accessesAndre Vieira14-31/+1079
gcc/ChangeLog: * tree-if-conv.cc (if_convertible_loop_p_1): Move ordering of loop bb's from here... (tree_if_conversion): ... to here. Also call bitfield lowering when appropriate. (version_loop_for_if_conversion): Adapt to enable loop versioning when we only need to lower bitfields. (ifcvt_split_critical_edges): Relax condition of expected loop form as this is checked earlier. (get_bitfield_rep): New function. (lower_bitfield): Likewise. (bitfields_to_lower_p): Likewise. (need_to_lower_bitfields): New global boolean. (need_to_ifcvt): Likewise. * tree-vect-data-refs.cc (vect_find_stmt_data_reference): Improve diagnostic message. * tree-vect-patterns.cc (vect_recog_temp_ssa_var): Add default value for last parameter. (vect_recog_bitfield_ref_pattern): New. (vect_recog_bit_insert_pattern): New. gcc/testsuite/ChangeLog: * gcc.dg/vect/vect-bitfield-read-1.c: New test. * gcc.dg/vect/vect-bitfield-read-2.c: New test. * gcc.dg/vect/vect-bitfield-read-3.c: New test. * gcc.dg/vect/vect-bitfield-read-4.c: New test. * gcc.dg/vect/vect-bitfield-read-5.c: New test. * gcc.dg/vect/vect-bitfield-read-6.c: New test. * gcc.dg/vect/vect-bitfield-write-1.c: New test. * gcc.dg/vect/vect-bitfield-write-2.c: New test. * gcc.dg/vect/vect-bitfield-write-3.c: New test. * gcc.dg/vect/vect-bitfield-write-4.c: New test. * gcc.dg/vect/vect-bitfield-write-5.c: New test.
2022-10-11Add define_insn_and_split to support general version of "kxnor".liuhongt2-0/+109
For genereal_reg_operand, it will be splitted into xor + not. For mask_reg_operand, it will be splitted with UNSPEC_MASK_OP just like what we did for other logic operations. The patch will optimize xor+not to kxnor when possible. gcc/ChangeLog: PR target/107093 * config/i386/i386.md (*notxor<mode>_1): New post_reload define_insn_and_split. (*notxorqi_1): Ditto. gcc/testsuite/ChangeLog: * gcc.target/i386/pr107093.c: New test.
2022-10-11[PR107195] Set range to zero when nonzero mask is 0.Aldy Hernandez3-0/+36
When solving 0 = _15 & 1, we calculate _15 as: [irange] int [-INF, -2][0, +INF] NONZERO 0xfffffffe The known value of _15 is [0, 1] NONZERO 0x1 which is intersected with the above, yielding: [0, 1] NONZERO 0x0 This eventually gets copied to a _Bool [0, 1] NONZERO 0x0. This is problematic because here we have a bool which is zero, but returns false for irange::zero_p, since the latter does not look at nonzero bits. This causes logical_combine to assume the range is not-zero, and all hell breaks loose. I think we should just normalize a nonzero mask of 0 to [0, 0] at creation, thus avoiding all this. PR tree-optimization/107195 gcc/ChangeLog: * value-range.cc (irange::set_range_from_nonzero_bits): Set range to [0,0] when nonzero mask is 0. gcc/testsuite/ChangeLog: * gcc.dg/tree-ssa/pr107195-1.c: New test. * gcc.dg/tree-ssa/pr107195-2.c: New test.
2022-10-11Generic configury support for shared libs on VxWorksOlivier Hainque2-2/+55
This change adds the configury bits to activate the build of shared libs on VxWorks ports configured with --enable-shared, for libraries variants where this is generally supported (rtp, code model !large - currently not compatible with -fPIC). Set lt_cv_deplibs_check_method in libtool.m4, so the build of libraries know how to establish dependencies. This is useful in configurations such as aarch64 where proper support of LSE relies on accurate dependency information between libstdc++ and libgcc_s to begin with. Regenerate configure scripts to reflect libtool.m4 change. 2022-10-09 Olivier Hainque <hainque@adacore.com> * libtool.m4 (*vxworks*): When enable_shared, set dynamic_linker and friends for rtp !large. Assume the linker has the required abilities and set lt_cv_deplibs_check_method. gcc/ * config.gcc (*vxworks*): Add t-slibgcc fragment if enable_shared. libgcc/ * config.host (*vxworks*): When enable_shared, add libgcc and crtstuff "shared" fragments for rtp except large code model. (aarch64*-wrs-vxworks7*): Remove t-slibgcc-libgcc from the list of fragments. 2022-10-09 Olivier Hainque <hainque@adacore.com> gcc/ * configure: Regenerate. libatomic/ * configure: Regenerate. libbacktrace/ * configure: Regenerate. libcc1/ * configure: Regenerate. libffi/ * configure: Regenerate. libgfortran/ * configure: Regenerate. libgomp/ * configure: Regenerate. libitm/ * configure: Regenerate. libobjc/ * configure: Regenerate. liboffloadmic/ * configure: Regenerate. liboffloadmic/ * plugin/configure: Regenerate. libphobos/ * configure: Regenerate. libquadmath/ * configure: Regenerate. libsanitizer/ * configure: Regenerate. libssp/ * configure: Regenerate. libstdc++-v3/ * configure: Regenerate. libvtv/ * configure: Regenerate. lto-plugin/ * configure: Regenerate. zlib/ * configure: Regenerate.
2022-10-11Tigthen the addition of -lgcc_eh to vxworks_libgcc_specOlivier Hainque1-4/+44
This change refines VXWORKS_LIBGCC_SPEC wrt the inclusion of -lgcc_eh. Unless the compiler features support for dual sjlj and table based eh, libgcc_eh.a is available only with multilib variants for which we build a shared lib (mrtp on VxWorks). Rework logic to handle absence of libgcc_s for -mrtp -mcmodel=large, using a conditional expr kind of spec. The gthread support in libgcc_eh might resort to libgcc functions on some targets, e.g. cas synchronisation routines on aarch64. Arrange to append -lgcc also after -lgcc_eh in VXWORKS_LIBGCC_SPEC. 2022-10-09 Olivier Hainque <hainque@adacore.com> gcc/ * config/vxworks.h (VX_LGCC_EH_SO0, VX_LGCC_EH_SO1): New internal macros. (VXWORKS_LIBGCC_SPEC): Use them and document.
2022-10-11ranger: add override keywordMartin Liska1-1/+1
Fixes the following clang warning: gcc/gimple-range-op.cc:310:16: warning: 'fold_range' overrides a member function but is not marked 'override' [-Winconsistent-missing-override] gcc/ChangeLog: * gimple-range-op.cc: Add override keyword.
2022-10-10Fix PR107193.Eugene Rozenfeld1-3/+4
The bug was introduced in f30e9fd33e56a5a721346ea6140722e1b193db42. A variable (cur_locus_e) was incorrectly declared inside a loop. I also moved two other declarations (last and locus) down to make the code more clear. Tested on x86_64-pc-linux-gnu. gcc/ChangeLog: PR debug/107193 * tree-cfg.cc (assign_discriminators): Move declaration of cur_locus_e out of the loop.
2022-10-11Optimize nested permutation to single VEC_PERM_EXPR [PR54346]Liwei Xu2-0/+54
This patch implemented the optimization in PR 54346, which Merges c = VEC_PERM_EXPR <a, b, VCST0>; d = VEC_PERM_EXPR <c, c, VCST1>; to d = VEC_PERM_EXPR <a, b, NEW_VCST>; Bootstrapped and regtested on x86_64-pc-linux-gnu{-m32,} tree-ssa/forwprop-19.c fail to pass but I'm not sure whether it is ok to removed it. gcc/ChangeLog: PR tree-optimization/54346 * match.pd: Merge the index of VCST then generates the new vec_perm. gcc/testsuite/ChangeLog: * gcc.dg/pr54346.c: New test. Co-authored-by: liuhongt <hongtao.liu@intel.com>
2022-10-11[PR rtl-optimization/107182] Clear EDGE_CROSSING for jump->ret optimizationJeff Law1-0/+1
When turning a jump to a return into a return, we need to clear EDGE_CROSSING of the fallthru edge to prevent a checking failure. I considered not applying the transformation when the edge has EDGE_CROSSING set, but it still seems like we ought to eliminate the unnecessary jump in that case. gcc/ PR rtl-optimization/107182 * cfgrtl.cc (fixup_reorder_chain): When optimizing a jump to a return, clear EDGE_CROSSING on the appropriate edge.
2022-10-11RISC-V: move struct vector_type_info from *.h to *.cc and change "user_name" ↵Ju-Zhe Zhong3-25/+25
into "name". gcc/ChangeLog: * config/riscv/riscv-vector-builtins.cc (struct vector_type_info): Move from config/riscv/riscv-vector-builtins.h. (DEF_RVV_TYPE): Change USER_NAME to NAME. (register_vector_type): Change user_name to name. * config/riscv/riscv-vector-builtins.def (DEF_RVV_TYPE): Change USER_NAME to NAME. * config/riscv/riscv-vector-builtins.h (struct vector_type_info): Move to riscv-vector-builtins.cc. (DEF_RVV_TYPE): Change USER_NAME to NAME. Reviewed-by: Kito Cheng <kito.cheng@sifive.com>
2022-10-11RISC-V: Add missing vsetvl instruction type.Ju-Zhe Zhong1-1/+2
When implementing built-in framework, I notice I missed vsetvl instruction type, so add it in a single patch preparing for the following patches. gcc/ChangeLog: * config/riscv/riscv.md: Add vsetvl instruction type. Reviewed-by: Kito Cheng <kito.cheng@sifive.com>
2022-10-11Daily bump.GCC Administrator6-1/+240
2022-10-10c++: Lambda context manglingNathan Sidwell10-6/+71
VAR and FIELD decls can become part of a lambda context, when the lambda is 'attached' to that entity (It's a C++20 ODR thing that was discovered with modules, but is actually separate.) We were not marking those decls as substitution candidates, leading to demangling failures and variance from other compilers. This patch bumps the ABI, and adds the contexts them to the substitution table. This is the intent of the ABI. gcc/ * common.opt (-fabi-version=): Document 18. * doc/invoke.texi (-fabi-version): Document 18. gcc/c-family/ * c-opts.cc (c_common_post_options): Bump abi to 18. gcc/cp/ * mangle.cc (write_prefix): Add VAR_DECL & FIELD_DECL to substitution table under abi=18. Note possible mismatch. gcc/testsuite/ * g++.dg/abi/lambda-ctx1-17.C: New. * g++.dg/abi/lambda-ctx1-18.C: New. * g++.dg/abi/lambda-ctx1-18vs17.C: New. * g++.dg/abi/lambda-ctx1.h: New. * g++.dg/abi/lambda-vis.C: Adjust expected mangles. * g++.dg/abi/macro0.C: Adjust.