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2024-04-18Refactored sym-exec: Added comments, changed members' names ...devel/jlaw/crcMariam Arutunian6-125/+265
2023-03-21Many more comments. Use a vec<bool> when we only care about 0/1.Jeff Law2-8/+79
2023-03-21Use word mode.Jeff Law35-53/+63
Add assert for constant argument Adjust some comments in crc expander
2023-03-21NFC: Formatting fixesJeff Law1-31/+35
2023-03-21Changes in CRC code generation v6:Mariam Arutunian4-13/+102
- Corrected expand_crc_table_based to work on crc-2-diff-size.c test. - Added check for clmul case in gcc/simplify-rtx.cc. - Added some functions in riscv.cc for reversed CRC. Changes in testsuit: - Added crc-2-diff-size.c test
2023-03-21Changes in CRC code generation v5:Mariam Arutunian6-79/+131
- Pass polynomial instead of quotient to the CRC_IFN (added build_polynomial_without_1 function). - Fixed the problem of unsigned number being treated as signed, occuring from expand_crc_optab_fn function. - Completed table_based CRC generation for 16 bit CRC. - Changed the asm sequence of CRC generation with clmul instruction. Changes in Testsuit: - Added main function in crc-5.c test
2023-03-21Changes in CRC code generation v4:Mariam Arutunian7-30/+124
- Added table generation part. - Added clmul, clmulr, clmulh insns. - Removed UNSPEC_CRC16 from define_expand crc*. - Modified gf2n_poly_long_div_quotient function.
2023-03-21Changes in CRC code generation v3:Mariam Arutunian3-18/+95
- Added polynomial long division in GF (2^n) algorithm (gf2n_poly_long_div_quotient function). Changes in Extract polynomial v3: - Split extract_poly_and_create_lfsr function into two functions. - Changed extract_poly_and_create_lfsr function's name to extract_polynomial, returnes pair of values, one for calculated polynomial, the other for the tree.
2023-03-21CRC code generation v2:Mariam Arutunian4-172/+81
- Complete expand_crc_optab_fn function. - Added RTL generation for CRC (crcqihi4). But yet it doesn't generate the correct sequence. - Changed the code for removing the body of CRC function. - Added direct_internal_fn_supported_p check before adding the IFN_CRC.
2023-03-21CRC code generation v1: - Added CRC_IFN, with not complete function body. - ↵Mariam Arutunian4-0/+265
Removed basic blocks of the CRC function and added IFN call returning its value.
2023-03-21Addition in testsuit: - Added gcc/testsuite/gcc.dg/crc-misc.c test - In ↵Mariam Arutunian2-1/+25
crc-26 added new check for "gencrc function calculates CRC" massage.
2023-03-21Changes in LFSR matching v6:Mariam Arutunian2-31/+59
- Added support of matching CRC value negated case. Changed in CRC detection v7: - For CRC detection, consider only nondebug statments. Changes in Traverse and execute CRC function v11: - Chnaged the way of checking the tree being INTEGER_CST and its convertion to integer.
2023-03-21sym-exec v14 - Added utilities for complementing bits of value which has ↵matevos2-0/+135
specified origin
2023-03-21Changes in CRC detection v6:Mariam Arutunian7-46/+242
- Fixed memeory leaks caused by get_loop_body_in_dom_order function. - Added function, to find if in if implementations. The case, when after checking the MSB/LSB being 1, there is another check, where crc;s value is modified. - Refactored and added missing description of can_not_be_shift_of_crc function. Changes in Traverse and execute CRC function v10: - Added a check for debug statements, skipped those statments during symbolic execution. Changes in LFSR creation v6: - Return null if there is no one in the polynomial, when searching for last one in last_set_bit. - Create resuced size LFSR in create_forward_lfsr function. Addition in testsuit: - Added crc-26.c, crc-crc-reverse.c, crc-crc.c, crc-if-in-if.c tests.
2023-03-21sym-exec v13 - Some code refactored - Fixed memory leaks - Added checks for ↵matevos20-213/+211
return value and polynomials in crc-* tests
2023-03-21Changes in CRC detection v5:Mariam Arutunian8-1600/+133
- If before/after xor there is shift with other value than one, don't say it's not CRC. - In the list of acceptable operations between xor and shift added minus and plus operations. Changes in Traverse and execute CRC function v9: - Check INTEGER_CST case in assign statement - Deleted gcc/symb-execute-all-paths.cc/h. Changes in LFSR matching v5: - Added check for crc^data^1 and crc^data^1 neighbor bits case. - Refactored check_xor_right_1_case function. Changes in LFSR creation v2: - Added last_set_bit function, to get last set bit of the polynomial and create smaller LFSR if needed. - Create crc_value without new, and don't delete. - Delete lfsr at the end. Added crc-25.c, crc-callerid.c, crc-cc1541.c tests.
2023-03-21sym-exec v12: - Made expression to work with various argument sizes - Fixed ↵matevos6-91/+136
bits creation for constants - Some code refactored and fixed
2023-03-21Refactored all files. Renamed gcc/symb-execute-all-paths.cc/h files to ↵Mariam Arutunian30-105/+1805
gcc/gcc/crc_verification.cc/h. Changes in Traverse and execute CRC function v8: - Delete states and final_states vectores more deeply. Changes in LFSR matching v4: - Added support of CRC mixed case matching. Changes in Testsuit: - Added checks of found CRC in crc-2,4,5,7,8 tests. - Changed CRC detection search messages. Changes in sym_exec v12: - Added clear_states function.
2023-03-21sym-exec v11 - Fixed assignment expression - Removed condition_type enum: ↵matevos8-409/+365
use tree_code instead - Some style issues fixed
2023-03-21Changes in LFSR matching v3:Mariam Arutunian4-170/+453
- Added support of matching for the case when crc and data are xored in the loop. - Adjusted conditions' check. - Refactored the code. Changed in testsuit: - Added checks for verified CRCs Changes in sym-exec v11: - Added is_a_helper from bit_expression* to derived types.
2023-03-21sym-exec v10 - Added sign number support - Done a fix in XOR optimization - ↵matevos18-810/+863
Done some refactoring
2023-03-21Chnages in testsuit: - Added -fdisable-tree-phiopt2 -fdisable-tree-phiopt3 ↵Mariam Arutunian5-103/+385
flags in test1 and test24. Changes in Extract polynomial v2 and CRC detection v4: - Specify loop type by writing 'class loop'. Changes in LFSR matching v2: - Wrote function to check conditions. - Added acceptable_diff, may_be_xors_condition, marginal_case_matches, match_lfsr_case1, state_matches_lfsr. - Modified condition_is_true/false, is_a_valid_xor_one functions. - Old state_matches_lfsr function name changed to state_matches_lfsr_all_cases.
2023-03-21sym-exec v9 - Added conditions printing support - Optimized conditions ↵matevos16-92/+377
adding when only some of argument's bits are constants - Added basic checks for sym-exec some crc-*.c tests
2023-03-21Added LFSR matching v1:Mariam Arutunian5-3/+186
- Added functions to check whether LFSR and returned states match (it's not complete). Changes in Traverse and execute CRC function v7: - Pass correct tree to do_mem_ref function Changes in Sym_exec v8: - Added get_first_value () function in state class to get state's first value.
2023-03-21sym-exec v7 - Fixed constant value to bit conversion - Fixed shift left and ↵matevos2-76/+95
xor expressions - Optimized sym_bit ^ 0 = sym_bit
2023-03-21Added LFSR creation v1:Mariam Arutunian5-98/+225
- Calculate value of the LFSR state. Changes in Sym_exec v6: - Changed all const memeber functions to static. Changes in Extract polynomial v2: - Changed extract_polynomial to extract_poly_and_create_lfsr, which calculates polynomial and creates LFSR. - Moved some instructions from extract_polynomial to execute_crc_loop. Changes in CRC detection v5: - Instead extract_polynomial, Call extract_poly_and_create_lfsr, check return value and print the LFSR.
2023-03-21Added Extract polynomial v1: - Execute crc loop with concete numbers to ↵Mariam Arutunian3-6/+203
calculate polynomial. Changes in CRC detection v4: - Keep gphi * instead of gimple * for data and crc.
2023-03-21Changes in Traverse and execute CRC function v6: - Changed symbolic ↵Mariam Arutunian5-132/+352
execution, to execute only those paths which may be executed. I.e., if the condition is true/false only execute that path, if the condition depends on symbolic values - execute both paths. - Check functions' return values. Stop the analysis if needed. - Added destructor. - Added SSA_NAME and VAR_DECL support for the assign statement. Changes in Testsuit v2: - Changed crc-1.c test name to crc-24.c. - Added crc-1.c test.
2023-03-21sym-exec v5: - Added last added condition status saving support - Save only ↵matevos6-151/+427
conditions with symbolic elements - Added support for printing expression tree - Save origin of symbolic values so we can identify it later - Fixed constant values' bits construction - Define destination var if it is not define - Fixed addition and subtraction - Added some utility functions - Fixed condition adding - Added Cast expression support - Added comments for some functions
2023-03-21Changes in CRC detection v3: - Changed get_dep and other functions called in ↵Mariam Arutunian2-97/+222
it (names are changed to continue_to_check_dep_for_if, continue_to_check_dep_for_xor). To check whether xor statement is for crc calculation and whether if's condition is for checking MSB/LSB being 1, go up by def-chain until the loop boundaries. The continue_to_check_dep_for_xor function keeps phi_statements if they are from loop header (it may be crc's definition). Modified algorithms detects crc's phi statement in case of there is an if in if within the loop. The continue_to_check_dep_for_if besides checking whether the if is for checking MSB/LSB being one, also tries to determine which phi statement is for crc and which one for the data. - Added set_loop_statements_not_visited function to unset only statement of the loop (as only statements within the loop may be visited). Addition in testsuit: - Added new crc test (crc-23.c).
2023-03-21Changes in Traverse and execute CRC function v5: - Determine phi's value ↵Mariam Arutunian2-63/+55
depending on the execution path. - Keep edges instead of bb for the function traversal. Edge information is needed for fast phi result determination.
2023-03-21sym-exec v4: - Fixed condition adding - Returning expression doing and ↵matevos3-214/+763
condition adding status - Handled global variables - Added Multiplication expression support - Updated addition and subtraction expression based of full adder - Added pointers basic addition, subtraction and dereferencing support - Some code refactored
2023-03-21Changes in Traverse and execute CRC function v4: - Don't add values for ↵Mariam Arutunian2-13/+137
virtual operands from phi statement. - Added resolve_condition function to solve/keep conditions and fork the state. - Added keep_return_val_and_conditions function, to keep the calculated return value, and the conditions under which the function was executed.
2023-03-21Changes in Traverse and execute CRC function v3: - Assign value to phi's ↵Mariam Arutunian2-55/+116
result. Keep previous executed bb, to determine phi's value for the executed path. - Changed make_symbolic_func_args_and_sizes function, modified output massages. - Added checks for POINTER_PLUS_EXPR, POINTER_DIFF_EXPR, MEM_REF, NOP_EXP cases in assignment statement. - For variable declaration call make_symbolic, instead of decl_var
2023-03-21sym-exec v3: - Refactored code and fixed style - Added util functions - ↵matevos6-415/+713
Fixed expression creation cases when one argument is constant - Fixed symbolic bit declaration
2023-03-21Changes in Traverse and execute CRC function v2: - Added support of ↵Mariam Arutunian4-66/+304
traversing all paths of the function. - Added functions to check statement type and execute some expressions. Changes in CRC detection v2: - Added and changed comments to clarify the behavior of crc detection pass. - Ended all sentences with '.'. - Added static member cond_true_is_checked_for_bit_one. - Changed get_return_value_size function name to set_return_value_size. - Don't print return value size in set_return_value_size function. - Call execute_function after detecting CRC-like function
2023-03-21sym-exec v2: - Done refactoring in expression.* and state.* - Added ↵Mariam Arutunian9-236/+802
is-a-helper test functions for expression classes - Added initial version of conditions
2023-03-21Traverse and execute CRC function v1: - Added get_function_local_ssa_vars ↵Mariam Arutunian3-0/+135
and make_symbolic_function_arguments_and_sizes functions.
2023-03-21symb_exec v1: - Added gcc/sym-exec/expression.h/.cc and ↵Mariam Arutunian6-1/+1178
gcc/sym-exec/state.h/cc. State is for keeping functionvariables' states on a path. Expression file contains classes for keeping values.
2023-03-21CRC detection v1: - Added pass_crc_optimization. Detects CRC-like functions. ↵Mariam Arutunian29-0/+1454
- Added tests to check the correctness of the pass.
2023-03-05Fortran: fix CLASS attribute handling [PR106856]Harald Anlauf7-36/+229
gcc/fortran/ChangeLog: PR fortran/106856 * class.cc (gfc_build_class_symbol): Handle update of attributes of existing class container. (gfc_find_derived_vtab): Fix several memory leaks. (find_intrinsic_vtab): Ditto. * decl.cc (attr_decl1): Manage update of symbol attributes from CLASS attributes. * primary.cc (gfc_variable_attr): OPTIONAL shall not be taken or updated from the class container. * symbol.cc (free_old_symbol): Adjust management of symbol versions to not prematurely free array specs while working on the declation of CLASS variables. gcc/testsuite/ChangeLog: PR fortran/106856 * gfortran.dg/interface_41.f90: Remove dg-pattern from valid testcase. * gfortran.dg/class_74.f90: New test. * gfortran.dg/class_75.f90: New test. Co-authored-by: Tobias Burnus <tobias@codesourcery.com>
2023-03-05testsuite: Fix up syntax error in scan-tree-dump-times target selectorJakub Jelinek1-2/+2
On aarch64, powerpc64le and s390x-linux I'm seeing another syntax error which didn't show up on x86_64-linux nor i686-linux: ERROR: gcc.dg/vect/slp-perm-8.c -flto -ffat-lto-objects: error executing dg-final: syntax error in target selector "target ! vect_load_lanes && vect_partial_vectors_usage_1 && ! s390_vx" ERROR: gcc.dg/vect/slp-perm-8.c: error executing dg-final: syntax error in target selector "target ! vect_load_lanes && vect_partial_vectors_usage_1 && ! s390_vx" The following patch fixes that. 2023-03-05 Jakub Jelinek <jakub@redhat.com> * gcc.dg/vect/slp-perm-8.c: Fix up syntax error in scan-tree-dump-times target selector.
2023-03-06RISC-V: Fix ICE for avl_single-86/avl_single-88/avl_single-90Ju-Zhe Zhong1-1/+7
If prop is demand of vsetvl instruction and reaching doesn't demand AVL. We don't backward propagate since vsetvl instruction has no side effects. FAIL: gcc.target/riscv/rvv/vsetvl/avl_single-86.c -Og -g (internal compiler error: Segmentation fault) FAIL: gcc.target/riscv/rvv/vsetvl/avl_single-86.c -Og -g (test for excess errors) FAIL: gcc.target/riscv/rvv/vsetvl/avl_single-88.c -Og -g (internal compiler error: Segmentation fault) FAIL: gcc.target/riscv/rvv/vsetvl/avl_single-88.c -Og -g (test for excess errors) FAIL: gcc.target/riscv/rvv/vsetvl/avl_single-90.c -Og -g (internal compiler error: Segmentation fault) FAIL: gcc.target/riscv/rvv/vsetvl/avl_single-90.c -Og -g (test for excess errors) gcc/ChangeLog: * config/riscv/riscv-vsetvl.cc (reg_available_p): Fix bug. (pass_vsetvl::backward_demand_fusion): Ditto.
2023-03-06RISC-V: Implement ZKSH and ZKSED extensionsLiao Shihua7-0/+140
This patch supports Zksh and Zksed extension. It includes instruction's machine description and built-in funtions. gcc/ChangeLog: * config/riscv/crypto.md (riscv_sm3p0_<mode>): Add ZKSED's and ZKSH's instructions. (riscv_sm3p1_<mode>): New. (riscv_sm4ed_<mode>): New. (riscv_sm4ks_<mode>): New. * config/riscv/riscv-builtins.cc (AVAIL): Add ZKSED's and ZKSH's AVAIL. * config/riscv/riscv-scalar-crypto.def (RISCV_BUILTIN): Add ZKSED's and ZKSH's built-in functions. gcc/testsuite/ChangeLog: * gcc.target/riscv/zksed32.c: New test. * gcc.target/riscv/zksed64.c: New test. * gcc.target/riscv/zksh32.c: New test. * gcc.target/riscv/zksh64.c: New test. Co-Authored-By: SiYu Wu <siyu@isrc.iscas.ac.cn>
2023-03-06RISC-V: Implement ZKNH extensionLiao Shihua6-0/+263
This patch supports Zknh extension. It includes instruction's machine description and built-in funtions. gcc/ChangeLog: * config/riscv/crypto.md (riscv_sha256sig0_<mode>): Add ZKNH's instructions. (riscv_sha256sig1_<mode>): New. (riscv_sha256sum0_<mode>): New. (riscv_sha256sum1_<mode>): New. (riscv_sha512sig0h): New. (riscv_sha512sig0l): New. (riscv_sha512sig1h): New. (riscv_sha512sig1l): New. (riscv_sha512sum0r): New. (riscv_sha512sum1r): New. (riscv_sha512sig0): New. (riscv_sha512sig1): New. (riscv_sha512sum0): New. (riscv_sha512sum1): New. * config/riscv/riscv-builtins.cc (AVAIL): And ZKNH's AVAIL. * config/riscv/riscv-scalar-crypto.def (RISCV_BUILTIN): And ZKNH's built-in functions. (DIRECT_BUILTIN): Add new. gcc/testsuite/ChangeLog: * gcc.target/riscv/zknh-sha256.c: New test. * gcc.target/riscv/zknh-sha512-32.c: New test. * gcc.target/riscv/zknh-sha512-64.c: New test. Co-Authored-By: SiYu Wu <siyu@isrc.iscas.ac.cn>
2023-03-06RISC-V: Implement ZKND and ZKNE extensionsLiao Shihua8-0/+251
This patch supports Zkne and Zknd extension. It includes instruction's machine description and built-in funtions. gcc/ChangeLog: * config/riscv/constraints.md (D03): Add constants of bs and rnum. (DsA): New. * config/riscv/crypto.md (riscv_aes32dsi): Add ZKND's and ZKNE's instructions. (riscv_aes32dsmi): New. (riscv_aes64ds): New. (riscv_aes64dsm): New. (riscv_aes64im): New. (riscv_aes64ks1i): New. (riscv_aes64ks2): New. (riscv_aes32esi): New. (riscv_aes32esmi): New. (riscv_aes64es): New. (riscv_aes64esm): New. * config/riscv/riscv-builtins.cc (AVAIL): Add ZKND's and ZKNE's AVAIL. * config/riscv/riscv-scalar-crypto.def (DIRECT_BUILTIN): Add ZKND's and ZKNE's built-in functions. gcc/testsuite/ChangeLog: * gcc.target/riscv/zknd32.c: New test. * gcc.target/riscv/zknd64.c: New test. * gcc.target/riscv/zkne32.c: New test. * gcc.target/riscv/zkne64.c: New test. Co-Authored-By: SiYu Wu <siyu@isrc.iscas.ac.cn>
2023-03-06RISC-V: Implement ZBKB, ZBKC and ZBKX extensionsLiao Shihua11-11/+327
This patch supports Zkbk, Zbkc and Zkbx extension. It includes instruction's machine description and built-in funtions. It is worth mentioning that this patch only adds instructions in Zbkb but no longer in Zbb. If any instructions both in Zbb and Zbkb, they will be generated by code generator instead of built-in functions. gcc/ChangeLog: * config/riscv/bitmanip.md: Add ZBKB's instructions. * config/riscv/riscv-builtins.cc (AVAIL): Add new. * config/riscv/riscv.md: Add new type for crypto instructions. * config/riscv/crypto.md: Add Scalar Cryptography extension's machine description file. * config/riscv/riscv-scalar-crypto.def: Add Scalar Cryptography extension's built-in function file. gcc/testsuite/ChangeLog: * gcc.target/riscv/zbkb32.c: New test. * gcc.target/riscv/zbkb64.c: New test. * gcc.target/riscv/zbkc32.c: New test. * gcc.target/riscv/zbkc64.c: New test. * gcc.target/riscv/zbkx32.c: New test. * gcc.target/riscv/zbkx64.c: New test. Co-Authored-By: SiYu Wu <siyu@isrc.iscas.ac.cn>
2023-03-06RISC-V: Add prototypes for RISC-V Crypto built-in functionsLiao Shihua2-0/+18
This patch adds prototypes for RISC-V Crypto built-in functions. gcc/ChangeLog: * config/riscv/riscv-builtins.cc (RISCV_FTYPE_NAME2): New. (RISCV_FTYPE_NAME3): New. (RISCV_ATYPE_QI): New. (RISCV_ATYPE_HI): New. (RISCV_FTYPE_ATYPES2): New. (RISCV_FTYPE_ATYPES3): New. * config/riscv/riscv-ftypes.def (2): New. (3): New. Co-Authored-By: SiYu Wu <siyu@isrc.iscas.ac.cn>
2023-03-05RISC-V: costs: miscomputed shiftadd_cost triggering synth_mult [PR/108987]Vineet Gupta3-4/+14
This showed up as dynamic icount regression in SPEC 531.deepsjeng with upstream gcc (vs. gcc 12.2). gcc was resorting to synthetic multiply using shift+add(s) even when multiply had clear cost benefit. |00000000000133b8 <see(state_t*, int, int, int, int) [clone .constprop.0]+0x382>: | 133b8: srl a3,a1,s6 | 133bc: and a3,a3,s5 | 133c0: slli a4,a3,0x9 | 133c4: add a4,a4,a3 | 133c6: slli a4,a4,0x9 | 133c8: add a4,a4,a3 | 133ca: slli a3,a4,0x1b | 133ce: add a4,a4,a3 vs. gcc 12 doing something lke below. |00000000000131c4 <see(state_t*, int, int, int, int) [clone .constprop.0]+0x35c>: | 131c4: ld s1,8(sp) | 131c6: srl a3,a1,s4 | 131ca: and a3,a3,s11 | 131ce: mul a3,a3,s1 Bisected this to f90cb39235c4 ("RISC-V: costs: support shift-and-add in strength-reduction"). The intent was to optimize cost for shift-add-pow2-{1,2,3} corresponding to bitmanip insns SH*ADD, but ended up doing that for all shift values which seems to favor synthezing multiply among others. The bug itself is trivial, IN_RANGE() calling pow2p_hwi() which returns bool vs. exact_log2() returning power of 2. This fix also requires update to the test introduced by the same commit which now generates MUL vs. synthesizing it. gcc/ChangeLog: * config/riscv/riscv.cc (riscv_rtx_costs): Fixed IN_RANGE() to use exact_log2(). gcc/testsuite/ChangeLog: * gcc.target/riscv/zba-shNadd-07.c: f2(i*783) now generates MUL vs. 5 insn sh1add+slli+add+slli+sub. * gcc.target/riscv/pr108987.c: New test. Signed-off-by: Vineet Gupta <vineetg@rivosinc.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@vrull.eu>
2023-03-05RISC-V: Add RVV misc intrinsic supportJu-Zhe Zhong17-386/+3610
Co-authored-by: kito-cheng <kito.cheng@sifive.com> gcc/ChangeLog: * config/riscv/predicates.md (vector_any_register_operand): New predicate. * config/riscv/riscv-c.cc (riscv_check_builtin_call): New function. (riscv_register_pragmas): Add builtin function check call. * config/riscv/riscv-protos.h (RVV_VUNDEF): Adapt macro. (check_builtin_call): New function. * config/riscv/riscv-vector-builtins-bases.cc (class vundefined): New class. (class vreinterpret): Ditto. (class vlmul_ext): Ditto. (class vlmul_trunc): Ditto. (class vset): Ditto. (class vget): Ditto. (BASE): Ditto. * config/riscv/riscv-vector-builtins-bases.h: Ditto. * config/riscv/riscv-vector-builtins-functions.def (vluxei8): Change name. (vluxei16): Ditto. (vluxei32): Ditto. (vluxei64): Ditto. (vloxei8): Ditto. (vloxei16): Ditto. (vloxei32): Ditto. (vloxei64): Ditto. (vsuxei8): Ditto. (vsuxei16): Ditto. (vsuxei32): Ditto. (vsuxei64): Ditto. (vsoxei8): Ditto. (vsoxei16): Ditto. (vsoxei32): Ditto. (vsoxei64): Ditto. (vundefined): Add new intrinsic. (vreinterpret): Ditto. (vlmul_ext): Ditto. (vlmul_trunc): Ditto. (vset): Ditto. (vget): Ditto. * config/riscv/riscv-vector-builtins-shapes.cc (struct return_mask_def): New class. (struct narrow_alu_def): Ditto. (struct reduc_alu_def): Ditto. (struct vundefined_def): Ditto. (struct misc_def): Ditto. (struct vset_def): Ditto. (struct vget_def): Ditto. (SHAPE): Ditto. * config/riscv/riscv-vector-builtins-shapes.h: Ditto. * config/riscv/riscv-vector-builtins-types.def (DEF_RVV_EEW8_INTERPRET_OPS): New def. (DEF_RVV_EEW16_INTERPRET_OPS): Ditto. (DEF_RVV_EEW32_INTERPRET_OPS): Ditto. (DEF_RVV_EEW64_INTERPRET_OPS): Ditto. (DEF_RVV_X2_VLMUL_EXT_OPS): Ditto. (DEF_RVV_X4_VLMUL_EXT_OPS): Ditto. (DEF_RVV_X8_VLMUL_EXT_OPS): Ditto. (DEF_RVV_X16_VLMUL_EXT_OPS): Ditto. (DEF_RVV_X32_VLMUL_EXT_OPS): Ditto. (DEF_RVV_X64_VLMUL_EXT_OPS): Ditto. (DEF_RVV_LMUL1_OPS): Ditto. (DEF_RVV_LMUL2_OPS): Ditto. (DEF_RVV_LMUL4_OPS): Ditto. (vint16mf4_t): Ditto. (vint16mf2_t): Ditto. (vint16m1_t): Ditto. (vint16m2_t): Ditto. (vint16m4_t): Ditto. (vint16m8_t): Ditto. (vint32mf2_t): Ditto. (vint32m1_t): Ditto. (vint32m2_t): Ditto. (vint32m4_t): Ditto. (vint32m8_t): Ditto. (vint64m1_t): Ditto. (vint64m2_t): Ditto. (vint64m4_t): Ditto. (vint64m8_t): Ditto. (vuint16mf4_t): Ditto. (vuint16mf2_t): Ditto. (vuint16m1_t): Ditto. (vuint16m2_t): Ditto. (vuint16m4_t): Ditto. (vuint16m8_t): Ditto. (vuint32mf2_t): Ditto. (vuint32m1_t): Ditto. (vuint32m2_t): Ditto. (vuint32m4_t): Ditto. (vuint32m8_t): Ditto. (vuint64m1_t): Ditto. (vuint64m2_t): Ditto. (vuint64m4_t): Ditto. (vuint64m8_t): Ditto. (vint8mf4_t): Ditto. (vint8mf2_t): Ditto. (vint8m1_t): Ditto. (vint8m2_t): Ditto. (vint8m4_t): Ditto. (vint8m8_t): Ditto. (vuint8mf4_t): Ditto. (vuint8mf2_t): Ditto. (vuint8m1_t): Ditto. (vuint8m2_t): Ditto. (vuint8m4_t): Ditto. (vuint8m8_t): Ditto. (vint8mf8_t): Ditto. (vuint8mf8_t): Ditto. (vfloat32mf2_t): Ditto. (vfloat32m1_t): Ditto. (vfloat32m2_t): Ditto. (vfloat32m4_t): Ditto. (vfloat64m1_t): Ditto. (vfloat64m2_t): Ditto. (vfloat64m4_t): Ditto. * config/riscv/riscv-vector-builtins.cc (DEF_RVV_TYPE): Ditto. (DEF_RVV_EEW8_INTERPRET_OPS): Ditto. (DEF_RVV_EEW16_INTERPRET_OPS): Ditto. (DEF_RVV_EEW32_INTERPRET_OPS): Ditto. (DEF_RVV_EEW64_INTERPRET_OPS): Ditto. (DEF_RVV_X2_VLMUL_EXT_OPS): Ditto. (DEF_RVV_X4_VLMUL_EXT_OPS): Ditto. (DEF_RVV_X8_VLMUL_EXT_OPS): Ditto. (DEF_RVV_X16_VLMUL_EXT_OPS): Ditto. (DEF_RVV_X32_VLMUL_EXT_OPS): Ditto. (DEF_RVV_X64_VLMUL_EXT_OPS): Ditto. (DEF_RVV_LMUL1_OPS): Ditto. (DEF_RVV_LMUL2_OPS): Ditto. (DEF_RVV_LMUL4_OPS): Ditto. (DEF_RVV_TYPE_INDEX): Ditto. (required_extensions_p): Adapt for new intrinsic support/ (get_required_extensions): New function. (check_required_extensions): Ditto. (unsigned_base_type_p): Remove. (rvv_arg_type_info::get_scalar_ptr_type): New function. (get_mode_for_bitsize): Remove. (rvv_arg_type_info::get_scalar_const_ptr_type): New function. (rvv_arg_type_info::get_base_vector_type): Ditto. (rvv_arg_type_info::get_function_type_index): Ditto. (DEF_RVV_BASE_TYPE): New def. (function_builder::apply_predication): New class. (function_expander::mask_mode): Ditto. (function_checker::function_checker): Ditto. (function_checker::report_non_ice): Ditto. (function_checker::report_out_of_range): Ditto. (function_checker::require_immediate): Ditto. (function_checker::require_immediate_range): Ditto. (function_checker::check): Ditto. (check_builtin_call): Ditto. * config/riscv/riscv-vector-builtins.def (DEF_RVV_TYPE): New def. (DEF_RVV_BASE_TYPE): Ditto. (DEF_RVV_TYPE_INDEX): Ditto. (vbool64_t): Ditto. (vbool32_t): Ditto. (vbool16_t): Ditto. (vbool8_t): Ditto. (vbool4_t): Ditto. (vbool2_t): Ditto. (vbool1_t): Ditto. (vuint8mf8_t): Ditto. (vuint8mf4_t): Ditto. (vuint8mf2_t): Ditto. (vuint8m1_t): Ditto. (vuint8m2_t): Ditto. (vint8m4_t): Ditto. (vuint8m4_t): Ditto. (vint8m8_t): Ditto. (vuint8m8_t): Ditto. (vint16mf4_t): Ditto. (vuint16mf2_t): Ditto. (vuint16m1_t): Ditto. (vuint16m2_t): Ditto. (vuint16m4_t): Ditto. (vuint16m8_t): Ditto. (vint32mf2_t): Ditto. (vuint32m1_t): Ditto. (vuint32m2_t): Ditto. (vuint32m4_t): Ditto. (vuint32m8_t): Ditto. (vuint64m1_t): Ditto. (vuint64m2_t): Ditto. (vuint64m4_t): Ditto. (vuint64m8_t): Ditto. (vfloat32mf2_t): Ditto. (vfloat32m1_t): Ditto. (vfloat32m2_t): Ditto. (vfloat32m4_t): Ditto. (vfloat32m8_t): Ditto. (vfloat64m1_t): Ditto. (vfloat64m4_t): Ditto. (vector): Move it def. (scalar): Ditto. (mask): Ditto. (signed_vector): Ditto. (unsigned_vector): Ditto. (unsigned_scalar): Ditto. (vector_ptr): Ditto. (scalar_ptr): Ditto. (scalar_const_ptr): Ditto. (void): Ditto. (size): Ditto. (ptrdiff): Ditto. (unsigned_long): Ditto. (long): Ditto. (eew8_index): Ditto. (eew16_index): Ditto. (eew32_index): Ditto. (eew64_index): Ditto. (shift_vector): Ditto. (double_trunc_vector): Ditto. (quad_trunc_vector): Ditto. (oct_trunc_vector): Ditto. (double_trunc_scalar): Ditto. (double_trunc_signed_vector): Ditto. (double_trunc_unsigned_vector): Ditto. (double_trunc_unsigned_scalar): Ditto. (double_trunc_float_vector): Ditto. (float_vector): Ditto. (lmul1_vector): Ditto. (widen_lmul1_vector): Ditto. (eew8_interpret): Ditto. (eew16_interpret): Ditto. (eew32_interpret): Ditto. (eew64_interpret): Ditto. (vlmul_ext_x2): Ditto. (vlmul_ext_x4): Ditto. (vlmul_ext_x8): Ditto. (vlmul_ext_x16): Ditto. (vlmul_ext_x32): Ditto. (vlmul_ext_x64): Ditto. * config/riscv/riscv-vector-builtins.h (DEF_RVV_BASE_TYPE): New def. (struct function_type_info): New function. (struct rvv_arg_type_info): Ditto. (class function_checker): New class. (rvv_arg_type_info::get_scalar_type): New function. (rvv_arg_type_info::get_vector_type): Ditto. (function_expander::ret_mode): New function. (function_checker::arg_mode): Ditto. (function_checker::ret_mode): Ditto. * config/riscv/t-riscv: Add generator. * config/riscv/vector-iterators.md: New iterators. * config/riscv/vector.md (vundefined<mode>): New pattern. (@vundefined<mode>): Ditto. (@vreinterpret<mode>): Ditto. (@vlmul_extx2<mode>): Ditto. (@vlmul_extx4<mode>): Ditto. (@vlmul_extx8<mode>): Ditto. (@vlmul_extx16<mode>): Ditto. (@vlmul_extx32<mode>): Ditto. (@vlmul_extx64<mode>): Ditto. (*vlmul_extx2<mode>): Ditto. (*vlmul_extx4<mode>): Ditto. (*vlmul_extx8<mode>): Ditto. (*vlmul_extx16<mode>): Ditto. (*vlmul_extx32<mode>): Ditto. (*vlmul_extx64<mode>): Ditto. * config/riscv/genrvv-type-indexer.cc: New file. gcc/testsuite/ChangeLog: * gcc.target/riscv/rvv/base/vlmul_v.c: New test. Co-authored-by: kito-cheng <kito.cheng@sifive.com>
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