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fortran/expr.c:497))
2017-10-27 Steven G. Kargl <kargl@gcc.gnu.org>
PR fortran/82620
* match.c (gfc_match_allocate): Exit early on syntax error.
2017-10-27 Steven G. Kargl <kargl@gcc.gnu.org>
PR fortran/82620
* gfortran.dg/allocate_error_7.f90: new test.
From-SVN: r254193
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From-SVN: r254192
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2017-10-27 Paolo Carlini <paolo.carlini@oracle.com>
PR c++/82218
* g++.dg/cpp1y/constexpr-82218.C: New.
From-SVN: r254189
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* bb-reorder.c (find_traces_1_round): Fix off-by-one index.
Move comment around. Do not reset best_edge for a copiable
destination if the copy would cause a partition change.
(better_edge_p): Remove redundant check.
From-SVN: r254188
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* gcc.target/i386/pr82196-1.c (dg-options): Add -mno-avx.
From-SVN: r254186
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* config/i386/i386-protos.h (ix86_fp_compare_mode): Remove prototype.
From-SVN: r254184
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functions that have _Float<N> and...
[gcc]
2017-10-27 Michael Meissner <meissner@linux.vnet.ibm.com>
* builtins.c (CASE_MATHFN_FLOATN): New helper macro to add cases
for math functions that have _Float<N> and _Float<N>X variants.
(mathfn_built_in_2): Add support for math functions that have
_Float<N> and _Float<N>X variants.
(DEF_INTERNAL_FLT_FLOATN_FN): New helper macro.
(expand_builtin_mathfn_ternary): Add support for fma with
_Float<N> and _Float<N>X variants.
(expand_builtin): Likewise.
(fold_builtin_3): Likewise.
* builtins.def (DEF_EXT_LIB_FLOATN_NX_BUILTINS): New macro to
create math function _Float<N> and _Float<N>X variants as external
library builtins.
(BUILT_IN_COPYSIGN _Float<N> and _Float<N>X variants) Use
DEF_EXT_LIB_FLOATN_NX_BUILTINS to make built-in functions using
the __builtin_ prefix and if not strict ansi, without the prefix.
(BUILT_IN_FABS _Float<N> and _Float<N>X variants): Likewise.
(BUILT_IN_FMA _Float<N> and _Float<N>X variants): Likewise.
(BUILT_IN_FMAX _Float<N> and _Float<N>X variants): Likewise.
(BUILT_IN_FMIN _Float<N> and _Float<N>X variants): Likewise.
(BUILT_IN_NAN _Float<N> and _Float<N>X variants): Likewise.
(BUILT_IN_SQRT _Float<N> and _Float<N>X variants): Likewise.
* builtin-types.def (BT_FN_FLOAT16_FLOAT16_FLOAT16_FLOAT16): New
function signatures for fma _Float<N> and _Float<N>X variants.
(BT_FN_FLOAT32_FLOAT32_FLOAT32_FLOAT32): Likewise.
(BT_FN_FLOAT64_FLOAT64_FLOAT64_FLOAT64): Likewise.
(BT_FN_FLOAT128_FLOAT128_FLOAT128_FLOAT128): Likewise.
(BT_FN_FLOAT32X_FLOAT32X_FLOAT32X_FLOAT32X): Likewise.
(BT_FN_FLOAT64X_FLOAT64X_FLOAT64X_FLOAT64X): Likewise.
(BT_FN_FLOAT128X_FLOAT128X_FLOAT128X_FLOAT128X): Likewise.
* gencfn-macros.c (print_case_cfn): Add support for math functions
that have _Float<N> and _Float<N>X variants.
(print_define_operator_list): Likewise.
(fltfn_suffixes): Likewise.
(main): Likewise.
* internal-fn.def (DEF_INTERNAL_FLT_FLOATN_FN): New helper macro
for math functions that have _Float<N> and _Float<N>X variants.
(SQRT): Add support for sqrt, copysign, fmin and fmax _Float<N>
and _Float<N>X variants.
(COPYSIGN): Likewise.
(FMIN): Likewise.
(FMAX): Likewise.
* fold-const.c (tree_call_nonnegative_warnv_p): Add support for
copysign, fma, fmax, fmin, and sqrt _Float<N> and _Float<N>X
variants.
(integer_valued_read_call_p): Likewise.
* fold-const-call.c (fold_const_call_ss): Likewise.
(fold_const_call_sss): Add support for copysign, fmin, and fmax
_Float<N> and _Float<N>X variants.
(fold_const_call_ssss): Add support for fma _Float<N> and
_Float<N>X variants.
* gimple-ssa-backprop.c (backprop::process_builtin_call_use): Add
support for copysign and fma _Float<N> and _Float<N>X variants.
(backprop::process_builtin_call_use): Likewise.
* tree-call-cdce.c (can_test_argument_range); Add support for
sqrt _Float<N> and _Float<N>X variants.
(edom_only_function): Likewise.
(get_no_error_domain): Likewise.
* tree-ssa-math-opts.c (internal_fn_reciprocal): Likewise.
* tree-ssa-reassoc.c (attempt_builtin_copysign): Add support for
copysign _Float<N> and _Float<N>X variants.
* config/rs6000/rs6000-builtin.def (SQRTF128): Delete, this is now
handled by machine independent code.
(FMAF128): Likewise.
* doc/cpp.texi (Common Predefined Macros): Document defining
__FP_FAST_FMAF<N> and __FP_FAST_FMAF<N>X if the backend supports
fma _Float<N> and _Float<N>X variants.
[gcc/c]
2017-10-27 Michael Meissner <meissner@linux.vnet.ibm.com>
* c-decl.c (header_for_builtin_fn): Add support for copysign, fma,
fmax, fmin, and sqrt _Float<N> and _Float<N>X variants.
[gcc/c-family]
2017-10-27 Michael Meissner <meissner@linux.vnet.ibm.com>
* c-cppbuiltin.c (mode_has_fma): Add support for PowerPC KFmode.
(c_cpp_builtins): If a machine has a fast fma _Float<N> and
_Float<N>X variant, define __FP_FAST_FMA<N> and/or
__FP_FAST_FMA<N>X.
[gcc/testsuite]
2017-10-27 Michael Meissner <meissner@linux.vnet.ibm.com>
* gcc.target/powerpc/float128-hw.c: Add support for all 4 FMA
variants. Check various conversions to/from float128. Check
negation. Use {\m...\M} in the tests.
* gcc.target/powerpc/float128-hw2.c: New test for implicit
_Float128 math functions.
* gcc.target/powerpc/float128-hw3.c: New test for strict ansi mode
not implicitly adding the _Float128 math functions.
* gcc.target/powerpc/float128-fma2.c: Delete, test is no longer
valid.
* gcc.target/powerpc/float128-sqrt2.c: Likewise.
From-SVN: r254168
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PR target/82692
* config/i386/i386-modes.def (CCFPU): Remove definition.
* config/i386/i386.c (put_condition_mode): Remove CCFPU mode handling.
(ix86_cc_modes_compatible): Ditto.
(ix86_expand_carry_flag_compare): Ditto.
(ix86_expand_int_movcc): Ditto.
(ix86_expand_int_addcc): Ditto.
(ix86_reverse_condition): Ditto.
(ix86_unordered_fp_compare): Rename from ix86_fp_compare_mode.
Return true/false for unordered/ordered fp comparisons.
(ix86_cc_mode): Always return CCFPmode for float mode comparisons.
(ix86_prepare_fp_compare_args): Update for rename.
(ix86_expand_fp_compare): Update for rename. Generate unordered
compare RTXes wrapped with UNSPEC_NOTRAP unspec.
(ix86_expand_sse_compare_and_jump): Ditto.
* config/i386/predicates.md (fcmov_comparison_operator):
Remove CCFPU mode handling.
(ix86_comparison_operator): Ditto.
(ix86_carry_flag_operator): Ditto.
* config/i386/i386.md (UNSPEC_NOTRAP): New unspec.
(*cmpu<mode>_i387): Wrap compare RTX with UNSPEC_NOTRAP unspec.
(*cmpu<mode>_cc_i387): Ditto.
(FPCMP): Remove mode iterator.
(unord): Remove mode attribute.
(unord_subst): New define_subst transformation
(unord): New define_subst attribute.
(unordered): Ditto.
(*cmpi<unord><MODEF:mode>): Rewrite using unord_subst transformation.
(*cmpi<unord>xf_i387): Ditto.
* config/i386/sse.md (<sse>_<unord>comi<round_saeonly_name>): Merge
from <sse>_comi<round_saeonly_name> and <sse>_ucomi<round_saeonly_name>
using unord_subst transformation.
* config/i386/subst.md (SUBST_A): Remove CCFP and CCFPU modes.
(round_saeonly): Also handle CCFP mode.
* reg-stack.c (subst_stack_regs_pat): Handle UNSPEC_NOTRAP unspec.
Remove UNSPEC_SAHF unspec handling.
testsuite/ChangeLog:
PR target/82692
* gcc.dg/torture/pr82692.c: New test.
From-SVN: r254167
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From-SVN: r254166
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[testsuite]
2017-10-27 Will Schmidt <will_schmidt@vnet.ibm.com>
* gcc.target/powerpc/fold-vec-neg-char.c: New.
* gcc.target/powerpc/fold-vec-neg-floatdouble.c: New.
* gcc.target/powerpc/fold-vec-neg-int.c: New.
* gcc.target/powerpc/fold-vec-neg-longlong.c: New.
* gcc.target/powerpc/fold-vec-neg-short.c: New.
From-SVN: r254164
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2017-10-27 Paolo Carlini <paolo.carlini@oracle.com>
* pt.c (invalid_nontype_parm_type_p): Return a bool instead of an int.
From-SVN: r254158
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2017-10-27 Thomas Koenig <tkoenig@gcc.gnu.org>
PR fortran/56342
* simplify.c (is_constant_array_expr): If the expression is
a parameter array, call gfc_simplify_expr.
2017-10-27 Thomas Koenig <tkoenig@gcc.gnu.org>
PR fortran/56342
* gfortran.dg/matmul_const.f90: New test.
From-SVN: r254157
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* gimple-ssa-sprintf.c: Include domwalk.h.
(class sprintf_dom_walker): New class, derived from dom_walker.
(sprintf_dom_walker::before_dom_children): New function.
(struct call_info): Moved into sprintf_dom_walker class
(compute_formath_length, handle_gimple_call): Likewise.
(sprintf_length::execute): Call the dominator walker rather
than walking the statements.
From-SVN: r254156
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statement locations.
* tree-vrp.c (check_all_array_refs): Do not use wi->info to smuggle
gimple statement locations.
(check_array_bounds): Corresponding changes. Get the statement's
location directly from wi->stmt.
From-SVN: r254154
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The documentation for the "-mabi" argument on RISC-V was incorrect. We
chose to treat this as a documentation bug rather than a code bug, and
to make the documentation match what GCC currently does. In the
process, I also improved the documentation a bit.
Thanks to Alex Bradbury for finding the bug!
PR target/82717: https://gcc.gnu.org/bugzilla/show_bug.cgi?id=82717
gcc/ChangeLog
2017-10-27 Palmer Dabbelt <palmer@dabbelt.com>
PR target/82717
* doc/invoke.texi (RISC-V) <-mabi>: Correct and improve.
From-SVN: r254153
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and newer CPUs.
* config/i386/x86-tune.def (X86_TUNE_PARTIAL_REG_DEPENDENCY,
X86_TUNE_MOVX): Disable for Haswell and newer CPUs.
From-SVN: r254152
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From-SVN: r254147
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-ftree-loop-vectorize -ftree-slp-vectorize (works fine with -O2))
PR target/82703
* config/i386/i386-protos.h (maybe_get_pool_constant): Removed.
* config/i386/i386.c (maybe_get_pool_constant): Removed.
(ix86_split_to_parts): Use avoid_constant_pool_reference instead of
maybe_get_pool_constant.
* config/i386/predicates.md (zero_extended_scalar_load_operand):
Likewise.
* gcc.dg/pr82703.c: New test.
From-SVN: r254145
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* doc/install.texi (Specific, i?86-*-solaris2.10): Simplify gas
2.26 caveat. Update gas and gld versions.
(Specific, *-*-solaris2*): Update binutils version. Remove caveat
reference.
From-SVN: r254143
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2017-10-27 Prathamesh Kulkarni <prathamesh.kulkarni@linaro.org>
* cgraph.h (set_malloc_flag): Declare.
* cgraph.c (set_malloc_flag_1): New function.
(set_malloc_flag): Likewise.
* ipa-fnsummary.h (ipa_call_summary): Add new field is_return_callee.
* ipa-fnsummary.c (ipa_call_summary::reset): Set is_return_callee to
false.
(read_ipa_call_summary): Add support for reading is_return_callee.
(write_ipa_call_summary): Stream is_return_callee.
* ipa-inline.c (ipa_inline): Remove call to ipa_free_fn_summary.
* ipa-pure-const.c: Add headers ssa.h, alloc-pool.h, symbol-summary.h,
ipa-prop.h, ipa-fnsummary.h.
(pure_const_names): Change to static.
(malloc_state_e): Define.
(malloc_state_names): Define.
(funct_state_d): Add field malloc_state.
(varying_state): Set malloc_state to STATE_MALLOC_BOTTOM.
(check_retval_uses): New function.
(malloc_candidate_p): Likewise.
(analyze_function): Add support for malloc attribute.
(pure_const_write_summary): Stream malloc_state.
(pure_const_read_summary): Add support for reading malloc_state.
(dump_malloc_lattice): New function.
(propagate_malloc): New function.
(warn_function_malloc): New function.
(ipa_pure_const::execute): Call propagate_malloc and
ipa_free_fn_summary.
(pass_local_pure_const::execute): Add support for malloc attribute.
* ssa-iterators.h (RETURN_FROM_IMM_USE_STMT): New macro.
* doc/invoke.texi: Document Wsuggest-attribute=malloc.
testsuite/
* gcc.dg/ipa/propmalloc-1.c: New test-case.
* gcc.dg/ipa/propmalloc-2.c: Likewise.
* gcc.dg/ipa/propmalloc-3.c: Likewise.
From-SVN: r254140
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2017-10-27 Paolo Carlini <paolo.carlini@oracle.com>
PR c++/71385
* g++.dg/concepts/pr71385.C: New.
From-SVN: r254139
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expression)
2017-10-27 Paolo Carlini <paolo.carlini@oracle.com>
PR c++/80739
* g++.dg/cpp1y/constexpr-80739.C: New.
From-SVN: r254138
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2017-10-27 Martin Liska <mliska@suse.cz>
PR gcov-profile/82457
* doc/invoke.texi: Document that one needs a non-strict ISO mode
for fork-like functions to be properly instrumented.
From-SVN: r254137
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2017-10-27 Richard Biener <rguenther@suse.de>
PR middle-end/81659
* tree-eh.c (pass_lower_eh_dispatch::execute): Free dominator
info when we redirected EH.
* g++.dg/torture/pr81659.C: New testcase.
From-SVN: r254136
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2017-10-26 Michael Collison <michael.collison@arm.com>
* config/aarch64/aarch64.md(<optab>_trunc><vf><GPI:mode>2):
New pattern.
(<optab>_trunchf<GPI:mode>2: New pattern.
(<optab>_trunc<vgp><GPI:mode>2: New pattern.
* config/aarch64/iterators.md (wv): New mode attribute.
(vf, VF): New mode attributes.
(vgp, VGP): New mode attributes.
(s): Update attribute with SImode and DImode prefixes.
* testsuite/gcc.target/aarch64/fix_trunc1.c: New testcase.
* testsuite/gcc.target/aarch64/vect-vcvt.c: Fix scan-assembler
directives to allow float or integer destination registers for
fcvtz[su].
From-SVN: r254133
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From-SVN: r254131
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Otherwise we can get a crash in the backend.
Test case is https://golang.org/cl/73790.
Reviewed-on: https://go-review.googlesource.com/73810
From-SVN: r254126
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2017-10-26 Sandra Loosemore <sandra@codesourcery.com>
gcc/
* config/nios2/constraints.md ("S"): Match r0rel_constant_p too.
* config/nios2/nios2-protos.h (r0rel_constant_p): Declare.
* config/nios2/nios2.c: (nios2_r0rel_sec_regex): New.
(nios2_option_overide): Initialize it. Don't allow R0-relative
addressing with PIC.
(nios2_rtx_costs): Handle r0rel_constant_p like gprel_constant_p.
(nios2_symbolic_constant_p): Likewise.
(nios2_legitimate_address_p): Likewise.
(nios2_r0rel_section_name_p): New.
(nios2_symbol_ref_in_r0rel_data_p): New.
(nios2_emit_move_sequence): Handle r0rel_constant_p.
(r0rel_constant_p): New.
(nios2_print_operand_address): Handle r0rel_constant_p.
(nios2_cdx_narrow_form_p): Likewise.
* config/nios2/nios2.opt (mr0rel-sec=): New option.
* doc/invoke.texi (Option Summary): Add -mr0rel-sec.
(Nios II Options): Document -mr0rel-sec.
gcc/testsuite/
* gcc.target/nios2/gpopt-r0rel-sec.c: New.
From-SVN: r254124
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2017-10-26 Sandra Loosemore <sandra@codesourcery.com>
gcc/
* config/nios2/nios2.c: Include xregex.h.
(nios2_gprel_sec_regex): New.
(nios2_option_overide): Initialize it. Don't allow GP-relative
addressing with PIC.
(nios2_small_section_name_p): Check for regex match.
* config/nios2/nios2.opt (mgprel-sec=): New option.
* doc/invoke.texi (Option Summary): Add -mgprel-sec.
(Nios II Options): Document -mgprel-sec.
gcc/testsuite/
* gcc.target/nios2/gpopt-gprel-sec.c: New.
From-SVN: r254123
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gcc/
* doc/invoke.texi (-fdebug-prefix-map): Expand documentation.
From-SVN: r254122
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gcc/
* doc/invoke.texi (-fdebug-prefix-map): Expand documentation.
From-SVN: r254121
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2017-10-26 Tom de Vries <tom@codesourcery.com>
PR tree-optimization/82707
* gimple.c (gimple_copy): Fix unsharing of
GIMPLE_OMP_{SINGLE,TARGET,TEAMS}.
From-SVN: r254120
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gcc/
* config/i386/avx512fintrin.h (_mm512_cmpeq_pd_mask,
_mm512_cmple_pd_mask, _mm512_cmplt_pd_mask,
_mm512_cmpneq_pd_mask, _mm512_cmpnle_pd_mask,
_mm512_cmpnlt_pd_mask, _mm512_cmpord_pd_mask,
_mm512_cmpunord_pd_mask, _mm512_mask_cmpeq_pd_mask,
_mm512_mask_cmple_pd_mask, _mm512_mask_cmplt_pd_mask,
_mm512_mask_cmpneq_pd_mask, _mm512_mask_cmpnle_pd_mask,
_mm512_mask_cmpnlt_pd_mask, _mm512_mask_cmpord_pd_mask,
_mm512_mask_cmpunord_pd_mask, _mm512_cmpeq_ps_mask,
_mm512_cmple_ps_mask, _mm512_cmplt_ps_mask,
_mm512_cmpneq_ps_mask, _mm512_cmpnle_ps_mask,
_mm512_cmpnlt_ps_mask, _mm512_cmpord_ps_mask,
_mm512_cmpunord_ps_mask, _mm512_mask_cmpeq_ps_mask,
_mm512_mask_cmple_ps_mask, _mm512_mask_cmplt_ps_mask,
_mm512_mask_cmpneq_ps_mask, _mm512_mask_cmpnle_ps_mask,
_mm512_mask_cmpnlt_ps_mask, _mm512_mask_cmpord_ps_mask,
_mm512_mask_cmpunord_ps_mask): New intrinsics.
gcc/testsuite/
* gcc.target/i386/avx512f-vcmpps-1.c (_mm512_cmpeq_ps_mask,
_mm512_cmple_ps_mask, _mm512_cmplt_ps_mask,
_mm512_cmpneq_ps_mask, _mm512_cmpnle_ps_mask,
_mm512_cmpnlt_ps_mask, _mm512_cmpord_ps_mask,
_mm512_cmpunord_ps_mask, _mm512_mask_cmpeq_ps_mask,
_mm512_mask_cmple_ps_mask, _mm512_mask_cmplt_ps_mask,
_mm512_mask_cmpneq_ps_mask, _mm512_mask_cmpnle_ps_mask,
_mm512_mask_cmpnlt_ps_mask, _mm512_mask_cmpord_ps_mask,
_mm512_mask_cmpunord_ps_mask): Test new intrinsics.
* gcc.target/i386/avx512f-vcmpps-2.c (_mm512_cmpeq_ps_mask,
_mm512_cmple_ps_mask, _mm512_cmplt_ps_mask,
_mm512_cmpneq_ps_mask, _mm512_cmpnle_ps_mask,
_mm512_cmpnlt_ps_mask, _mm512_cmpord_ps_mask,
_mm512_cmpunord_ps_mask, _mm512_mask_cmpeq_ps_mask,
_mm512_mask_cmple_ps_mask, _mm512_mask_cmplt_ps_mask,
_mm512_mask_cmpneq_ps_mask, _mm512_mask_cmpnle_ps_mask,
_mm512_mask_cmpnlt_ps_mask, _mm512_mask_cmpord_ps_mask,
_mm512_mask_cmpunord_ps_mask): Test new intrinsics.
* gcc.target/i386/avx512f-vcmppd-1.c (_mm512_cmpeq_pd_mask,
_mm512_cmple_pd_mask, _mm512_cmplt_pd_mask,
_mm512_cmpneq_pd_mask, _mm512_cmpnle_pd_mask,
_mm512_cmpnlt_pd_mask, _mm512_cmpord_pd_mask,
_mm512_cmpunord_pd_mask, _mm512_mask_cmpeq_pd_mask,
_mm512_mask_cmple_pd_mask, _mm512_mask_cmplt_pd_mask,
_mm512_mask_cmpneq_pd_mask, _mm512_mask_cmpnle_pd_mask,
_mm512_mask_cmpnlt_pd_mask, _mm512_mask_cmpord_pd_mask,
_mm512_mask_cmpunord_pd_mask): Test new intrinsics.
* gcc.target/i386/avx512f-vcmppd-2.c (_mm512_cmpeq_pd_mask,
_mm512_cmple_pd_mask, _mm512_cmplt_pd_mask,
_mm512_cmpneq_pd_mask, _mm512_cmpnle_pd_mask,
_mm512_cmpnlt_pd_mask, _mm512_cmpord_pd_mask,
_mm512_cmpunord_pd_mask, _mm512_mask_cmpeq_pd_mask,
_mm512_mask_cmple_pd_mask, _mm512_mask_cmplt_pd_mask,
_mm512_mask_cmpneq_pd_mask, _mm512_mask_cmpnle_pd_mask,
_mm512_mask_cmpnlt_pd_mask, _mm512_mask_cmpord_pd_mask,
_mm512_mask_cmpunord_pd_mask): Test new intrinsics.
From-SVN: r254118
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[gcc]
2017-10-26 Michael Meissner <meissner@linux.vnet.ibm.com>
* config/rs6000/aix.h (TARGET_IEEEQUAD_DEFAULT): Set long double
default to IBM.
* config/rs6000/darwin.h (TARGET_IEEEQUAD_DEFAULT): Likewise.
* config/rs6000/rs6000.opt (-mabi=ieeelongdouble): Move the
warning to rs6000.c. Remove the Undocumented flag, since it has
been documented.
(-mabi=ibmlongdouble): Likewise.
* config/rs6000/rs6000.c (TARGET_IEEEQUAD_DEFAULT): If it is not
already set, set the default format for long double.
(rs6000_debug_reg_global): Print whether long double is IBM or
IEEE.
(rs6000_option_override_internal): Rework setting long double
format. Only warn if the user is changing the long double default
and they did not use -Wno-psabi.
* doc/invoke.texi (PowerPC options): Update the documentation for
-mabi=ieeelongdouble and -mabi=ibmlongdouble.
From-SVN: r254116
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This patch adds helper functions that say which of the two modes
involved in a subreg is the larger, preferring the outer mode in
the event of a tie. It also converts IRA and reload to track modes
instead of byte sizes, since this is slightly more convenient when
variable-sized modes are added later.
2017-10-26 Richard Sandiford <richard.sandiford@linaro.org>
Alan Hayward <alan.hayward@arm.com>
David Sherwood <david.sherwood@arm.com>
gcc/
* rtl.h (wider_subreg_mode): New function.
* ira.h (ira_sort_regnos_for_alter_reg): Take a machine_mode *
rather than an unsigned int *.
* ira-color.c (regno_max_ref_width): Replace with...
(regno_max_ref_mode): ...this new variable.
(coalesced_pseudo_reg_slot_compare): Update accordingly.
Use wider_subreg_mode.
(ira_sort_regnos_for_alter_reg): Likewise. Take a machine_mode *
rather than an unsigned int *.
* lra-constraints.c (uses_hard_regs_p): Use wider_subreg_mode.
(process_alt_operands): Likewise.
(invariant_p): Likewise.
* lra-spills.c (assign_mem_slot): Likewise.
(add_pseudo_to_slot): Likewise.
* lra.c (collect_non_operand_hard_regs): Likewise.
(add_regs_to_insn_regno_info): Likewise.
* reload1.c (regno_max_ref_width): Replace with...
(regno_max_ref_mode): ...this new variable.
(reload): Update accordingly. Update call to
ira_sort_regnos_for_alter_reg.
(alter_reg): Update to use regno_max_ref_mode. Call wider_subreg_mode.
(init_eliminable_invariants): Update to use regno_max_ref_mode.
(scan_paradoxical_subregs): Likewise.
Co-Authored-By: Alan Hayward <alan.hayward@arm.com>
Co-Authored-By: David Sherwood <david.sherwood@arm.com>
From-SVN: r254115
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The current frame code combines the separate concepts of a frame chain
(saving old FP,LR in a record and pointing new FP to it) and a frame
pointer used to access locals. Add emit_frame_chain to the aarch64_frame
descriptor and use it in the prolog and epilog code. For now just
initialize it as before, so generated code is identical.
Also correctly set EXIT_IGNORE_STACK. The current AArch64 epilog code
restores SP from FP if alloca is used. If a frame pointer is used but
there is no alloca, SP must remain valid for the epilog to work correctly.
gcc/
* config/aarch64/aarch64.h (EXIT_IGNORE_STACK): Set if alloca is used.
(aarch64_frame): Add emit_frame_chain boolean.
* config/aarch64/aarch64.c (aarch64_frame_pointer_required)
Move eh_return case to aarch64_layout_frame.
(aarch64_layout_frame): Initialize emit_frame_chain.
(aarch64_expand_prologue): Use emit_frame_chain.
From-SVN: r254114
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This patch makes some changes to the frame layout in order to simplify
stack probing. We want to use the save of LR as a probe in any non-leaf
function. With shrinkwrapping we may only save LR before a call, so it
is useful to define a fixed location in the callee-saves. So force LR at
the bottom of the callee-saves even with -fomit-frame-pointer.
Also remove a rarely used frame layout that saves the callee-saves first
with -fomit-frame-pointer. Doing so allows the store of LR to be used as
a valid stack probe in all frames.
gcc/
* config/aarch64/aarch64.c (aarch64_layout_frame):
Ensure LR is always stored at the bottom of the callee-saves.
Remove rarely used frame layout which saves callee-saves at top of
frame, so the store of LR can be used as a valid probe in all cases.
From-SVN: r254112
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In https://gcc.gnu.org/ml/gcc-patches/2017-06/msg01125.html Jiong
pointed out some addressing inefficiencies due to a recent change in
regcprop (https://gcc.gnu.org/ml/gcc-patches/2017-04/msg00775.html).
This patch improves aarch64_legitimize_address_displacement to split
unaligned offsets of TImode and TFmode accesses. The resulting code
is better and no longer relies on the original regcprop optimization.
For the test we now produce:
add x1, sp, 4
stp xzr, xzr, [x1, 24]
rather than:
mov x1, sp
add x1, x1, 28
stp xzr, xzr, [x1]
gcc/
* config/aarch64/aarch64.c (aarch64_legitimize_address_displacement):
Improve unaligned TImode/TFmode base/offset split.
testsuite/
* gcc.target/aarch64/ldp_stp_unaligned_2.c: New file.
From-SVN: r254111
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This patch uses df_read_modify_subreg_p to check whether writing
to a subreg would preserve some of the existing contents.
This has the effect of putting more emphasis on the
REGMODE_NATURAL_SIZE-based definition of whether something can be
partially modified, instead of using UNITS_PER_WORD unconditionally.
This becomes important for SVE, where UNITS_PER_WORD has no
significance for subregs of multi-register LD2/ST2, LD3/ST3 and
LD4/ST4 tuples.
2017-10-26 Richard Sandiford <richard.sandiford@linaro.org>
Alan Hayward <alan.hayward@arm.com>
David Sherwood <david.sherwood@arm.com>
gcc/
* caller-save.c (mark_referenced_regs): Use read_modify_subreg_p.
* combine.c (find_single_use_1): Likewise.
(expand_field_assignment): Likewise.
(move_deaths): Likewise.
* lra-constraints.c (simplify_operand_subreg): Likewise.
(curr_insn_transform): Likewise.
* lra.c (collect_non_operand_hard_regs): Likewise.
(add_regs_to_insn_regno_info): Likewise.
* rtlanal.c (reg_referenced_p): Likewise.
(covers_regno_no_parallel_p): Likewise.
Co-Authored-By: Alan Hayward <alan.hayward@arm.com>
Co-Authored-By: David Sherwood <david.sherwood@arm.com>
From-SVN: r254110
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2017-10-26 Richard Sandiford <richard.sandiford@linaro.org>
gcc/
* wide-int-print.cc (print_hex): Loop based on extract_uhwi.
Don't print any bits outside the precision of the value.
* wide-int.cc (test_printing): Add some new tests.
From-SVN: r254109
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After r254010 we now add -gcolumn-info by default, that means the tests
in gcc.target/arm/require-pic-register-loc.c need adjusting to not expect
to see column zero.
gcc/testsuite/
* gcc.target/arm/require-pic-register-loc.c: Use wider regex for
column information.
From-SVN: r254106
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https://gcc.gnu.org/ml/gcc-patches/2017-10/msg01935.html
* decl.c (sort_labels): Restore function.
(pop_labels): Sort labels
(identify_goto): Add translation markup.
From-SVN: r254104
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* configure.ac (gcc_cv_as_ix86_xbrace_comment): Check if assembler
supports -xbrace_comment option.
* configure: Regenerate.
* config.in: Regenerate.
* config/i386/sol2.h (ASM_XBRACE_COMMENT_SPEC): Define.
(ASM_CPU_SPEC): Use it.
From-SVN: r254103
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rtx...
TARGET_STATIC_RTX_ALIGNMENT
This patch adds a new hook that gives the preferred alignment for
a static rtx, so that we don't need to query the front end in
force_const_mem.
2017-10-26 Richard Sandiford <richard.sandiford@linaro.org>
gcc/
* target.def (static_rtx_alignment): New hook.
* targhooks.h (default_static_rtx_alignment): Declare.
* targhooks.c (default_static_rtx_alignment): New function.
* doc/tm.texi.in (TARGET_STATIC_RTX_ALIGNMENT): New hook.
* doc/tm.texi: Regenerate.
* varasm.c (force_const_mem): Use targetm.static_rtx_alignment
instead of targetm.constant_alignment. Remove call to
set_mem_attributes.
* config/cris/cris.c (TARGET_STATIC_RTX_ALIGNMENT): Redefine.
(cris_preferred_mininum_alignment): New function, split out from...
(cris_constant_alignment): ...here.
(cris_static_rtx_alignment): New function.
* config/i386/i386.c (ix86_static_rtx_alignment): New function,
split out from...
(ix86_constant_alignment): ...here.
(TARGET_STATIC_RTX_ALIGNMENT): Redefine.
* config/mmix/mmix.c (TARGET_STATIC_RTX_ALIGNMENT): Redefine.
(mmix_static_rtx_alignment): New function.
* config/spu/spu.c (spu_static_rtx_alignment): New function.
(TARGET_STATIC_RTX_ALIGNMENT): Redefine.
From-SVN: r254102
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* gcc.dg/vect/vect-reduc-dot-s8a.c
(dg-additional-options, dg-require-effective-target): Add +dotprod.
* gcc.dg/vect/vect-reduc-dot-u8a.c
(dg-additional-options, dg-require-effective-target): Add +dotprod.
From-SVN: r254101
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* lib/target-supports.exp
(check_effective_target_arm_v8_2a_dotprod_neon_ok_nocache): New.
(check_effective_target_arm_v8_2a_dotprod_neon_ok): New.
(add_options_for_arm_v8_2a_dotprod_neon): New.
(check_effective_target_arm_v8_2a_dotprod_neon_hw): New.
(check_effective_target_vect_sdot_qi): Add ARM && AArch64.
(check_effective_target_vect_udot_qi): Likewise.
* gcc.target/arm/simd/vdot-exec.c: New.
* gcc.target/aarch64/advsimd-intrinsics/vdot-exec.c: New.
* gcc/doc/sourcebuild.texi: Document arm_v8_2a_dotprod_neon.
From-SVN: r254100
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2017-10-26 Tamar Christina <tamar.christina@arm.com>
* gcc.dg/vect/vect-multitypes-1.c: Correct target selector.
From-SVN: r254099
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instructions)
2017-10-26 Tamar Christina <tamar.christina@arm.com>
PR target/81800
* config/aarch64/aarch64.md (lrint<GPF:mode><GPI:mode>2): Add flag_trapping_math
and flag_fp_int_builtin_inexact.
gcc/testsuite/
2017-10-26 Tamar Christina <tamar.christina@arm.com>
* gcc.target/aarch64/inline-lrint_2.c (dg-options): Add -fno-trapping-math.
From-SVN: r254098
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2017-10-26 Tamar Christina <tamar.christina@arm.com>
* gcc.target/aarch64/advsimd-intrinsics/vect-dot-qi.h: New.
* gcc.target/aarch64/advsimd-intrinsics/vdot-compile.c: New.
* gcc.target/aarch64/advsimd-intrinsics/vect-dot-s8.c: New.
* gcc.target/aarch64/advsimd-intrinsics/vect-dot-u8.c: New.
From-SVN: r254097
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From-SVN: r254096
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