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https://gcc.gnu.org/ml/gcc-patches/2017-11/msg01515.html
* g++.dg/pr82836.C: Fix for c++17.
From-SVN: r254881
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* vr-values.h (get_output_for_vrp): Prototype.
* vr-values.c (get_output_for_vrp): New function extracted from
vrp_visit_assignment_or_call and extract_range_from_stmt.
(vrp_visit_assignment_or_call): Use get_output_for_vrp. Simplify.
From-SVN: r254880
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Disabling software prefetching and switching the autoprefetcher to weak improves
CPU2017 rate and speed benchmarks for both int and fp sets on Falkor.
SPECrate 2017 fp is up 0.38%
SPECspeed 2017 fp is up 0.54%
SPECrate 2017 int is up 3.02%
SPECspeed 2017 int is up 3.16%
There are only a couple individual regressions. The biggest one being about 4%
in parest.
For SPEC2006, we've noticed the following:
SPECint is up 0.91%
SPECfp is stable
In the case of SPEC2006 we noticed both a big regression in mcf (about 20%)
and a big improvement for hmmer (about 40%).
Since the overall result is positive, we would like to make these new tuning
settings the default for Falkor.
We may revisit the software prefetcher setting in the future, in case we
can adjust it enough so it provides us a good balance between improvements and
regressions (mcf). But for now it is best if it stays off.
2017-11-17 Luis Machado <luis.machado@linaro.org>
gcc/
* config/aarch64/aarch64.c
(qdf24xx_prefetch_tune) <default_opt_level>: Set to -1.
(qdf24xx_tunings) <autoprefetcher_model>: Set to
tune_params::AUTOPREFETCHER_WEAK.
From-SVN: r254879
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target attribute on ARM (aarch32))
2017-11-17 Tamar Christina <tamar.christina@arm.com>
PR target/82641
* config/arm/arm.c (arm_valid_target_attribute_rec):
Parse "arch=" and "+<ext>".
(arm_valid_target_attribute_tree): Re-init global options.
(arm_option_override): Make non-static.
(arm_options_perform_arch_sanity_checks): Make errors fatal.
* gcc/config/arm/arm-c.c (__ARM_FEATURE_CMSE): Support undef.
(__ARM_FEATURE_CRC32): Support undef.
* config/arm/arm_acle.h (__ARM_FEATURE_CRC32): Replace with pragma.
* doc/extend.texi (ARM Function Attributes): Add pragma and target.
gcc/testsuite/
2017-11-17 Tamar Christina <tamar.christina@arm.com>
PR target/82641
* gcc.target/arm/pragma_arch_attribute.c: New.
From-SVN: r254878
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gcc/ChangeLog:
* gdbinit.in (break-on-diagnostic): New command.
From-SVN: r254877
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Control-flow Enforcement Technology (CET), published by Intel,
introduces the Shadow Stack feature, which ensures a return from a
function is done to exactly the same location from where the function
was called. When EH is present the control-flow transfer may skip some
stack frames and the shadow stack has to be adjusted not to signal a
violation of a control-flow transfer. It's done by counting a number
of skiping frames and adjasting shadow stack pointer by this number.
Having new semantic of the 'ret' instruction if CET is supported in HW
the 'ret' instruction cannot be generated in ix86_expand_epilogue when
we are returning after EH is processed. Added a code in
ix86_expand_epilogue to adjust Shadow Stack pointer and to generate an
indirect jump instead of 'ret'. As sp register is used during this
adjustment thus the argument in pro_epilogue_adjust_stack is changed
to update cfa_reg based on whether control-flow instrumentation is set.
Without updating the cfa_reg field there is an assert later in dwarf2
pass related to mismatch the stack register and cfa_reg value.
gcc/
* config/i386/i386.c (ix86_expand_epilogue): Change simple
return to indirect jump for EH return if control-flow protection
is enabled. Change explicit 'false' argument in
pro_epilogue_adjust_stack with a value of flag_cf_protection.
* config/i386/i386.md (simple_return_indirect_internal): Remove
SImode restriction to support 64-bit.
libgcc/
* config/i386/linux-unwind.h: Include
config/i386/shadow-stack-unwind.h.
* config/i386/shadow-stack-unwind.h: New file.
* unwind-dw2.c: (uw_install_context): Add a frame parameter and
pass it to _Unwind_Frames_Extra.
* unwind-generic.h (_Unwind_Frames_Extra): New.
* unwind.inc (_Unwind_RaiseException_Phase2): Add frames_p
parameter. Add local variable frames to count number of frames.
(_Unwind_ForcedUnwind_Phase2): Likewise.
(_Unwind_RaiseException): Add local variable frames to count
number of frames, pass it to _Unwind_RaiseException_Phase2 and
uw_install_context.
(_Unwind_ForcedUnwind): Likewise.
(_Unwind_Resume): Likewise.
(_Unwind_Resume_or_Rethrow): Likewise.
From-SVN: r254876
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This patch makes combine reconsider insns it added notes to. This
matters for example if the note is a REG_DEAD; without the note the
setter of the register has to be kept around in the result of
combinations, so it cannot be a 2->1 combination, and the cost of
the result is higher than without that extra set, so try_combine may
refuse the combination with the set, but allow it without the set.
This fixes a regression for powerpc: pr69946.c has started to fail
after the bitfield expansion changes. GCC used to generate
lwz 3,0(9)
rlwinm 3,3,12,20,23
ori 3,3,0x11
rotldi 3,3,52
bl bar
but now it does
lwz 3,0(9)
rldicr 3,3,32,3
srdi 3,3,48
ori 3,3,0x110
sldi 3,3,48
bl bar
(an instruction too many). After this patch it is
lwz 3,0(9)
rlwinm 3,3,16,16,19
ori 3,3,0x110
sldi 3,3,48
bl bar
(the testcase still does not pass, it looks for very specific insns).
* combine.c (added_notes_insn): New.
(try_combine): Handle added_notes_insn like added_links_insn.
Rewrite return value code.
(distribute_notes): Set added_notes_insn to the earliest insn we added
a note to.
From-SVN: r254875
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If we have a PARALLEL of two SETs, and one half is unused, we currently
happily split that into two instructions (although the unused one is
useless). Worse, as PR82621 shows, combine will happily merge this
insn into I3 even if some intervening insn sets the same register
again, which is wrong.
This fixes it by not splitting PARALLELs with REG_UNUSED notes. It
all is handled fine by combine in that case: just the "single set
that is unused" case isn't handled properly.
This also results in better code: combine will now actually throw
away the unused SET. (It still won't do that in an I3).
PR rtl-optimization/82621
* combine.c (try_combine): Do not split PARALLELs of two SETs if the
dest of one of those SETs is unused.
From-SVN: r254874
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This fixes the altivec-macros.c testcase; we now need to explicitly
say "no column number" for messages without one.
gcc/testsuite/
* gcc.target/powerpc/altivec-macros.c: Include "-:" in the messages
matched for.
From-SVN: r254873
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From-SVN: r254872
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From-SVN: r254870
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2017-11-17 Richard Biener <rguenther@suse.de>
PR fortran/83017
* tree-core.h (enum annot_expr_kind): Add annot_expr_parallel_kind.
* tree-pretty-print.c (dump_generic_node): Handle
annot_expr_parallel_kind.
* tree-cfg.c (replace_loop_annotate_in_block): Likewise.
* gimplify.c (gimple_boolify): Likewise.
fortran/
* trans-stmt.c (gfc_trans_forall_loop): Annotate DO CONCURRENT
loops with annot_expr_parallel_kind instead of just
annot_expr_ivdep_kind.
From-SVN: r254869
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Enable building libgcc with CET options by default on Linux/x86 if
binutils supports CET v2.0. It can be disabled with --disable-cet.
It is an error to configure GCC with --enable-cet if bintuiils
doesn't support CET v2.0.
ENDBR instruction is added to __morestack_large_model since it is
called indirectly.
2017-11-17 Igor Tsimbalist <igor.v.tsimbalist@intel.com>
config/
* cet.m4: New file.
gcc/
* config.gcc (extra_headers): Add cet.h for x86 targets.
* config/i386/cet.h: New file.
* doc/install.texi: Add --enable-cet/--disable-cet.
libgcc/
* Makefile.in (configure_deps): Add $(srcdir)/../config/cet.m4.
(CET_FLAGS): New.
* config/i386/morestack.S: Include <cet.h>.
(__morestack_large_model): Add _CET_ENDBR at function entrance.
* config/i386/resms64.h: Include <cet.h>.
* config/i386/resms64f.h: Likewise.
* config/i386/resms64fx.h: Likewise.
* config/i386/resms64x.h: Likewise.
* config/i386/savms64.h: Likewise.
* config/i386/savms64f.h: Likewise.
* config/i386/t-linux (HOST_LIBGCC2_CFLAGS): Add $(CET_FLAGS).
(CRTSTUFF_T_CFLAGS): Likewise.
* configure.ac: Include ../config/cet.m4.
Set and substitute CET_FLAGS.
* configure: Regenerated.
From-SVN: r254868
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2017-11-17 Richard Biener <rguenther@suse.de>
PR tree-optimization/83017
* tree-parloops.c (MIN_PER_THREAD): Use --param parloops-min-per-thread.
(gen_parallel_loop): Properly count iterations.
(parallelize_loops): Handle loop->can_be_parallel independent
of flag_loop_parallelize_all. Make static profitability test match
the runtime one.
* params.def (PARAM_PARLOOPS_MIN_PER_THREAD): New.
* invoke.texi (parloops-min-per-thread): Document.
* gcc.dg/autopar/pr49960.c: Adjust.
From-SVN: r254867
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Update GLIBC_DYNAMIC_LINKER per glibc upstreaming review comments:
http://lists.infradead.org/pipermail/linux-snps-arc/2017-June/002634.html
gcc/
* config/arc/linux.h: GLIBC_DYNAMIC_LINKER update per glibc
upstreaming review comments
From-SVN: r254866
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2017-11-17 Sudakshina Das <sudi.das@arm.com>
* gcc.target/arm/armv8_2-fp16-move-1.c: Edit vmov scan-assembler
directives.
From-SVN: r254863
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access.
2017-11-17 Tamar Christina <tamar.christina@arm.com>
* expr.c (copy_blkmode_to_reg): Fix bitsize for targets
with fast unaligned access.
* doc/sourcebuild.texi (word_mode_no_slow_unalign): New.
gcc/testsuite/
2017-11-17 Tamar Christina <tamar.christina@arm.com>
* gcc.dg/struct-simple.c: New.
* lib/target-supports.exp
(check_effective_target_word_mode_no_slow_unalign): New.
From-SVN: r254862
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Testcase gcc.target/arm/cmse/cmse-14.c checks whether bar is called via
__gnu_cmse_nonsecure_call libcall and not via a direct call. However the
pattern is a bit surprising in that it needs to explicitely allow "by"
due to allowing anything before the 'b'.
This patch rewrites the logic to look for b as a first non-whitespace
letter followed iby anything (to match bl and conditional branches)
followed by some spaces and then bar.
2017-11-17 Thomas Preud'homme <thomas.preudhomme@arm.com>
gcc/testsuite/
* gcc.target/arm/cmse/cmse-14.c: Change logic to match branch
instruction to bar.
From-SVN: r254861
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Some of the tests in the gcc.target/arm/cmse directory (eg.
gcc.target/arm/cmse/mainline/bitfield-4.c) are failing when run without
an architecture specified in RUNTESTFLAGS due to them not adding the
option to select an Armv8-M architecture.
This patch fixes the issue by adding the right option from the exp file
so that no architecture fiddling is necessary in the individual tests.
2017-11-17 Thomas Preud'homme <thomas.preudhomme@arm.com>
gcc/testsuite/
* gcc.target/arm/cmse/cmse.exp: Add option to select Armv8-M Baseline
or Armv8-M Mainline when running the respective tests.
* gcc.target/arm/cmse/baseline/cmse-11.c: Remove architecture check and
selection.
* gcc.target/arm/cmse/baseline/cmse-13.c: Likewise.
* gcc.target/arm/cmse/baseline/cmse-2.c: Likewise.
* gcc.target/arm/cmse/baseline/cmse-6.c: Likewise.
* gcc.target/arm/cmse/baseline/softfp.c: Likewise.
* gcc.target/arm/cmse/mainline/hard-sp/cmse-13.c: Likewise.
* gcc.target/arm/cmse/mainline/hard-sp/cmse-5.c: Likewise.
* gcc.target/arm/cmse/mainline/hard-sp/cmse-7.c: Likewise.
* gcc.target/arm/cmse/mainline/hard-sp/cmse-8.c: Likewise.
* gcc.target/arm/cmse/mainline/hard/cmse-13.c: Likewise.
* gcc.target/arm/cmse/mainline/hard/cmse-5.c: Likewise.
* gcc.target/arm/cmse/mainline/hard/cmse-7.c: Likewise.
* gcc.target/arm/cmse/mainline/hard/cmse-8.c: Likewise.
* gcc.target/arm/cmse/mainline/soft/cmse-13.c: Likewise.
* gcc.target/arm/cmse/mainline/soft/cmse-5.c: Likewise.
* gcc.target/arm/cmse/mainline/soft/cmse-7.c: Likewise.
* gcc.target/arm/cmse/mainline/soft/cmse-8.c: Likewise.
* gcc.target/arm/cmse/mainline/softfp-sp/cmse-5.c: Likewise.
* gcc.target/arm/cmse/mainline/softfp-sp/cmse-7.c: Likewise.
* gcc.target/arm/cmse/mainline/softfp-sp/cmse-8.c: Likewise.
* gcc.target/arm/cmse/mainline/softfp/cmse-13.c: Likewise.
* gcc.target/arm/cmse/mainline/softfp/cmse-5.c: Likewise.
* gcc.target/arm/cmse/mainline/softfp/cmse-7.c: Likewise.
* gcc.target/arm/cmse/mainline/softfp/cmse-8.c: Likewise.
From-SVN: r254860
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Commit r253825 which introduced some sanity checks for sbitmap revealed
a bug in the conversion of cmse_nonsecure_entry_clear_before_return ()
to using bitmap structure. bitmap_and expects that the two bitmaps have
the same length, yet the code in
cmse_nonsecure_entry_clear_before_return () have different size for
to_clear_bitmap and to_clear_arg_regs_bitmap, with the assumption that
bitmap_and would behave has if the bits not allocated were in fact zero.
This commit makes sure both bitmap are equally sized.
2017-11-17 Thomas Preud'homme <thomas.preudhomme@arm.com>
gcc/
* config/arm/arm.c (cmse_nonsecure_entry_clear_before_return): Allocate
to_clear_arg_regs_bitmap to the same size as to_clear_bitmap.
From-SVN: r254859
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references.
2017-11-17 Richard Biener <rguenther@suse.de>
* tree-ssa-pre.c (phi_translate_1): Remove redundant constant
folding of references.
From-SVN: r254858
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starting with r254707)
PR testsuite/82997
* gcc.dg/cpp/macsyntx.c (var1, rest): Don't expect
"requires at least one" warning.
* gcc.dg/cpp/sysmac1.c (foo): Likewise.
* gcc.dg/cpp/macsyntx2.c: New test.
* gcc.dg/cpp/sysmac3.c: New test.
* gcc.dg/cpp/sysmac3.h: New file.
From-SVN: r254857
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2017-11-15 Qing Zhao <qing.zhao@oracle.com>
PR middle-end/78809
* gimple-fold.c (gimple_fold_builtin_string_compare): Add handling
of replacing call to strncmp with corresponding call to strcmp when
meeting conditions.
PR middle-end/78809
* gcc.dg/strcmpopt_1.c: New test.
From-SVN: r254856
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gcc/
* config/i386/x86-tune.def (X86_TUNE_AVX256_OPTIMAL): Add tuning
option prefer-avx256 for skylake-avx512 configuration.
* config/i386/i386.c (ix86_option_override_internal): Ditto.
(get_builtin_code_for_version): Ditto.
From-SVN: r254855
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gcc/
* config/nds32/nds32.h (FIRST_PSEUDO_REGISTER): Modify.
(FIXED_REGISTERS): Reserve more register numbers.
(CALL_USED_REGISTERS): Likewise.
(REG_ALLOC_ORDER): Likewise.
(REG_CLASS_CONTENTS): Likewise.
(REGISTER_NAMES): Likewise.
Co-Authored-By: Monk Chiang <sh.chiang04@gmail.com>
From-SVN: r254854
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gcc/
* config/nds32/nds32-modes.def: Add vector mode V4QI V2HI V8QI V4HI
V2SI.
* config/nds32/iterators.md: Add vector mode iterators and attributes.
Co-Authored-By: Kito Cheng <kito.cheng@gmail.com>
From-SVN: r254853
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From-SVN: r254852
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only shows when compiling for power9.
Had a small thinko in the implementation of mmintrin.h _mm_add_pi32 that only shows
when compiling for power9. A trivial and obvious 2 line patch to fix it.
From-SVN: r254848
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ISO C17 won't go to ballot until December, meaning publication of the
standard won't be until 2018, leaving ambiguity as to whether people
will end up referring to the standard as C17, as it's currently known
and which corresponds to the __STDC_VERSION__ value, or C18 based on
the publication date.
In case people end up referring to this standard as C18, this patch
adds corresponding option aliases -std=c18, -std=iso9899:2018,
-std=gnu18 so people can use those names based on publication date if
they wish. The "expected to be" explanations in help texts and the
manual can be removed as and when the standard is published, hopefully
before GCC 8 is out.
Bootstrapped with no regressions on x86_64-pc-linux-gnu.
gcc:
* doc/invoke.texi (-std=c17): Refer to 2018 expected publication
date of C17.
(-std=c18, -std=iso9899:2018, -std=gnu18): Document option
aliases.
gcc/c-family:
* c.opt (-std=c17, std=gnu17, -std=iso9899:2017): Refer to 2018
expected publication date of C17.
(-std=c18, -std=gnu18, -std=iso9899:2018): New option aliases.
gcc/testsuite:
* gcc.dg/c18-version-1.c, gcc.dg/c18-version-2.c: New tests.
From-SVN: r254847
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gcc's required automake and modern Perl)
2017-11-16 Thomas Koenig <tkoenig@gcc.gnu.org>
PR bootstrap/82856
* doc/install.texi: Document incompatibility of Perl >=5.6.26
with the required version of automake 1.11.6.
From-SVN: r254845
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* rs6000/power9.md (power9fpdiv): New automaton and cpu_unit defined
for it.
(DU_C2_3_power9): Correct reservation combinations.
(FP_DIV_power9, VEC_DIV_power9): New.
(power9-alu): Split out rotate/shift...
(power9-rot): ...to here, correct dispatch resource.
(power9-cracked-alu, power9-mul, power9-mul-compare): Correct dispatch
resource.
(power9-fp): Correct latency.
(power9-sdiv): Add div/sqrt resource.
(power9-ddiv): Correct latency, add div/sqrt resource.
(power9-sqrt, power9-dsqrt): Add div/sqrt resource.
(power9-vecfdiv, power9-vecdiv): Correct latency, add div/sqrt
resource.
(power9-qpdiv, power9-qpmul): Adjust resource usage.
From-SVN: r254844
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* tree.c (cp_tree_equal): Check the type of constants.
* pt.c (unify) [TEMPLATE_PARM_INDEX]: Handle UNIFY_ALLOW_INTEGER
when comparing to previously deduced argument.
(maybe_convert_nontype_argument): New.
(convert_nontype_argument): Call it.
(tsubst_copy_and_build): Handle partial instantiation of
IMPLICIT_CONV_EXPR.
(unify): Ignore type when deducing from array bound.
(dependent_type_p_r): Handle DEFERRED_NOEXCEPT.
(value_dependent_expression_p): Any type-dependent expression is
value-dependent. Handle IMPLICIT_CONV_EXPR.
* cp-tree.h (IMPLICIT_CONV_EXPR_NONTYPE_ARG): New.
* mangle.c (write_template_arg): Strip IMPLICIT_CONV_EXPR.
From-SVN: r254843
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built-ins to TF built-ins if...
[gcc]
2017-11-15 Michael Meissner <meissner@linux.vnet.ibm.com>
* config/rs6000/rs6000.c (rs6000_expand_builtin): Do not do the
switch statement mapping KF built-ins to TF built-ins if we don't
have the proper ISA 3.0 assembler support.
[gcc/testsuite]
2017-11-15 Michael Meissner <meissner@linux.vnet.ibm.com>
* gcc.target/powerpc/bfp/bfp.exp: Look for *.c files, not *.c*
files to prevent ~ files from getting recognized.
* gcc.target/powerpc/dfp/dfp.exp: Likewise.
* gcc.target/powerpc/vsu/vsu.exp: Likewise.
From-SVN: r254839
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the untyped HSAIL regs.
Instead of always representing the HSAIL's untyped registers as
unsigned int, the gccbrig now pre-analyzes the BRIG code and
builds the register variables as a type used the most when storing
or reading data to/from each register. This reduces the total
conversions which cannot be always optimized away.
From-SVN: r254837
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* tree-emutls.c (lower_emutls_data): Remove unused bb_freq.
(lower_emutls_function_body): Do not compute it.
From-SVN: r254836
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* ipa-split.c (split_bb_info): Turn time to sreal.
(split_point): Likewise.
(dump_split_point): Likewise.
(fine_split_points): Likewise.
(execute_split_functions): Only zero split_bbs; turn time to sreals.
From-SVN: r254835
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* ipa-fnsummary.c (analyze_function_body): Accumulate time consistently
in sreal.
* gcc.dg/ipa/ipcp-2.c: Lower threshold.
From-SVN: r254834
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PR middle-end/63477 - Bogus warning with -O3 -Warray-bounds: array subscript
is above array bounds
gcc/testsuite/ChangeLog:
PR middle-end/63477
* gcc.dg/pr63477.c: New test.
From-SVN: r254833
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* predict.c (combine_predictions_for_bb): Preserve zero predicted
eges.
(expensive_function_p): Remove useless assert.
(determine_unlikely_bbs): Propagate also forward; determine cold blocks
From-SVN: r254832
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PR tree-optimization/82588 - missing -Warray-bounds on a excessively large index
PR tree-optimization/82583 - missing -Warray-bounds on out-of-bounds inner indic
gcc/ChangeLog:
PR tree-optimization/82588
PR tree-optimization/82583
* tree-vrp.c (check_array_ref): Handle flexible array members,
string literals, and inner indices.
(search_for_addr_array): Add detail to diagnostics.
gcc/testsuite/ChangeLog:
PR tree-optimization/82588
PR tree-optimization/82583
* c-c++-common/Warray-bounds.c: New test.
* gcc.dg/Warray-bounds-11.c: Adjust.
* gcc.dg/Warray-bounds-22.c: New test.
From-SVN: r254830
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2017-11-16 Doug Rupp <rupp@adacore.com>
* gcc-interface/Makefile.in: Merge Aarch64 and ARM "ifeq" blocks.
From-SVN: r254829
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2017-11-16 Steve Baird <baird@adacore.com>
* debug.adb: Update another comment to indicate gnat2scil's use of the
-gnatd.7 switch.
2017-11-16 Bob Duff <duff@adacore.com>
* exp_ch6.adb (Expand_Call_Helper): Avoid creating a transient scope in
the case of nested build-in-place calls.
From-SVN: r254827
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2017-11-16 Joel Brobecker <brobecker@adacore.com>
* doc/gnat_ugn/gnat_utility_programs.rst: Document the switches
available in gnatsymbolize.
2017-11-16 Steve Baird <baird@adacore.com>
* debug.adb: Update comment to indicate gnat2scil's use of the -gnatd.7
switch.
From-SVN: r254826
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2017-11-16 Gary Dismukes <dismukes@adacore.com>
* doc/gnat_ugn/elaboration_order_handling_in_gnat.rst, sem_ch6.adb,
sem_elab.adb: Minor editorial corrections.
* gnat_ugn.texi: Regenerate.
2017-11-16 Joel Brobecker <brobecker@adacore.com>
* doc/gnat_ugn/gnat_utility_programs.rst (GNAT UGN): Add
gnatsymbolize documentation.
* gnat_ugn.texi: Regenerate.
2017-11-16 Steve Baird <baird@adacore.com>
* sem_ch3.adb (Build_Derived_Record_Type): Replace all uses of
"Scope (Parent_Type)" with "Scope (Parent_Base)".
From-SVN: r254825
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https://gcc.gnu.org/ml/gcc-patches/2017-11/msg01340.html
PR c++/82836
PR c++/82737
* tree.h (COPY_DECL_RTL): Rename parms for clarity.
(SET_DECL_ASSEMBLER_NAME): Forward to
overwrite_decl_assembler_name.
(COPY_DECL_ASSEMBLER_NAME): Rename parms for clarity.
(overwrite_decl_assembler_name): Declare.
* tree.c (overwrite_decl_assembler_name): New.
* langhooks-def.h (lhd_overwrite_decl_assembler_name): Declare.
(LANG_HOOKS_OVERWRITE_DECL_ASSEMBLER_NAME): Provide default.
(LANG_HOOKS_INITIALIZER): Add it.
* langhooks.h (struct lang_hooks): Add overwrite_decl_assembler_name.
* langhooks.c (lhd_set_decl_assembler_name): Use
SET_DECL_ASSEMBLER_NAME.
(lhd_overwrite_decl_assembler_name): Default implementation.
PR c++/82836
PR c++/82737
* cp-objcp-common.h (LANG_HOOKS_OVERWRITE_DECL_ASSEMBLER_NAME):
Override.
* cp-tree.h (overwrite_mangling): Declare.
* decl2.c (struct mangled_decl_hash): Entries are deletable.
(overwrite_mangling): New.
PR c++/82836
PR c++/82737
* g++.dg/pr82836.C: New.
From-SVN: r254823
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From-SVN: r254820
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2017-11-16 Hristian Kirtchev <kirtchev@adacore.com>
* opt.ads: Elaboration warnings are now on by default. Add a comment
explaining why this is needed.
* sem_ch9.adb (Analyze_Requeue): Preserve the status of elaboration
warnings.
* sem_ch12.adb (Analyze_Package_Instantiation): Preserve the status of
elaboration warnings.
(Analyze_Subprogram_Instantiation): Preserve the status of elaboration
warnings.
* sem_elab.adb: Update the structure of Call_Attributes and
Instantiation_Attributes.
(Build_Call_Marker): Propagate the status of elaboration warnings from
the call to the marker.
(Extract_Call_Attributes): Extract the status of elaboration warnings.
(Extract_Instantiation_Attributes): Extract the status of elaboration
warnings.
(Process_Conditional_ABE_Activation_Impl): Elaboration diagnostics are
now dependent on the status of elaboration warnings.
(Process_Conditional_ABE_Call_Ada): Elaboration diagnostics are now
dependent on the status of elaboration warnings.
(Process_Conditional_ABE_Instantiation_Ada): Elaboration diagnostics
are now dependent on the status of elaboration warnings.
(Process_Guaranteed_ABE_Activation_Impl): Remove pragma Unreferenced
for formal Call_Attrs. Elaboration diagnostics are now dependent on the
status of elaboration warnings.
(Process_Guaranteed_ABE_Call): Elaboration diagnostics are now
dependent on the status of elaboration warnings.
(Process_Guaranteed_ABE_Instantiation): Elaboration diagnostics are now
dependent on the status of elaboration warnings.
* sem_prag.adb (Analyze_Pragma): Remove the unjustified warning
concerning pragma Elaborate.
* sem_res.adb (Resolve_Call): Preserve the status of elaboration
warnings.
(Resolve_Entry_Call): Propagate flag Is_Elaboration_Warnings_OK_Node
from the procedure call to the entry call.
* sem_util.adb (Mark_Elaboration_Attributes): Add formal parameter
Warnings.
(Mark_Elaboration_Attributes_Node): Preserve the status of elaboration
warnings
* sem_util.ads (Mark_Elaboration_Attributes): Add formal parameter
Warnings. Update the comment on usage.
* sinfo.adb (Is_Dispatching_Call): Update to use Flag6.
(Is_Elaboration_Warnings_OK_Node): New routine.
(Set_Is_Dispatching_Call): Update to use Flag6.
(Set_Is_Elaboration_Warnings_OK_Node): New routine.
* sinfo.ads: Attribute Is_Dispatching_Call now uses Flag6. Add new
attribute Is_Elaboration_Warnings_OK_Node along with occurrences
in nodes.
(Is_Elaboration_Warnings_OK_Node): New routine along with pragma
Inline.
(Set_Is_Elaboration_Warnings_OK_Node): New routine along with pragma
Inline.
* doc/gnat_ugn/elaboration_order_handling_in_gnat.rst: Update various
sections to indicate how to suppress elaboration warnings. Document
switches -gnatwl and -gnatwL.
* gnat_ugn.texi: Regenerate.
From-SVN: r254819
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2017-11-16 Sylvain Dailler <dailler@adacore.com>
* sem_util.adb (Get_Enum_Lit_From_Pos): Add a condition for Pos
lower than 0.
2017-11-16 Bob Duff <duff@adacore.com>
* sem_ch13.adb (Check_Expr_Constants): Avoid error message in case of
System'To_Address.
From-SVN: r254818
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https://gcc.gnu.org/ml/gcc-patches/2017-11/msg01323.html
PR c++/81060
* decl.c (xref_tag_1): Push lambda into current scope.
* name-lookup.c (do_pushtag): Don't deal with ts_lambda here.
PR c++81060
* g++.dg/cpp0x/lambda/lambda-template13.C: Avoid undefined
template using local type error.
* g++.dg/cpp0x/pr81060.C: New.
From-SVN: r254817
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This patch implements some of the optimizations discussed in
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=71026.
Canonicalize x / (C1 * y) into (x * C2) / y.
This moves constant multiplies out of the RHS of a division in order
to allow further simplifications (such as (C1 * x) / (C2 * y) ->
(C3 * x) / y) and to enable more reciprocal CSEs.
2017-11-16 Wilco Dijkstra <wdijkstr@arm.com>
Jackson Woodruff <jackson.woodruff@arm.com>
gcc/
PR tree-optimization/71026
* match.pd: Canonicalize constant multiplies in division.
gcc/testsuite/
PR tree-optimization/71026
* gcc.dg/cse_recip.c: New test.
Co-Authored-By: Jackson Woodruff <jackson.woodruff@arm.com>
From-SVN: r254816
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