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2017-09-13Rename CLASSTYPE_METHOD_VEC to CLASSTYPE_MEMBER_VEC.Nathan Sidwell6-105/+128
* cp-tree.h (struct lang_type): Rename methods to members. (CLASSTYPE_METHOD_VEC): Rename to ... (CLASSTYPE_MEMBER_VEC): ... this. * name-lookup.h (get_method_slot): Rename to ... (get_member_slot): ... this. (resort_type_method_vec): Rename to ... (resort_type_member_vec): ... this. * class.c (add_method, warn_hidden): Adjust. * search.c (dfs_locate_field_accessor_pre): Adjust. * name-lookup.c (method_vec_binary_search): Rename to ... (member_vec_binary_search): ... this and adjust. (method_vec_linear_search): Rename to ... (member_vec_linear_search): ... this and adjust. (fields_linear_search, get_class_binding_direct): Adjust. (get_method_slot): Rename to ... (get_member_slot): ... this and adjust. (method_name_slot): Rename to ... (member_name_slot): ... this and adjust. (resort_type_method_vec): Rename to ... (resort_type_member_vec): ... this and adjust. (method_vec_append_class_fields): Rename to ... (member_vec_append_class_fields): ... this and adjust. (method_vec_append_enum_values): Rename to ... (member_vec_append_enum_values): ... this and adjust. (method_vec_dedup): Rename to ... (member_vec_dedup): ... this and adjust. (set_class_bindings, insert_late_enum_def_bindings): Adjust. From-SVN: r252078
2017-09-13Update aarch64/vmov_n_1.cWilco Dijkstra2-9/+22
Update vmov_n_1.c now we are generating better code for dup: ldr s0, [x0] dup v0.2s, v0.s[0] ret gcc/testsuite/ * gcc.target/aarch64/vmov_n_1.c: Update dup scan-assembler. From-SVN: r252077
2017-09-13[multiple changes]Pierre-Marie de Rodat8-45/+173
2017-09-13 Eric Botcazou <ebotcazou@adacore.com> * sem_ch13.adb (Register_Address_Clause_Check): New procedure to save the suppression status of Alignment_Check on the current scope. (Alignment_Checks_Suppressed): New function to use the saved instead of the current suppression status of Alignment_Check. (Address_Clause_Check_Record): Add Alignment_Checks_Suppressed field. (Analyze_Attribute_Definition_Clause): Instead of manually appending to the table, call Register_Address_Clause_Check. (Validate_Address_Clauses): Call Alignment_Checks_Suppressed on the recorded address clause instead of its entity. 2017-09-13 Jerome Guitton <guitton@adacore.com> * libgnarl/s-tpopsp__vxworks-tls.adb, libgnarl/s-tpopsp__vxworks-rtp.adb, libgnarl/s-tpopsp__vxworks.adb (Self): Register thread if task id is null. 2017-09-13 Arnaud Charlet <charlet@adacore.com> * libgnat/s-htable.adb, libgnat/s-htable.ads: Minor style tuning. 2017-09-13 Arnaud Charlet <charlet@adacore.com> * lib-xref-spark_specific.adb (Scopes): simplify hash map; now it maps from an entity to only scope index, as a mapping from an entity to the same entity was useless. (Get_Scope_Num): refactor as a simple renaming; rename parameter from N to E. (Set_Scope_Num): refactor as a simple renaming; rename parameter from N to E. (Is_Constant_Object_Without_Variable_Input): remove local "Result" variable, just use return statements. From-SVN: r252076
2017-09-13s-vxwext__kernel-smp.adb, [...]: New file.Arnaud Charlet4-0/+325
* libgnarl/s-vxwext__kernel-smp.adb, libgnarl/s-tpopsp__vxworks-rtp.adb, libgnarl/s-vxwext__noints.adb: New file. From-SVN: r252075
2017-09-13[testsuite/ARM] Fix coprocessor intrinsic test failures on ARMv8-AThomas Preud'homme20-23/+71
Coprocessor intrinsic tests in gcc.target/arm/acle test whether __ARM_FEATURE_COPROC has the right bit defined before calling the intrinsic. This allows to test both the correct setting of that macro and the availability and correct working of the intrinsic. However the __ARM_FEATURE_COPROC macro is no longer defined for ARMv8-A since r249399. This patch changes the testcases to skip that test for ARMv8-A and ARMv8-R targets. It also fixes some irregularity in the coprocessor effective targets: - add ldcl and stcl to the list of instructions listed as guarded by arm_coproc1_ok - enable tests guarded by arm_coproc2_ok, arm_coproc3_ok and arm_coproc4_ok for Thumb-2 capable targets but disable for Thumb-1 targets. 2017-09-13 Thomas Preud'homme <thomas.preudhomme@arm.com> gcc/testsuite/ * gcc.target/arm/acle/cdp.c: Skip __ARM_FEATURE_COPROC check for ARMv8-A and ARMv8-R. * gcc.target/arm/acle/cdp2.c: Likewise. * gcc.target/arm/acle/ldc.c: Likewise. * gcc.target/arm/acle/ldc2.c: Likewise. * gcc.target/arm/acle/ldc2l.c: Likewise. * gcc.target/arm/acle/ldcl.c: Likewise. * gcc.target/arm/acle/mcr.c: Likewise. * gcc.target/arm/acle/mcr2.c: Likewise. * gcc.target/arm/acle/mcrr.c: Likewise. * gcc.target/arm/acle/mcrr2.c: Likewise. * gcc.target/arm/acle/mrc.c: Likewise. * gcc.target/arm/acle/mrc2.c: Likewise. * gcc.target/arm/acle/mrrc.c: Likewise. * gcc.target/arm/acle/mrrc2.c: Likewise. * gcc.target/arm/acle/stc.c: Likewise. * gcc.target/arm/acle/stc2.c: Likewise. * gcc.target/arm/acle/stc2l.c: Likewise. * gcc.target/arm/acle/stcl.c: Likewise. * lib/target-supports.exp: (check_effective_target_arm_coproc1_ok_nocache): Mention ldcl and stcl in the comment. (check_effective_target_arm_coproc2_ok_nocache): Allow Thumb-2 targets and disable Thumb-1 targets. (check_effective_target_arm_coproc3_ok_nocache): Likewise. (check_effective_target_arm_coproc4_ok_nocache): Likewise. Acked-by: Kyrill Tkachov <kyrylo.tkachov@foss.arm.com> From-SVN: r252074
2017-09-13[multiple changes]Pierre-Marie de Rodat12-137/+226
2017-09-13 Hristian Kirtchev <kirtchev@adacore.com> * einfo.adb: Flag42 is now Is_Controlled_Active. (Is_Controlled): This attribute is now synthesized. (Is_Controlled_Active): This attribute is now an explicit flag rather than a synthesized attribute. (Set_Is_Controlled): Removed. (Set_Is_Controlled_Active): New routine. (Write_Entity_Flags): Update the output for Flag42. * einfo.ads: Update the documentation of the following attributes: Disable_Controlled, Is_Controlled, Is_Controlled_Active, Is_Controlled and Is_Controlled_Active have swapped their functionality. (Is_Controlled): Renamed to Is_Controlled_Active. (Is_Controlled_Active): Renamed to Is_Controlled. (Set_Is_Controlled): Renamed to Set_Is_Controlled_Active. * exp_ch3.adb (Expand_Freeze_Record_Type): Restore the original use of Is_Controlled. * exp_util.adb (Has_Some_Controlled_Component): Code clean up. (Needs_Finalization): Code clean up. Remove the tests for Disable_Controlled because a) they were incorrect as they would reject a type which is sublect to the aspect, but may contain controlled components, and b) they are no longer necessary. * exp_util.ads (Needs_Finalization): Update comment on documentation. * freeze.adb (Freeze_Array_Type): Restore the original use of Is_Controlled. (Freeze_Record_Type): Restore the original use of Is_Controlled. * sem_ch3.adb (Analyze_Object_Declaration): Restore the original use of Is_Controlled. (Array_Type_Declaration): Restore the original use of Is_Controlled. (Build_Derived_Private_Type): Restore the original use of Is_Controlled. (Build_Derived_Record_Type): Set the Is_Controlled_Active flag of a type derived from Ada.Finalization.[Limited_]Controlled. (Build_Derived_Type): Restore the original use of Is_Controlled. (Record_Type_Definition): Restore the original use of Is_Controlled. * sem_ch7.adb (Preserve_Full_Attributes): Restore the original use of Is_Controlled. * sem_ch13.adb (Analyze_Aspect_Disable_Controlled): New routine. (Analyze_Aspect_Specifications): Use routine Analyze_Aspect_Disable_Controlled to process aspect Disable_Controlled. 2017-09-13 Vincent Celier <celier@adacore.com> * clean.adb (Gnatclean): Fix error when looking for target of <target>-gnatclean 2017-09-13 Javier Miranda <miranda@adacore.com> Ed Schonberg <schonberg@adacore.com> * sem_ch8.adb (Find_Expanded_Name): Complete code that identifies an expanded name that designates the current instance of a child unit in its own body and appears as the prefix of a reference to an entity local to the child unit. From-SVN: r252065
2017-09-13re PR c++/47226 ([C++0x] GCC doesn't expand template parameter pack that ↵Paolo Carlini3-0/+36
appears in a lambda-expression) 2017-09-13 Paolo Carlini <paolo.carlini@oracle.com> PR c++/47226 * g++.dg/cpp0x/lambda/lambda-variadic4.C: New. * g++.dg/cpp0x/lambda/lambda-variadic5.C: Likewise. From-SVN: r252064
2017-09-13dwarf2out.c (output_die_symbol): Remove.Richard Biener2-31/+5
2017-09-13 Richard Biener <rguenther@suse.de> * dwarf2out.c (output_die_symbol): Remove. (output_die): Do not output a DIEs symbol. From-SVN: r252063
2017-09-13re PR tree-optimization/82128 (ICE on valid code)Richard Biener4-14/+42
2017-09-13 Richard Biener <rguenther@suse.de> PR middle-end/82128 * gimple-fold.c (gimple_fold_call): Update SSA name in-place to default-def to avoid breaking iterator update with the weird interaction with cgraph_update_edges_for_call_stmt_node. * g++.dg/pr82128.C: New testcase. From-SVN: r252062
2017-09-13tree-cfg.c (verify_gimple_assign_binary): Add verification for WIDEN_SUM_EXPR...Richard Biener2-4/+97
2017-09-13 Richard Biener <rguenther@suse.de> * tree-cfg.c (verify_gimple_assign_binary): Add verification for WIDEN_SUM_EXPR, VEC_WIDEN_MULT_{HI,LO,EVEN,ODD}_EXPR, VEC_PACK_{TRUNC,SAT,FIX_TRUNC}_EXPR. (verify_gimple_assign_ternary): Add verification for DOT_PROD_EXPR. From-SVN: r252061
2017-09-13Minor edits.Arnaud Charlet13-13/+17
From-SVN: r252060
2017-09-13Regenerate.Arnaud Charlet1-268/+281
From-SVN: r252059
2017-09-13Minor edits.Arnaud Charlet2-9/+19
From-SVN: r252058
2017-09-13Regenerate.Arnaud Charlet1-30/+19
From-SVN: r252057
2017-09-13Minor edits.Arnaud Charlet4-24/+9
From-SVN: r252056
2017-09-13New file.Arnaud Charlet1-0/+18
From-SVN: r252054
2017-09-13pr63304_1.c: Remove-mno-fix-cortex-a53-843419.Kugan Vivekanandarajah4-12/+11
gcc/testsuite/ChangeLog: 2017-09-13 Kugan Vivekanandarajah <kuganv@linaro.org> * gcc.target/aarch64/pr63304_1.c: Remove-mno-fix-cortex-a53-843419. gcc/ChangeLog: 2017-09-13 Kugan Vivekanandarajah <kuganv@linaro.org> * config/aarch64/aarch64.c (aarch64_override_options_after_change_1): Disable pc relative literal load irrespective of TARGET_FIX_ERR_A53_84341 for default. From-SVN: r252053
2017-09-13Daily bump.GCC Administrator1-1/+1
From-SVN: r252051
2017-09-12sparc.c (output_return): Output the source location of the insn in the delay ↵Eric Botcazou2-4/+28
slot, if any. * config/sparc/sparc.c (output_return): Output the source location of the insn in the delay slot, if any. (output_sibcall): Likewise. From-SVN: r252041
2017-09-12re PR c++/70621 (ICE on invalid code at -O1 and above on x86_64-linux-gnu in ↵Paolo Carlini4-4/+29
record_reference, at cgraphbuild.c:64) /cp 2017-09-12 Paolo Carlini <paolo.carlini@oracle.com> PR c++/70621 * decl.c (start_decl): Early return error_mark_node if duplicate_decls returns it; avoid misleading error message. /testsuite 2017-09-12 Paolo Carlini <paolo.carlini@oracle.com> PR c++/70621 * g++.dg/torture/pr70621.C: New. From-SVN: r252040
2017-09-12re PR fortran/82173 ([meta-bug] Parameterized derived type errors)Paul Thomas11-70/+303
2017-09-12 Paul Thomas <pault@gcc.gnu.org> PR fortran/82173 PR fortran/82168 * decl.c (variable_decl): Check pdt template components for appearance of KIND/LEN components in the type parameter name list, that components corresponding to type parameters have either KIND or LEN attributes and that KIND or LEN components are scalar. Copy the initializer to the parameter value. (gfc_get_pdt_instance): Add a label 'error_return' and follow it with repeated code, while replacing this code with a jump. Check if a parameter appears as a component in the template. Make sure that the parameter expressions are integer. Validate KIND expressions. (gfc_match_decl_type_spec): Search for pdt_types in the parent namespace since they are instantiated in the template ns. * expr.c (gfc_extract_int): Use a KIND parameter if it appears as a component expression. (gfc_check_init_expr): Allow expressions with the pdt_kind attribute. *primary.c (gfc_match_actual_arglist): Make sure that the first keyword argument is recognised when 'pdt' is set. 2017-09-12 Paul Thomas <pault@gcc.gnu.org> PR fortran/82173 * gfortran.dg/pdt_4.f03 : Remove the 'is being used before it is defined' error. * gfortran.dg/pdt_6.f03 : New test. * gfortran.dg/pdt_7.f03 : New test. * gfortran.dg/pdt_8.f03 : New test. PR fortran/82168 * gfortran.dg/pdt_9.f03 : New test. From-SVN: r252039
2017-09-12Don't warn function alignment if warn_if_not_aligned_p is trueH.J. Lu2-1/+9
When warn_if_not_aligned_p is true, a warning will be issued on function declaration later. There is no need to warn function alignment when warn_if_not_aligned_p is true. * c-attribs.c (common_handle_aligned_attribute): Don't warn function alignment if warn_if_not_aligned_p is true. From-SVN: r252036
2017-09-12Add -static-pie to GCC driver to create static PIEH.J. Lu7-33/+79
This patch adds -static-pie to GCC driver to create static PIE. A static position independent executable (PIE) is similar to static executable, but can be loaded at any address without a dynamic linker. All linker input files must be compiled with -fpie or -fPIE and linker must support --no-dynamic-linker to avoid linking with dynamic linker. "-z text" is also needed to prevent dynamic relocations in read-only segments. PR driver/81498 * common.opt (-static-pie): New alias. (shared): Negate static-pie. (-no-pie): Update help text. (-pie): Likewise. (static-pie): New option. * config/gnu-user.h (GNU_USER_TARGET_STARTFILE_SPEC): Add -static-pie support. (GNU_USER_TARGET_ENDFILE_SPEC): Likewise. (LINK_EH_SPEC): Likewise. (LINK_GCC_C_SEQUENCE_SPEC): Likewise. * config/i386/gnu-user.h (GNU_USER_TARGET_LINK_SPEC): Likewise. * config/i386/gnu-user64.h (GNU_USER_TARGET_LINK_SPEC): Likewise. * gcc.c (LINK_COMMAND_SPEC): Likewise. (init_gcc_specs): Likewise. (init_spec): Likewise. (display_help): Update help message for -pie. * doc/invoke.texi: Update -pie, -no-pie and -static. Document -static-pie. From-SVN: r252034
2017-09-12Remove '*' from movsi/di/ti patternsWilco Dijkstra2-15/+21
Remove the remaining uses of '*' from the movsi/di/ti patterns. Using '*' in alternatives is typically incorrect at it tells the register allocator to ignore those alternatives. So remove these from all the integer move patterns. This removes unnecessary int to float moves, for example gcc.target/aarch64/pr62178.c no longer generates a redundant fmov since the w = m variant is now allowed. gcc/ * config/aarch64/aarch64.md (movsi_aarch64): Remove all '*'. (movdi_aarch64): Likewise. (movti_aarch64): Likewise. From-SVN: r252033
2017-09-12re PR target/80204 (macosx-version-min wrong for macOS Sierra 10.12.3)Simon Wright2-11/+11
PR target/80204 * config/darwin-driver.c (darwin_find_version_from_kernel): Eliminate calculation of the minor version, always output as 0. From-SVN: r252029
2017-09-12re PR target/82112 (internal compiler error: in fold_convert_loc, at ↵Jakub Jelinek5-15/+56
fold-const.c:2262) PR target/82112 * config/rs6000/rs6000-c.c (altivec_resolve_overloaded_builtin): For ALTIVEC_BUILTIN_VEC_LD if arg1 has array type call default_conversion on it early, rather than manual conversion late. For ALTIVEC_BUILTIN_VEC_ST if arg2 has array type call default_conversion instead of performing manual conversion. * gcc.target/powerpc/pr82112.c: New test. * g++.dg/ext/altivec-18.C: New test. From-SVN: r252028
2017-09-12altivec.md (vec_widen_umult_even_v4si, [...]): Add define expands for ↵Carl Love5-4/+82
vmuleuw, vmulesw, vmulouw, vmulosw. gcc/ChangeLog: 2017-09-12 Carl Love <cel@us.ibm.com> * config/rs6000/altivec.md (vec_widen_umult_even_v4si, vec_widen_smult_even_v4si): Add define expands for vmuleuw, vmulesw, vmulouw, vmulosw. * config/rs6000/rs6000-builtin.def (VMLEUW, VMULESW, VMULOUW, VMULOSW): Add definitions. * config/rs6000/rs6000-c.c (altivec_overloaded_builtins): Add ALTIVEC_BUILTIN_VMULESW, ALTIVEC_BUILTIN_VMULEUW, ALTIVEC_BUILTIN_VMULOSW, ALTIVEC_BUILTIN_VMULOUW entries. * config/rs6000/rs6000.c (rs6000_gimple_fold_builtin, builtin_function_type): Add ALTIVEC_BUILTIN_* case statements. From-SVN: r252027
2017-09-12[Patch AArch64 2/2] Fix memory sizes to load/store patternsJames Greenhalgh7-22/+57
There seems to be a partial misconception in the AArch64 backend that load1/load2 referred to the number of registers to load, rather than the number of words to load. This patch fixes that using the new "number of byte" types added in the previous patch. That means using the load_16 and store_16 types that were defined in the previous patch for the first time in the AArch64 backend. To ensure continuity for scheduling models, I've just split this out from load_8. Please update your models if this is very wrong! --- gcc/ * config/aarch64/aarch64.md (movdi_aarch64): Set load/store types correctly. (movti_aarch64): Likewise. (movdf_aarch64): Likewise. (movtf_aarch64): Likewise. (load_pairdi): Likewise. (store_pairdi): Likewise. (load_pairdf): Likewise. (store_pairdf): Likewise. (loadwb_pair<GPI:mode>_<P:mode>): Likewise. (storewb_pair<GPI:mode>_<P:mode>): Likewise. (ldr_got_small_<mode>): Likewise. (ldr_got_small_28k_<mode>): Likewise. (ldr_got_tiny): Likewise. * config/aarch64/iterators.md (ldst_sz): New. (ldpstp_sz): Likewise. * config/aarch64/thunderx.md (thunderx_storepair): Split store_8 to store_16. (thunderx_load): Split load_8 to load_16. * config/aarch64/thunderx2t99.md (thunderx2t99_loadpair): Split load_8 to load_16. (thunderx2t99_storepair_basic): Split store_8 to store_16. * config/arm/xgene1.md (xgene1_load_pair): Split load_8 to load_16. (xgene1_store_pair): Split store_8 to store_16. * config/aarch64/falkor.md (falkor_ld_3_ld): Split load_8 to load_16. (falkor_st_0_st_sd): Split store_8 to store_16. From-SVN: r252026
2017-09-12[Mechanical Patch ARM/AArch64 1/2] Rename load/store scheduling types to ↵James Greenhalgh37-345/+385
encode data size In the AArch64 backend and scheduling models there is some confusion as to what the load1/load2 etc. scheduling types refer to. This leads to us using load1/load2 in two contexts - for a variety of 32-bit, 64-bit and 128-bit loads in AArch32 and 128-bit loads in AArch64. That leads to an undesirable confusion in scheduling. Fixing it is easy, but mechanical and boring. Essentially, s/load1/load_4/ s/load2/load_8/ s/load3/load_12/ s/load4/load_16/ s/store1/store_4/ s/store2/store_8/ s/store3/store_12/ s/store4/store_16/ Across all sorts of pipeline models, and the two backends. I have intentionally not modified any of the patterns which now look obviously incorrect. I'll be doing a second pass over the AArch64 back-end in patch 2/2 which will fix these bugs. --- gcc/ * config/arm/types.md (type): Rename load1/2/3/4 to load_4/8/12/16 and store1/2/3/4 to store_4/8/12/16. * config/aarch64/aarch64.md: Update for rename. * config/arm/arm.md: Likewise.: Likewise. * config/arm/arm.c: Likewise. * config/arm/thumb1.md: Likewise. * config/arm/thumb2.md: Likewise. * config/arm/vfp.md: Likewise. * config/arm/arm-generic.md: Likewise. * config/arm/arm1020e.md: Likewise. * config/arm/arm1026ejs.md: Likewise. * config/arm/arm1136jfs.md: Likewise. * config/arm/arm926ejs.md: Likewise. * config/arm/cortex-a15.md: Likewise. * config/arm/cortex-a17.md: Likewise. * config/arm/cortex-a5.md: Likewise. * config/arm/cortex-a53.md: Likewise. * config/arm/cortex-a57.md: Likewise. * config/arm/cortex-a7.md: Likewise. * config/arm/cortex-a8.md: Likewise. * config/arm/cortex-a9.md: Likewise. * config/arm/cortex-m4.md: Likewise. * config/arm/cortex-m7.md: Likewise. * config/arm/cortex-r4.md: Likewise. * config/arm/exynos-m1.md: Likewise. * config/arm/fa526.md: Likewise. * config/arm/fa606te.md: Likewise. * config/arm/fa626te.md: Likewise. * config/arm/fa726te.md: Likewise. * config/arm/fmp626.md: Likewise. * config/arm/iwmmxt.md: Likewise. * config/arm/ldmstm.md: Likewise. * config/arm/marvell-pj4.md: Likewise. * config/arm/xgene1.md: Likewise. * config/aarch64/thunderx.md: Likewise. * config/aarch64/thunderx2t99.md: Likewise. * config/aarch64/falkor.md: Likewise. From-SVN: r252025
2017-09-12Fix GIMPLE FE test (PR testsuite/82114)Martin Liska2-1/+8
2017-09-12 Martin Liska <mliska@suse.cz> PR testsuite/82114 * gcc.dg/gimplefe-14.c (main): Add handling of case 0. From-SVN: r252024
2017-09-12c-common.c (field_decl_cmp, [...]): Move to c/c-decl.c.Nathan Sidwell6-78/+87
c-family/ * c-common.c (field_decl_cmp, resort_data, resort_field_decl_cmp, resort_sorted_fields): Move to c/c-decl.c. * c-common.h (field_decl_cmp, resort_sorted_fields): Delete. (struct sorted_fields_type): Move to c/c-lang.h. c/ * c-decl.c (field_decl_cmp, resort_data, resort_field_decl_cmp, resort_sorted_fields): Moved from c-family/c-common.c. * c-lang.h (struct sorted_fields_type): Moved from c-family/c-common.h. From-SVN: r252023
2017-09-12Reduce lookup_attribute memory footprint.Martin Liska3-11/+37
2017-09-12 Martin Liska <mliska@suse.cz> * attribs.c (private_lookup_attribute): New function. * attribs.h (private_lookup_attribute): Declared here. (lookup_attribute): Called from this place. From-SVN: r252022
2017-09-12re PR tree-optimization/82157 (ICE on valid code at -O2 and -O3: cannot ↵Richard Biener4-0/+56
update SSA form) 2017-09-12 Richard Biener <rguenther@suse.de> PR tree-optimization/82157 * tree-ssa-pre.c (remove_dead_inserted_code): Do not remove stmts with side-effects. * gcc.dg/torture/pr82157.c: New testcase. From-SVN: r252020
2017-09-12Turn HARD_REGNO_NREGS into a target hookRichard Sandiford97-519/+582
2017-09-12 Richard Sandiford <richard.sandiford@linaro.org> Alan Hayward <alan.hayward@arm.com> David Sherwood <david.sherwood@arm.com> gcc/ * target.def (hard_regno_nregs): New hook. (class_max_nregs): Refer to it instead of HARD_REGNO_NREGS. * targhooks.h (default_hard_regno_nregs): Declare. * targhooks.c (default_hard_regno_nregs): New function. * doc/tm.texi.in (HARD_REGNO_NREGS): Replace with... (TARGET_HARD_REGNO_NREGS): ...this hook. (HARD_REGNO_NREGS_HAS_PADDING): Update accordingly. (CLASS_MAX_NREGS): Likewise. * doc/tm.texi: Regenerate. * reginfo.c (init_reg_modes_target): Use targetm.hard_regno_nregs instead of HARD_REGNO_NREGS. * rtl.h (REG_NREGS): Refer to TARGET_HARD_REGNO_NREGS rather than HARD_REGNO_NREGS in the comment. * config/aarch64/aarch64.h (HARD_REGNO_NREGS): Delete. * config/aarch64/aarch64-protos.h (aarch64_hard_regno_nregs): Delete. * config/aarch64/aarch64.c (aarch64_hard_regno_nregs): Make static. Return an unsigned int. (TARGET_HARD_REGNO_NREGS): Redefine. * config/alpha/alpha.h (HARD_REGNO_NREGS): Delete. * config/arc/arc.h (HARD_REGNO_NREGS): Delete. * config/arc/arc.c (TARGET_HARD_REGNO_NREGS): Redefine. (arc_hard_regno_nregs): New function. * config/arm/arm.h (HARD_REGNO_NREGS): Delete. * config/arm/arm.c (TARGET_HARD_REGNO_NREGS): Redefine. (arm_hard_regno_nregs): New function. * config/avr/avr.h (HARD_REGNO_NREGS): Delete. * config/bfin/bfin.h (HARD_REGNO_NREGS): Delete. * config/bfin/bfin.c (bfin_hard_regno_nregs): New function. (TARGET_HARD_REGNO_NREGS): Redefine. * config/c6x/c6x.h (HARD_REGNO_NREGS): Delete. * config/cr16/cr16.h (LONG_REG_P): Use targetm.hard_regno_nregs. (HARD_REGNO_NREGS): Delete. * config/cr16/cr16.c (TARGET_HARD_REGNO_NREGS): Redefine. (cr16_hard_regno_nregs): New function. (cr16_memory_move_cost): Use it instead of HARD_REGNO_NREGS. * config/cris/cris.h (HARD_REGNO_NREGS): Delete. * config/cris/cris.c (TARGET_HARD_REGNO_NREGS): Redefine. (cris_hard_regno_nregs): New function. * config/epiphany/epiphany.h (HARD_REGNO_NREGS): Delete. * config/fr30/fr30.h (HARD_REGNO_NREGS): Delete. (CLASS_MAX_NREGS): Use targetm.hard_regno_nregs. * config/frv/frv.h (HARD_REGNO_NREGS): Delete. (CLASS_MAX_NREGS): Remove outdated copy of documentation. * config/frv/frv-protos.h (frv_hard_regno_nregs): Delete. * config/frv/frv.c (TARGET_HARD_REGNO_NREGS): Redefine. (frv_hard_regno_nregs): Make static. Take and return an unsigned int. (frv_class_max_nregs): Remove outdated copy of documentation. * config/ft32/ft32.h (HARD_REGNO_NREGS): Delete. * config/h8300/h8300.h (HARD_REGNO_NREGS): Delete. * config/h8300/h8300-protos.h (h8300_hard_regno_nregs): Delete. * config/h8300/h8300.c (h8300_hard_regno_nregs): Delete. * config/i386/i386.h (HARD_REGNO_NREGS): Delete. * config/i386/i386.c (ix86_hard_regno_nregs): New function. (TARGET_HARD_REGNO_NREGS): Redefine. * config/ia64/ia64.h (HARD_REGNO_NREGS): Delete. (CLASS_MAX_NREGS): Update comment. * config/ia64/ia64.c (TARGET_HARD_REGNO_NREGS): Redefine. (ia64_hard_regno_nregs): New function. * config/iq2000/iq2000.h (HARD_REGNO_NREGS): Delete. * config/lm32/lm32.h (HARD_REGNO_NREGS): Delete. * config/m32c/m32c.h (HARD_REGNO_NREGS): Delete. * config/m32c/m32c-protos.h (m32c_hard_regno_nregs): Delete. * config/m32c/m32c.c (m32c_hard_regno_nregs_1): Take and return an unsigned int. (m32c_hard_regno_nregs): Likewise. Make static. (TARGET_HARD_REGNO_NREGS): Redefine. * config/m32r/m32r.h (HARD_REGNO_NREGS): Delete. * config/m68k/m68k.h (HARD_REGNO_NREGS): Delete. * config/m68k/m68k.c (TARGET_HARD_REGNO_NREGS): Redefine. (m68k_hard_regno_nregs): New function. * config/mcore/mcore.h (HARD_REGNO_NREGS): Delete. * config/microblaze/microblaze.h (HARD_REGNO_NREGS): Delete. * config/mips/mips.h (HARD_REGNO_NREGS): Delete. * config/mips/mips-protos.h (mips_hard_regno_nregs): Delete. * config/mips/mips.c (mips_hard_regno_nregs): Make static. Take and return an unsigned int. (TARGET_HARD_REGNO_NREGS): Redefine. * config/mmix/mmix.h (HARD_REGNO_NREGS): Delete. (CLASS_MAX_NREGS): Use targetm.hard_regno_nregs. * config/mn10300/mn10300.h (HARD_REGNO_NREGS): Delete. * config/moxie/moxie.h (HARD_REGNO_NREGS): Delete. * config/msp430/msp430.h (HARD_REGNO_NREGS): Delete. * config/msp430/msp430-protos.h (msp430_hard_regno_nregs): Delete. * config/msp430/msp430.c (TARGET_HARD_REGNO_NREGS): Redefine. (msp430_hard_regno_nregs): Make static. Take and return an unsigned int. * config/nds32/nds32.h (HARD_REGNO_NREGS): Delete. * config/nds32/nds32-protos.h (nds32_hard_regno_nregs): Delete. * config/nds32/nds32.c (nds32_hard_regno_nregs): Delete. (nds32_hard_regno_mode_ok): Use targetm.hard_regno_nregs. * config/nios2/nios2.h (HARD_REGNO_NREGS): Delete. * config/nvptx/nvptx.h (HARD_REGNO_NREGS): Delete. * config/nvptx/nvptx.c (nvptx_hard_regno_nregs): New function. (TARGET_HARD_REGNO_NREGS): Redefine. * config/pa/pa32-regs.h (HARD_REGNO_NREGS): Rename to... (PA_HARD_REGNO_NREGS): ...this. * config/pa/pa64-regs.h (HARD_REGNO_NREGS): Rename to... (PA_HARD_REGNO_NREGS): ...this. * config/pa/pa.c (TARGET_HARD_REGNO_NREGS): Redefine. (pa_hard_regno_nregs): New function. * config/pdp11/pdp11.h (HARD_REGNO_NREGS): Delete. * config/pdp11/pdp11.c (TARGET_HARD_REGNO_NREGS): Redefine. (pdp11_hard_regno_nregs): New function. * config/powerpcspe/powerpcspe.h (HARD_REGNO_NREGS): Delete. * config/powerpcspe/powerpcspe.c (TARGET_HARD_REGNO_NREGS): Redefine. (rs6000_hard_regno_nregs_hook): New function. * config/riscv/riscv.h (HARD_REGNO_NREGS): Delete. * config/riscv/riscv-protos.h (riscv_hard_regno_nregs): Delete. * config/riscv/riscv.c (riscv_hard_regno_nregs): Make static. Take and return an unsigned int. Move earlier in file. (TARGET_HARD_REGNO_NREGS): Redefine. * config/rl78/rl78.h (HARD_REGNO_NREGS): Delete. * config/rl78/rl78-protos.h (rl78_hard_regno_nregs): Delete. * config/rl78/rl78.c (TARGET_HARD_REGNO_NREGS): Reefine. (rl78_hard_regno_nregs): Make static. Take and return an unsigned int. * config/rs6000/rs6000.h (HARD_REGNO_NREGS): Delete. * config/rs6000/rs6000.c (TARGET_HARD_REGNO_NREGS): Redefine. (rs6000_hard_regno_nregs_hook): New function. * config/rx/rx.h (HARD_REGNO_NREGS): Delete. * config/rx/rx.c (rx_hard_regno_nregs): New function. (TARGET_HARD_REGNO_NREGS): Redefine. * config/s390/s390.h (HARD_REGNO_NREGS): Delete. * config/s390/s390.c (REGNO_PAIR_OK): Use s390_hard_regno_nregs instead of HARD_REGNO_NREGS. (s390_hard_regno_nregs): New function. (s390_hard_regno_mode_ok): Add comment from s390.h. (TARGET_HARD_REGNO_NREGS): Redefine. * config/sh/sh.h (HARD_REGNO_NREGS): Delete. * config/sh/sh.c (TARGET_HARD_REGNO_NREGS): Redefine. (sh_hard_regno_nregs): New function. (sh_pass_in_reg_p): Use it. * config/sparc/sparc.h (HARD_REGNO_NREGS): Delete. * config/sparc/sparc.c (TARGET_HARD_REGNO_NREGS): Redefine. (sparc_hard_regno_nregs): New function. * config/spu/spu.h (HARD_REGNO_NREGS): Delete. * config/spu/spu.c (spu_hard_regno_nregs): New function. (spu_function_arg_advance): Use it, supplying a valid register number. (TARGET_HARD_REGNO_NREGS): Redefine. * config/stormy16/stormy16.h (HARD_REGNO_NREGS): Delete. * config/tilegx/tilegx.h (HARD_REGNO_NREGS): Delete. * config/tilepro/tilepro.h (HARD_REGNO_NREGS): Delete. * config/v850/v850.h (HARD_REGNO_NREGS): Delete. * config/vax/vax.h (HARD_REGNO_NREGS): Delete. * config/visium/visium.h (HARD_REGNO_NREGS): Delete. (CLASS_MAX_NREGS): Remove copy of old documentation. * config/visium/visium.c (TARGET_HARD_REGNO_NREGS): Redefine. (visium_hard_regno_nregs): New function. (visium_hard_regno_mode_ok): Use it instead of HARD_REGNO_NREGS. * config/xtensa/xtensa.h (HARD_REGNO_NREGS): Delete. * config/xtensa/xtensa.c (TARGET_HARD_REGNO_NREGS): Redefine. xtensa_hard_regno_nregs): New function. * system.h (HARD_REGNO_NREGS): Poison. Co-Authored-By: Alan Hayward <alan.hayward@arm.com> Co-Authored-By: David Sherwood <david.sherwood@arm.com> From-SVN: r252016
2017-09-12Use hard_regno_nregs instead of HARD_REGNO_NREGSRichard Sandiford8-16/+40
This patch converts some places that use HARD_REGNO_NREGS to use hard_regno_nregs, in places where the initialisation has obviously already taken place. 2017-09-12 Richard Sandiford <richard.sandiford@linaro.org> gcc/ * config/arm/arm.h (THUMB_SECONDARY_INPUT_RELOAD_CLASS): Use hard_regno_nregs instead of HARD_REGNO_NREGS. (THUMB_SECONDARY_OUTPUT_RELOAD_CLASS): Likewise. * config/c6x/c6x.c (c6x_expand_prologue): Likewise. (c6x_expand_epilogue): Likewise. * config/frv/frv.c (frv_alloc_temp_reg): Likewise. (frv_read_iacc_argument): Likewise. * config/sh/sh.c: Include regs.h. (sh_print_operand): Use hard_regno_nregs instead of HARD_REGNO_NREGS. (regs_used): Likewise. (output_stack_adjust): Likewise. * config/xtensa/xtensa.c (xtensa_copy_incoming_a7): Likewise. * expmed.c: Include regs.h. (store_bit_field_1): Use hard_regno_nregs instead of HARD_REGNO_NREGS. * ree.c: Include regs.h. (combine_reaching_defs): Use hard_regno_nregs instead of HARD_REGNO_NREGS. (add_removable_extension): Likewise. From-SVN: r252015
2017-09-12Convert hard_regno_nregs to a functionRichard Sandiford33-170/+281
This patch converts hard_regno_nregs into an inline function, which in turn allows hard_regno_nregs to be used as the name of a targetm field. This is just a mechanical change. 2017-09-12 Richard Sandiford <richard.sandiford@linaro.org> gcc/ * regs.h (hard_regno_nregs): Turn into a function. (end_hard_regno): Update accordingly. * caller-save.c (setup_save_areas): Likewise. (save_call_clobbered_regs): Likewise. (replace_reg_with_saved_mem): Likewise. (insert_restore): Likewise. (insert_save): Likewise. * combine.c (can_change_dest_mode): Likewise. (move_deaths): Likewise. (distribute_notes): Likewise. * config/mips/mips.c (mips_hard_regno_call_part_clobbered): Likewise. * config/powerpcspe/powerpcspe.c (rs6000_cannot_change_mode_class) (rs6000_split_multireg_move): Likewise. (rs6000_register_move_cost): Likewise. (rs6000_memory_move_cost): Likewise. * config/rs6000/rs6000.c (rs6000_cannot_change_mode_class): Likewise. (rs6000_split_multireg_move): Likewise. (rs6000_register_move_cost): Likewise. (rs6000_memory_move_cost): Likewise. * cselib.c (cselib_reset_table): Likewise. (cselib_lookup_1): Likewise. * emit-rtl.c (set_mode_and_regno): Likewise. * function.c (aggregate_value_p): Likewise. * ira-color.c (setup_profitable_hard_regs): Likewise. (check_hard_reg_p): Likewise. (calculate_saved_nregs): Likewise. (assign_hard_reg): Likewise. (improve_allocation): Likewise. (calculate_spill_cost): Likewise. * ira-emit.c (modify_move_list): Likewise. * ira-int.h (ira_hard_reg_set_intersection_p): Likewise. (ira_hard_reg_in_set_p): Likewise. * ira.c (setup_reg_mode_hard_regset): Likewise. (clarify_prohibited_class_mode_regs): Likewise. (check_allocation): Likewise. * lra-assigns.c (find_hard_regno_for_1): Likewise. (lra_setup_reg_renumber): Likewise. (setup_try_hard_regno_pseudos): Likewise. (spill_for): Likewise. (assign_hard_regno): Likewise. (setup_live_pseudos_and_spill_after_risky_transforms): Likewise. * lra-constraints.c (in_class_p): Likewise. (lra_constraint_offset): Likewise. (simplify_operand_subreg): Likewise. (lra_constraints): Likewise. (split_reg): Likewise. (split_if_necessary): Likewise. (invariant_p): Likewise. (inherit_in_ebb): Likewise. * lra-lives.c (process_bb_lives): Likewise. * lra-remat.c (reg_overlap_for_remat_p): Likewise. (get_hard_regs): Likewise. (do_remat): Likewise. * lra-spills.c (assign_spill_hard_regs): Likewise. * mode-switching.c (create_pre_exit): Likewise. * postreload.c (reload_combine_recognize_pattern): Likewise. * recog.c (peep2_find_free_register): Likewise. * regcprop.c (kill_value_regno): Likewise. (set_value_regno): Likewise. (copy_value): Likewise. (maybe_mode_change): Likewise. (find_oldest_value_reg): Likewise. (copyprop_hardreg_forward_1): Likewise. * regrename.c (check_new_reg_p): Likewise. (regrename_do_replace): Likewise. * reload.c (push_reload): Likewise. (combine_reloads): Likewise. (find_dummy_reload): Likewise. (operands_match_p): Likewise. (find_reloads): Likewise. (find_equiv_reg): Likewise. (reload_adjust_reg_for_mode): Likewise. * reload1.c (count_pseudo): Likewise. (count_spilled_pseudo): Likewise. (find_reg): Likewise. (clear_reload_reg_in_use): Likewise. (free_for_value_p): Likewise. (allocate_reload_reg): Likewise. (choose_reload_regs): Likewise. (reload_adjust_reg_for_temp): Likewise. (emit_reload_insns): Likewise. (delete_output_reload): Likewise. * rtlanal.c (subreg_get_info): Likewise. * sched-deps.c (sched_analyze_reg): Likewise. * sel-sched.c (init_regs_for_mode): Likewise. (mark_unavailable_hard_regs): Likewise. (choose_best_reg_1): Likewise. (verify_target_availability): Likewise. * valtrack.c (dead_debug_insert_temp): Likewise. * var-tracking.c (track_loc_p): Likewise. (emit_note_insn_var_location): Likewise. * varasm.c (make_decl_rtl): Likewise. * reginfo.c (choose_hard_reg_mode): Likewise. (init_reg_modes_target): Refer directly to this_target_regs->x_hard_regno_nregs. From-SVN: r252014
2017-09-12Make more use of in_hard_reg_set_pRichard Sandiford2-13/+9
An upcoming patch will convert hard_regno_nregs into an inline function, which in turn allows hard_regno_nregs to be used as the name of a targetm field. This patch rewrites a use that can use in_hard_reg_set_p instead. 2017-09-12 Richard Sandiford <richard.sandiford@linaro.org> gcc/ * ira-costs.c (record_operand_costs): Use in_hard_reg_set_p instead of hard_regno_nregs. From-SVN: r252013
2017-09-12Make more use of end_hard_regnoRichard Sandiford12-26/+32
An upcoming patch will convert hard_regno_nregs into an inline function, which in turn allows hard_regno_nregs to be used as the name of a targetm field. This patch rewrites uses that can use end_hard_regno instead. 2017-09-12 Richard Sandiford <richard.sandiford@linaro.org> gcc/ * config/aarch64/aarch64.c (aarch64_hard_regno_mode_ok): Use end_hard_regno instead of hard_regno_nregs. * config/s390/s390.c (s390_reg_clobbered_rtx): Likewise. * config/sparc/sparc.h (ASM_DECLARE_REGISTER_GLOBAL): Likewise. * config/visium/visium.c (visium_hard_regno_mode_ok): Likewise. * ira-color.c (improve_allocation): Likewise. * lra-assigns.c (find_hard_regno_for_1): Likewise. * lra-lives.c (mark_regno_live): Likewise. (mark_regno_dead): Likewise. * lra-remat.c (operand_to_remat): Likewise. * lra.c (collect_non_operand_hard_regs): Likewise. * postreload.c (reload_combine_note_store): Likewise. (move2add_valid_value_p): Likewise. * reload.c (regno_clobbered_p): Likewise. From-SVN: r252012
2017-09-12Make more use of END_REGNORichard Sandiford5-39/+27
An upcoming patch will convert hard_regno_nregs into an inline function, which in turn allows hard_regno_nregs to be used as the name of a targetm field. This patch rewrites uses that are more easily (and efficiently) written as END_REGNO. 2017-09-12 Richard Sandiford <richard.sandiford@linaro.org> gcc/ * config/frv/frv.c (FOR_EACH_REGNO): Use END_REGNO instead of hard_regno_nregs. * config/v850/v850.c (v850_reorg): Likewise. * reload.c (refers_to_regno_for_reload_p): Likewise. (find_equiv_reg): Likewise. * reload1.c (reload_reg_reaches_end_p): Likewise. From-SVN: r252011
2017-09-12Make more use of REG_NREGSRichard Sandiford14-61/+73
An upcoming patch will convert hard_regno_nregs into an inline function, which in turn allows hard_regno_nregs to be used as the name of a targetm field. This patch rewrites uses that are more easily (and efficiently) written as REG_NREGS. 2017-09-12 Richard Sandiford <richard.sandiford@linaro.org> gcc/ * caller-save.c (add_used_regs): Use REG_NREGS instead of hard_regno_nregs. * config/aarch64/aarch64.c (aarch64_split_combinev16qi): Likewise. * config/arm/arm.c (output_move_neon): Likewise. (arm_attr_length_move_neon): Likewise. (neon_split_vcombine): Likewise. * config/c6x/c6x.c (c6x_mark_reg_read): Likewise. (c6x_mark_reg_written): Likewise. (c6x_dwarf_register_span): Likewise. * config/i386/i386.c (ix86_save_reg): Likewise. * config/ia64/ia64.c (mark_reg_gr_used_mask): Likewise. (rws_access_reg): Likewise. * config/s390/s390.c (s390_call_saved_register_used): Likewise. * mode-switching.c (create_pre_exit): Likewise. * ree.c (combine_reaching_defs): Likewise. (add_removable_extension): Likewise. * regcprop.c (find_oldest_value_reg): Likewise. (copyprop_hardreg_forward_1): Likewise. * reload.c (reload_inner_reg_of_subreg): Likewise. (push_reload): Likewise. (combine_reloads): Likewise. (find_dummy_reload): Likewise. (reload_adjust_reg_for_mode): Likewise. * reload1.c (find_reload_regs): Likewise. (forget_old_reloads_1): Likewise. (reload_reg_free_for_value_p): Likewise. (reload_adjust_reg_for_temp): Likewise. (emit_reload_insns): Likewise. (delete_output_reload): Likewise. * sel-sched.c (choose_best_reg_1): Likewise. (choose_best_pseudo_reg): Likewise. From-SVN: r252010
2017-09-12Turn SLOW_UNALIGNED_ACCESS into a target hookRichard Sandiford28-142/+204
2017-09-12 Richard Sandiford <richard.sandiford@linaro.org> Alan Hayward <alan.hayward@arm.com> David Sherwood <david.sherwood@arm.com> gcc/ * defaults.h (SLOW_UNALIGNED_ACCESS): Delete. * target.def (slow_unaligned_access): New hook. * targhooks.h (default_slow_unaligned_access): Declare. * targhooks.c (default_slow_unaligned_access): New function. * doc/tm.texi.in (SLOW_UNALIGNED_ACCESS): Replace with... (TARGET_SLOW_UNALIGNED_ACCESS): ...this. * doc/tm.texi: Regenerate. * config/alpha/alpha.h (SLOW_UNALIGNED_ACCESS): Delete. * config/arm/arm.h (SLOW_UNALIGNED_ACCESS): Delete. * config/i386/i386.h (SLOW_UNALIGNED_ACCESS): Delete commented-out definition. * config/powerpcspe/powerpcspe.h (SLOW_UNALIGNED_ACCESS): Delete. * config/powerpcspe/powerpcspe.c (TARGET_SLOW_UNALIGNED_ACCESS): Redefine. (rs6000_slow_unaligned_access): New function. (rs6000_emit_move): Use it instead of SLOW_UNALIGNED_ACCESS. (expand_block_compare): Likewise. (expand_strn_compare): Likewise. (rs6000_rtx_costs): Likewise. * config/riscv/riscv.h (SLOW_UNALIGNED_ACCESS): Delete. (riscv_slow_unaligned_access): Likewise. * config/riscv/riscv.c (riscv_slow_unaligned_access): Rename to... (riscv_slow_unaligned_access_p): ...this and make static. (riscv_option_override): Update accordingly. (riscv_slow_unaligned_access): New function. (TARGET_SLOW_UNALIGNED_ACCESS): Redefine. * config/rs6000/rs6000.h (SLOW_UNALIGNED_ACCESS): Delete. * config/rs6000/rs6000.c (TARGET_SLOW_UNALIGNED_ACCESS): Redefine. (rs6000_slow_unaligned_access): New function. (rs6000_emit_move): Use it instead of SLOW_UNALIGNED_ACCESS. (rs6000_rtx_costs): Likewise. * config/rs6000/rs6000-string.c (expand_block_compare) (expand_strn_compare): Use targetm.slow_unaligned_access instead of SLOW_UNALIGNED_ACCESS. * config/tilegx/tilegx.h (SLOW_UNALIGNED_ACCESS): Delete. * config/tilepro/tilepro.h (SLOW_UNALIGNED_ACCESS): Delete. * calls.c (expand_call): Use targetm.slow_unaligned_access instead of SLOW_UNALIGNED_ACCESS. * expmed.c (simple_mem_bitfield_p): Likewise. * expr.c (alignment_for_piecewise_move): Likewise. (emit_group_load_1): Likewise. (emit_group_store): Likewise. (copy_blkmode_from_reg): Likewise. (emit_push_insn): Likewise. (expand_assignment): Likewise. (store_field): Likewise. (expand_expr_real_1): Likewise. * gimple-fold.c (gimple_fold_builtin_memory_op): Likewise. * lra-constraints.c (simplify_operand_subreg): Likewise. * stor-layout.c (bit_field_mode_iterator::next_mode): Likewise. * gimple-ssa-store-merging.c: Likewise in block comment at start of file. * tree-ssa-strlen.c: Include target.h. (handle_builtin_memcmp): Use targetm.slow_unaligned_access instead of SLOW_UNALIGNED_ACCESS. * system.h (SLOW_UNALIGNED_ACCESS): Poison. Co-Authored-By: Alan Hayward <alan.hayward@arm.com> Co-Authored-By: David Sherwood <david.sherwood@arm.com> From-SVN: r252009
2017-09-12PR81285: Fix uninitialised variable in emit_store_flag_intRichard Sandiford2-10/+17
2017-09-12 Richard Sandiford <richard.sandiford@linaro.org> gcc/ PR rtl-optimization/82185 * expmed.c (emit_store_flag_int): Only test tem if it has been initialized. From-SVN: r252008
2017-09-12re PR middle-end/82149 (match.pd: 2919: bad if test ?)Richard Biener2-1/+6
2017-09-12 Richard Biener <rguenther@suse.de> PR middle-end/82149 * match.pd ((FTYPE) N CMP CST): Fix typo. From-SVN: r252007
2017-09-12Add short_call function attribute for MIPSSimon Atanasyan8-4/+37
gcc/ * config/mips/mips.c (mips_attribute_table): Add 'short_call' attribute. (mips_near_type_p): Add 'short_call' attribute as a synonym for 'near'. * doc/extend.texi (short_call): Document new function attribute. gcc/testsuite * gcc.target/mips/near-far-1.c: Add check for 'short_call' attribute. * gcc.target/mips/near-far-2.c: Likewise. * gcc.target/mips/near-far-3.c: Likewise. * gcc.target/mips/near-far-4.c: Likewise. From-SVN: r252006
2017-09-12Kill CLASSTYPE_SORTED_FIELDS.Nathan Sidwell4-169/+310
* cp-tree.h (struct lang_type): Lose sorted_fields member. (CLASSTYPE_SORTED_FIELDS): Delete. * name-lookup.h (set_class_bindings): Add EXTRA arg. * name-lookup.c (fields_linear_search): New, broken out of ... (lookup_field_1): ... here. Delete remainder of function. (get_class_binding_direct): Reimplement without sorted_fields. (get_class_binding): Rename TYPE arg to KLASS, for consistency. (get_method_slot): Call set_class_binding when creating method_vec on complete type. (method_name_cmp): Order identically named slots. (sorted_fields_type_new): Delete. (field_vc_append_class_fields): Rename to ... (method_vec_append_class_fields): ... here. Adjust. (field_vec_append_enum_values): Renme to ... (method_vec_append_enum_values): ... here. Adjust. (method_vec_dedup): New. (set_class_bindings): Reimplement. (insert_late_enum_def_bindings): Reimplement. From-SVN: r252005
2017-09-12name-lookup.c (get_class_binding): Rename TYPE arg to KLASS for consistency.Nathan Sidwell2-47/+58
* name-lookup.c (get_class_binding): Rename TYPE arg to KLASS for consistency. (restort_data): Move later. (method_name_cmp, resort_method_name_cmp): Simplify. (resort_type_method_vec): Reformat. From-SVN: r252004
2017-09-12re PR target/82112 (internal compiler error: in fold_convert_loc, at ↵Jakub Jelinek5-4/+57
fold-const.c:2262) PR target/82112 * c-common.c (sync_resolve_size): Instead of c_dialect_cxx () assertion check that in the condition. (get_atomic_generic_size): Likewise. Before testing if parameter has pointer type, if it has array type, call for C++ default_conversion to perform array-to-pointer conversion. * c-c++-common/pr82112.c: New test. * gcc.dg/pr82112.c: New test. From-SVN: r252003
2017-09-12tree-vect-generic.c (expand_vector_operations_1): Do nothing for operations ↵Richard Biener2-2/+15
we cannot scalarize. 2017-09-12 Richard Biener <rguenther@suse.de> * tree-vect-generic.c (expand_vector_operations_1): Do nothing for operations we cannot scalarize. From-SVN: r252002
2017-09-12[multiple changes]Arnaud Charlet8-23/+64
2017-09-12 Bob Duff <duff@adacore.com> * sem_warn.adb: Minor comment. 2017-09-12 Bob Duff <duff@adacore.com> * libgnat/a-cbdlli.adb, libgnat/a-cbhama.adb, libgnat/a-cbmutr.adb, libgnat/a-cborma.adb: Rename New_Item to be Default_Initialized_Item, and apply pragma Unmodified to it, to suppress the warning. 2017-09-12 Eric Botcazou <ebotcazou@adacore.com> * exp_aggr.adb (Aggr_Assignment_OK_For_Backend): Add early return for access types. 2017-09-12 Yannick Moy <moy@adacore.com> * gnat1drv.adb (Adjust_Global_Switches): Consider Refined_Global together with Global when ignoring one in CodePeer mode. 2017-09-12 Javier Miranda <miranda@adacore.com> * sem_ch3.adb (Analyze_Declarations): In nested package declarations that have a private part enable missing check of the RM rule 13.1.1(11/3): usage names in aspect definitions are resolved at the end of the immediately enclosing declaration list. From-SVN: r252001
2017-09-12[multiple changes]Arnaud Charlet10-6/+6541
2017-09-12 Bob Duff <duff@adacore.com> * sem_ch6.adb (Analyze_Expression_Function): Initialize Def_Id to Empty. 2017-09-12 Georges-Axel Jaloyan <jaloyan@adacore.com> * debug.adb: Reserving flag -gnatdF for safe pointer checking. * gnat1drv.adb (gnat1drv): Adding the call to the analysis on dF flag. * sem_spark.adb, sem_spark.ads: Implementation of the analysis, in preparation for the evolution of the SPARK language that includes a pointer analysis for checking non-aliasing of access types. The Check_Safe_Pointers function is the entry point, and will traverse the AST and raise compile-time errors everytime it detects non-begign aliasing. Detailed comments are present in the sem_spark.ads file. * sem_util.adb, sem_util.ads (First_Global, Next_Global): New functions to iterate over the list of globals of a subprogram. * libgnat/system.ads: Add restriction No_Finalization. * gcc-interface/Make-lang.in: Add new file sem_spark.adb and dependency on g-dynhta.adb. From-SVN: r252000
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