| Age | Commit message (Collapse) | Author | Files | Lines |
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The following fixes the index guards on the component stripping
loops, I swapped them it seems.
PR tree-optimization/121362
* tree-ssa-sccvn.cc (vn_reference_lookup_3): Swap index
guards on component stripping loops.
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Add run and asm check test cases for scalar unsigned
SAT_MUL form 2.
gcc/testsuite/ChangeLog:
* gcc.target/riscv/sat/sat_arith.h: Add test helper macros.
* gcc.target/riscv/sat/sat_u_mul-3-u16.c: New test.
* gcc.target/riscv/sat/sat_u_mul-3-u32.c: New test.
* gcc.target/riscv/sat/sat_u_mul-3-u64.c: New test.
* gcc.target/riscv/sat/sat_u_mul-3-u8.c: New test.
* gcc.target/riscv/sat/sat_u_mul-run-3-u16.c: New test.
* gcc.target/riscv/sat/sat_u_mul-run-3-u32.c: New test.
* gcc.target/riscv/sat/sat_u_mul-run-3-u64.c: New test.
* gcc.target/riscv/sat/sat_u_mul-run-3-u8.c: New test.
Signed-off-by: Pan Li <pan2.li@intel.com>
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For mul_overflow api, we will have PHI node similar as below:
_6 = .MUL_OVERFLOW (a_4(D), b_5(D));
_2 = IMAGPART_EXPR <_6>;
if (_2 != 0)
goto <bb 4>; [35.00%]
else
goto <bb 3>; [65.00%]
<bb 3> [local count: 697932184]:
_1 = REALPART_EXPR <_6>;
<bb 4> [local count: 1073741824]:
# _3 = PHI <18446744073709551615(2), _1(3)>
Based on the help of match.pd pattern match, the widening-mul will
try to convert it to below:
_3 = .SAT_MUL (a_4(D), b_5(D));
gcc/ChangeLog:
* tree-ssa-math-opts.cc (match_saturation_mul): Add new func
to emit IFN_SAT_MUL if matched.
(math_opts_dom_walker::after_dom_children): Try to match
the phi node for SAT_MUL.
Signed-off-by: Pan Li <pan2.li@intel.com>
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This patch would like to try to match the the unsigned
SAT_MUL form 2, aka below:
#define DEF_SAT_U_MUL_FMT_2(T) \
T __attribute__((noinline)) \
sat_u_mul_##T##_fmt_2 (T a, T b) \
{ \
T result; \
if (__builtin_mul_overflow(a, b, &result)) \
return -1; \
else \
return result; \
}
While T is uint8_t, uint16_t, uint32_t and uint64_t.
gcc/ChangeLog:
* match.pd: Add form 2 for unsigned SAT_MUL.
Signed-off-by: Pan Li <pan2.li@intel.com>
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The previous cost value for vec_duplicate almost bases on the operators
like add/minus. The rtx_cost function try to match them case by case
and find if it has vec_duplicate, then update the cost values.
It is Ok when we initially add it but looks confused/redundant as more
and more operators are involved. As Robin's suggestion, we only care
about the sub-rtx has vec_duplicate or not, instead of take care of
it by operators.
Thus, this PR would like to refactor that and get rid of the operators
when compute the vec_duplicate cost.
The below test suites are passed for this patch series.
* The rv64gcv fully regression test.
gcc/ChangeLog:
* config/riscv/riscv.cc (get_vector_binary_rtx_cost): Remove.
(riscv_rtx_costs): Refactor to serach vec_duplicate on the
sub rtx.
gcc/testsuite/ChangeLog:
* gcc.target/riscv/rvv/autovec/binop/vadd-rv32gcv-nofm.c: Update
asm check due to above change.
* gcc.target/riscv/rvv/autovec/binop/vadd-rv64gcv-nofm.c: Ditto.
* gcc.target/riscv/rvv/autovec/binop/vmul-rv32gcv-nofm.c: Ditto.
* gcc.target/riscv/rvv/autovec/binop/vmul-rv64gcv-nofm.c: Ditto.
* gcc.target/riscv/rvv/autovec/binop/vsub-rv32gcv-nofm.c: Ditto.
* gcc.target/riscv/rvv/autovec/binop/vsub-rv64gcv-nofm.c: Ditto.
* gcc.target/riscv/rvv/autovec/cond/cond_copysign-rv32gcv.c: Ditto.
* gcc.target/riscv/rvv/autovec/cond/cond_copysign-rv64gcv.c: Ditto.
* gcc.target/riscv/rvv/autovec/cond/cond_fadd-1.c: Ditto.
* gcc.target/riscv/rvv/autovec/cond/cond_fadd-2.c: Ditto.
* gcc.target/riscv/rvv/autovec/cond/cond_fadd-3.c: Ditto.
* gcc.target/riscv/rvv/autovec/cond/cond_fadd-4.c: Ditto.
* gcc.target/riscv/rvv/autovec/cond/cond_fma_fnma-1.c: Ditto.
* gcc.target/riscv/rvv/autovec/cond/cond_fma_fnma-3.c: Ditto.
* gcc.target/riscv/rvv/autovec/cond/cond_fma_fnma-4.c: Ditto.
* gcc.target/riscv/rvv/autovec/cond/cond_fma_fnma-5.c: Ditto.
* gcc.target/riscv/rvv/autovec/cond/cond_fma_fnma-6.c: Ditto.
* gcc.target/riscv/rvv/autovec/cond/cond_fmax-1.c: Ditto.
* gcc.target/riscv/rvv/autovec/cond/cond_fmax-2.c: Ditto.
* gcc.target/riscv/rvv/autovec/cond/cond_fmax-3.c: Ditto.
* gcc.target/riscv/rvv/autovec/cond/cond_fmax-4.c: Ditto.
* gcc.target/riscv/rvv/autovec/cond/cond_fmax_zvfh-1.c: Ditto.
* gcc.target/riscv/rvv/autovec/cond/cond_fmax_zvfh-2.c: Ditto.
* gcc.target/riscv/rvv/autovec/cond/cond_fmax_zvfh-3.c: Ditto.
* gcc.target/riscv/rvv/autovec/cond/cond_fmax_zvfh-4.c: Ditto.
* gcc.target/riscv/rvv/autovec/cond/cond_fmin-1.c: Ditto.
* gcc.target/riscv/rvv/autovec/cond/cond_fmin-2.c: Ditto.
* gcc.target/riscv/rvv/autovec/cond/cond_fmin-3.c: Ditto.
* gcc.target/riscv/rvv/autovec/cond/cond_fmin-4.c: Ditto.
* gcc.target/riscv/rvv/autovec/cond/cond_fmin_zvfh-1.c: Ditto.
* gcc.target/riscv/rvv/autovec/cond/cond_fmin_zvfh-2.c: Ditto.
* gcc.target/riscv/rvv/autovec/cond/cond_fmin_zvfh-3.c: Ditto.
* gcc.target/riscv/rvv/autovec/cond/cond_fmin_zvfh-4.c: Ditto.
* gcc.target/riscv/rvv/autovec/cond/cond_fms_fnms-1.c: Ditto.
* gcc.target/riscv/rvv/autovec/cond/cond_fms_fnms-3.c: Ditto.
* gcc.target/riscv/rvv/autovec/cond/cond_fms_fnms-4.c: Ditto.
* gcc.target/riscv/rvv/autovec/cond/cond_fms_fnms-5.c: Ditto.
* gcc.target/riscv/rvv/autovec/cond/cond_fms_fnms-6.c: Ditto.
* gcc.target/riscv/rvv/autovec/cond/cond_fmul-1.c: Ditto.
* gcc.target/riscv/rvv/autovec/cond/cond_fmul-2.c: Ditto.
* gcc.target/riscv/rvv/autovec/cond/cond_fmul-3.c: Ditto.
* gcc.target/riscv/rvv/autovec/cond/cond_fmul-4.c: Ditto.
* gcc.target/riscv/rvv/autovec/cond/cond_fmul-5.c: Ditto.
* gcc.target/riscv/rvv/autovec/vx_vf/vf-3-f16.c: Ditto.
* gcc.target/riscv/rvv/autovec/vx_vf/vf-3-f32.c: Ditto.
* gcc.target/riscv/rvv/autovec/vx_vf/vf-3-f64.c: Ditto.
* gcc.target/riscv/rvv/autovec/vx_vf/vx-6-i16.c: Ditto.
* gcc.target/riscv/rvv/autovec/vx_vf/vx-6-i8.c: Ditto.
Signed-off-by: Pan Li <pan2.li@intel.com>
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Fix the bound checking for the opc1 operand of the following intrinsics:
__arm_mcrr
__arm_mcrr2
__arm_mrrc
__arm_mrrc2
gcc/ChangeLog:
PR target/121464
* config/arm/arm.md (arm_<mrrc>, arm_<mcrr>): Fix operand check.
gcc/testsuite/ChangeLog:
PR target/121464
* gcc.target/arm/acle/mcrr.c: Update testcase.
* gcc.target/arm/acle/mcrr2.c: Likewise.
* gcc.target/arm/acle/mrrc.c: Likewise.
* gcc.target/arm/acle/mrrc2.c: Likewise.
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In g:965564eafb721f8000013a3112f1bba8d8fae32b I'd added code
to try distributing non-widening subregs through logic ops,
in cases where that would eliminate a term of the logic op.
For "reasons", this indirectly caused combine to generate:
(set (zero_extract:SI (reg/v:SI 101 [ a ])
(const_int 8 [0x8])
(const_int 8 [0x8]))
(not:SI (sign_extract:SI (reg:SI 107 [ b ])
(const_int 8 [0x8])
(const_int 8 [0x8]))))
instead of:
(set (zero_extract:SI (reg/v:SI 101 [ a ])
(const_int 8 [0x8])
(const_int 8 [0x8]))
(subreg:SI (not:QI (subreg:QI (sign_extract:SI (reg:SI 107 [ b ])
(const_int 8 [0x8])
(const_int 8 [0x8])) 0)) 0))
for some tests that were intended to match x86's *one_cmplqi_ext<mode>_1
(see g:a58d770fa1d17ead3c38417b299cce3f19f392db). However, other more
direct ways of generating the pattern continued to have the unsimplified
(subreg:SI (not:QI (subreg:QI (...:SI ...)))) structure, since that
structure wasn't the focus of the original patch.
This patch tries to tackle that simplification head-on. It's another
case of distributing subregs, but this time for non-narrowing rather
than non-widening subregs. We already do the same distribution for
word_mode:
/* Attempt to simplify WORD_MODE SUBREGs of bitwise expressions. */
if (outermode == word_mode
&& (GET_CODE (op) == IOR || GET_CODE (op) == XOR || GET_CODE (op) == AND)
&& SCALAR_INT_MODE_P (innermode))
{
rtx op0 = simplify_subreg (outermode, XEXP (op, 0), innermode, byte);
rtx op1 = simplify_subreg (outermode, XEXP (op, 1), innermode, byte);
if (op0 && op1)
return simplify_gen_binary (GET_CODE (op), outermode, op0, op1);
}
which g:0340177d54d08b6375391ba164a878e6a596275e extended to NOT.
For word_mode, there are (reasonably) no restrictions on the inner
mode other than that it is an integer. Doing word_mode logic ops
should be at least as efficient as subword logic ops (if the target
provides subword ops at all). And word_mode logic ops should be
cheaper than multi-word logic ops.
But here we need the distribution for SImode rather than word_mode
(DImode). The patch therefore extends the word_mode distributions
to non-narrowing subregs in which the two modes occupy the same
number of words. This should hopefully be relatively conservative.
It prevents the new rule from going away from word_mode, and attempting
to convert (say) a QImode subreg of a word_mode AND into a QImode AND.
It should be suitable for both CISCy and RISCy targets, including
those that define WORD_REGISTER_OPERATIONS.
The patch also fixes some overlong lines in related code.
gcc/
PR rtl-optimization/121306
* simplify-rtx.cc (simplify_context::simplify_subreg): Distribute
non-narrowing integer-to-integer subregs through logic ops,
in a similar way to the existing word_mode handling.
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This patch fixes some comment typos, singe -> single and unsinged -> unsigned.
2025-08-11 Jakub Jelinek <jakub@redhat.com>
gcc/
* tree-cfg.cc (find_case_label_for_value): Fix comment typo,
singe-valued -> single-valued.
* config/arc/arc.md: Fix comment typos, unsinged -> unsigned.
gcc/fortran/
* gfortran.h (gfc_case): Fix comment typo, singe -> single.
gcc/testsuite/
* g++.dg/warn/template-1.C: Fix comment typo, unsinged -> unsigned.
* gcc.target/powerpc/builtins-2-p9-runnable.c (main): Likewise.
* gcc.dg/graphite/id-30.c: Likewise.
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I've realized I haven't added testsuite coverage for name independent
structured binding packs. And the
auto [i, ..._, j] = T {};
auto [k, ..._, l] = T {};
case shows a problem with that. The elements of the structured binding
pack have #i appended to their names, so for the _ case e.g. _#0, _#1
etc. (to print something useful in diagnostics, perhaps debug info later
on). The above is valid though as long as one doesn't use _ (which is
ambiguous), but we were emitting errors on redeclaration of _#0, _#1
etc.
The following patch uses DECL_NAME (decl) = NULL_TREE; for the
name independent decl case so that the false positive redeclaration
errors aren't emitted.
2025-08-11 Jakub Jelinek <jakub@redhat.com>
PR c++/117783
* decl.cc (set_sb_pack_name): For name independent decls
just clear DECL_NAME instead of appending #i to it.
* g++.dg/cpp26/name-independent-decl11.C: New test.
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On Wed, Aug 06, 2025 at 11:53:55AM -0700, Jason Merrill wrote:
> The Clang mangling of the underlying variable seems fine, just mentioning
> the bound names; we can't get mangling collisions between pack and non-pack
> versions of the same name.
>
> But It looks like they use .N discriminators for the individual elements,
> which is wrong because . is reserved for implementation details. But I'd
> think it should be fine to use [<discriminator>] instead.
If you want the whole structured bindings to be mangled normally as if the
pack isn't a pack and the individual vars of the structured binding pack
mangled as multiple occurrences of the named entities, the following
patch does that.
2025-08-11 Jakub Jelinek <jakub@redhat.com>
PR c++/117783
* decl.cc (cp_finish_decomp): Don't sorry on tuple static
structured bindings with a pack, instead temporarily reset
DECL_NAME of the individual vars in the pack to the name
of the pack for cp_finish_decl time and force mangling.
* g++.dg/cpp26/decomp19.C: Don't expect sorry on tuple static
structured bindings with a pack.
* g++.dg/cpp26/decomp26.C: New test.
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My C++26 P2686R4 PR117784 caused ICE on the following testcase.
While the earlier conditions guarantee decl2 is not error_mark_node,
decl can be (that is used when something erroneous has been seen earlier
and the whole structured bindings will be ignored after parsing).
So, the following patch avoids the copying of constexpr/constinit flags
if decl is error_mark_node.
2025-08-11 Jakub Jelinek <jakub@redhat.com>
PR c++/121442
* parser.cc (cp_parser_decomposition_declaration): Don't copy
DECL_DECLARED_CONST{EXPR,INIT}_P bits from decl to decl2 if
decl is error_mark_node.
* g++.dg/cpp1z/decomp65.C: New test.
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Grow the local frame down instead of up for mips16 code size.
By growing the frame downwards we get spill slots created at the lowest
address rather than highest address in a local frame. The benefit being
that when the frame is large the spill slots can still be accessed using
a 16bit instruction whereas it is less important for large local
variables to be accessed using short instructions as they are (probably)
accessed less frequently.
This is default on for MIPS16.
gcc/
* config/mips/mips.h (FRAME_GROWS_DOWNWARD) Allow the frame to
grow downwards for mips16 when -mgrow-frame-downwards is set.
* config/mips/mips.opt: Add -mgrow-frame-downwards option.
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We increased the switch conversion array decl alignment
for better mergeability but it turns out that we increase
the alignment on targets which don't support mergeable sections
(e.g. NVPTX). Also after the fix for PR 121394, it becomes
obvious that we can place any sized into the mergeable section
instead of increasing the alignment.
This implements that and now also fixes PR 121438 as we don't
need to increase the alignment for the mergeable decls that
were being created by the C++ front-end.
Bootstrapped and tested on x86_64-linux-gnu.
PR middle-end/121438
PR middle-end/121444
gcc/ChangeLog:
* output.h (MAX_ALIGN_MERGABLE): Rename to ...
(MAX_MERGEABLE_BITSIZE): This.
* tree-switch-conversion.cc (switch_conversion::build_one_array): Don't
increase the alignment.
* varasm.cc (mergeable_string_section): Use MAX_MERGEABLE_BITSIZE
instead of MAX_ALIGN_MERGABLE. Also replace `/ 8` with `/ BITS_PER_UNIT`.
(mergeable_constant_section): Select the mergeable section based on
the bitsize rather than the alignment. Make sure the align is less
than the entity size.
Signed-off-by: Andrew Pinski <quic_apinski@quicinc.com>
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Now there are mergeable sections which have an entity size, we can place
decls (constants) that are smaller in size in these sections.
An example is an `long double` which has a size of 12 bytes on i686 and is
placed in the 16 bytes shareable section.
For an example with the following C++ code:
```
std::initializer_list<long double> a = {0.3l};
```
We place the constant array in the .rodata.cst16 section but we don't add a padding to 16 bytes.
```
.section .rodata.cst16,"aM",@progbits,16
.align 16
.type _ZGR1a_, @object
.size _ZGR1a_, 12
_ZGR1a_:
.long -1717986918
.long -1717986919
.long 16381
.text
```
GAS has a workaround added to do the padding but other assemblers don't.
The gas workaround was added with https://sourceware.org/legacy-ml/binutils/2002-11/msg00615.html .
Now for the constant pool, GCC does emit a `.align` to padd out the size correctly.
This was done in r0-46282-gf41115930523b3.
The same padding should be done when emitting a variable contents when in a mergeable section.
This patch implements the padding and we now get an addition `.zero 4` which pads out the section.
Bootstrapped and tested on x86_64-linux-gnu.
PR middle-end/121394
gcc/ChangeLog:
* varasm.cc (assemble_variable_contents): Pad out
mergeable sections if needed.
(output_constant_pool_1): Change the padding to be explicit
zeroing for mergeable sections.
Signed-off-by: Andrew Pinski <quic_apinski@quicinc.com>
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Regenerate configure files after
commit 8a3ad190c14789cde0b03142760b14b5675e8b39
Author: Ijaz, Abdul B <abdul.b.ijaz@intel.com>
Date: Sun Aug 10 08:33:30 2025 -0600
config: Handle dash in library name for AC_LIB_LINKAGEFLAGS_BODY
gcc/
* configure: Regenerated.
libcpp/
* configure: Regenerated.
libgcobol/
* configure: Regenerated.
libstdc++-v3/
* configure: Regenerated.
Signed-off-by: H.J. Lu <hjl.tools@gmail.com>
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Since i?86 and x86_64 GCC can generate codes for ia32, x32 and lp64, adjust
asm-hard-reg-6.c scan for x86 with ia32, lp64 and x32.
PR testsuite/121205
* gcc.dg/asm-hard-reg-6.c: Adjust scan for x86 with ia32, lp64 and
x32.
Signed-off-by: H.J. Lu <hjl.tools@gmail.com>
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Since i?86 and x86_64 GCC can generate codes for ia32, x32 and lp64,
compile asm-hard-reg-5.c for x86 !ia32.
PR testsuite/121205
* gcc.dg/asm-hard-reg-5.c: Compile for x86 !ia32.
Signed-off-by: H.J. Lu <hjl.tools@gmail.com>
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Since i?86 and x86_64 GCC can generate codes for ia32, x32 and lp64,
compile asm-hard-reg-4.c for x86 with -msse2 and scan x86
PR testsuite/121205
* gcc.dg/asm-hard-reg-4.c: Compile with -msse2 for x86 and scan
x86.
Signed-off-by: H.J. Lu <hjl.tools@gmail.com>
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Since i?86 and x86_64 GCC can generate codes for ia32, x32 and lp64,
compile asm-hard-reg-2.c for x86 !ia32 and scan x86.
PR testsuite/121205
* gcc.dg/asm-hard-reg-2.c: Compile for x86 !ia32 and scan x86.
Signed-off-by: H.J. Lu <hjl.tools@gmail.com>
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Since i?86 and x86_64 GCC can generate codes for ia32, x32 and lp64, adjust
asm-hard-reg-1.c scan for x86 with ia32, x32 and lp64.
PR testsuite/121205
* gcc.dg/asm-hard-reg-1.c: Adjust scan for x86 with ia32, x32 and
lp64.
Signed-off-by: H.J. Lu <hjl.tools@gmail.com>
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When gcc build with --enable-deafult-pie the following tests
were getting failed:
FAIL: gcc.target/i386/pr90579.c scan-assembler vaddsd\tr\\+40
FAIL: gcc.target/i386/pr90579.c scan-assembler vaddsd\tr\\+32
FAIL: gcc.target/i386/pr90579.c scan-assembler vaddsd\tr\\+24
FAIL: gcc.target/i386/pr90579.c scan-assembler vaddsd\tr\\+16
PR target/118885
gcc/testsuite/ChangeLog:
* gcc.target/i386/pr90579.c: add -fno-pie to dg-options
to fix tests when PIE is enabled.
Signed-off-by: Harish Sadineni <Harish.Sadineni@windriver.com>
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Prior to 14-2027-g985d6480fe5, the input text had the file extensions
pruned. In 14-2027-g985d6480fe5, due to the move of the call, the
pruning is never done. This change restores the pruning of the file
extension to allow multiline test to pass on both Windows and other
platforms like Linux.
gcc/testsuite/ChangeLog:
* lib/multiline.exp: Added pruning of .exe.
Signed-off-by: Torbjörn SVENSSON <torbjorn.svensson@foss.st.com>
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Use long long on z to trigger
error: 'asm' operand has impossible constraints or there are not enough registers
for -m32 on asm statements like:
__asm__ __volatile__ ("" : "=A" (z), "={rax}" (y));
PR testsuite/121205
* gcc.target/i386/asm-hard-reg-2.c (z): Use long long for -m32
to trigger RA error.
Signed-off-by: H.J. Lu <hjl.tools@gmail.com>
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When we are using section anchors, there's a requirement that the
sequence of the content is an unbroken block. If we allow linker-
visible symbols in that block, ld(64) would be able to break it
into sub-sections on those symbol boundaries.
Do not allow symbols that should be visible to be anchored.
Do not make anchor block internal symbols linker-visible.
gcc/ChangeLog:
* config/darwin.cc (darwin_encode_section_info): Do not
make anchored symbols linker-visible.
(darwin_use_anchors_for_symbol_p): Disallow anchoring on
symbols that must be linker-visible (or external), even
if the definitions are in this TU.
Signed-off-by: Iain Sandoe <iain@sandoe.co.uk>
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In principle, these begin (or at least delineate) a region that
could be split by the static linker. If the symbols are hidden
to newer linkers they produce diagnostics about the temporary
symbol generated.
gcc/ChangeLog:
* config/darwin.h (ASM_GENERATE_INTERNAL_LABEL): New
entry for LANCHOR.
Signed-off-by: Iain Sandoe <iain@sandoe.co.uk>
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Looks like I broke the build with r16-3091-gac4e7455a33237 on hosts
where unsigned == size_t.
../../gcc/gcc/diagnostics/dumping.cc:98:1: error: redefinition of ‘void diagnostics::dumping::emit_field(FILE*, int, const char*, T) [with T = unsigned int; FILE = FILE]’
98 | emit_field<unsigned> (FILE *outfile, int indent,
| ^~~~~~~~~~~~~~~~~~~~
../../gcc/gcc/diagnostics/dumping.cc:80:1: note: ‘void diagnostics::dumping::emit_field(FILE*, int, const char*, T) [with T = unsigned int; FILE = FILE]’ previously declared here
80 | emit_field<size_t> (FILE *outfile, int indent,
| ^~~~~~~~~~~~~~~~~~
Sorry about this.
Should be fixed by the following patch, which avoids templates here
in favor of being explicit about types, avoids the use of "%zi" with
fprintf in various places, and fixes some other minor issues in the
dumping logic that I noticed whilst testing the patch.
gcc/ChangeLog:
* diagnostics/context.cc (context::dump): Bulletproof against
m_reference_printer being null.
* diagnostics/dumping.cc (emit_field<const char *>): Replace
with...
(emit_string_field): ...this.
(emit_field<char *>): Eliminate.
(emit_field<bool>): Replace with...
(emit_bool_field): ...this.
(emit_field<size_t>): Replace with...
(emit_size_t_field): ...this, and use HOST_SIZE_T_PRINT_DEC rather
than %zi in fprintf call.
(emit_field<int>): Replace with...
(emit_int_field): ...this.
(emit_field<unsigned>): Replace with...
(emit_unsigned_field): ...this.
* diagnostics/dumping.h (emit_field): Replace this template decl
with...
(emit_string_field): ...this,
(emit_bool_field): ...this,
(emit_size_t_field): ...this,
(emit_int_field): ...this,
(emit_unsigned_field): ... and this.
(DIAGNOSTICS_DUMPING_EMIT_FIELD): Rename to...
(DIAGNOSTICS_DUMPING_EMIT_BOOL_FIELD): ...this and update for
above change.
* diagnostics/file-cache.cc (file_cache_slot::dump): Replace
emit_field calls with calls that explicitly state the type. Fix
type of dump of m_missing_trailing_newline to use bool.
(file_cache_slot::dump): Use HOST_SIZE_T_PRINT_DEC rather than
%zi in fprintf call.
* diagnostics/html-sink.cc (html_generation_options::dump): Update
for macro renaming.
* diagnostics/sarif-sink.cc
(sarif_serialization_format_json::dump): Likewise.
(sarif_generation_options::dump): Likewise, and for function
renaming.
* diagnostics/text-sink.cc (text_sink::dump): Update for macro
renaming.
* libgdiagnostics.cc (diagnostic_manager_debug_dump_file): Use
HOST_SIZE_T_PRINT_DEC rather than %zi in fprintf call.
* pretty-print.cc: Include "diagnostics/dumping.h".
(pp_formatted_chunks::dump): Use it.
(get_url_format_as_string): New.
(pretty_printer::dump): Use diagnostics::dumping. Bulletproof
against m_buffer being null.
Signed-off-by: David Malcolm <dmalcolm@redhat.com>
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The g++.dg/modules/class-11_a.H test expects structs to have a padding.
Skip this test for targets which have packed structs by default.
This patch fixes the test for pru-unknown-elf from FAIL to UNSUPPORTED.
The test still passes on x86_64-linux-gnu.
gcc/testsuite/ChangeLog:
* g++.dg/modules/class-11_a.H: Skip test for effective
default_packed targets.
* g++.dg/modules/class-11_b.C: Ditto.
Signed-off-by: Dimitar Dimitrov <dimitar@dinux.eu>
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2025-08-09 Paul Thomas <pault@gcc.gnu.org>
gcc/fortran
PR fortran/121182
* decl.cc (match_generic_stmt): New function based on original
gfc_match_generic but feeding namespace rather than typebound
generics.
(match_typebound_generic): Renamed original gfc_match_generic.
(gfc_match_generic): New function that selects between type
bound generic and other generic statements and calls one of the
above two functions as appropriate.
* parse.cc (decode_specification_statement): Allow generic
statements.
(parse_spec): Accept a generic statement in a specification
block.
gcc/testsuite/
PR fortran/121182
* gfortran.dg/generic_stmt_1.f90: New test.
* gfortran.dg/generic_stmt_2.f90: New test.
* gfortran.dg/generic_stmt_3.f90: New test.
* gfortran.dg/generic_stmt_4.f90: New test.
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The test uses _Atomic int type, so add a filter to ensure the target
supports it.
This fixes a spurious test failure on pru-unknown-elf, which lacks
atomic ops. The test still passes on x86_64-linux-gnu.
gcc/testsuite/ChangeLog:
* gcc.dg/torture/hardbool-ai.c: Require target that supports
atomic operations on int types.
Signed-off-by: Dimitar Dimitrov <dimitar@dinux.eu>
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References to literal pool entries do not need to be reloaded or converted
to "(mem (reg X))" to load via base register.
gcc/ChangeLog:
* config/xtensa/constraints.md (T):
Change define_memory_constraint to define_special_memory_constraint.
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[PR120599]
In the testcase provided, currently we lose the landing pad for the exception that could
throw from the aggregate load as we remove one copy and the second statement where load
happens was not marked as throwable before so the landing pad for that internal throw is
now gone.
The fix is to ignore statements that could throw (internally or externally).
PR tree-optimization/120599
gcc/ChangeLog:
* tree-ssa-forwprop.cc (optimize_agr_copyprop): Don't try to copy
from statements that throw.
gcc/testsuite/ChangeLog:
* g++.dg/torture/noncall-eh-1.C: New test.
Signed-off-by: Andrew Pinski <quic_apinski@quicinc.com>
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backwalk
One thing I noticed while working on copy prop for aggregates is that we start with
a memcpy like statement and then walk backwards. This means we could have a few walks
backwards to see there was no statement for zeroing. Instead this changes the walk
backwards into a true forwprop. In the future we can expand to forwprop the zeroing
into say an function argument or something more than memcpy like statement.
This should speed up slightly the compile time performance since there will be less
memsets like statements than memcpy and there is only one walk forwards for memset like
staments instead of multiple walk backwards to find the memset.
Note this does add one extra improvement, the memcpy now does not need to have an address
as its dest argument; this could have been done before too but it was even more noticable
now because of the variable became only set so it was removed and the check was removed
as well.
There is also a fix on how ao_ref for the memset/memcpy is done, before it was just using
ao_ref_init which is wrong since it should instead of used ao_ref_init_from_ptr_and_size.
This part fixes PR 121422.
Changes since v1:
* v2: Add back limit on the walk which was missed in v1.
Move the call to get_addr_base_and_unit_offset outside
of the vuse loop.
* v3: Remove extra check before the call to optimize_aggr_zeroprop_1.
Fix setting up of ao_ref for memset (PR121422).
PR tree-optimization/118946
PR tree-optimization/121422
gcc/ChangeLog:
* tree-ssa-forwprop.cc (optimize_memcpy_to_memset): Remove.
(optimize_aggr_zeroprop_1): New function.
(optimize_aggr_zeroprop): New function.
(simplify_builtin_call): Don't call optimize_memcpy_to_memset
for memcpy but call optimize_aggr_zeroprop for memset.
(pass_forwprop::execute): Don't call optimize_memcpy_to_memset
for aggregate copies but rather call optimize_aggr_zeroprop
for aggregate stores.
gcc/testsuite/ChangeLog:
* gcc.dg/pr118946-1.c: New test.
* gcc.dg/torture/pr121422-1.c: New test.
* gcc.dg/torture/pr121422-2.c: New test.
Signed-off-by: Andrew Pinski <quic_apinski@quicinc.com>
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While thinking about how to implement the rest of the copy prop and makes sure not
to introduce some compile time problems, optimize_agr_copyprop should be changed
into a forwproping rather than looking backwards.
Bootstrapped and tested on x86_64-linux-gnu.
gcc/ChangeLog:
* tree-ssa-forwprop.cc (optimize_agr_copyprop): Change into a
forward looking (looking at vdef's uses) instead of a back
looking (vuse's def).
Signed-off-by: Andrew Pinski <quic_apinski@quicinc.com>
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In GCC 15 I added an experimental nesting view in text sinks
for hierarchical diagnostics, such as C++ template problems.
This patch enables it for text sinks by default. The old
behavior can be restored via -fno-diagnostics-show-nesting,
which the patch also adds to -fdiagnostics-plain-output.
The patch does not yet enable it for text sinks in sarif-replay.
gcc/ChangeLog:
PR diagnostics/116253
* common.opt (fdiagnostics-show-nesting): New option.
(fdiagnostics-show-nesting-locations): New option.
(fdiagnostics-show-nesting-levels): New option.
* common.opt.urls: Regenerate.
* diagnostics/context.cc (context::set_show_nesting): New.
(context::set_show_nesting_locations): New.
(context::set_show_nesting_levels): New.
* diagnostics/context.h (context::set_show_nesting): New decl.
(context::set_show_nesting_locations): New decl.
(context::set_show_nesting_levels): New decl.
* diagnostics/html-sink.cc: Tweak comment.
* diagnostics/output-spec.cc (text_scheme_handler::make_sink):
Rename "experimental-nesting" to "show-nesting" and enable by
default. Rename "experimental-nesting-show-locations" to
"show-nesting-locations". Rename
"experimental-nesting-show-levels" to "show-nesting-levels".
* diagnostics/sink.h (sink::dyn_cast_text_sink): New.
* diagnostics/text-sink.h (text_sink::dyn_cast_text_sink): New.
* doc/invoke.texi: Add -fdiagnostics-show-nesting,
-fdiagnostics-show-nesting-locations, and
-fdiagnostics-show-nesting-levels. Update for changes to
output-spec.cc above.
* lto-wrapper.cc (merge_and_complain): Ignore
OPT_fdiagnostics_show_nesting,
OPT_fdiagnostics_show_nesting_locations, and
OPT_fdiagnostics_show_nesting_levels.
(append_compiler_options): Likewise.
(append_diag_options): Likewise.
* opts-common.cc (decode_cmdline_options_to_array): Add
"-fno-diagnostics-show-nesting" to -fdiagnostics-plain-output.
* opts.cc (common_handle_option): Handle the new options.
(gen_command_line_string): Ignore the new options.
* toplev.cc (general_init): Call set_show_nesting,
set_show_nesting_locations, and set_show_nesting_levels on
global_dc.
gcc/testsuite/ChangeLog:
PR diagnostics/116253
* g++.dg/concepts/nested-diagnostics-1-truncated.C: Update for
renamed keys to -fdiagnostics-set-output=text
* g++.dg/concepts/nested-diagnostics-1.C: Likewise.
* g++.dg/concepts/nested-diagnostics-2.C: Likewise.
* gcc.dg/plugin/diagnostic-test-nesting-no-show-nesting.c: New
test.
* gcc.dg/plugin/diagnostic-test-nesting-show-nesting.c: New test.
* gcc.dg/plugin/diagnostic-test-nesting-text-indented-show-levels.c:
Update for renamed keys to -fdiagnostics-set-output=text.
* gcc.dg/plugin/diagnostic-test-nesting-text-indented-unicode.c:
Likewise.
* gcc.dg/plugin/diagnostic-test-nesting-text-indented.c: Likewise.
* gcc.dg/plugin/plugin.exp: Add the new tests.
Signed-off-by: David Malcolm <dmalcolm@redhat.com>
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The diagnostics subsystem has a handy dump feature, usable
during debugging via
(gdb) call global_dc->dump ()
which prints copious amounts of information about the state
of the diagnostics subsystem to stderr.
This patch consolidates the implementation and extends it, adding
various per-sink data (generation options specific to each of text,
SARIF, and HTML).
No functional difference intended outside of the debugger.
gcc/ChangeLog:
* Makefile.in (OBJS-libcommon): Add diagnostics/dumping.o.
* diagnostics/buffering.cc: Include "diagnostics/dumping.h".
(buffer::dump): Reimplement using diagnostics::dumping.
* diagnostics/context.cc: Include "diagnostics/dumping.h".
(context::dump): Reimplement using diagnostics::dumping.
Use sink::dump_kind when listing the sinks.
(sink::dump): Reimplement using diagnostics::dumping.
(counters::dump): Likewise.
* diagnostics/dumping.cc: New file.
* diagnostics/dumping.h: New file.
* diagnostics/file-cache.cc: Include "diagnostics/dumping.h".
(file_cache::dump): Reimplement using diagnostics::dumping.
(file_cache_slot::dump): Likewise.
* diagnostics/html-sink.cc: Include "diagnostics/dumping.h".
(html_generation_options::dump): New.
(html_sink_buffer::dump): Reimplement using diagnostics::dumping.
(html_builder::dump): New.
(html_sink::dump): Reimplement using diagnostics::dumping.
Add dump of the html_builder.
(html_file_sink::dump): Replace with...
(html_file_sink::dump_kind): ...this.
(html_buffered_sink::dump_kind): New.
* diagnostics/html-sink.h (html_generation_options::dump): New
decl.
* diagnostics/sarif-sink.cc: Include "diagnostics/dumping.h".
(sarif_serialization_format_json::dump): New.
(sarif_builder::dump): New.
(sarif_sink_buffer::dump): Reimplement using diagnostics::dumping.
(sarif_sink::dump): Likewise. Add dump of the sarif_builder.
(sarif_stream_sink::dump_kind): New.
(sarif_file_sink::dump): Replace with...
(sarif_file_sink::dump_kind): ...this.
(get_dump_string_for_sarif_version): New.
(sarif_generation_options::dump): New.
(class buffered_sink): Rename to...
(class sarif_buffered_sink): ...this.
(sarif_buffered_sink::dump_kind): New.
* diagnostics/sarif-sink.h (sarif_serialization_format::dump):
New.
(sarif_serialization_format_json::dump): New decl.
(sarif_generation_options::dump): New decl.
* diagnostics/sink.h (sink::dump_kind): New.
* diagnostics/text-sink.cc: Include "diagnostics/dumping.h".
(text_sink_buffer::dump): Reimplement using diagnostics::dumping.
(text_sink::dump): Likewise. Emit fields m_show_nesting,
m_show_locations_in_nesting, and m_show_nesting_levels.
* diagnostics/text-sink.h (text_sink::dump_kind): New.
Signed-off-by: David Malcolm <dmalcolm@redhat.com>
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No functional change intended.
gcc/ChangeLog:
* diagnostic.h (diagnostics::get_cwe_url): Move decl to
diagnostics/metadata.h.
(diagnostics::maybe_line_and_column): Move into
diagnostics::text_sink.
* diagnostics/context.cc: Update for maybe_line_and_column
becoming a static member of text_sink.
* diagnostics/metadata.h (diagnostics::get_cwe_url): Move decl
here from diagnostic.h.
* diagnostics/text-sink.cc (maybe_line_and_column): Convert to...
(text_sink::maybe_line_and_column): ...this.
* diagnostics/text-sink.h (text_sink::maybe_line_and_column): Move
here from diagnostic.h.
Signed-off-by: David Malcolm <dmalcolm@redhat.com>
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No functional change intended.
gcc/cp/ChangeLog:
* error.cc (cp_adjust_diagnostic_info): Convert "context" arg from
ptr to const &.
gcc/ChangeLog:
* diagnostics/context.cc (context::get_any_inlining_info): Convert
"context" arg of m_set_locations_cb from ptr to const &.
(context::report_diagnostic): Convert "context" arg of
m_adjust_diagnostic_info from ptr to const &.
* diagnostics/context.h (context::set_locations_callback_t):
Likewise.
(context::set_adjust_diagnostic_info_callback): Likewise.
(context::m_adjust_diagnostic_info): Likewise.
* tree-diagnostic.cc (set_inlining_locations): Likewise.
Signed-off-by: David Malcolm <dmalcolm@redhat.com>
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Consolidate 3 fields in diagnostics::context and
diagnostics::column_policy into a new struct
diagnostics::column_options.
No functional change intended; reduces the number of public
fields in diagnostics::context.
gcc/c-family/ChangeLog:
* c-indentation.cc (should_warn_for_misleading_indentation):
Update for moving diagnostics::context::m_tabstop into
diagnostics::column_options.
* c-opts.cc (c_common_post_options): Likewise.
gcc/ChangeLog:
* diagnostics/column-options.h: New file, adding struct
diagnostics::column_options, taken from fields in
diagnostics::context and diagnostics::column_policy.
* diagnostics/context.cc (context::initialize): Update for moving
fields of diagnostics::context into diagnostics::column_options.
(column_policy::column_policy): Likewise.
(column_policy::converted_column): Move implementation to...
(column_options::convert_column): ...this new function.
(context::report_diagnostic): Update for moving fields of
diagnostics::context into diagnostics::column_options.
(assert_location_text): Likewise.
* diagnostics/context.h: Include "diagnostics/column-options.h".
(class column_policy): Replace fields m_column_unit,
m_column_origin, and m_tabstop with m_column_options.
(context::get_column_options): New accessors.
(context::m_column_unit): Move to struct column_options and
replace with m_column_options.
(context::m_column_origin): Likewise.
(context::m_tabstop): Likewise.
* diagnostics/sarif-sink.cc (sarif_builder::sarif_builder): Update
for moving fields of diagnostics::context into
diagnostics::column_options.
* diagnostics/source-printing.cc: Likewise.
* opts.cc (common_handle_option): Likewise.
Signed-off-by: David Malcolm <dmalcolm@redhat.com>
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As discussed in https://gcc.gnu.org/pipermail/gcc-patches/2025-June/685733.html
the operand of the call should be a mem rather than an unspec.
This patch moves the unspec to an additional argument of the parallel
and adjusts cmse_nonsecure_call_inline_register_clear accordingly.
The scan-rtl-dump in cmse-18.c needs a fix since we no longer emit the
'unspec' part.
In addition, I noticed that since arm_v8_1m_mve_ok is always true in
the context of the test (we know we support CMSE as per cmse.exp, and
arm_v8_1m_mve_ok finds the adequate options), we actually only use the
more permissive regex. To improve that, the patch duplicates the
test, such that cmse-18.c forces -march=armv8-m.main+fp (so FPCXP is
disabled), and cmse-19.c forces -march=armv8.1-m.main+mve (so FPCXP is
enabled). Each test uses the appropriate scan-rtl-dump, and also
checks we are using UNSPEC_NONSECURE_MEM (we need to remove -slim for
that). The tests enable an FPU via -march so that the test passes
whether the testing harness forces -mfloat-abi or not.
2025-07-08 Christophe Lyon <christophe.lyon@linaro.org>
PR target/120977
gcc/
* config/arm/arm.md (call): Move unspec parameter to parallel.
(nonsecure_call_internal): Likewise.
(call_value): Likewise.
(nonsecure_call_value_internal): Likewise.
* config/arm/thumb1.md (nonsecure_call_reg_thumb1_v5): Likewise.
(nonsecure_call_value_reg_thumb1_v5): Likewise.
* config/arm/thumb2.md (nonsecure_call_reg_thumb2_fpcxt):
Likewise.
(nonsecure_call_reg_thumb2): Likewise.
(nonsecure_call_value_reg_thumb2_fpcxt): Likewise.
(nonsecure_call_value_reg_thumb2): Likewise.
* config/arm/arm.cc (cmse_nonsecure_call_inline_register_clear):
Likewise.
gcc/testsuite
* gcc.target/arm/cmse/cmse-18.c: Check only the case when FPCXT is
not enabled.
* gcc.target/arm/cmse/cmse-19.c: New test.
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This patch fixes incorrect constraints in RTL patterns for AArch64 SVE
gather/scatter with type widening/narrowing and vector-plus-immediate
addressing. The bug leads to below "immediate offset out of range"
errors during assembly, eventually causing compilation failures.
/tmp/ccsVqBp1.s: Assembler messages:
/tmp/ccsVqBp1.s:54: Error: immediate offset out of range 0 to 31 at operand 3 -- `ld1b z1.d,p0/z,[z1.d,#64]'
Current RTL patterns for such instructions incorrectly use vgw or vgd
constraints for the immediate operand, base on the vector element type
in Z registers (zN.s or zN.d). However, for gather/scatter with type
conversions, the immediate range for vector-plus-immediate addressing is
determined by the element type in memory, which differs from that in
vector registers. Using the wrong constraint can produce out-of-range
offset values that cannot be encoded in the instruction.
This patch corrects the constraints used in these patterns. A test case
that reproduces the issue is also included.
Bootstrapped and regression-tested on aarch64-linux-gnu.
gcc/ChangeLog:
PR target/121449
* config/aarch64/aarch64-sve.md
(mask_gather_load<mode><v_int_container>): Use vg<Vesize>
constraints for alternatives with immediate offset.
(mask_scatter_store<mode><v_int_container>): Likewise.
gcc/testsuite/ChangeLog:
PR target/121449
* g++.target/aarch64/sve/pr121449.C: New test.
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Currently they are grouped under Addressing Modes which is quite misleading.
gcc/
* doc/tm.texi.in: Add Vectorization and OpenMP and OpenACC
sub-sections to the list of target macros and functions.
* doc/tm.texi: Re-generate.
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The following removes early setting of STMT_VINFO_VECTYPE and as
side-effect early failing if we fail to compute a vector type. The
latter is now ensured by SLP build. The former is still temporarily
copied from the SLP tree during stmt analysis, and data reference
stmts will still have STMT_VINFO_VECTYPE given existing uses in
dependence and alignment analysis and peeling.
* tree-vect-loop.cc (vect_determine_vectype_for_stmt_1): Remove.
(vect_determine_vectype_for_stmt): Likewise.
(vect_set_stmts_vectype): Likewise.
(vect_analyze_loop_2): Do not call vect_set_stmts_vectype.
* tree-vect-stmts.cc (vect_mark_stmts_to_be_vectorized): Detect
irregular stmts early here.
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This relaxes an overzealous assert that required the fpm_t argument to
be in DImode when expanding FP8 intrinsics. Of course this fails to
account for modeless const_ints.
gcc/ChangeLog:
PR target/120986
* config/aarch64/aarch64-sve-builtins.cc
(function_expander::expand): Relax fpm_t assert to allow
modeless const_ints.
gcc/testsuite/ChangeLog:
PR target/120986
* gcc.target/aarch64/torture/pr120986-2.c: New test.
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The predication of the SVE2 FP8 dot product insns was relying on the
architectural dependency:
FEAT_FP8DOT2 => FEAT_FP8DOT4
which was relaxed in GCC as of
r15-7480-g299a8e2dc667e795991bc439d2cad5ea5bd379e2, thus leading to
unrecognisable insn ICEs when compiling a two-way FDOT with just
+fp8dot2. This patch introduces a new mode iterator which selectively
enables the appropriate mode(s) depending on which of the FP8DOT{2,4}
features are available, and uses it to fix the predication of the
patterns.
gcc/ChangeLog:
PR target/120986
* config/aarch64/aarch64-sve2.md (@aarch64_sve_dot<mode>):
Switch mode iterator from SVE_FULL_HSF to new iterator;
remove insn predicate as this is now taken care of by conditions
in the mode iterator.
(@aarch64_sve_dot_lane<mode>): Likewise.
* config/aarch64/iterators.md (SVE_FULL_HSF_FP8_FDOT): New.
gcc/testsuite/ChangeLog:
PR target/120986
* gcc.target/aarch64/pr120986-1.c: New test.
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The following avoids building BIT_FIELD_REFs of reference trees
that are unexpected by nonoverlapping_refs_since_match_p and
while being there also those declared invalid by IL verification.
PR tree-optimization/121454
* tree-ssa-sccvn.cc (visit_nary_op): Avoid unexpected
BIT_FIELD_REFs.
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musttail [PR121389]
My earlier r16-1886 PR120608 change incorrectly assumed that the
finally_tmp.N vars introduced by eh pass will be only initialized
to values 0 and 1 and there will be only EQ_EXPR/NE_EXPR comparisons
of those.
The following testcases show that is a bad assumption, the eh pass
sets finally_tmp.N vars to 0 up to some highest index depending on
hoiw many different exits there are from the finally region.
And it emits then switch (finally_tmp.N) statement for all the
different cases. So, if it uses more than 0/1 indexes, the lowering
of the switch can turn it into a series of GIMPLE_CONDs,
if (finally_tmp.N_M > 15)
goto ...
else
goto ...
if (finally_tmp.N_M > 7)
goto ...
else
goto ...
etc. (and that also means no longer single uses). And if unlucky,
we can see a non-lowered GIMPLE_SWITCH as well.
So, the following patch removes the assumption that it has to be 0/1
and EQ_EXPR/NE_EXPR, allows all the normal integral comparisons
and handles GIMPLE_SWITCH too.
2025-08-08 Jakub Jelinek <jakub@redhat.com>
PR middle-end/121389
* tree-tailcall.cc (find_tail_calls): For finally_tmp.N
handle not just GIMPLE_CONDs with EQ_EXPR/NE_EXPR and only
values 0 and 1, but arbitrary non-negative values, arbitrary
comparisons in conditions and also GIMPLE_SWITCH next to
GIMPLE_CONDs.
* c-c++-common/asan/pr121389-1.c: New test.
* c-c++-common/asan/pr121389-2.c: New test.
* c-c++-common/asan/pr121389-3.c: New test.
* c-c++-common/asan/pr121389-4.c: New test.
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