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The only substantive change is to remove Activation_Chain_Entity
from N_Generic_Package_Declaration. The comment in sinfo.ads suggesting
this change was written in 1993!
Various pieces of missing documentation are added to Sinfo and Einfo.
Also other minor cleanups.
gcc/ada/
* gen_il-gen-gen_nodes.adb
(N_Generic_Package_Declaration): Remove Activation_Chain_Entity.
* sinfo.ads: Comment improvements. Add missing doc.
Remove obsolete comment about Activation_Chain_Entity.
* einfo.ads: Comment improvements. Add missing doc.
* einfo-utils.adb (Base_Type): Add Assert (disabled for now).
(Next_Index): Minor cleanup.
* aspects.ads: Minor comment fix.
* exp_ch6.adb: Likewise.
* sem_ch3.adb: Likewise.
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Code cleanup; semantics is unaffected.
gcc/ada/
* sem_ch3.adb (Add_Interface_Tag_Components): Simplify with No.
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In some cases, a predefined operator (e.g., the "+" operator for an
integer type) is incorrectly treated as being directly visible when
it is not. This can lead to both accepting operator uses that should
be rejected and also to incorrectly rejecting legal constructs as ambiguous
(for example, an expression "Foo + 1" where Foo is an overloaded function and
the "+" operator is directly visible for the result type of only one of
the possible callees).
gcc/ada/
* sem_ch4.adb (Is_Effectively_Visible_Operator): A new function.
(Check_Arithmetic_Pair): In paths where Add_One_Interp was
previously called unconditionally, instead call only if
Is_Effectively_Visible_Operator returns True.
(Check_Boolean_Pair): Likewise.
(Find_Unary_Types): Likewise.
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The assertion fails because the Original_Node of the expression has no Etype
since its an unanalyzed identifier.
gcc/ada/
* accessibility.adb (Accessibility_Level): Apply the processing to
Expr when its Original_Node is an unanalyzed identifier.
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When the expression of aspect Default_Component_Value includes a declare
expression with current type instance, we attempted to recursively froze
that type, which itself caused an infinite recursion, because we didn't
properly manage the scope of declare expression.
This patch fixes both the detection of the current type instance and
analysis of the expression that caused recursive freezing.
gcc/ada/
* sem_attr.adb (In_Aspect_Specification): Use the standard
condition that works correctly with declare expressions.
* sem_ch13.adb (Analyze_Aspects_At_Freeze_Point): Replace
ordinary analysis with preanalysis of spec expressions.
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This patch fixes a spurious error in the compiler when checking for style for
token separation where two square brackets are next to each other.
gcc/ada/
* csets.ads (Identifier_Char): New function - replacing table.
* csets.adb (Identifier_Char): Rename and move table for static values.
(Initialize): Remove dynamic calculations.
(Identifier_Char): New function to calculate dynamic values.
* opt.adb (Set_Config_Switches): Remove setting of Identifier_Char.
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When PAREN_EXPR tree code was added in r0-85884-gdedd42d511b6e4,
a simplified handling was added to complex lowering. Which means
we would get:
```
_9 = COMPLEX_EXPR <_15, _14>;
_11 = ((_9));
_19 = REALPART_EXPR <_11>;
_20 = IMAGPART_EXPR <_11>;
```
In many cases instead of just simply:
```
_19 = ((_15));
_20 = ((_14));
```
So this adds full support for PAREN_EXPR to complex lowering.
It is handled very similar as NEGATE_EXPR; except creating PAREN_EXPR
instead of NEGATE_EXPR for the real/imag parts. This allows for
more optimizations including vectorization, especially with
-ffast-math.
gfortran.dg/vect/pr68855.f90 is an example where this could show up.
It also shows up in SPEC CPU 2006's 465.tonto; though I have not done
any benchmarking there.
Bootstrapped and tested on x86_64-linux-gnu with no regressions.
gcc/ChangeLog:
PR tree-optimization/68855
* tree-complex.cc (init_dont_simulate_again): Handle PAREN_EXPR
like NEGATE_EXPR.
(complex_propagate::visit_stmt): Likewise.
(expand_complex_move): Don't handle PAREN_EXPR.
(expand_complex_paren): New function.
(expand_complex_operations_1): Handle PAREN_EXPR like
NEGATE_EXPR. And call expand_complex_paren for PAREN_EXPR.
gcc/testsuite/ChangeLog:
* gcc.dg/vect/pr68855.c: New test.
* gfortran.dg/vect/pr68855.f90: New test.
Signed-off-by: Andrew Pinski <quic_apinski@quicinc.com>
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This applies some maintainance to passes.texi by removing references
to no longer existing passes. It also fixes a few minor things but
doesn't fill the gaps that meanwhile exist.
* doc/passes.texi: Remove references to no longer existing
passes.
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gcc_cv_as_mips_explicit_relocs_pcrel
We check gcc_cv_as_mips_explicit_relocs if gcc_cv_as_mips_explicit_relocs_pcrel
only, while gcc_cv_as_mips_explicit_relocs is used by later code.
Maybe, it is time for use to set gcc_cv_as_mips_explicit_relocs always now,
as it has been in Binutils for more than 20 years.
gcc
* configure.ac: Set gcc_cv_as_mips_explicit_relocs if
gcc_cv_as_mips_explicit_relocs_pcrel.
* configure: Regenerate.
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On most uarch, the cost condmove is same as other noraml integer,
and it should be COSTS_N_INSNS(1).
In GCC12 or previous, the condmove is always enabled, and from
GCC13, we start to compare the cost.
The generic rtx_cost give the result of COSTS_N_INSN(2).
Let's define it to COSTS_N_INSN(1) in mips_rtx_costs.
gcc
* config/mips/mips.cc(mips_rtx_costs): Set condmove cost.
* config/mips/mips.md(mov<GPR:mode>_on_<MOVECC:mode>,
mov<GPR:mode>_on_<MOVECC:mode>_mips16e2,
mov<GPR:mode>_on_<GPR2:mode>_ne
mov<GPR:mode>_on_<GPR2:mode>_ne_mips16e2): Define name by
remove starting *, so that we can use CODE_FOR_.
gcc/testsuite
* gcc.target/mips/movcc-2.c: Add k?100:1000 test.
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Commit r12-4496 changes some define_expands and define_insns
for vector merge high/low word, which are altivec_vmrg[hl]w,
vsx_xxmrg[hl]w_<VSX_W:mode>. These defines are mainly for
built-in function vec_merge{h,l}, __builtin_vsx_xxmrghw,
__builtin_vsx_xxmrghw_4si and some internal gen function
needs. These functions should consider endianness, taking
vec_mergeh as example, as PVIPR defines, vec_mergeh "Merges
the first halves (in element order) of two vectors", it does
note it's in element order. So it's mapped into vmrghw on
BE while vmrglw on LE respectively. Although the mapped
insns are different, as the discussion in PR106069, the RTL
pattern should be still the same, it is conformed before
commit r12-4496, define_expand altivec_vmrghw got expanded
into:
(vec_select:VSX_W
(vec_concat:<VS_double>
(match_operand:VSX_W 1 "register_operand" "wa,v")
(match_operand:VSX_W 2 "register_operand" "wa,v"))
(parallel [(const_int 0) (const_int 4)
(const_int 1) (const_int 5)])))]
on both BE and LE then. But commit r12-4496 changed it to
expand into:
(vec_select:VSX_W
(vec_concat:<VS_double>
(match_operand:VSX_W 1 "register_operand" "wa,v")
(match_operand:VSX_W 2 "register_operand" "wa,v"))
(parallel [(const_int 0) (const_int 4)
(const_int 1) (const_int 5)])))]
on BE, and
(vec_select:VSX_W
(vec_concat:<VS_double>
(match_operand:VSX_W 1 "register_operand" "wa,v")
(match_operand:VSX_W 2 "register_operand" "wa,v"))
(parallel [(const_int 2) (const_int 6)
(const_int 3) (const_int 7)])))]
on LE, although the mapped insn are still vmrghw on BE and
vmrglw on LE, the associated RTL pattern is completely
wrong and inconsistent with the mapped insn. If optimization
passes leave this pattern alone, even if its pattern doesn't
represent its mapped insn, it's still fine, that's why simple
testing on bif doesn't expose this issue. But once some
optimization pass such as combine does some changes basing
on this wrong pattern, because the pattern doesn't match the
semantics that the expanded insn is intended to represent,
it would cause the unexpected result.
So this patch is to fix the wrong RTL pattern, ensure the
associated RTL patterns become the same as before which can
have the same semantic as their mapped insns. With the
proposed patch, the expanders like altivec_vmrghw expands
into altivec_vmrghb_direct_be or altivec_vmrglb_direct_le
depending on endianness, "direct" can easily show which
insn would be generated, _be and _le are mainly for the
different RTL patterns as endianness.
Co-authored-by: Xionghu Luo <xionghuluo@tencent.com>
PR target/106069
PR target/115355
gcc/ChangeLog:
* config/rs6000/altivec.md (altivec_vmrghw_direct_<VSX_W:mode>): Rename
to ...
(altivec_vmrghw_direct_<VSX_W:mode>_be): ... this. Add the condition
BYTES_BIG_ENDIAN.
(altivec_vmrghw_direct_<VSX_W:mode>_le): New define_insn.
(altivec_vmrglw_direct_<VSX_W:mode>): Rename to ...
(altivec_vmrglw_direct_<VSX_W:mode>_be): ... this. Add the condition
BYTES_BIG_ENDIAN.
(altivec_vmrglw_direct_<VSX_W:mode>_le): New define_insn.
(altivec_vmrghw): Adjust by calling gen_altivec_vmrghw_direct_v4si_be
for BE and gen_altivec_vmrglw_direct_v4si_le for LE.
(altivec_vmrglw): Adjust by calling gen_altivec_vmrglw_direct_v4si_be
for BE and gen_altivec_vmrghw_direct_v4si_le for LE.
(vec_widen_umult_hi_v8hi): Adjust the call to
gen_altivec_vmrghw_direct_v4si by gen_altivec_vmrghw for BE
and by gen_altivec_vmrglw for LE.
(vec_widen_smult_hi_v8hi): Likewise.
(vec_widen_umult_lo_v8hi): Adjust the call to
gen_altivec_vmrglw_direct_v4si by gen_altivec_vmrglw for BE
and by gen_altivec_vmrghw for LE
(vec_widen_smult_lo_v8hi): Likewise.
* config/rs6000/rs6000.cc (altivec_expand_vec_perm_const): Replace
CODE_FOR_altivec_vmrghw_direct_v4si by
CODE_FOR_altivec_vmrghw_direct_v4si_be for BE and
CODE_FOR_altivec_vmrghw_direct_v4si_le for LE. And replace
CODE_FOR_altivec_vmrglw_direct_v4si by
CODE_FOR_altivec_vmrglw_direct_v4si_be for BE and
CODE_FOR_altivec_vmrglw_direct_v4si_le for LE.
* config/rs6000/vsx.md (vsx_xxmrghw_<VSX_W:mode>): Adjust by calling
gen_altivec_vmrghw_direct_v4si_be for BE and
gen_altivec_vmrglw_direct_v4si_le for LE.
(vsx_xxmrglw_<VSX_W:mode>): Adjust by calling
gen_altivec_vmrglw_direct_v4si_be for BE and
gen_altivec_vmrghw_direct_v4si_le for LE.
gcc/testsuite/ChangeLog:
* g++.target/powerpc/pr106069.C: New test.
* gcc.target/powerpc/pr115355.c: New test.
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This patch tweaks ix86_ternlog_idx to allow any SUBREG that matches
the register_operand predicate, and is split out as an independent
piece of a patch that I have to clean-up redundant ternlog patterns
in sse.md. It turns out that some of these patterns aren't (yet)
sufficiently redundant to be obsolete. The problem is that the
"new" ternlog pattern has the restriction that it allows SUBREGs,
but only those where the inner and outer modes are the same size,
where regular patterns use "register_operand" which allows arbitrary
including paradoxical SUBREGs.
A motivating example is f2 in gcc.target/i386/avx512dq-abs-copysign-1.c
void f2 (float x, float y)
{
register float a __asm ("xmm16"), b __asm ("xmm17");
a = x;
b = y;
asm volatile ("" : "+v" (a), "+v" (b));
a = __builtin_copysignf (a, b);
asm volatile ("" : "+v" (a));
}
for which combine tries:
(set (subreg:V4SF (reg:SF 100 [ _3 ]) 0)
(ior:V4SF (and:V4SF (not:V4SF (reg:V4SF 104))
(subreg:V4SF (reg:SF 110) 0))
(reg:V4SF 106)))
where the SUBREG is paradoxical, with inner mode SF and outer mode V4SF.
This patch allows the recently added ternlog_operand to accept this case.
2024-06-20 Roger Sayle <roger@nextmovesoftware.com>
gcc/ChangeLog
* config/i386/i386-expand.cc (ix86_ternlog_idx): Allow any SUBREG
that matches register_operand. Use rtx_equal_p to compare REG
or SUBREG "leaf" operands.
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Changes since V1:
Whitespace fixes noted by the linter
Missed using the iterator for the output template in
<bit_optab><mode>_mask pattern!
--
This patch introduces a bit_optab iterator that maps IOR/XOR to bset and
binv (and one day bclr if we need it). That allows us to combine some
patterns that only differed in the RTL opcode (IOR vs XOR) and in the
name/assembly (bset vs binv).
Additionally this also allow us to use the iterator in the
bset<mode>mask and bsetidisi patterns thus potentially fixing a missed
optimization.
This has gone through my tester. I'll wait for a verdict from
pre-commit CI before moving forward.
gcc/
* config/riscv/bitmanip.md (<bit_optab><mode>): New unified
pattern for bset/binv using a code iterator.
(<bit_optab>i<mode>): Likewise.
(<bit_optab><mode>_mask): Likewise. Support XOR via any_or.
(<bit_optab>isidi): Likewise.
* config/riscv/iterators.md (bit_optab): New iterator.
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In some cases, a reduction expression that references the (nonexistent)
"+" operator of a generic formal private type is incorrectly accepted.
gcc/ada/
* sem_attr.adb (Resolve_Attribute.Proper_Op): When resolving the
name of the reducer subprogram in a reduction expression,
Proper_Op treats references to operators defined in Standard
specially. Disable this special treatment if the type of the
reduction expression is not the right class of type for the
operator, or if a new Boolean parameter (named "Strict") is True.
(Resolve_Attribute): In the overloaded case, iterate over the
reducer subprogram candidates twice. First with Strict => True and
then, if no good intepretation is found, with Strict => False.
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SPARK RM 6.9(21) forbids a ghost type to have concurrent parts.
This was not enforced, instead only the type itself was checked to
be concurrent. Now fixed.
gcc/ada/
* ghost.adb (Check_Ghost_Type): Fix checking.
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...in preparation for implementing type inference for generic
parameters.
The main change is to do the "matching" computation early, and produce a
*constant* data structure (Gen_Assocs_Rec) to represent the matching
between each triple of unanalyzed formal, analyzed formal, and
corresponding actual. This will allow us to look at that data structure
more than once, which will be necessary for type inference.
Matching_Actual is removed; Match_Assocs is added.
Other changes include removal of global variables, splitting out
processing into subprograms, adding assertions, comment corrections,
and other general cleanups.
gcc/ada/
* expander.ads: Minor comment fixes.
* nlists.ads: Misc comment improvements.
* sem_aux.ads (First_Discriminant): Improve comment.
* sem_ch12.adb: Misc cleanups.
(Associations): New package containing type Gen_Assocs_Rec
to represent matchings, and function Match_Assocs to create the
Gen_Assocs_Rec constant.
(Analyze_Associations): Call Match_Assocs, and other major
changes related to that.
* sem_ch12.ads: Minor comment fixes.
* sem_ch3.adb: Minor comment fixes.
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The argument to pragma Extensions_Allowed to enable all extensions is
no longer "All", but instead "All_Extensions".
gcc/ada/
* doc/gnat_rm/gnat_language_extensions.rst: Update documentation.
* doc/gnat_rm/implementation_defined_pragmas.rst: Update
documentation.
* errout.adb
(Error_Msg_GNAT_Extension): Update error message text.
* par-prag.adb: Update pragma parsing. This includes changing the
the name of the Check_Arg_Is_On_Or_Off formal parameter All_OK_Too
to All_Extensions_OK_Too.
* sem_prag.adb (Analyze_Pragma): In analyzing an
Extensions_Allowed pragma, replace uses of Name_All with
Name_All_Extensions; update a comment to reflect this.
* snames.ads-tmpl: Add Name_All_Extensions declaration.
* gnat_rm.texi: Regenerate.
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The compiler crashes on an instantiation of a generic child unit G1.GC
that has a formal private extension P_Ext of a private type P declared
in the parent G1 whose full type has a component C, when analyzing a
selected component ACC.C whose prefix is of an access type coming from
an instantiation of another generic G2 where the designated type is
the formal type P_Ext (coming in from a formal type of G2).
gcc/ada/
* sem_ch4.adb (Try_Selected_Component_In_Instance): Reverse if_statement
clauses so that the testing for the special case of extensions of private
types in instance bodies is done first, followed by the testing for the case
of a parent type that's a generic actual type. In the extension case, apply
Base_Type to the type actual in the test of Used_As_Generic_Actual, and add
a test of Present (Parent_Subtype (Typ)).
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Inlining in GNATprove may fail on a call to a subprogram with a formal
of an array type with fixed lower bound (a GNAT extension), because the
appropriate conversion is not used. Fix it.
Also fix the function that inserts an unchecked conversion, in cases where
it could skip sliding due to the target type having fixed lower bound.
gcc/ada/
* inline.adb (Establish_Actual_Mapping_For_Inlined_Call): In the
case of formal with a fixed lower bounds, insert appropriate
conversion like in the case of a constrained type.
* tbuild.adb (Unchecked_Convert_To): Do not skip the conversion
when it may involve sliding due to a type with fixed lower bound.
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It's an assertion on the name of an instance of a generic child unit and
it needs to cope with a renaming of the unit.
gcc/ada/
* sem_ch12.adb (Instantiate_Formal_Package): Accept renamings of a
generic parent that is a child unit for the abbreviated instance.
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part
In Ada 2012, primitive equality operators of untagged record types compose
like those of tagged record types, but this has never been implemented for
untagged record types with a variant part.
gcc/ada/
* exp_ch4.adb (Expand_Composite_Equality): In the untagged record
case, always look for a user-defined equality operator in Ada 2012.
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New pragma Interrupts_System_By_Default defaults all interrupts/signals
to system (which will inhibit the installation of default signal handlers).
Note this changes the ALI format: it optionally adds an identifier to
the 'P' line (similar to pragma Unreserve_All_Interrupts). As per comment
in lib-writ spec regarding new modifiers, adding modifiers to the P line
is always safe. Also note this does not introduce a bootstrap problem
because the compiler and binder do not set the underlying _gl global nor
do they use this pragma.
gcc/ada/
* ali.ads (Interrupts_Default_To_System): New boolean.
(Interrupts_Default_To_System_Specified): New boolean.
* ali.adb (Interrupts_Default_To_System_Specified): Initialize.
(Interrupts_Default_To_System): Initialize.
(Scan_ALI): Processing for "ID".
* bindgen.adb: Coallesce comments on interrupt settings to ...
(Gen_Adainit): Import Interrupts_Default_To_System flag and set if
pragma specified.
(Gen_Output_File_Ada): Generate Local_Interrupt_States according
to pragma.
* init.c: ... here.
[vxworks] (__gnat_install_handler): Test for interrupt_state.
(__gl_interrupts_default_to_system): New global flag.
(__gnat_get_interrupt_State): return interrupt state according to
new global flag.
* lib-writ.ads: Document "ID".
* lib-writ.adb: Write out "ID".
* opt.ads (Interrupts_System_By_Default): New boolean, defaulted
to False.
* par-prag.adb (Pragma_Interrupts_System_By_Default): New.
* sem_prag.adb (Pragma_Interrupts_System_By_Default): Handle it.
(Pragma_Interrupts_System_By_Default): Default it.
* snames.ads-tmpl (Name_Interrupts_System_By_Default): New name.
(Pragma_Interrupts_System_By_Default): New
* libgnarl/s-intman__posix.adb (Initialize): Ensure the
Keep_Unmasked signal is sigset-able.
* doc/gnat_rm/implementation_defined_pragmas.rst: Document pragma
Interrupts_System_By_Default.
* doc/gnat_ugn/the_gnat_compilation_model.rst (Configuration
pragmas): Add Interrupts_System_By_Default. (Partition-Wide
Settings): Mention pragma Interrupts_System_By_Default.
* gnat_rm.texi: Regenerate.
* gnat_ugn.texi: Regenerate.
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The code is legal and, therefore, must be accepted by the compiler, but it
must raise Program_Error at run time due to operands not having inferable
discriminants and a warning be given at compile time (RM B.3.3(22-23)).
gcc/ada/
* exp_ch4.adb (Expand_Array_Equality.Component_Equality): Copy the
Comes_From_Source flag from the original test to the new one, and
remove obsolete code dealing with unchecked unions.
* sem_util.adb (Has_Inferable_Discriminants): Return False for an
incomplete or private nominal subtype.
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The problem is that the freeze node of the type to which the real literal
is resolved is placed inside the expression function instead of outside.
gcc/ada/
* freeze.adb (Freeze_Expression): Also attach pending freeze nodes
to the parent in the case of an internal block in a spec expression.
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This was initially implemented as part of AI12-001 but immediately disabled
because it breaks Florist on 32-bit platforms. However, it is possible to
reenable it in almost all cases without affecting Florist, and the -gnatd_l
switch can now be used to disable it again.
gcc/ada/
* debug.adb (d_l): Document new usage for the compiler.
* freeze.adb (Check_Strict_Alignment): Set the Strict_Alignment
flag on array types with aliased component, except if the
component size is equal to the storage unit or the -gnatd_l switch
is specified.
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They are still tailored to Ada 95 while the level of recommended support for
Bit Ordering was changed in Ada 2005.
gcc/ada/
* doc/gnat_rm/implementation_advice.rst (Representation Clauses):
Remove >> marker and add end of sentence after code-block directive.
(RM 13.5.3(7-8)): Update to Ada 2005 wording.
* doc/gnat_rm/implementation_defined_characteristics.rst
(RM 13.5.3(5)): Likewise.
* gnat_rm.texi: Regenerate.
* gnat_ugn.texi: Regenerate.
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For completeness, the GNAT Reference Manual should document aspects and
pragmas that are specific to SPARK and described in the SPARK User's
Guide.
gcc/ada/
* doc/gnat_rm/implementation_defined_aspects.rst
(Aspect Subprogram_Variant): Refer to SPARK User's Guide.
* doc/gnat_rm/implementation_defined_pragmas.rst
(Pragma Subprogram_Variant): Document syntax to satisfy the
convention; refer to SPARK User's Guide for semantics.
* gnat_rm.texi: Regenerate.
* gnat_ugn.texi: Regenerate.
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The front-end maintains a set of 4 flags on (base) types that are used to
parameterize the implementation of controlled operations, and these flags
need to be propagated through composition and derivation. This is done
on a per-flag basis in the current implementation with a few loopholes.
This introduces a Propagate_Controlled_Flags routine to that effect, which
is modeled on the existing Propagate_Concurrent_Flags routine, and is used
in most cases to do the propagation. This also removes the handling of the
Finalize_Storage_Only flag from Inherit_Aspects_At_Freeze_Point, since the
associated aspect does not exist (only the pragma does).
gcc/ada/
* freeze.adb (Freeze_Array_Type): Call Propagate_Controlled_Flags
to propagate the controlled flags from the component to the array.
(Freeze_Record_Type): Propagate the Finalize_Storage_Only flag
from the components to the record.
* sem_ch3.adb (Analyze_Private_Extension_Declaration): Do not call
Propagate_Concurrent_Flags here but...
(Array_Type_Declaration): Tidy and call Propagate_Controlled_Flags
to propagate the controlled flags from the component to the array.
(Build_Derived_Private_Type): Do not propagate the controlled flags
manually here but...
(Build_Derived_Record_Type): ...call Propagate_Controlled_Flags to
propagate the controlled flags from parent to derived type.
(Build_Derived_Type): Likewise.
(Copy_Array_Base_Type_Attributes): Call Propagate_Controlled_Flags
to copy the controlled flags.
(Record_Type_Definition): Streamline the propagation of the
Finalize_Storage_Only flag from the components to the record.
* sem_ch7.adb (Preserve_Full_Attributes): Use Full_Base and call
Propagate_Controlled_Flags to copy the controlled flags.
* sem_ch9.adb (Analyze_Protected_Definition): Use canonical idiom
to compute Has_Controlled_Component.
(Analyze_Protected_Type_Declaration): Minor tweak.
* sem_ch13.adb (Inherit_Aspects_At_Freeze_Point): Do not deal with
Finalize_Storage_Only here.
* sem_util.ads (Propagate_Controlled_Flags): New declaration.
* sem_util.adb (Propagate_Controlled_Flags): New procedure.
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Code cleanup; behavior is unaffected.
gcc/ada/
* freeze.adb (Check_Current_Instance): This routine is only called
with parameter E being a type entity, so there is no need to check
for types just before the equality with E.
* sem_ch13.adb (Analyze_Aspect_Specifications): Regroup condition
to avoid unnecessary evaluation.
(Check_Aspect_At_End_Of_Declarations): If In_Instance is true,
then the routine exits early.
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Code cleanup; semantics is unaffected.
gcc/ada/
* freeze.adb (Find_Aspect_No_Parts): Tune whitespace.
* sem_ch13.adb (Check_Aspect_At_End_Of_Declarations): Fix style.
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It was implemented apparently because a very early version of AI12-0164
that standardizes GNAT's Max_Queue_Length opted for the subtly different
moniker, but later versions of the AI use Max_Entry_Queue_Length instead.
gcc/ada/
* aspects.ads (Aspect_Id): Remove Aspect_Max_Entry_Queue_Depth.
(global arrays): Remove entry for it.
* exp_ch9.adb (Expand_N_Protected_Type_Declaration): Remove
reference to pragma Max_Entry_Queue_Depth in comment.
* par-prag.adb (Prag): Remove handling of
Pragma_Max_Entry_Queue_Depth.
* sem_ch13.adb (Analyze_Aspect_Specifications): Remove reference
to aspect Max_Entry_Queue_Depth in comment.
(Analyze_Aspect_Specifications): Remove processing of aspect
Max_Entry_Queue_Depth.
(Check_Aspect_At_Freeze_Point): Likewise.
* sem_prag.ads (Find_Related_Declaration_Or_Body): Remove
reference to pragma Max_Entry_Queue_Depth in comment.
* sem_prag.adb (Analyze_Pragma): Remove processing of pragma
Max_Entry_Queue_Depth.
(Sig_Flags): Remove entry for Pragma_Max_Entry_Queue_Depth.
* sem_util.adb (Get_Max_Queue_Length): Remove handling of pragma
Max_Entry_Queue_Depth.
(Has_Max_Queue_Length): Likewise.
* snames.ads-tmpl (Name_Max_Entry_Queue_Depth): Move back from
pragmas section to others section.
(Pragma_Id): Remove Pragma_Max_Entry_Queue_Depth.
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The Storage_Model pragma no longer exists.
gcc/ada/
* doc/gnat_rm/gnat_language_extensions.rst (Pragma Storage_Model):
Rename to Storage Model.
* doc/gnat_rm/implementation_defined_aspects.rst: Alphabetize.
* gnat_rm.texi: Regenerate.
* gnat_ugn.texi: Regenerate.
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The purpose of this patch is to make it possible to set up code
coverage for the GNAT front end in gnat1 using GNATcoverage. It is
not obvious how to have GNATcoverage instrument gnat1's main function,
and since the front end has a clear entry point (Gnat1drv), we add
manual instrumentation annotations there.
gcc/ada/
* gnat1drv.adb (Gnat1drv): Add coverage instrumentation
annotations.
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The Has_Controlled_Component flag is computed twice during freezing when
expansion is enabled: in Freeze_Array_Type and Expand_Freeze_Array_Type
for array types, and in Freeze_Record_Type and Expand_Freeze_Record_Type
for record types.
This removes the latter computation in both cases, as well as moves the
computation of concurrent flags from the latter to the former places, which
happens to plug a loophole in the detection of errors when the No_Task_Parts
aspect is specified on peculiar types.
gcc/ada/
* exp_ch3.adb (Expand_Freeze_Array_Type): Do not propagate the
concurrent flags and the Has_Controlled_Component flag here.
(Expand_Freeze_Record_Type): Likewise.
* freeze.adb (Freeze_Array_Type): Propagate the concurrent flags.
(Freeze_Record_Type): Likewise.
* sem_util.adb (Has_Some_Controlled_Component): Adjust comment.
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gcc/ada/
* mutably_tagged.ads: Fix minor issues in comments throughout.
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gcc/ada/
* debug.adb: Add documentation for -gnatd_w.
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Previously this switch was emitting only info messages
which was both confusing in terms of the name of the
switch that was used internally and externally.
gcc/ada/
* doc/gnat_ugn/building_executable_programs_with_gnat.rst: Update
documentation for -gnatw.v.
* sem_ch13.adb: Convert all -gnatw.v related messages to warnings.
* gnat_ugn.texi: Regenerate.
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Previously the messages produced by this warning switch
were info messages that were suppressed with the same
methods as regular warnings. Since info messages are now
separated as a completely different class of messages then
these messages should be converted back to warnings in order
for the previous pragma based suppression methods to work.
gcc/ada/
* doc/gnat_ugn/building_executable_programs_with_gnat.rst: Update
documentation for -gnatw.n switch.
* exp_util.adb: Convert info messages into warnings.
* gnat_ugn.texi: Regenerate.
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Add a separate switch -gnatis to suppress info messages
separately from warning messages that are controlled by
-gnatws.
gcc/ada/
* doc/gnat_ugn/building_executable_programs_with_gnat.rst: Add
entry for -gnatis.
* errout.adb (Error_Msg_Internal): Stop printing info messages if
-gnatis was used.
* opt.ads: Add Info_Suppressed flag to track whether info messages
should be suppressed.
* switch-c.adb: Add parsing for -gnatis.
* gnat_ugn.texi: Regenerate.
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There was a general concept of info messages being a subset of
warnings. However that is no longer the case. Messages with an
info insertion character should be treated just as info messages.
gcc/ada/
* atree.ads: Remove Warning_Info_Messages.
* errout.adb: Remove various places where Warning_Info_Messages
was used.
* erroutc.adb: Remove various places where Warning_Info_Messages
was used. Create Error_Msg_Object objects with only an info
attribute if the message contained both info and warning insertion
characters. New method Has_Switch_Tag for detecting if a message
should have an error tag.
* errutil.adb: Create Error_Msg_Object objects with only an info
attribute if the message contained both info and warning insertion
characters.
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This patch moves the documentation for 'Super from gnat language extensions to
experimental language extensions.
gcc/ada/
* doc/gnat_rm/gnat_language_extensions.rst: Add entry for 'Super.
* doc/gnat_rm/implementation_defined_attributes.rst: Remove entry
for 'Super.
* gnat_rm.texi: Regenerate.
* gnat_ugn.texi: Regenerate.
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In some cases, gnatprep would correctly emit an error message and then
incorrectly exit with a return code of zero, indicating success.
In some cases, a correct message about an error detected by the integrated
preprocessor would be accompanied by an incorrect message indicating that
a source file could not be found.
gcc/ada/
* gprep.adb (Process_Files.Process_One_File): When calling OS_Exit in an error
path, pass in a Status parameter of 1 instead of 0 (because 0
indicates success).
* lib-load.adb (Load_Main_Source): Do not emit a message about a missing source file
if other error messages were generated by calling Load_Source_File;
the file isn't missing - it failed preprocessing.
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Recognize references to attributes Put_Image and Object_Size as
language-defined in Ada 2022 and implementation-defined in earlier
versions of Ada. Other attributes listed in Ada 2022 RM, K.2 and
currently implemented in GNAT are correctly categorized.
This change only affects code with restriction
No_Implementation_Attributes.
gcc/ada/
* sem_attr.adb (Attribute_22): Add Put_Image and Object_Size.
* sem_attr.ads (Attribute_Impl_Def): Remove Object_Size.
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Adjust several new feature check in ix86_option_override_interal that
directly use TARGET_* instead of TARGET_*_P (opts->ix86_isa_flags)
to avoid cmdline option overrides target_attribute isa flag.
gcc/ChangeLog:
* config/i386/i386-options.cc (ix86_option_override_internal):
Use TARGET_*_P (opts->x_ix86_isa_flags*) instead of TARGET_*
for UINTR, LAM and APX_F.
gcc/testsuite/ChangeLog:
* gcc.target/i386/apx-ccmp-2.c: Remove -mno-apxf in option.
* gcc.target/i386/funcspec-56.inc: Drop uintr tests.
* gcc.target/i386/funcspec-6.c: Add uintr tests.
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2024-06-20 Paul Thomas <pault@gcc.gnu.org>
gcc/fortran
PR fortran/59104
* dependency.cc (dependency_fcn, gfc_function_dependency): New
functions to detect dependency in array bounds and character
lengths on old style function results.
* dependency.h : Add prototype for gfc_function_dependency.
* error.cc (error_print): Remove trailing space.
* gfortran.h : Remove dummy_order and add fn_result_spec.
* symbol.cc : Remove declaration of next_dummy_order..
(gfc_set_sym_referenced): remove setting of symbol dummy order.
* trans-array.cc (gfc_trans_auto_array_allocation): Detect
non-dummy symbols with function dependencies and put the
allocation at the end of the initialization code.
* trans-decl.cc : Include dependency.h.
(decl_order): New function that determines uses the location
field of the symbol 'declared_at' to determine the order of two
declarations.
(gfc_defer_symbol_init): Call gfc_function_dependency to put
dependent symbols in the right part of the tlink chain. Use
the location field of the symbol declared_at to determine the
order of declarations.
(gfc_trans_auto_character_variable): Put character length
initialization of dependent symbols at the end of the chain.
* trans.cc (gfc_add_init_cleanup): Add boolean argument with
default false that determines whther an expression is placed at
the back or the front of the initialization chain.
* trans.h : Update the prototype for gfc_add_init_cleanup.
gcc/testsuite/
PR fortran/59104
* gfortran.dg/dependent_decls_2.f90: New test.
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We currently fail to re-CSE SLP nodes after optimizing permutes
which results in off cost estimates. For gcc.dg/vect/bb-slp-32.c
this shows in not re-using the SLP node with the load and arithmetic
for both the store and the reduction. The following implements
CSE by re-bst-mapping nodes as finalization part of vect_optimize_slp.
I've tried to make the CSE part of permute materialization but it
isn't a very good fit there. I've not bothered to implement something
more complete, also handling external defs or defs without
SLP_TREE_SCALAR_STMTS.
I realize this might result in more BB SLP which in turn might slow
down code given costing for BB SLP is difficult (even that we now
vectorize gcc.dg/vect/bb-slp-32.c on x86_64 might be not a good idea).
This is nevertheless feeding more accurate info to costing which is
good.
PR tree-optimization/114413
* tree-vect-slp.cc (release_scalar_stmts_to_slp_tree_map):
New function, split out from ...
(vect_analyze_slp): ... here. Call it.
(vect_cse_slp_nodes): New function.
(vect_optimize_slp): Call it.
* gcc.dg/vect/bb-slp-32.c: Expect CSE and vectorization on x86.
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According to logic of code nearby the assertion, all lane-reducing operations
should not appear, not just DOT_PROD_EXPR. Since "use_mask_by_cond_expr_p"
treats SAD_EXPR same as DOT_PROD_EXPR, and WIDEN_SUM_EXPR should not be allowed
by the following assertion "gcc_assert (commutative_binary_op_p (...))", so
tighten the assertion.
2024-06-16 Feng Xue <fxue@os.amperecomputing.com>
gcc/
* tree-vect-loop.cc (vect_transform_reduction): Change assertion to
cover all lane-reducing ops.
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It's better to place 3 relevant independent variables into array, since we
have requirement to access them via an index in the following patch. At the
same time, this change may get some duplicated code be more compact.
2024-06-16 Feng Xue <fxue@os.amperecomputing.com>
gcc/
* tree-vect-loop.cc (vect_transform_reduction): Replace vec_oprnds0/1/2
with one new array variable vec_oprnds[3].
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Two local variables were defined to refer same STMT_VINFO_REDUC_TYPE, better
to keep only one.
2024-06-16 Feng Xue <fxue@os.amperecomputing.com>
gcc/
* tree-vect-loop.cc (vectorizable_reduction): Remove v_reduc_type, and
replace it to another local variable reduction_type.
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