riscv-gnu-toolchain/gcc.git - Unnamed repository; edit this file 'description' to name the repository.

Age	Commit message (Expand)	Author	Files	Lines
2024-07-09	rs6000, Remove __builtin_vsx_cmple* builtins	Carl Love	2	-43/+0
2024-07-09	i386: Implement .SAT_TRUNC for unsigned integers	Uros Bizjak	2	-2/+134
2024-07-09	diagnostics: use refs rather than pointers for diagnostic_{path,context}	David Malcolm	3	-53/+52
2024-07-09	arm: clean up some legacy FPA related cruft.	Richard Earnshaw	1	-51/+10
2024-07-09	RISC-V: Fix comment/naming in attribute parsing code	Christoph Müllner	1	-4/+4
2024-07-09	RISC-V: Deduplicate arch subset list processing	Christoph Müllner	1	-26/+6
2024-07-09	RISC-V: testsuite: Properly gate LTO tests	Christoph Müllner	2	-2/+2
2024-07-09	i386: Correct AVX10 CPUID emulation	Haochen Jiang	1	-2/+2
2024-07-09	c: Rewrite c_parser_omp_tile_sizes to use c_parser_expr_list	Jakub Jelinek	3	-22/+15
2024-07-09	c++: Implement C++26 CWG2819 - Allow cv void * null pointer value conversion ...	Jakub Jelinek	4	-25/+30
2024-07-09	Rename __{float,double}_u to __x86_{float,double}_u to avoid pulluting the na...	liuhongt	3	-8/+32
2024-07-09	RISC-V: Add testcases for unsigned vector .SAT_ADD IMM form 2	Pan Li	9	-0/+185
2024-07-09	RISC-V: Add testcases for unsigned vector .SAT_ADD IMM form 1	Pan Li	10	-0/+449
2024-07-09	Daily bump.	GCC Administrator	5	-1/+168
2024-07-08	[to-be-committed][RISC-V][V3] DCE analysis for extension elimination	Jeff Law	18	-5/+1047
2024-07-08	c-format.cc: add ctors to format_check_results and format_check_context	David Malcolm	1	-26/+37
2024-07-08	i386: Promote {QI,HI}mode x86_mov<mode>cc_0_m1_neg to SImode	Uros Bizjak	1	-6/+19
2024-07-08	Remove trailing whitespace from invoke.texi	Patrick O'Neill	1	-196/+196
2024-07-08	x86: Support bitwise and/andnot/abs/neg/copysign/xorsign op for V8BF/V16BF/V32BF	Levy Hsu	5	-36/+234
2024-07-08	rs6000: load high and low part of 128bit vector independently [PR110040]	Jeevitha	3	-0/+48
2024-07-08	RISC-V: Implement .SAT_TRUNC for vector unsigned int	Pan Li	18	-0/+742
2024-07-08	fortran: Move definition of variable closer to its uses	Mikael Morin	1	-14/+19
2024-07-08	[RISC-V] add implied extension repeatly until stable	Fei Gao	2	-3/+14
2024-07-08	rs6000: Replace orc with iorc [PR115659]	Kewen Lin	3	-14/+14
2024-07-08	isel: Fold more in gimple_expand_vec_cond_expr with andc and iorc [PR115659]	Kewen Lin	4	-0/+42
2024-07-07	rs6000: Consider explicit VSX when masking off ALTIVEC [PR115688]	Kewen Lin	2	-2/+20
2024-07-08	x86: Update branch hint for Redwood Cove.	H.J. Lu	3	-24/+24
2024-07-08	Daily bump.	GCC Administrator	6	-1/+37
2024-07-07	PR modula2/115804 ICE during gimplification with new isfinite optab	Gaius Mulley	1	-11/+15
2024-07-07	doc: Remove dubious example around bug reporting	Gerald Pfeifer	1	-5/+0
2024-07-08	c++: Simplify uses of LAMBDA_EXPR_EXTRA_SCOPE	Nathaniel Shead	1	-5/+2
2024-07-07	ada: Make the names of uninstalled cross-gnattools consistent across builds	Maciej W. Rozycki	2	-11/+30
2024-07-07	Daily bump.	GCC Administrator	3	-1/+73
2024-07-06	[to-be-committed][v3][RISC-V] Handle bit manipulation of SImode values	Jeff Law	4	-16/+192
2024-07-06	testsuite/52641 - Fix more sloppy tests.	Georg-Johann Lay	14	-11/+25
2024-07-06	[committed] Fix various sh define_insn_and_split predicates	Jeff Law	1	-50/+50
2024-07-06	AVR: Create more opportunities for -mfuse-add optimization.	Georg-Johann Lay	3	-21/+80
2024-07-06	RISC-V: fix internal error on global variable-length array	Eric Botcazou	3	-1/+45
2024-07-06	PR target/115751: Avoid force_reg in ix86_expand_ternlog.	Roger Sayle	1	-2/+13
2024-07-06	Daily bump.	GCC Administrator	4	-1/+160
2024-07-05	x86, Darwin: Fix bootstrap for 32b multilibs/hosts.	Iain Sandoe	1	-0/+23
2024-07-06	Fortran: switch test to use issignaling() built-in	Francois-Xavier Coudert	2	-10/+3
2024-07-05	Arm: Fix ldrd offset range [PR115153]	Wilco Dijkstra	3	-29/+48
2024-07-05	libgccjit: Allow comparing array types	Antoni Boucher	3	-0/+23
2024-07-05	libgccjit: Add support for the type bfloat16	Antoni Boucher	8	-2/+67
2024-07-05	RISC-V: Use tu policy for first-element vec_set [PR115725].	Robin Dapp	6	-33/+22
2024-07-05	AVR: target/87376 - Use nop_general_operand for DImode inputs.	Georg-Johann Lay	2	-13/+73
2024-07-05	AArch64: lower 2 reg TBL permutes with one zero register to 1 reg TBL.	Tamar Christina	3	-6/+94
2024-07-05	AArch64: remove aarch64_simd_vec_unpack<su>_lo_	Tamar Christina	2	-18/+5
2024-07-05	middle-end: Add debug functions to dump dominator tree in dot format	Alex Coplan	1	-0/+30