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2024-04-28Make vrange an abstract class.Aldy Hernandez2-42/+73
Explicitly make vrange an abstract class. This involves fleshing out the unsupported_range overrides which we were inheriting by default from vrange. gcc/ChangeLog: * value-range.cc (unsupported_range::accept): Move down. (vrange::contains_p): Rename to... (unsupported_range::contains_p): ...this. (vrange::singleton_p): Rename to... (unsupported_range::singleton_p): ...this. (vrange::set): Rename to... (unsupported_range::set): ...this. (vrange::type): Rename to... (unsupported_range::type): ...this. (vrange::supports_type_p): Rename to... (unsupported_range::supports_type_p): ...this. (vrange::set_undefined): Rename to... (unsupported_range::set_undefined): ...this. (vrange::set_varying): Rename to... (unsupported_range::set_varying): ...this. (vrange::union_): Rename to... (unsupported_range::union_): ...this. (vrange::intersect): Rename to... (unsupported_range::intersect): ...this. (vrange::zero_p): Rename to... (unsupported_range::zero_p): ...this. (vrange::nonzero_p): Rename to... (unsupported_range::nonzero_p): ...this. (vrange::set_nonzero): Rename to... (unsupported_range::set_nonzero): ...this. (vrange::set_zero): Rename to... (unsupported_range::set_zero): ...this. (vrange::set_nonnegative): Rename to... (unsupported_range::set_nonnegative): ...this. (vrange::fits_p): Rename to... (unsupported_range::fits_p): ...this. (unsupported_range::operator=): New. (frange::fits_p): New. * value-range.h (class vrange): Make an abstract class. (class unsupported_range): Declare override methods.
2024-04-28doc: Remove references to FreeBSD 7 and olderGerald Pfeifer1-7/+2
FreeBSD 7 has been end of life for years and current GCC most likely would not build there anymore anyways. gcc: PR target/69374 PR target/112959 * doc/install.texi (Specific) <*-*-freebsd*>: Remove references to FreeBSD 7 and older.
2024-04-28doc: Update David Binderman's entry in contrib.texiGerald Pfeifer1-2/+2
gcc/ChangeLog: * doc/contrib.texi: Update David Binderman's entry.
2024-04-28Adjust alternative *k to ?k for avx512 mask in zero_extend patternsliuhongt2-8/+51
So when both source operand and dest operand require avx512 MASK_REGS, RA can allocate MASK_REGS register instead of GPR to avoid reload it from GPR to MASK_REGS. gcc/ChangeLog: * config/i386/i386.md: (zero_extendsidi2): Adjust alternative *k to ?k. (zero_extend<mode>di2): Ditto. (*zero_extend<mode>si2): Ditto. (*zero_extendqihi2): Ditto.
2024-04-28[testsuite] require sqrt_insn effective target where neededAlexandre Oliva5-5/+6
Some tests fail on ppc and ppc64 when testing a compiler [with options for] for a CPU [emulator] that doesn't support the sqrt insn. The gcc.dg/cdce3.c is one in which the expected shrink-wrap optimization only takes place when the target CPU supports a sqrt insn. The gcc.target/powerpc/pr46728-1[0-4].c tests use -mpowerpc-gpopt and call sqrt(), which involves the sqrt insn that the target CPU under test may not support. Require a sqrt_insn effective target for all the affected tests. for gcc/testsuite/ChangeLog * gcc.dg/cdce3.c: Require sqrt_insn effective target. * gcc.target/powerpc/pr46728-10.c: Likewise. Drop darwin explicit skipping. * gcc.target/powerpc/pr46728-11.c: Likewise. Likewise. * gcc.target/powerpc/pr46728-13.c: Likewise. Likewise. * gcc.target/powerpc/pr46728-14.c: Likewise. Likewise.
2024-04-28xfail fetestexcept test - ppc always uses fcmpuAlexandre Oliva1-1/+2
gcc.dg/torture/pr91323.c tests that a compare with NaNf doesn't set an exception using builtin compare intrinsics, and that it does when using regular compare operators. That doesn't seem to be expected to work on powerpc targets. It fails on GNU/Linux, it's marked to be skipped on AIX, and a similar test, gcc.dg/torture/pr93133.c, has the execution test xfailed for all of powerpc*-*-*. In this test, the functions that use intrinsics for the compare end up with the same code as the one that uses compare operators, using fcmpu, a floating compare that, unlike fcmpo, does not set the invalid operand exception for quiet NaN. I couldn't find any evidence that the rs6000 backend ever outputs fcmpo. Therefore, I'm adding the same execution xfail marker to this test. for gcc/testsuite/ChangeLog PR target/58684 * gcc.dg/torture/pr91323.c: Expect execution fail on powerpc*-*-*.
2024-04-28ppc: testsuite: vec-mul requires vsx runtimeAlexandre Oliva1-2/+2
vec-mul is an execution test, but it only requires a powerpc_vsx_ok effective target, which is enough only for compile tests. In order to check for runtime and execution environment support, we need to require vsx_hw. Make that a condition for execution, but still perform a compile test if the condition is not satisfied. for gcc/testsuite/ChangeLog * gcc.target/powerpc/vec-mul.c: Run on target vsx_hw, just compile otherwise.
2024-04-28disable ldist for test, to restore vectorizing-candidate loopAlexandre Oliva1-0/+1
The loop we're supposed to try to vectorize in gcc.dg/vect/costmodel/ppc/costmodel-vect-31a.c is turned into a memset before the vectorizer runs. Various other tests in this set have already run into this, and the solution has been to disable this loop distribution transformation, enabled at -O2, so that the vectorizer gets a chance to transform the loop and, in this testcase, fail to do so. for gcc/testsuite/ChangeLog * gcc.dg/vect/costmodel/ppc/costmodel-vect-31a.c: Disable ldist.
2024-04-28Request check for hw support in ppc run tests with -maltivec/-mvsxOlivier Hainque2-5/+2
for gcc/testsuite/ChangeLog * gcc.target/powerpc/swaps-p8-20.c: Change powerpc_altivec_ok require-effective-target test into vmx_hw. * gcc.target/powerpc/vsx-vector-5.c: Change powerpc_vsx_ok require-effective-target test into vsx_hw.
2024-04-28[testsuite] [ppc64] expect error on vxworks tooAlexandre Oliva3-3/+3
These ppc lp64 tests check for errors or warnings on -mno-powerpc64. On powerpc64-*-vxworks* we get the same errors as on most other covered platforms, but the tests did not mark them as expected for this target. On powerpc-*-vxworks*, the tests are skipped because lp64 is not satisfied, so I'm naming powerpc*-*-vxworks* rather than something more specific. for gcc/testsuite/ChangeLog * gcc.target/powerpc/pr106680-1.c: Error on vxworks too. * gcc.target/powerpc/pr106680-2.c: Likewise. * gcc.target/powerpc/pr106680-3.c: Likewise.
2024-04-28decay vect tests from run to link for pr95401Alexandre Oliva1-9/+9
When vect.exp finds our configuration disables altivec by default, it disables the execution of vectorization tests, assuming the test hardware doesn't support it. Tests become just compile tests, but compile tests won't work correctly when additional sources are named, e.g. pr95401.cc, because GCC refuses to compile multiple files into the same asm output. With this patch, the default for when execution is not possible becomes link. for gcc/testsuite/ChangeLog * lib/target-supports.exp (check_vect_support_and_set_flags): Decay to link rather than compile.
2024-04-28s390: avoid peeking eof after __vectorJiufu Guo2-1/+8
Same like PR101168, it is need for s390 to avoid peeking eof after vector keyword. And similar test case is also ok for s390. PR target/95782 gcc/ChangeLog: * config/s390/s390-c.cc (s390_macro_to_expand): Avoid empty identifier. gcc/testsuite/ChangeLog: * g++.target/s390/pr95782.C: New test.
2024-04-28Daily bump.GCC Administrator3-1/+26
2024-04-27aarch64: Use vec_perm_indices::new_shrunk_vector in aarch64_evpc_reencodeAndrew Pinski1-19/+5
While working on PERM related stuff, I can across that aarch64_evpc_reencode was manually figuring out if we shrink the perm indices instead of using vec_perm_indices::new_shrunk_vector; shrunk was added after reencode was added. Built and tested for aarch64-linux-gnu with no regressions. gcc/ChangeLog: PR target/113822 * config/aarch64/aarch64.cc (aarch64_evpc_reencode): Use vec_perm_indices::new_shrunk_vector instead of manually going through the indices. Signed-off-by: Andrew Pinski <quic_apinski@quicinc.com>
2024-04-27LoongArch: Add constraints for bit string operation define_insn_and_split's ↵Xi Ruoyao2-8/+47
[PR114861] Without the constrants, the compiler attempts to use a stack slot as the target, causing an ICE building the kernel with -Os: drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c:3144:1: error: could not split insn (insn:TI 1764 67 1745 (set (mem/c:DI (reg/f:DI 3 $r3) [707 %sfp+-80 S8 A64]) (and:DI (reg/v:DI 28 $r28 [orig:422 raster_config ] [422]) (const_int -50331649 [0xfffffffffcffffff]))) "drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c":1386:21 111 {*bstrins_di_for_mask} (nil)) Add these constrants to fix the issue. gcc/ChangeLog: PR target/114861 * config/loongarch/loongarch.md (bstrins_<mode>_for_mask): Add constraints for operands. (bstrins_<mode>_for_ior_mask): Likewise. gcc/testsuite/ChangeLog: PR target/114861 * gcc.target/loongarch/pr114861.c: New test.
2024-04-26RISC-V: Add -X to link specFangrui Song3-0/+3
--discard-locals (-X) instructs the linker to remove local .L* symbols, which occur a lot due to label differences for linker relaxation. The arm port has a similar need and passes -X to ld. In contrast, the RISC-V port does not pass -X to ld and rely on the default --discard-locals in GNU ld's riscv port. The arm way is more conventional (compiler driver instead of the linker customizes the default linker behavior) and works with lld. gcc/ChangeLog: * config/riscv/elf.h (LINK_SPEC): Add -X. * config/riscv/freebsd.h (LINK_SPEC): Add -X. * config/riscv/linux.h (LINK_SPEC): Add -X.
2024-04-27Daily bump.GCC Administrator5-1/+66
2024-04-26AArch64: Cleanup memset expansionWilco Dijkstra1-122/+35
Cleanup memset implementation. Similar to memcpy/memmove, use an offset and bytes throughout. Simplify the complex calculations when optimizing for size by using a fixed limit. gcc/ChangeLog: * config/aarch64/aarch64.cc (MAX_SET_SIZE): New define. (aarch64_progress_pointer): Remove function. (aarch64_set_one_block_and_progress_pointer): Simplify and clean up. (aarch64_expand_setmem): Clean up implementation, use byte offsets, simplify size calculation.
2024-04-26AArch64: Remove AARCH64_EXTRA_TUNE_NO_LDP_STP_QREGSWilco Dijkstra7-63/+8
Remove the tune AARCH64_EXTRA_TUNE_NO_LDP_STP_QREGS since it is only used by an old core and doesn't properly support -Os. SPECINT_2017 shows that removing it has no performance difference, while codesize is reduced by 0.07%. gcc/ChangeLog: * config/aarch64/aarch64.cc (aarch64_mode_valid_for_sched_fusion_p): Remove check for AARCH64_EXTRA_TUNE_NO_LDP_STP_QREGS. (aarch64_advsimd_ldp_stp_p): Likewise. (aarch64_stp_sequence_cost): Likewise. (aarch64_expand_cpymem): Likewise. (aarch64_expand_setmem): Likewise. * config/aarch64/aarch64-ldp-fusion.cc (ldp_operand_mode_ok_p): Likewise. * config/aarch64/aarch64-ldpstp.md: Likewise. * config/aarch64/aarch64-tuning-flags.def: Remove NO_LDP_STP_QREGS. * config/aarch64/tuning_models/emag.h: Likewise. * config/aarch64/tuning_models/xgene1.h: Likewise. gcc/testsuite: * gcc.target/aarch64/ldp_stp_q_disable.c: Remove test.
2024-04-26c++: fix source printing for "required from here" messagePatrick Palka3-1/+53
It seems the diagnostic machinery's source line printing respects the pretty printer prefix, but this is undesirable for the call to diagnostic_show_locus in print_instantiation_partial_context_line (added in r14-4388-g1c45319b66edc9) since the prefix may have been set when issuing an earlier, unrelated diagnostic and we just want to print an unprefixed source line. This patch naively fixes this by clearing the prefix before calling diagnostic_show_locus. Before this patch, for error60a.C below we'd print gcc/testsuite/g++.dg/template/error60a.C: In function ‘void usage()’: gcc/testsuite/g++.dg/template/error60a.C:24:3: error: ‘unrelated_error’ was not declared in this scope 24 | unrelated_error; // { dg-error "not declared" } | ^~~~~~~~~~~~~~~ gcc/testsuite/g++.dg/template/error60a.C: In instantiation of ‘void test(Foo) [with Foo = int]’: gcc/testsuite/g++.dg/template/error60a.C:25:13: required from here gcc/testsuite/g++.dg/template/error60a.C:24:3: error: 25 | test<int> (42); // { dg-message " required from here" } gcc/testsuite/g++.dg/template/error60a.C:24:3: error: | ~~~~~~~~~~^~~~ gcc/testsuite/g++.dg/template/error60a.C:19:24: error: invalid conversion from ‘int’ to ‘int*’ [-fpermissive] 19 | my_pointer<Foo> ptr (val); // { dg-error "invalid conversion from 'int' to 'int\\*'" } | ^~~ | | | int gcc/testsuite/g++.dg/template/error60a.C:9:20: note: initializing argument 1 of ‘my_pointer<Foo>::my_pointer(Foo*) [with Foo = int]’ 9 | my_pointer (Foo *ptr) // { dg-message " initializing argument 1" } | ~~~~~^~~ and afterward we print gcc/testsuite/g++.dg/template/error60a.C: In function ‘void usage()’: gcc/testsuite/g++.dg/template/error60a.C:24:3: error: ‘unrelated_error’ was not declared in this scope 24 | unrelated_error; // { dg-error "not declared" } | ^~~~~~~~~~~~~~~ gcc/testsuite/g++.dg/template/error60a.C: In instantiation of ‘void test(Foo) [with Foo = int]’: gcc/testsuite/g++.dg/template/error60a.C:25:13: required from here 25 | test<int> (42); // { dg-message " required from here" } | ~~~~~~~~~~^~~~ gcc/testsuite/g++.dg/template/error60a.C:19:24: error: invalid conversion from ‘int’ to ‘int*’ [-fpermissive] 19 | my_pointer<Foo> ptr (val); // { dg-error "invalid conversion from 'int' to 'int\\*'" } | ^~~ | | | int gcc/testsuite/g++.dg/template/error60a.C:9:20: note: initializing argument 1 of ‘my_pointer<Foo>::my_pointer(Foo*) [with Foo = int]’ 9 | my_pointer (Foo *ptr) // { dg-message " initializing argument 1" } | ~~~~~^~~ gcc/cp/ChangeLog: * error.cc (print_instantiation_partial_context_line): Clear the pretty printer prefix around the call to diagnostic_show_locus. gcc/testsuite/ChangeLog: * g++.dg/concepts/diagnostic2.C: Expect source line printed for the "required from here" message. * g++.dg/template/error60a.C: New test.
2024-04-26ada: bump Library_Version to 15.Jakub Jelinek1-1/+1
gcc/ada/ChangeLog: * gnatvsn.ads: Bump Library_Version to 15.
2024-04-26Bump BASE-VER.basepoints/gcc-15Jakub Jelinek1-1/+1
2024-04-26 Jakub Jelinek <jakub@redhat.com> * BASE-VER: Set to 15.0.0.
2024-04-26amdgcn: Add gfx90c targetFrederik Harwath10-6/+33
Add support for gfx90c GCN5 APU integrated graphics devices. The LLVM AMDGPU documentation does not list those devices as supported by rocm-amdhsa, but it passes most libgomp offloading tests. Although they are constrainted compared to dGPUs, they might be interesting for learning, experimentation, and testing. gcc/ChangeLog: * config.gcc: Add gfx90c. * config/gcn/gcn-hsa.h (NO_SRAM_ECC): Likewise. * config/gcn/gcn-opts.h (enum processor_type): Likewise. (TARGET_GFX90c): New macro. * config/gcn/gcn.cc (gcn_option_override): Handle gfx90c. (gcn_omp_device_kind_arch_isa): Likewise. (output_file_start): Likewise. * config/gcn/gcn.h: Add gfx90c. * config/gcn/gcn.opt: Likewise. * config/gcn/mkoffload.cc (EF_AMDGPU_MACH_AMDGCN_GFX90c): New macro. (get_arch): Handle gfx90c. (main): Handle EF_AMDGPU_MACH_AMDGCN_GFX90c * config/gcn/t-omp-device: Add gfx90c. * doc/install.texi: Likewise. * doc/invoke.texi: Likewise. libgomp/ChangeLog: * plugin/plugin-gcn.c (isa_hsa_name): Handle EF_AMDGPU_MACH_AMDGCN_GFX90c. (isa_code): Handle gfx90c. (max_isa_vgprs): Handle EF_AMDGPU_MACH_AMDGCN_GFX90c. Signed-off-by: Frederik Harwath <frederik@harwath.name>
2024-04-26i386: Fix array index overflow in pr105354-2.cHaochen Jiang1-1/+1
The array index should not be over 8 for v8hi, or it will fail under -O0 or using -fstack-protector. gcc/testsuite/ChangeLog: PR target/110621 * gcc.target/i386/pr105354-2.c: As mentioned.
2024-04-26Daily bump.GCC Administrator6-1/+260
2024-04-25bpf: set PREFERRED_DEBUGGING_TYPE to BTF_DEBUGDavid Faust5-0/+58
BTF is the standard debug info used with BPF programs, so it makes sense to default to BTF rather than DWARF. gcc/ * config/bpf/bpf.h (PREFERRED_DEBUGGING_TYPE): Set to BTF_DEBUG. gcc/testsuite/ * gcc.target/bpf/bpf-debug-options-1.c: New test. * gcc.target/bpf/bpf-debug-options-2.c: Likewise. * gcc.target/bpf/bpf-debug-options-3.c: Likewise. * gcc.target/bpf/core-options-4.c: Likewise.
2024-04-25c++: Fix constexpr evaluation of parameters passed by invisible reference ↵Jakub Jelinek3-11/+54
[PR111284] My r9-6136 changes to make a copy of constexpr function bodies before genericization modifies it broke the constant evaluation of non-POD arguments passed by value. In the callers such arguments are passed as reference to usually a TARGET_EXPR, but on the callee side until genericization they are just direct uses of a PARM_DECL with some class type. In cxx_bind_parameters_in_call I've used convert_from_reference to pretend it is passed by value and then cxx_eval_constant_expression is called there and evaluates that as an rvalue, followed by adjust_temp_type if the types don't match exactly (e.g. const Foo argument and passing to it reference to Foo TARGET_EXPR). The reason this doesn't work is that when the TARGET_EXPR in the caller is constant initialized, this for it is the address of the TARGET_EXPR_SLOT, but if the code later on pretends the PARM_DECL is just initialized to the rvalue of the constant evaluation of the TARGET_EXPR, it is as if there is a bitwise copy of the TARGET_EXPR to the callee, so this in the callee is then address of the PARM_DECL in the callee. The following patch attempts to fix that by constexpr evaluation of such arguments in the caller as an lvalue instead of rvalue, and on the callee side when seeing such a PARM_DECL, if we want an lvalue, lookup the value (lvalue) saved in ctx->globals (if any), and if wanting an rvalue, recursing with vc_prvalue on the looked up value (because it is there as an lvalue, nor rvalue). adjust_temp_type doesn't work for lvalues of non-scalarish types, for such types it relies on changing the type of a CONSTRUCTOR, but on the other side we know what we pass to the argument is addressable, so the patch on type mismatch takes address of the argument value, casts to reference to the desired type and dereferences it. 2024-04-25 Jakub Jelinek <jakub@redhat.com> PR c++/111284 * constexpr.cc (cxx_bind_parameters_in_call): For PARM_DECLs with TREE_ADDRESSABLE types use vc_glvalue rather than vc_prvalue for cxx_eval_constant_expression and if it doesn't have the same type as it should, cast the reference type to reference to type before convert_from_reference and instead of adjust_temp_type take address of the arg, cast to reference to type and then convert_from_reference. (cxx_eval_constant_expression) <case PARM_DECL>: For lval case on parameters with TREE_ADDRESSABLE types lookup result in ctx->globals if possible. Otherwise if lookup in ctx->globals was successful for parameter with TREE_ADDRESSABLE type, recurse with vc_prvalue on the returned value. * g++.dg/cpp1z/constexpr-111284.C: New test. * g++.dg/cpp1y/constexpr-lifetime7.C: Expect one error on a different line.
2024-04-25c++: Retry the aliasing of base/complete cdtor optimization at ↵Jakub Jelinek8-0/+142
import_export_decl time [PR113208] When expand_or_defer_fn is called at_eof time, it calls import_export_decl and then maybe_clone_body, which uses DECL_ONE_ONLY and comdat name in a couple of places to try to optimize cdtors which are known to have the same body by making the complete cdtor an alias to base cdtor (and in that case also uses *[CD]5* as comdat group name instead of the normal comdat group names specific to each mangled name). Now, this optimization depends on DECL_ONE_ONLY and DECL_INTERFACE_KNOWN, maybe_clone_body and can_alias_cdtor use: if (DECL_ONE_ONLY (fn)) cgraph_node::get_create (clone)->set_comdat_group (cxx_comdat_group (clone)); ... bool can_alias = can_alias_cdtor (fn); ... /* Tell cgraph if both ctors or both dtors are known to have the same body. */ if (can_alias && fns[0] && idx == 1 && cgraph_node::get_create (fns[0])->create_same_body_alias (clone, fns[0])) { alias = true; if (DECL_ONE_ONLY (fns[0])) { /* For comdat base and complete cdtors put them into the same, *[CD]5* comdat group instead of *[CD][12]*. */ comdat_group = cdtor_comdat_group (fns[1], fns[0]); cgraph_node::get_create (fns[0])->set_comdat_group (comdat_group); if (symtab_node::get (clone)->same_comdat_group) symtab_node::get (clone)->remove_from_same_comdat_group (); symtab_node::get (clone)->add_to_same_comdat_group (symtab_node::get (fns[0])); } } and /* Don't use aliases for weak/linkonce definitions unless we can put both symbols in the same COMDAT group. */ return (DECL_INTERFACE_KNOWN (fn) && (SUPPORTS_ONE_ONLY || !DECL_WEAK (fn)) && (!DECL_ONE_ONLY (fn) || (HAVE_COMDAT_GROUP && DECL_WEAK (fn)))); The following testcase regressed with Marek's r14-5979 change, when pr113208_0.C is compiled where the ctor is marked constexpr, we no longer perform this optimization, where _ZN6vectorI12QualityValueEC2ERKS1_ was emitted in the _ZN6vectorI12QualityValueEC5ERKS1_ comdat group and _ZN6vectorI12QualityValueEC1ERKS1_ was made an alias to it, instead we emit _ZN6vectorI12QualityValueEC2ERKS1_ in _ZN6vectorI12QualityValueEC2ERKS1_ comdat group and the same content _ZN6vectorI12QualityValueEC1ERKS1_ as separate symbol in _ZN6vectorI12QualityValueEC1ERKS1_ comdat group. Now, the linker seems to somehow cope with that, eventhough it probably keeps both copies of the ctor, but seems LTO can't cope with that and Honza doesn't know what it should do in that case (linker decides that the prevailing symbol is _ZN6vectorI12QualityValueEC2ERKS1_ (from the _ZN6vectorI12QualityValueEC2ERKS1_ comdat group) and _ZN6vectorI12QualityValueEC1ERKS1_ alias (from the other TU, from _ZN6vectorI12QualityValueEC5ERKS1_ comdat group)). Note, the case where some constructor is marked constexpr in one TU and not in another one happens pretty often in libstdc++ when one mixes -std= flags used to compile different compilation units. The reason the optimization doesn't trigger when the constructor is constexpr is that expand_or_defer_fn is called in that case much earlier than when it is not constexpr; in the former case it is called when we try to constant evaluate that constructor. But DECL_INTERFACE_KNOWN is false in that case and comdat_linkage hasn't been called either (I think it is desirable, because comdat group is stored in the cgraph node and am not sure it is a good idea to create cgraph nodes for something that might not be needed later on at all), so maybe_clone_body clones the bodies, but doesn't make them as aliases. The following patch is an attempt to redo this optimization when import_export_decl is called at_eof time on the base/complete cdtor (or deleting dtor). It will not do anything if maybe_clone_body hasn't been called uyet (the TREE_ASM_WRITTEN check on the DECL_MAYBE_IN_CHARGE_CDTOR_P), or when one or both of the base/complete cdtors have been lowered already, or when maybe_clone_body called maybe_thunk_body and it was successful. Otherwise retries the can_alias_cdtor check and makes the complete cdtor alias to the base cdtor with adjustments to the comdat group. 2024-04-25 Jakub Jelinek <jakub@redhat.com> PR lto/113208 * cp-tree.h (maybe_optimize_cdtor): Declare. * decl2.cc (import_export_decl): Call it for cloned cdtors. * optimize.cc (maybe_optimize_cdtor): New function. * g++.dg/abi/comdat2.C: New test. * g++.dg/abi/comdat5.C: New test. * g++.dg/lto/pr113208_0.C: New test. * g++.dg/lto/pr113208_1.C: New file. * g++.dg/lto/pr113208.h: New file.
2024-04-25bpf: avoid issues with CO-RE and -gtoggleDavid Faust4-2/+39
Compiling a BPF program with CO-RE relocations (and BTF) while also passing -gtoggle led to an inconsistent state where CO-RE support was enabled but BTF would not be generated, and this was not caught by the existing option parsing. This led to an ICE when generating the CO-RE relocation info, since BTF is required for CO-RE. Update bpf_option_override to avoid this case, and add a few tests for the interactions of these options. gcc/ * config/bpf/bpf.cc (bpf_option_override): Improve handling of CO-RE options to avoid issues with -gtoggle. gcc/testsuite/ * gcc.target/bpf/core-options-1.c: New test. * gcc.target/bpf/core-options-2.c: Likewise. * gcc.target/bpf/core-options-3.c: Likewise.
2024-04-25openmp: Copy DECL_LANG_SPECIFIC and DECL_LANG_FLAG_? to tree-nested decl ↵Jakub Jelinek2-28/+49
copy [PR114825] tree-nested.cc creates in 2 spots artificial VAR_DECLs, one of them is used both for debug info and OpenMP/OpenACC lowering purposes, the other solely for OpenMP/OpenACC lowering purposes. When the decls are used in OpenMP/OpenACC lowering, the OMP langhooks (mostly Fortran, C just a little and C++ doesn't have nested functions) then inspect the flags on the vars and based on that decide how to lower the corresponding clauses. Unfortunately we weren't copying DECL_LANG_SPECIFIC and DECL_LANG_FLAG_?, so the langhooks made decisions on the default flags on those instead. As the original decl isn't necessarily a VAR_DECL, could be e.g. PARM_DECL, using copy_node wouldn't work properly, so this patch just copies those flags in addition to other flags it was copying already. And I've removed code duplication by introducing a helper function which does copying common to both uses. 2024-04-25 Jakub Jelinek <jakub@redhat.com> PR fortran/114825 * tree-nested.cc (get_debug_decl): New function. (get_nonlocal_debug_decl): Use it. (get_local_debug_decl): Likewise. * gfortran.dg/gomp/pr114825.f90: New test.
2024-04-25PR modula2/114836 Avoid concatenation of error strings to aid error locale ↵Gaius Mulley1-6/+3
translation This patch avoids a concatenation of error strings making locale translation of the error message easier. gcc/m2/ChangeLog: PR modula2/114836 * gm2-compiler/M2Range.mod (FoldTypeAssign): Avoid error string concatenation. Signed-off-by: Gaius Mulley <gaiusmod2@gmail.com>
2024-04-25bpf: default to using pseudo-C assembly syntax by defaultJose E. Marchesi68-67/+70
At this point the kernel headers that almost all BPF programs use contain pseudo-C inline assembly and having the GNU toolchain using the conventional assembly syntax by default would force users to specify the command-line option explicitly almost all of the time, which is very inconvenient. This patch changes GCC in order to recognize and generate the pseudo-C assembly syntax of BPF by default. The ASM_SPEC is adapted accordingly, and in a way that the current release of the BPF assembler (which still expects conventional assembler syntax by default) does the right thing. Tested in bpf-unknown-none-bpf target and x86_64-linux-gnu host. No regressions. gcc/ChangeLog * config/bpf/bpf.opt: Use ASM_PSEUDOC for the default value of -masm. * config/bpf/bpf.h (ASM_SPEC): Adapt accordingly. * doc/invoke.texi (eBPF Options): Update. gcc/testsuite/ChangeLog * gcc.target/bpf/alu-1.c: Specify conventional asm dialect. * gcc.target/bpf/xbpf-indirect-call-1.c: Likewise. * gcc.target/bpf/sync-fetch-and-add.c: Likewise. * gcc.target/bpf/smov-2.c: Likewise. * gcc.target/bpf/smov-1.c: Likewise. * gcc.target/bpf/smod-1.c: Likewise. * gcc.target/bpf/sload-1.c: Likewise. * gcc.target/bpf/sdiv-1.c: Likewise. * gcc.target/bpf/nop-1.c: Likewise. * gcc.target/bpf/neg-1.c: Likewise. * gcc.target/bpf/ldxdw.c: Likewise. * gcc.target/bpf/jmp-1.c: Likewise. * gcc.target/bpf/inline-memops-threshold-1.c: Likewise. * gcc.target/bpf/float-1.c: Likewise. * gcc.target/bpf/double-2.c: Likewise. * gcc.target/bpf/double-1.c: Likewise. * gcc.target/bpf/core-builtin-type-id.c: Likewise. * gcc.target/bpf/core-builtin-type-based.c: Likewise. * gcc.target/bpf/core-builtin-fieldinfo-size-1.c: Likewise. * gcc.target/bpf/core-builtin-fieldinfo-sign-2.c: Likewise. * gcc.target/bpf/core-builtin-fieldinfo-sign-1.c: Likewise. * gcc.target/bpf/core-builtin-fieldinfo-rshift-2.c: Likewise. * gcc.target/bpf/core-builtin-fieldinfo-rshift-1.c: Likewise. * gcc.target/bpf/core-builtin-fieldinfo-offset-1.c: Likewise. * gcc.target/bpf/core-builtin-fieldinfo-lshift-2.c: Likewise. * gcc.target/bpf/core-builtin-fieldinfo-lshift-1-le.c: Likewise. * gcc.target/bpf/core-builtin-fieldinfo-lshift-1-be.c: Likewise. * gcc.target/bpf/core-builtin-fieldinfo-existence-1.c: Likewise. * gcc.target/bpf/core-builtin-fieldinfo-errors-2.c: Likewise. * gcc.target/bpf/core-builtin-fieldinfo-errors-1.c: Likewise. * gcc.target/bpf/core-builtin-fieldinfo-const-elimination.c: Likewise. * gcc.target/bpf/core-builtin-exprlist-4.c: Likewise. * gcc.target/bpf/core-builtin-exprlist-3.c: Likewise. * gcc.target/bpf/core-builtin-exprlist-2.c: Likewise. * gcc.target/bpf/core-builtin-exprlist-1.c: Likewise. * gcc.target/bpf/core-builtin-enumvalue-opt.c: Likewise. * gcc.target/bpf/core-builtin-enumvalue-errors.c: Likewise. * gcc.target/bpf/core-builtin-enumvalue.c: Likewise. * gcc.target/bpf/core-builtin-3.c: Likewise. * gcc.target/bpf/core-builtin-2.c: Likewise. * gcc.target/bpf/core-builtin-1.c: Likewise. * gcc.target/bpf/core-attr-struct-as-array.c: Likewise. * gcc.target/bpf/core-attr-6.c: Likewise. * gcc.target/bpf/core-attr-5.c: Likewise. * gcc.target/bpf/core-attr-4.c: Likewise. * gcc.target/bpf/core-attr-3.c: Likewise. * gcc.target/bpf/core-attr-2.c: Likewise. * gcc.target/bpf/core-attr-1.c: Likewise. * gcc.target/bpf/builtin-load.c: Likewise. * gcc.target/bpf/btfext-funcinfo-nocore.c: Likewise. * gcc.target/bpf/btfext-funcinfo.c: Likewise. * gcc.target/bpf/bswap-1.c: Likewise. * gcc.target/bpf/bswap-2.c: Likewise. * gcc.target/bpf/attr-kernel-helper.c: Likewise. * gcc.target/bpf/atomic-xchg-2.c: Likewise. * gcc.target/bpf/atomic-xchg-1.c: Likewise. * gcc.target/bpf/atomic-op-3.c: Likewise. * gcc.target/bpf/atomic-op-2.c: Likewise. * gcc.target/bpf/atomic-op-1.c: Likewise. * gcc.target/bpf/atomic-fetch-op-3.c: Likewise. * gcc.target/bpf/atomic-fetch-op-2.c: Likewise. * gcc.target/bpf/atomic-fetch-op-1.c: Likewise. * gcc.target/bpf/atomic-cmpxchg-2.c: Likewise. * gcc.target/bpf/atomic-cmpxchg-1.c: Likewise. * gcc.target/bpf/alu-2.c: Likewise.
2024-04-25arm: Zero/Sign extends for CMSE securityRichard Ball3-0/+257
Co-Authored by: Andre Simoes Dias Vieira <Andre.SimoesDiasVieira@arm.com> This patch makes the following changes: 1) When calling a secure function from non-secure code then any arguments smaller than 32-bits that are passed in registers are zero- or sign-extended. 2) After a non-secure function returns into secure code then any return value smaller than 32-bits that is passed in a register is zero- or sign-extended. This patch addresses the following CVE-2024-0151. gcc/ChangeLog: PR target/114837 * config/arm/arm.cc (cmse_nonsecure_call_inline_register_clear): Add zero/sign extend. (arm_expand_prologue): Add zero/sign extend. gcc/testsuite/ChangeLog: * gcc.target/arm/cmse/extend-param.c: New test. * gcc.target/arm/cmse/extend-return.c: New test.
2024-04-25modula2: issue the parameter incompatibility error message based on dialectGaius Mulley2-6/+28
This tiny patch improves the parameter incompatibility error message by having a different message for the dialect chosen mentioning the specific violation. PIM uses assignment rules for pass by value and expression rules for pass by reference. ISO uses expression type checking for pass by value and pass by reference. gcc/m2/ChangeLog: * gm2-compiler/M2FileName.def (CalculateFileName): Remove quoted string in comment. * gm2-compiler/M2Range.mod (FoldTypeParam): Generate dialect specific parameter incompatibility error message. Signed-off-by: Gaius Mulley <gaiusmod2@gmail.com>
2024-04-25tree-optimization/114792 - order loops to unloops in CHRichard Biener2-0/+41
When we use unloop_loops we have to make sure to have loops ordered inner to outer as otherwise we can wreck inner loop structure where unlooping relies on that being intact. The following re-sorts the vector of to unloop loops after copy-header as that adds to the vector in two places and the wrong order. PR tree-optimization/114792 * tree-ssa-loop-ch.cc (ch_order_loops): New function. (ch_base::copy_headers): Sort loops to unloop inner-to-outer. * gcc.dg/torture/pr114792.c: New testcase.
2024-04-25Fix calling convention incompatibility with vendor compilerEric Botcazou6-2/+82
For the 20th anniversary of https://gcc.gnu.org/gcc-3.4/sparc-abi.html, a new calling convention incompatibility with the vendor compiler (and the ABI) has been discovered in 64-bit mode, affecting small structures containing arrays of floating-point components. The decision has been made to fix it on Solaris only at this point. gcc/ PR target/114416 * config/sparc/sparc.h (SUN_V9_ABI_COMPATIBILITY): New macro. * config/sparc/sol2.h (SUN_V9_ABI_COMPATIBILITY): Redefine it. * config/sparc/sparc.cc (fp_type_for_abi): New predicate. (traverse_record_type): Use it to spot floating-point types. (compute_fp_layout): Also deal with array types. gcc/testsuite/ * gcc.target/sparc/small-struct-1.c: New test. * gcc.target/sparc/pr105573.c: Rename to... * gcc.target/sparc/20230425-1.c: ...this. * gcc.target/sparc/pr109541.c: Rename to... * gcc.target/sparc/20230607-1.c: ...this
2024-04-25RISC-V: Add test cases for insn does not satisfy its constraints [PR114714]Pan Li2-0/+170
We have one ICE when RVV register overlap is enabled. We reverted this feature as it is in stage 4 and there is no much time to figure a better solution for this. Thus, for now add the related test cases which will trigger ICE when register overlap enabled. This will gate the RVV register overlap support in GCC-15. PR target/114714 gcc/testsuite/ChangeLog: * g++.target/riscv/rvv/base/pr114714-1.C: New test. * g++.target/riscv/rvv/base/pr114714-2.C: New test. Signed-off-by: Pan Li <pan2.li@intel.com> Co-Authored-by: Kito Cheng <kito.cheng@sifive.com>
2024-04-25RISC-V: Add early clobber to the dest of vwsllPan Li1-1/+1
We missed the existing early clobber for the dest operand of vwsll pattern when resolve the conflict of revert register overlap. Thus add it back to the pattern. Unfortunately, we have no test to cover this part and will improve this after GCC-15 open. The below tests are passed for this patch: * The rv64gcv fully regression test with isl build. gcc/ChangeLog: * config/riscv/vector-crypto.md: Add early clobber to the dest operand of vwsll. Signed-off-by: Pan Li <pan2.li@intel.com>
2024-04-25Fortran: Fix ICE in gfc_trans_create_temp_array from bad type [PR93678]Paul Thomas2-2/+40
2024-04-25 Paul Thomas <pault@gcc.gnu.org> gcc/fortran PR fortran/93678 * trans-expr.cc (gfc_conv_procedure_call): Use the interface, where possible, to obtain the type of character procedure pointers of class entities. gcc/testsuite/ PR fortran/93678 * gfortran.dg/pr93678.f90: New test.
2024-04-25Fortran: Generate new charlens for shared symbol typespecs [PR89462]Paul Thomas2-4/+20
2024-04-25 Paul Thomas <pault@gcc.gnu.org> Jakub Jelinek <jakub@gcc.gnu.org> gcc/fortran PR fortran/89462 * decl.cc (build_sym): Add an extra argument 'elem'. If 'elem' is greater than 1, gfc_new_charlen is called to generate a new charlen, registered in the symbol namespace. (variable_decl, enumerator_decl): Set the new argument in the calls to build_sym. gcc/testsuite/ PR fortran/89462 * gfortran.dg/pr89462.f90: New test.
2024-04-25rs6000: Use bcdsub. instead of bcdadd. for bcd invalid number checkingHaochen Gui2-5/+5
bcdadd. might causes overflow which also set the overflow/invalid bit. bcdsub. doesn't have the issue when do subtracting on two same bcd number. gcc/ * config/rs6000/altivec.md (*bcdinvalid_<mode>): Replace bcdadd with bcdsub. (bcdinvalid_<mode>): Likewise. gcc/testsuite/ * gcc.target/powerpc/bcd-4.c: Adjust the number of bcdadd and bcdsub.
2024-04-25RISC-V: Add xfail test case for highpart register overlap of vwcvtPan Li3-0/+223
We reverted below patch for register group overlap, add the related insn test and mark it as xfail. And we will remove the xfail after we support the register overlap in GCC-15. bdad036da32 RISC-V: Support highpart register overlap for vwcvt The below test suites are passed for this patch * The rv64gcv fully regression test with isl build. gcc/testsuite/ChangeLog: * gcc.target/riscv/rvv/base/pr112431-1.c: New test. * gcc.target/riscv/rvv/base/pr112431-2.c: New test. * gcc.target/riscv/rvv/base/pr112431-3.c: New test. Signed-off-by: Pan Li <pan2.li@intel.com>
2024-04-25Daily bump.GCC Administrator4-1/+125
2024-04-24c++/modules testsuite: restrict expensive pr99023 testPatrick Palka2-0/+2
The pr99023 testcase uses --param=ggc-min-expand=0 which forces a GC during every collection point and consequently is very slow to run, and ends up being the main bottleneck of the modules.exp testsuite. So this patch restricts this test to run once, in C++20 mode, instead of multiple times (C++17, C++20 and C++23 mode by default). After this patch the modules.exp testsuite finishes in 3m instead of 3m40s with -j8 on my machine. gcc/testsuite/ChangeLog: * g++.dg/modules/pr99023_a.X: Run only in C++20 mode. * g++.dg/modules/pr99023_b.X: Likewise. Reviewed-by: Jason Merrill <jason@redhat.com>
2024-04-24c++: constexpr union member access folding [PR114709]Patrick Palka2-0/+11
The object/offset canonicalization performed in cxx_fold_indirect_ref is undesirable for union member accesses because it loses information about the member being accessed which we may later need to diagnose an inactive-member access. So this patch restricts the canonicalization accordingly. PR c++/114709 gcc/cp/ChangeLog: * constexpr.cc (cxx_fold_indirect_ref): Restrict object/offset canonicalization to RECORD_TYPE member accesses. gcc/testsuite/ChangeLog: * g++.dg/cpp0x/constexpr-union8.C: New test. Reviewed-by: Jason Merrill <jason@redhat.com>
2024-04-24v2: DOCUMENTATION_ROOT_URL vs. release branches [PR114738]Jakub Jelinek5-31/+24
This patch moves the documentation root URL infix for release branches from get_option_url/make_doc_url to configure, such that only the default changes and when users specify a custom documentation root URL, they don't have to add gcc-MAJOR.MINOR.0 subdirectories for release branches. Tested by checking ../configure --disable-bootstrap --enable-languages=c --disable-multilib built trunk on void foo (int x) { __builtin_printf ("%ld\n", x); } testcase and looking for the URL in there, then repeating that after changing gcc/BASE-VER to 14.1.0 and again after changing it to 14.1.1, plus normal bootstrap/regtest. 2024-04-24 Jakub Jelinek <jakub@redhat.com> PR other/114738 * opts.cc (get_option_url): Revert 2024-04-17 changes. * gcc-urlifier.cc: Don't include diagnostic-core.h. (gcc_urlifier::make_doc_url): Revert 2024-04-17 changes. * configure.ac (documentation-root-url): On release branches append gcc-MAJOR.MINOR.0/ to the default DOCUMENTATION_ROOT_URL. * doc/install.texi (--with-documentation-root-url=): Document the change of the default. * configure: Regenerate.
2024-04-24Revert "RISC-V: Support highpart register overlap for vwcvt"Pan Li10-294/+22
This reverts commit bdad036da32f72b84a96070518e7d75c21706dc2.
2024-04-24bpf: define BPF feature pre-processor macrosJose E. Marchesi6-17/+142
This commit makes the BPF backend to define the following macros for c-family languages: __BPF_CPU_VERSION__ This is a numeric value identifying the version of the BPF "cpu" for which GCC is generating code. __BPF_FEATURE_ALU32 __BPF_FEATURE_JMP32 __BPF_FEATURE_JMP_EXT __BPF_FEATURE_BSWAP __BPF_FEATURE_SDIV_SMOD __BPF_FEATURE_MOVSX __BPF_FEATURE_LDSX __BPF_FEATURE_GOTOL __BPF_FEATURE_ST These are defines if the corresponding "feature" is enabled. The features are implicitly enabled by the BPF CPU version enabled, and most of them can also be enabled/disabled using target-specific -m[no-]FEATURE command line switches. Note that this patch moves the definition of bpf_target_macros, that implements TARGET_CPU_CPP_BUILTINS in the BPF backend, to a bpf-c.cc file. This is because we are now using facilities from c-family/* and these features are not available in compilers like lto1. A couple of tests are also added. Tested in target bpf-unknown-none-gcc and host x86_64-linux-gnu. No regressions. gcc/ChangeLog * config.gcc: Add bpf-c.o as a target object for C and C++. * config/bpf/bpf.cc (bpf_target_macros): Move to bpf-c.cc. * config/bpf/bpf-c.cc: New file. (bpf_target_macros): Move from bpf.cc and define BPF CPU feature macros. * config/bpf/t-bpf: Add rules to build bpf-c.o. gcc/testsuite/ChangeLog * gcc.target/bpf/feature-macro-1.c: New test. * gcc.target/bpf/feature-macro-2.c: Likewise.
2024-04-24tree-optimization/114787 - more careful loop update with CFG cleanupRichard Biener2-3/+50
When CFG cleanup removes a backedge we have to be more careful with loop update. In particular we need to clear niter info and estimates and if we remove the last backedge of a loop we have to also mark it for removal to prevent a following basic block merging to associate loop info with an unrelated header. PR tree-optimization/114787 * tree-cfg.cc (remove_edge_and_dominated_blocks): When removing a loop backedge clear niter info and when removing the last backedge of a loop mark that loop for removal. * gcc.dg/torture/pr114787.c: New testcase.
2024-04-24tree-optimization/114832 - wrong dominator info with vect peelingRichard Biener2-1/+14
When we update the dominator of the redirected exit after peeling we check whether the immediate dominator was the loop header rather than the exit source when we later want to just update it to the new source. The following fixes this oversight. PR tree-optimization/114832 * tree-vect-loop-manip.cc (slpeel_tree_duplicate_loop_to_edge_cfg): Fix dominance check. * gcc.dg/vect/pr114832.c: New testcase.
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