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Clarify comment about selectors.
gcc/ada/
* sem_ch13.adb (Resolve_Name): Clarify comment.
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This patch fixes a bug where if a selected_component X.Y appears in an
aspect_specification, and there are two or more overloaded Y's in X,
then it can choose the wrong one, leading to subsequent type errors.
It was always picking the last declaration of Y, and leaving Entity
set to that. We now reset Entity (as for the already-existing code
for N_Identifier just below).
Note that Resolve_Aspect_Expressions is called only for
aspect_specifications, and not even all aspect_specifications,
so the bug didn't occur for other names. For example,
Resolve_Aspect_Expressions is not called for aspect_specifications
in the visible part of a library package if there is no private part.
gcc/ada/
* sem_ch13.adb (Resolve_Name): This is called only for names in
aspect_specifications. If the name is an overloaded
selected_component, reset the Entity. Note that this was already
done for N_Identifier in the code just below.
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This happens for the extension of a private discriminated tagged type.
gcc/ada/
* repinfo.adb (List_Record_Info.List_Structural_Record_Layout): Add
another guard for private types after retrieving the parent in the
extension case.
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SPARK RM definition of function with side effects now makes them
implicitly volatile functions.
gcc/ada/
* sem_util.adb (Is_Volatile_Function): Return True on functions
with side effects.
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Complete support for functions with side-effects.
gcc/ada/
* sem_prag.adb (Analyze_Global_Item): Handle side-effect
functions like procedures.
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Sync comment with the updated SPARK RM rules.
gcc/ada/
* sem_prag.adb (Collect_Global_Item): Update comment.
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[PR97263]
Like was done for -ffast-math in r0-105946-ga570fc16fa8056, we should
document that -Ofast enables -fmath-errno, -funsafe-math-optimizations,
-finite-math-only, -fno-trapping-math in their documentation.
Note this changes the stronger "must not" to be "is not" for -fno-trapping-math
since we do enable it for -Ofast already.
gcc/ChangeLog:
PR middle-end/97263
* doc/invoke.texi(fmath-errno): Document it is turned on
with -Ofast.
(funsafe-math-optimizations): Likewise.
(ffinite-math-only): Likewise.
(fno-trapping-math): Likewise and use less strong language.
Signed-off-by: Andrew Pinski <quic_apinski@quicinc.com>
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gcc/ChangeLog:
* config/i386/sse.md (usdot_prodv*qi): Extend to VI1_AVX512
with vpmaddwd when avxvnni/avx512vnni is not available.
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gcc/ChangeLog:
PR target/113079
* config/i386/mmx.md (usdot_prodv8qi): New expander.
(sdot_prodv8qi): Ditto.
(udot_prodv8qi): Ditto.
(usdot_prodv4hi): Ditto.
(udot_prodv4hi): Ditto.
(sdot_prodv4hi): Ditto.
gcc/testsuite/ChangeLog:
* gcc.target/i386/pr113079.c: New test.
* gcc.target/i386/pr113079-2.c: New test.
* gcc.target/i386/sse4-pr113079-2.c: New test.
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gcc/ChangeLog:
PR target/113090
* config/i386/i386-expand.cc
(expand_vec_perm_punpckldq_pshuf): New function.
(ix86_expand_vec_perm_const_1): Try
expand_vec_perm_punpckldq_pshuf for sequence of 2
instructions.
gcc/testsuite/ChangeLog:
* gcc.target/i386/pr113090.c: New test.
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Add a new pru-specific pass to validate that the assumptions for the
minimal C runtime are not violated by the user program.
gcc/ChangeLog:
* config/pru/pru-passes.cc (class pass_pru_minrt_check): New
pass.
(pass_pru_minrt_check::execute): New method.
(make_pru_minrt_check): New function.
* config/pru/pru-passes.def (INSERT_PASS_AFTER): Register the
minrt check pass.
* config/pru/pru-protos.h (make_pru_minrt_check): Add
declaration.
gcc/testsuite/ChangeLog:
* g++.target/pru/minrt-1.cc: New test.
* g++.target/pru/minrt-2.cc: New test.
* g++.target/pru/minrt-3.cc: New test.
* g++.target/pru/pru.exp: New test.
* gcc.target/pru/minrt-1.c: New test.
* gcc.target/pru/minrt-2.c: New test.
* gcc.target/pru/minrt-3.c: New test.
Signed-off-by: Dimitar Dimitrov <dimitar@dinux.eu>
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Switch to using a passes definition file instead of explicitly
registering the PRU-specific passes in pru.cc. This would make it
cleaner to add new PRU-specific passes.
There are no functional changes.
gcc/ChangeLog:
* config/pru/pru-passes.cc (class pass_tiabi_check): Rename to
add "pru_" prefix.
(class pass_pru_tiabi_check): Ditto.
(pass_tiabi_check::execute): Ditto.
(pass_pru_tiabi_check::execute): Ditto.
(make_pru_tiabi_check): Ditto.
(pru_register_abicheck_pass): Remove.
* config/pru/pru-protos.h (pru_register_abicheck_pass): Remove.
(make_pru_tiabi_check): Add declaration.
* config/pru/pru.cc (pru_option_override): Remove explicit pass
registration.
* config/pru/t-pru: Register PRU passes definition file.
* config/pru/pru-passes.def: New file.
Signed-off-by: Dimitar Dimitrov <dimitar@dinux.eu>
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Use the HOST_WIDE_INT_1U macro instead of literal 1 when constructing
constants for RTL.
gcc/ChangeLog:
* config/pru/pru.md (lshrdi3): Use HOST_WIDE_INT_1U macro.
(ashldi3): Ditto.
Signed-off-by: Dimitar Dimitrov <dimitar@dinux.eu>
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Remove usage of ATTRIBUTE_UNUSED. Instead remove the argument's name,
which in C++ means that the argument would not be used.
gcc/ChangeLog:
* config/pru/pru-passes.cc: Drop ATTRIBUTE_UNUSED and remove
argument's name.
* config/pru/pru-pragma.cc (pru_pragma_ctable_entry): Ditto.
* config/pru/pru.cc (pru_function_profiler): Ditto.
(pru_can_eliminate): Ditto.
(pru_rtx_costs): Ditto.
(pru_insert_attributes): Ditto.
(pru_function_value): Ditto.
(pru_libcall_value): Ditto.
(pru_return_in_memory): Ditto.
(pru_builtin_decl): Ditto.
(pru_expand_builtin): Ditto.
Signed-off-by: Dimitar Dimitrov <dimitar@dinux.eu>
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There is no need to store callee-saved registers in prologue if the
function would never return. Size optimization is paramount for the
microcontroller-class PRU.
Some backends save some registers for noreturn functions. But for PRU
debuggability is a less concern because GDB has not been ported yet
for PRU.
gcc/ChangeLog:
* config/pru/pru.cc (prologue_saved_reg_p): Skip saving
if function will not return.
gcc/testsuite/ChangeLog:
* gcc.target/pru/noreturn-prologue-1.c: New test.
* gcc.target/pru/noreturn-prologue-2.c: New test.
Signed-off-by: Dimitar Dimitrov <dimitar@dinux.eu>
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The higher bits in the result of some ALU operations are inherently
always zero when all input operands are smaller than 32-bits.
Add pattern variants to match when the resulting value is zero
extended, so that all operations can be effectively executed in a
single instruction. For PRU it simply means to use a wider register for
destination.
ALU operations which cannot be presented as zero-extending their
destination are addition, subtraction and logical shift left. The PRU
ALU performs all operations in 32-bit mode, so the carry-out and
shifted-out bits would violate the assumption that ALU operation was
performed in 16-bit or 8-bit mode, and result was zero-extended.
gcc/ChangeLog:
* config/pru/alu-zext.md (_noz0): New subst attribute.
(<code>_impl): Allow zero-extending the destination.
(<shift_op>): Remove unified pattern
(ashl_impl): New distinct pattern.
(lshr_impl): Ditto.
(alu3_zext_op0_subst): New subst iterator to zero-extend the
destination register.
gcc/testsuite/ChangeLog:
* gcc.target/pru/extzv-1.c: Update to mark the new more
efficient generated code sequence.
* gcc.target/pru/extzv-2.c: Ditto.
* gcc.target/pru/extzv-3.c: Ditto.
* gcc.target/pru/zero_extend-op0.c: New test.
Signed-off-by: Dimitar Dimitrov <dimitar@dinux.eu>
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Optimize the generated code for the bit-field extract and insert
patterns:
- Use bit-set and bit-clear instructions for 1-bit fields.
- Expand to SImode operations instead of relying on the default
expansion to word (QI) mode.
gcc/ChangeLog:
* config/pru/pru.md (extzv<mode>): Make it an expand pattern,
handle efficiently zero-positioned bit-fields.
(insv<mode>): New expand pattern.
gcc/testsuite/ChangeLog:
* gcc.target/pru/ashiftrt.c: Minor update due to new (but
equivalent) generated code sequence.
* gcc.target/pru/extzv-1.c: New test.
* gcc.target/pru/extzv-2.c: New test.
* gcc.target/pru/extzv-3.c: New test.
* gcc.target/pru/insv-1.c: New test.
* gcc.target/pru/insv-2.c: New test.
* gcc.target/pru/insv-3.c: New test.
* gcc.target/pru/insv-4.c: New test.
Signed-off-by: Dimitar Dimitrov <dimitar@dinux.eu>
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Loading a constant zero in a 64-bit register now takes one instead of
two instructions.
gcc/ChangeLog:
* config/pru/pru.md: New pattern alternative for zero-filling
64-bit registers.
gcc/testsuite/ChangeLog:
* gcc.target/pru/mov-0.c: New test.
Signed-off-by: Dimitar Dimitrov <dimitar@dinux.eu>
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Stop relying on the default fallback to TARGET_RTX_COST for PRU's
addressing costs. Implement TARGET_ADDRESS_COST, in order to allow RTX
cost refactoring in the future without affecting the addressing costs.
No code generation changes are expected by this patch. No changes were
detected when running embench-iot and building a few real-world firmware
examples.
gcc/ChangeLog:
* config/pru/pru.cc (pru_address_cost): Implement address cost
calculation.
(TARGET_ADDRESS_COST): Define for PRU.
Signed-off-by: Dimitar Dimitrov <dimitar@dinux.eu>
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The following further strengthens the check which convert expressions
we allow to vectorize as simple copy by resorting to
tree_nop_conversion_p on the vector components.
PR tree-optimization/114921
* tree-vect-stmts.cc (vectorizable_assignment): Use
tree_nop_conversion_p to identify converts we can vectorize
with a simple assignment.
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This patch resolves PR target/106060 by providing efficient methods for
materializing/synthesizing special "vector" constants on x86. Currently
there are three methods of materializing a vector constant; the most
general is to load a vector from the constant pool, secondly "duplicated"
constants can be synthesized by moving an integer between units and
broadcasting (of shuffling it), and finally the special cases of the
all-zeros vector and all-ones vectors can be loaded via a single SSE
instruction. This patch handle additional cases that can be synthesized
in two instructions, loading an all-ones vector followed by another SSE
instruction. Following my recent patch for PR target/112992, there's
conveniently a single place in i386-expand.cc where these special cases
can be handled.
Two examples are given in the original bugzilla PR for 106060.
__m256i should_be_cmpeq_abs ()
{
return _mm256_set1_epi8 (1);
}
is now generated (with -O3 -march=x86-64-v3) as:
vpcmpeqd %ymm0, %ymm0, %ymm0
vpabsb %ymm0, %ymm0
ret
and
__m256i should_be_cmpeq_add ()
{
return _mm256_set1_epi8 (-2);
}
is now generated as:
vpcmpeqd %ymm0, %ymm0, %ymm0
vpaddb %ymm0, %ymm0, %ymm0
ret
2024-05-07 Roger Sayle <roger@nextmovesoftware.com>
Hongtao Liu <hongtao.liu@intel.com>
gcc/ChangeLog
PR target/106060
* config/i386/i386-expand.cc (enum ix86_vec_bcast_alg): New.
(struct ix86_vec_bcast_map_simode_t): New type for table below.
(ix86_vec_bcast_map_simode): Table of SImode constants that may
be efficiently synthesized by a ix86_vec_bcast_alg method.
(ix86_vec_bcast_map_simode_cmp): New comparator for bsearch.
(ix86_vector_duplicate_simode_const): Efficiently synthesize
V4SImode and V8SImode constants that duplicate special constants.
(ix86_vector_duplicate_value): Attempt to synthesize "special"
vector constants using ix86_vector_duplicate_simode_const.
* config/i386/i386.cc (ix86_rtx_costs) <case ABS>: ABS of a
vector integer mode costs with a single SSE instruction.
gcc/testsuite/ChangeLog
PR target/106060
* gcc.target/i386/auto-init-8.c: Update test case.
* gcc.target/i386/avx512fp16-13.c: Likewise.
* gcc.target/i386/pr100865-9a.c: Likewise.
* gcc.target/i386/pr101796-1.c: Likewise.
* gcc.target/i386/pr106060-1.c: New test case.
* gcc.target/i386/pr106060-2.c: Likewise.
* gcc.target/i386/pr106060-3.c: Likewise.
* gcc.target/i386/pr70314.c: Update test case.
* gcc.target/i386/vect-shiftv4qi.c: Likewise.
* gcc.target/i386/vect-shiftv8qi.c: Likewise.
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In some circumstances, unions can also have an __as_base type; we need
to make sure that IS_FAKE_BASE_TYPE correctly recognises this.
PR c++/114954
gcc/cp/ChangeLog:
* cp-tree.h (IS_FAKE_BASE_TYPE): Also apply to unions.
gcc/testsuite/ChangeLog:
* g++.dg/modules/pr114954.C: New test.
Signed-off-by: Nathaniel Shead <nathanieloshead@gmail.com>
Reviewed-by: Jason Merrill <jason@redhat.com>
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I got notified by Linaro CI and by checking testresults that there seems
to be some occasional failures in tpl-friend-4_b.C on some architectures
and standards modes since r15-59-gb5f6a56940e708. I haven't been able
to reproduce but looking at the backtrace I suspect the issue is that
we're adding to the 'imported_temploid_friend' map a decl that is
ultimately discarded, which then has its address reused by a later decl
causing a failure in the assert in 'set_originating_module'.
This patch fixes the problem by ensuring 'imported_temploid_friends' is
correctly marked as a GTY root, and that 'duplicate_decls' properly
removes entries from the map for declarations that it frees.
PR c++/114275
gcc/cp/ChangeLog:
* cp-tree.h (remove_defining_module): Declare.
* decl.cc (duplicate_decls): Call remove_defining_module on
to-be-freed newdecl.
* module.cc (imported_temploid_friends): Mark as GTY root...
(init_modules): ...and allocate from ggc.
(trees_in::decl_value): Only track for declarations that won't
be discarded.
(remove_defining_module): New function.
Signed-off-by: Nathaniel Shead <nathanieloshead@gmail.com>
Reviewed-by: Jason Merrill <jason@redhat.com>
Reviewed-by: Patrick Palka <ppalka@redhat.com>
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This patch would like to add new sub extension (aka Zfbfmin) to the
-march= option. It introduces a new data type BF16.
1 The Zfbfmin extension depend on 'F', and the FLH, FSH, FMV.X.H, and
FMV.H.X instructions as defined in the Zfh extension.
2 The Zfhmin extension includes the following instructions from the
Zfh extension: FLH, FSH, FMV.X.H, FMV.H.X, FCVT.S.H, and FCVT.H.S.
3 Zfhmin extension depend on 'F'.
4 Simply put, just make Zfbfmin dependent on Zfhmin.
Perhaps in the future, we could propose making the FLH, FSH, FMV.X.H, and
FMV.H.X instructions an independent extension to achieve precise dependency
relationships for the Zfbfmin.
You can locate more information about Zfbfmin from below spec doc.
<https://github.com/riscv/riscv-bfloat16/releases/download/v59042fc71c31a9bcb2f1957621c960ed36fac401/riscv-bfloat16.pdf>
gcc/
* common/config/riscv/riscv-common.cc (riscv_implied_info): zfbfmin
implies zfhmin.
(riscv_ext_version_table, riscv_ext_flag_table): Add zfbfmin.
* config/riscv/riscv.opt (ZFBFMIN): Add optoion.
gcc/testsuite/
* gcc.target/riscv/arch-35.c: New test.
* gcc.target/riscv/arch-36.c: New test.
* gcc.target/riscv/predef-34.c: New test.
* gcc.target/riscv/predef-35.c: New test.
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this adds a test case for PR114749.
Going to commit as obvious unless somebody complains.
Regards
Robin
gcc/testsuite/ChangeLog:
PR tree-optimization/114749
* gcc.target/riscv/rvv/autovec/pr114749.c: New test.
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1 At point <https://github.com/riscv/riscv-bfloat16>,
BF16 has already been completed "post public review".
2 LLVM has also added support for RISCV BF16 in
<https://reviews.llvm.org/D151313> and
<https://reviews.llvm.org/D150929>.
3 According to the discussion <https://github.com/riscv-non-isa/riscv-elf-psabi-doc/pull/367>,
this use __bf16 and use DF16b in riscv_mangle_type like x86.
Below test are passed for this patch
* The riscv fully regression test.
gcc/ChangeLog:
* config/riscv/iterators.md: New mode iterator HFBF.
* config/riscv/riscv-builtins.cc (riscv_init_builtin_types):
Initialize data type _Bfloat16.
* config/riscv/riscv-modes.def (FLOAT_MODE): New.
(ADJUST_FLOAT_FORMAT): New.
* config/riscv/riscv.cc (riscv_mangle_type): Support for BFmode.
(riscv_scalar_mode_supported_p): Ditto.
(riscv_libgcc_floating_mode_supported_p): Ditto.
(riscv_init_libfuncs): Set the conversion method for BFmode and
HFmode.
(riscv_block_arith_comp_libfuncs_for_mode): Set the arithmetic
and comparison libfuncs for the mode.
* config/riscv/riscv.md (mode" ): Add BF.
(movhf): Support for BFmode.
(mov<mode>): Ditto.
(*movhf_softfloat): Ditto.
(*mov<mode>_softfloat): Ditto.
libgcc/ChangeLog:
* config/riscv/sfp-machine.h (_FP_NANFRAC_B): New.
(_FP_NANSIGN_B): Ditto.
* config/riscv/t-softfp32: Add support for BF16 libfuncs.
* config/riscv/t-softfp64: Ditto.
* soft-fp/floatsibf.c: For si -> bf16.
* soft-fp/floatunsibf.c: For unsi -> bf16.
gcc/testsuite/ChangeLog:
* gcc.target/riscv/bf16_arithmetic.c: New test.
* gcc.target/riscv/bf16_call.c: New test.
* gcc.target/riscv/bf16_comparison.c: New test.
* gcc.target/riscv/bf16_float_libcall_convert.c: New test.
* gcc.target/riscv/bf16_integer_libcall_convert.c: New test.
Co-authored-by: Jin Ma <jinma@linux.alibaba.com>
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This slipped through the cracks. Probably also NEWS-worthy.
gcc/ChangeLog:
* doc/invoke.texi (RISC-V): Add -mcmodel=large.
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In this patch we're looking at cases where we'd like to be able to use
lui+slli, but can't because of the sign extending nature of lui on
TARGET_64BIT. For example: 0x8001100000020UL. The trunk currently generates 4
instructions for that constant, when it can be done with 3 (lui+slli.uw+addi).
When Zba is enabled, we can use lui+slli.uw as the slli.uw masks off the bits
32..63 before shifting, giving us the precise semantics we want.
I strongly suspect we'll want to do the same for a set of constants with
lui+add.uw, lui+shNadd.uw, so you'll see the beginnings of generalizing support
for lui followed by a "uw" instruction.
The new test just tests the set of cases that showed up while exploring a
particular space of the constant synthesis problem. It's not meant to be
exhaustive (failure to use shadd when profitable).
gcc/
* config/riscv/riscv.cc (riscv_integer_op): Add field tracking if we
want to use a "uw" instruction variant.
(riscv_build_integer_1): Initialize the new field in various places.
Use lui+slli.uw for some constants.
(riscv_move_integer): Handle slli.uw.
gcc/testsuite/
* gcc.target/riscv/synthesis-2.c: New test.
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Even though the aarch64-mingw32 support has not been committed yet,
we should fix some of the testcases. In this case gcc.target/aarch64/sve/loop_add_6.c
is easy to fix. We should use __SIZETYPE__ instead of `unsigned long` for the variables
that will be used for pointer plus.
Committed as obvious after a quick test on aarch64-linux-gnu.
gcc/testsuite/ChangeLog:
PR testsuite/114177
* gcc.target/aarch64/sve/loop_add_6.c: Use __SIZETYPE__ instead
of `unsigned long` for index and offset variables.
Signed-off-by: Andrew Pinski <quic_apinski@quicinc.com>
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"layout_var_decl" to handle the cases when the DECL is union.
PR c/53548
Add testing cases to test the _bos for flexible array members in unions
or alone in structures.
gcc/c/ChangeLog:
PR c/53548
* c-decl.cc (add_flexible_array_elts_to_size): Handle the cases
when the DECL is union.
gcc/cp/ChangeLog:
PR c/53548
* decl.cc (layout_var_decl): Handle the cases when the DECL is
union with a flexible array member initializer.
gcc/testsuite/ChangeLog:
PR c/53548
* c-c++-common/fam-in-union-alone-in-struct-bos-1.c: New test.
* c-c++-common/fam-in-union-alone-in-struct-bos.c: New test.
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PR c/53548
gcc/testsuite/ChangeLog:
PR c/53548
* c-c++-common/fam-in-union-alone-in-struct-1.c: New testcase.
* c-c++-common/fam-in-union-alone-in-struct-2.c: New testcase.
* c-c++-common/fam-in-union-alone-in-struct-3.c: New testcase.
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in structures. Adjust testcases for flexible array member in union and alone in structure extension.
PR c/53548
gcc/c/ChangeLog:
PR c/53548
* c-decl.cc (finish_struct): Change errors to pedwarns for the cases
flexible array members in union or alone in structures.
gcc/cp/ChangeLog:
PR c/53548
* class.cc (diagnose_flexarrays): Change error to pdewarn for the case
flexible array members alone in structures.
* decl.cc (grokdeclarator): Change error to pdewarn for the case
flexible array members in unions.
gcc/ChangeLog:
PR c/53548
* stor-layout.cc (place_union_field): Use zero sizes for flexible array
member fields.
gcc/testsuite/ChangeLog:
PR c/53548
* c-c++-common/builtin-clear-padding-3.c: Adjust testcase.
* g++.dg/ext/flexary12.C: Likewise.
* g++.dg/ext/flexary19.C: Likewise.
* g++.dg/ext/flexary2.C: Likewise.
* g++.dg/ext/flexary3.C: Likewise.
* g++.dg/ext/flexary36.C: Likewise.
* g++.dg/ext/flexary4.C: Likewise.
* g++.dg/ext/flexary5.C: Likewise.
* g++.dg/ext/flexary8.C: Likewise.
* g++.dg/torture/pr64280.C: Likewise.
* gcc.dg/20050620-1.c: Likewise.
* gcc.dg/940510-1.c: Likewise.
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The request for GCC to accept that the C99 flexible array member can be
in a union or alone in a structure has been made a long time ago around 2012
for supporting several practical cases including glibc.
A GCC PR has been opened for such request at that time:
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=53548
However, this PR was closed as WONTFIX around 2015 due to the following reason:
"there is an existing extension that makes the requested functionality possible"
i.e GCC fully supported that the zero-length array can be in a union or alone
in a structure for a long time. (though I didn't see any official documentation
on such extension)
It's reasonable to close PR53548 at that time since zero-length array extension
can be used for such purpose.
However, since GCC13, in order to improve the C/C++ security, we introduced
-fstrict-flex-arrays=n to gradually eliminate the "fake flexible array"
usages from C/C++ source code. As a result, zero-length arrays eventually
will be replaced by C99 flexiable array member completely.
Therefore, GCC needs to explicitly allow such extensions directly for C99
flexible arrays, since flexable array member in unions or alone in structs
are common code patterns in active use by the Linux kernel (and other projects).
For example, these do not error by default with GCC:
union one {
int a;
int b[0];
};
union two {
int a;
struct {
struct { } __empty;
int b[];
};
};
But these do:
union three {
int a;
int b[];
};
struct four {
int b[];
}
Clang has supported such extensions since March, 2024
https://github.com/llvm/llvm-project/pull/84428
GCC should also support such extensions. This will allow for
a seamless transition for code bases away from zero-length arrays without
losing existing code patterns.
gcc/ChangeLog:
PR c/53548
* doc/extend.texi: Add documentation for Flexible Array Members in
Unions and Flexible Array Members alone in Structures.
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ipa/92606: Inter-procedural analysis optimizes data across
address-spaces and PROGMEM. As of v14, the PROGMEM part is
still not fixed (and there is still no target hook as proposed
in PR92932). Just disable respective bogus optimization.
PR ipa/92606
gcc/
* config/avr/avr.cc (avr_option_override): Set
flag_ipa_icf_variables = 0.
gcc/testsuite/
* gcc.target/avr/torture/pr92606.c: New test.
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Use gimple_omp_target_clauses() instead of gimple_omp_taskreg_clauses()
when stmt is GIMPLE_OMP_TARGET, to avoid an as_a<> ICE. The code
immediately following this is already conditionalized in the same way.
gcc/ChangeLog
* tree-nested.cc (convert_tramp_reference_stmt): Use the correct
accessor for GIMPLE_OMP_TARGET clauses.
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|
The following implements the gist of the PR100923 fix in a leaner
(and more complete) way by realizing that all ao_ref_init_from_vn_reference
uses need to have an SSA name in the base valueized with availability
in mind. Instead of re-valueizing the whole chain of operands we can
simply only and always valueize the SSA name we put in the base.
This handles also two omitted places in vn_reference_lookup_3.
PR tree-optimization/100923
* tree-ssa-sccvn.cc (ao_ref_init_from_vn_reference): Valueize
base SSA_NAME.
(vn_reference_lookup_3): Adjust vn_context_bb around calls
to ao_ref_init_from_vn_reference.
(vn_reference_lookup_pieces): Revert original PR100923 fix.
(vn_reference_lookup): Likewise.
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|
This makes sure we can create ao_refs from all VN operands we create.
* tree-ssa-sccvn.cc (ao_ref_init_from_vn_reference): Add
TARGET_MEM_REF support. Handle more bases.
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|
Writable parameters can be used as global outputs inside functions with
side-effects.
gcc/ada/
* sem_prag.adb (Collect_Global_Item): Handle functions with
side-effects.
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|
Move handling of IN parameters to where both IN and IN OUT parameters
are handled. This makes the code marginally more efficient and
symmetrical to handling of implicit inputs.
gcc/ada/
* sem_prag.adb (Collect_Global_Item): Move code.
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|
Functions with side-effects can modify writable parameters of mode IN,
so these parameters must be allowed to appear in their Depends aspects.
gcc/ada/
* sem_prag.adb (Find_Role): Handle functions with side-effects
like procedures.
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|
The compiler expands a too-early finalization call for the result
object of an extended return statement that returns a call to a
dispatching constructor function for a limited interface type,
resulting in premature (and extra) finalization of the result.
The temporary object that the compiler creates to hold the result
of the build-in-place call loses the fact that it comes from a
return, and the wrong BIP allocation form may be passed in the
call to the dispatching constructor, and the later code for dealing
with finalization in Exp_Ch7.Build_Finalizer incorrectly finalizes
the result object.
gcc/ada/
* exp_ch6.adb
(Make_Build_In_Place_Iface_Call_In_Object_Declaration): Set the
Is_Return_Object flag on the entity of the temp object created to
hold the BIP call result, from the flag on the passed-in object
declaration's entity. Update copyright notice to 2024.
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|
This patch fixes a bug where the compiler would allow
a name X to refer to a library unit that is not visible.
In particular, this happens when the name X occurs in the
private part of a library package, and the parent of that
package contains an instantiation of a generic package, and the
spec of that generic package has "private with X;",
but there is no "private with X;" or "with X;" that applies
to the place where the name X occurs.
Also misc cleanup.
gcc/ada/
* sem_ch10.adb (Expand_With_Clause): Misc cleanup.
(Install_Private_With_Clauses): Avoid installing a private
with_clause that comes from an instantiated generic
(it is marked as Implicit_With, but doesn't come from a parent
with). Fix typo in comment, and other minor cleanups.
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|
This patch changes the source location information for the default
expressions of discrimants to better represent the fact that they're
evaluated at the point of object declaration, in the cases where
a Build_Default_Subtype optimization is performed. This fixes a
regression with CodePeer diagnostics introduced by a recent change
around Build_Default_Subtype optimizations.
gcc/ada/
* sem_util.adb (Build_Default_Subtype): Tweak source location
information.
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|
These actions are not supported with this profile, but we were nevertheless
attempting to generate them for protected objects.
gcc/ada/
* exp_ch7.adb (Build_Finalizer.Process_Declarations): Do not call
Processing_Actions for simple protected objects if the profile is
restricted.
* exp_util.adb (Requires_Cleanup_Actions): Do not return True for
simple protected objects if the profile is restricted.
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|
The fe.h header file is supposed to contain only the declarations needed
by the code in the gcc-interface repository.
gcc/ada/
* fe.h: Remove unused declarations and add 'extern' to others.
no-issue-check
|
|
GNATprove newer implemented support for abstract states with aspect
Relaxed_Initialization, so the frontend support is now deconstructed.
gcc/ada/
* einfo-utils.adb (Is_Relaxed_Initialization_State): Remove.
* einfo-utils.ads (Is_Relaxed_Initialization_State): Remove.
* einfo.ads: Remove description of removed aspect.
* fe.h (Is_Relaxed_Initialization_State): Remove.
* sem_prag.adb (Analyze_Abstract_State): Remove support for
Relaxed_Initialization.
* sem_util.adb (Has_Relaxed_Initialization): Likewise.
* sem_util.ads (Has_Relaxed_Initialization): Likewise.
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|
Incremental improvement/clean up.
gcc/ada/
* sem_warn.adb (Within_Postcondition): Add coverage for
Preconditions
|
|
Incremental improvement/clean up.
gcc/ada/
* sem_warn.adb (Within_Postcondition): Add/modify comments to
document various cases.
|
|
Incremental improvement/clean up.
gcc/ada/
* sem_warn.adb (Within_Postcondition): Renamed to
Within_Contract_Or_Predicate.
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