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2024-05-20ada: Another small cleanup about allocators and aggregatesEric Botcazou3-106/+104
This eliminates a few more oddities present in the expander for allocators and aggregates nested in allocators and other constructs: - Convert_Aggr_In_Allocator takes both the N_Allocator and the aggregate as parameters, while the sibling procedures Convert_Aggr_In_Assignment and Convert_Aggr_In_Object_Decl only take the former. This changes the first to be consistent with the two others and propagates the change to Convert_Array_Aggr_In_Allocator. - Convert_Aggr_In_Object_Decl contains an awkward code structure with a useless inner block statement. - In_Place_Assign_OK and Convert_To_Assignments have some declarations of local variables not in the right place. No functional changes (presumably). gcc/ada/ * exp_aggr.ads (Convert_Aggr_In_Allocator): Remove Aggr parameter and adjust description. (Convert_Aggr_In_Object_Decl): Adjust description. * exp_aggr.adb (Convert_Aggr_In_Allocator): Remove Aggr parameter and add local variable of the same name instead. Adjust call to Convert_Array_Aggr_In_Allocator. (Convert_Aggr_In_Object_Decl): Add comment for early return and remove useless inner block statement. (Convert_Array_Aggr_In_Allocator): Remove Aggr parameter and add local variable of the same name instead. (In_Place_Assign_OK): Move down declarations of local variables. (Convert_To_Assignments): Put all declarations of local variables in the same place. Fix typo in comment. Replace T with Full_Typ. * exp_ch4.adb (Expand_Allocator_Expression): Call Unqualify instead of Expression on the qualified expression of the allocator for the sake of consistency. Adjust call to Convert_Aggr_In_Allocator.
2024-05-20ada: Fix static 'Img for enumeration type with Discard_NamesPiotr Trojanek1-3/+16
Fix a short-circuit folding of 'Img for enumeration type, which wrongly ignored Discard_Names and exposed enumeration literals. gcc/ada/ * sem_attr.adb (Eval_Attribute): Handle enumeration type with Discard_Names.
2024-05-20ada: Fix for attribute Width on enumeration types with Discard_NamePiotr Trojanek2-13/+19
Fix computation of attribute 'Width for enumeration types with Discard_Name aspect enabled. gcc/ada/ * exp_imgv.adb (Expand_Width_Attribute): Fix for 'Width that is computed at run time. * sem_attr.adb (Eval_Attribute): Fix for 'Width that is computed at compilation time.
2024-05-20ada: Use System.Address for address computation in System.Pool_GlobalSebastian Poeplau1-3/+4
Some architectures don't let us convert System.Storage_Elements.Integer_Address back to a valid System.Address. Using the arithmetic operations on System.Address from System.Storage_Elements prevents the problem while leaving semantics unchanged. gcc/ada/ * libgnat/s-pooglo.adb (Allocate): Use arithmetic on System.Address to compute the aligned address.
2024-05-20ada: Reject too-strict alignment specifications.Steve Baird4-16/+57
For a discrete (or fixed-point) type T, GNAT requires that T'Object_Size shall be a multiple of T'Alignment * 8 . GNAT also requires that T'Object_Size shall be no larger than Standard'Max_Integer_Size. For a sufficiently-large alignment specification, these requirements can conflict. The conflict is resolved by rejecting such alignment specifications (which were previously accepted in some cases). gcc/ada/ * freeze.adb (Adjust_Esize_For_Alignment): Assert that a valid Alignment specification cannot result in adjusting the given type's Esize to be larger than System_Max_Integer_Size. * sem_ch13.adb (Analyze_Attribute_Definition_Clause): In analyzing an Alignment specification, enforce the rule that a specified Alignment value for a discrete or fixed-point type shall not be larger than System_Max_Integer_Size / 8 . gcc/testsuite/ChangeLog: * gnat.dg/specs/alignment2.ads: Adjust. * gnat.dg/specs/alignment2_bis.ads: New test.
2024-05-20ada: One more adjustment coming from aliasing considerationsEric Botcazou1-2/+5
It is needed on PowerPC platforms because of specific calling conventions. gcc/ada/ * libgnat/g-sothco.ads (In_Addr): Add aspect Universal_Aliasing.
2024-05-20ada: Detect only conflict with synomyms of max queue lengthJose Ruiz1-5/+13
Use of duplicated representation aspect is detected elsewhere so we do not try to detect them here to avoid repetition of messages. gcc/ada/ * sem_prag.adb (Analyze_Pragma): Exclude detection of duplicates because they are detected elsewhere.
2024-05-20ada: Implement representation aspect Max_Entry_Queue_LengthJose Ruiz5-13/+41
Enforce Max_Entry_Queue_Length (and its synonym Max_Entry_Queue_Depth) when applied to individual protected entries. gcc/ada/ * exp_ch9.adb (Expand_N_Protected_Type_Declaration): Clarify comments. * sem_prag.adb (Analyze_Pragma): Check for duplicates Max_Entry_Queue_Length, Max_Entry_Queue_Depth and Max_Queue_Length for the same protected entry. * sem_util.adb (Get_Max_Queue_Length): Take into account all three representation aspects that can be used to set this restriction. (Has_Max_Queue_Length): Likewise. * doc/gnat_rm/implementation_defined_pragmas.rst: (pragma Max_Queue_Length): Fix pragma in example. * gnat_rm.texi: Regenerate.
2024-05-20ada: Small cleanup in System.Finalization_Primitives unitEric Botcazou2-24/+28
It has been made possible by recent changes. gcc/ada/ * libgnat/s-finpri.ads (Collection_Node): Move to private part. (Collection_Node_Ptr): Likewise. (Header_Alignment): Change to declaration and move completion to private part. (Header_Size): Likewise. (Lock_Type): Delete. (Finalization_Collection): Move Lock component and remove default value for Finalization_Started component. * libgnat/s-finpri.adb (Initialize): Reorder statements.
2024-05-20ada: Rework and augment documentation on strict aliasingEric Botcazou4-263/+353
The documentation was originally centered around pragma No_Strict_Aliasing and pragma Universal_Aliasing was mentioned only as an afterthought. It also contained a warning about the usage of overlays implemented by means of address clauses that has been obsolete for long. gcc/ada/ * doc/gnat_rm/implementation_defined_pragmas.rst (Universal_Aliasing): Remove reference to No_Strict_Aliasing. * doc/gnat_ugn/gnat_and_program_execution.rst (Optimization and Strict Aliasinng): Simplify first example and make it more consistent with the second. Add description of the effects of pragma Universal_Aliasing and document new warning issued for unchecked conversions. Remove obsolete stuff. * gnat_rm.texi: Regenerate. * gnat_ugn.texi: Regenerate.
2024-05-20MIPS: Remove -m(no-)lra optionYunQiang Su4-39/+3
PR target/113955 The `-mlra` option was introduced in 2014 for MIPS, and was set to default since then. It's time for us to drop no-lra support by dropping -m(no-)lra options. gcc: * config/mips/mips.cc(mips_option_override): Drop mips_lra_flag variable; (mips_lra_p): Removed. (TARGET_LRA_P): Remove definition here to use the default one. * config/mips/mips.md(*mul_acc_si, *mul_acc_si_r3900, *mul_sub_si): Drop mips_lra_flag variable. * config/mips/mips.opt(-mlra): Removed. * config/mips/mips.opt.urls(mlra): Removed.
2024-05-20Fortran: Fix SHAPE for zero-size arraysTobias Burnus2-1/+54
PR fortran/115150 gcc/fortran/ChangeLog: * trans-intrinsic.cc (gfc_conv_intrinsic_bound): Fix SHAPE for zero-size arrays gcc/testsuite/ChangeLog: * gfortran.dg/shape_12.f90: New test.
2024-05-20Fortran: invoke.texi - link to OpenCoarrays.org + mention libcaf_singleTobias Burnus1-1/+4
gcc/fortran/ChangeLog: * invoke.texi (fcoarray): Link to OpenCoarrays.org; mention libcaf_single.
2024-05-20i386: Remove Xeon Phi ISA supportHaochen Jiang104-4445/+97
gcc/ChangeLog: * common/config/i386/cpuinfo.h (get_intel_cpu): Remove Xeon Phi cpus. (get_available_features): Remove Xeon Phi ISAs. * common/config/i386/i386-common.cc (OPTION_MASK_ISA_AVX512PF_SET): Removed. (OPTION_MASK_ISA_AVX512ER_SET): Ditto. (OPTION_MASK_ISA2_AVX5124FMAPS_SET): Ditto. (OPTION_MASK_ISA2_AVX5124VNNIW_SET): Ditto. (OPTION_MASK_ISA_PREFETCHWT1_SET): Ditto. (OPTION_MASK_ISA_AVX512F_UNSET): Remove AVX512PF and AVX512ER. (OPTION_MASK_ISA_AVX512PF_UNSET): Removed. (OPTION_MASK_ISA_AVX512ER_UNSET): Ditto. (OPTION_MASK_ISA2_AVX5124FMAPS_UNSET): Ditto. (OPTION_MASK_ISA2_AVX5124VNNIW_UNSET): Ditto. (OPTION_MASK_ISA_PREFETCHWT1_UNSET): Ditto. (OPTION_MASK_ISA2_AVX512F_UNSET): Remove AVX5124FMAPS and AVX5125VNNIW. (ix86_handle_option): Remove Xeon Phi options. (processor_names): Remove Xeon Phi cpus. (processor_alias_table): Ditto. * common/config/i386/i386-cpuinfo.h (enum processor_types): Ditto. (enum processor_features): Remove Xeon Phi ISAs. * common/config/i386/i386-isas.h: Ditto. * config.gcc: Remove Xeon Phi cpus and ISAs. * config/i386/avx5124fmapsintrin.h: Remove intrin support. * config/i386/avx5124vnniwintrin.h: Ditto. * config/i386/avx512erintrin.h: Ditto. * config/i386/avx512pfintrin.h: Ditto. * config/i386/cpuid.h (bit_AVX512PF): Removed. (bit_AVX512ER): Ditto. (bit_PREFETCHWT1): Ditto. (bit_AVX5124VNNIW): Ditto. (bit_AVX5124FMAPS): Ditto. * config/i386/driver-i386.cc (host_detect_local_cpu): Remove Xeon Phi. * config/i386/i386-builtin-types.def: Remove unused types. * config/i386/i386-builtin.def (BDESC): Remove builtins. * config/i386/i386-builtins.cc (ix86_init_mmx_sse_builtins): Ditto. * config/i386/i386-c.cc (ix86_target_macros_internal): Remove Xeon Phi cpus and ISAs. * config/i386/i386-expand.cc (ix86_expand_builtin): Remove Xeon Phi related handlers. (ix86_emit_swdivsf): Ditto. (ix86_emit_swsqrtsf): Ditto. * config/i386/i386-isa.def: Remove Xeon Phi ISAs. * config/i386/i386-options.cc (m_KNL): Removed. (m_KNM): Ditto. (isa2_opts): Remove Xeon Phi ISAs. (isa_opts): Ditto. (processor_cost_table): Remove Xeon Phi cpus. (ix86_valid_target_attribute_inner_p): Remove Xeon Phi ISAs. (ix86_option_override_internal): Remove Xeon Phi related handlers. * config/i386/i386-rust.cc (ix86_rust_target_cpu_info): Remove Xeon Phi ISAs. * config/i386/i386.cc (ix86_hard_regno_mode_ok): Remove Xeon Phi related handler. * config/i386/i386.h (TARGET_EMIT_VZEROUPPER): Removed. (enum processor_type): Remove Xeon Phi cpus. * config/i386/i386.md (prefetch): Remove PREFETCHWT1. (*prefetch_3dnow): Ditto. (*prefetch_prefetchwt1): Removed. * config/i386/i386.opt: Remove Xeon Phi ISAs. * config/i386/immintrin.h: Ditto. * config/i386/sse.md (VF1_AVX512ER_128_256): Removed. (rsqrt<mode>2): Change iterator from VF1_AVX512ER_128_256 to VF1_128_256. (GATHER_SCATTER_SF_MEM_MODE): Removed. (avx512pf_gatherpf<mode>sf): Ditto. (*avx512pf_gatherpf<VI48_512:mode>sf_mask): Ditto. (avx512pf_gatherpf<mode>df): Ditto. (*avx512pf_gatherpf<VI4_256_8_512:mode>df_mask): Ditto. (avx512pf_scatterpf<mode>sf): Ditto. (*avx512pf_scatterpf<VI48_512:mode>sf_mask): Ditto. (avx512pf_scatterpf<mode>df): Ditto. (*avx512pf_scatterpf<VI4_256_8_512:mode>df_mask): Ditto. (exp2<mode>2): Ditto. (avx512er_exp2<mode><mask_name><round_saeonly_name>): Ditto. (<mask_codefor>avx512er_rcp28<mode><mask_name><round_saeonly_name>): Ditto. (avx512er_vmrcp28<mode><mask_name><round_saeonly_name>): Ditto. (<mask_codefor>avx512er_rsqrt28<mode><mask_name><round_saeonly_name>): Ditto. (avx512er_vmrsqrt28<mode><mask_name><round_saeonly_name>): Ditto. (IMOD4): Ditto. (imod4_narrow): Ditto. (mov<mode>): Ditto. (*mov<mode>_internal): Ditto. (avx5124fmaddps_4fmaddps): Ditto. (avx5124fmaddps_4fmaddps_mask): Ditto. (avx5124fmaddps_4fmaddps_maskz): Ditto. (avx5124fmaddps_4fmaddss): Ditto. (avx5124fmaddps_4fmaddss_mask): Ditto. (avx5124fmaddps_4fmaddss_maskz): Ditto. (avx5124fmaddps_4fnmaddps): Ditto. (avx5124fmaddps_4fnmaddps_mask): Ditto. (avx5124fmaddps_4fnmaddps_maskz): Ditto. (avx5124fmaddps_4fnmaddss): Ditto. (avx5124fmaddps_4fnmaddss_mask): Ditto. (avx5124fmaddps_4fnmaddss_maskz): Ditto. (avx5124vnniw_vp4dpwssd): Ditto. (avx5124vnniw_vp4dpwssd_mask): Ditto. (avx5124vnniw_vp4dpwssd_maskz): Ditto. (avx5124vnniw_vp4dpwssds): Ditto. (avx5124vnniw_vp4dpwssds_mask): Ditto. (avx5124vnniw_vp4dpwssds_maskz): Ditto. * config/i386/x86-tune-sched.cc (ix86_issue_rate): Remove Xeon Phi cpus. (ix86_adjust_cost): Ditto. * config/i386/x86-tune.def (X86_TUNE_SCHEDULE): Ditto. (X86_TUNE_PARTIAL_REG_DEPENDENCY): Ditto. (X86_TUNE_MOVX): Ditto. (X86_TUNE_MEMORY_MISMATCH_STALL): Ditto. (X86_TUNE_ACCUMULATE_OUTGOING_ARGS): Ditto. (X86_TUNE_FOUR_JUMP_LIMIT): Ditto. (X86_TUNE_USE_INCDEC): Ditto. (X86_TUNE_INTEGER_DFMODE_MOVES): Ditto. (X86_TUNE_OPT_AGU): Ditto. (X86_TUNE_AVOID_LEA_FOR_ADDR): Ditto. (X86_TUNE_AVOID_MEM_OPND_FOR_CMOVE): Ditto. (X86_TUNE_USE_SAHF): Ditto. (X86_TUNE_USE_CLTD): Ditto. (X86_TUNE_USE_BT): Ditto. (X86_TUNE_ONE_IF_CONV_INSN): Ditto. (X86_TUNE_EXPAND_ABS): Ditto. (X86_TUNE_USE_SIMODE_FIOP): Ditto. (X86_TUNE_EXT_80387_CONSTANTS): Ditto. (X86_TUNE_SSE_UNALIGNED_LOAD_OPTIMAL): Ditto. (X86_TUNE_SSE_UNALIGNED_STORE_OPTIMAL): Ditto. (X86_TUNE_SPLIT_MEM_OPND_FOR_FP_CONVERTS): Ditto. (X86_TUNE_SLOW_PSHUFB): Ditto. (X86_TUNE_EMIT_VZEROUPPER): Removed. * config/i386/xmmintrin.h (enum _mm_hint): Remove _MM_HINT_ET1. * doc/extend.texi: Remove Xeon Phi. * doc/invoke.texi: Ditto. gcc/testsuite/ChangeLog: * g++.dg/other/i386-2.C: Remove Xeon Phi ISAs. * g++.dg/other/i386-3.C: Ditto. * g++.target/i386/mv28.C: Ditto. * gcc.target/i386/builtin_target.c: Ditto. * gcc.target/i386/sse-12.c: Ditto. * gcc.target/i386/sse-13.c: Ditto. * gcc.target/i386/sse-14.c: Ditto. * gcc.target/i386/sse-22.c: Ditto. * gcc.target/i386/sse-23.c: Ditto. * gcc.target/i386/sse-26.c: Ditto. * gcc.target/i386/avx5124fmadd-v4fmaddps-1.c: Removed. * gcc.target/i386/avx5124fmadd-v4fmaddps-2.c: Ditto. * gcc.target/i386/avx5124fmadd-v4fmaddss-1.c: Ditto. * gcc.target/i386/avx5124fmadd-v4fnmaddps-1.c: Ditto. * gcc.target/i386/avx5124fmadd-v4fnmaddps-2.c: Ditto. * gcc.target/i386/avx5124fmadd-v4fnmaddss-1.c: Ditto. * gcc.target/i386/avx5124vnniw-vp4dpwssd-1.c: Ditto. * gcc.target/i386/avx5124vnniw-vp4dpwssd-2.c: Ditto. * gcc.target/i386/avx5124vnniw-vp4dpwssds-1.c: Ditto. * gcc.target/i386/avx5124vnniw-vp4dpwssds-2.c: Ditto. * gcc.target/i386/avx512er-check.h: Ditto. * gcc.target/i386/avx512er-vexp2pd-1.c: Ditto. * gcc.target/i386/avx512er-vexp2pd-2.c: Ditto. * gcc.target/i386/avx512er-vexp2ps-1.c: Ditto. * gcc.target/i386/avx512er-vexp2ps-2.c: Ditto. * gcc.target/i386/avx512er-vrcp28pd-1.c: Ditto. * gcc.target/i386/avx512er-vrcp28pd-2.c: Ditto. * gcc.target/i386/avx512er-vrcp28ps-1.c: Ditto. * gcc.target/i386/avx512er-vrcp28ps-2.c: Ditto. * gcc.target/i386/avx512er-vrcp28ps-3.c: Ditto. * gcc.target/i386/avx512er-vrcp28ps-4.c: Ditto. * gcc.target/i386/avx512er-vrcp28sd-1.c: Ditto. * gcc.target/i386/avx512er-vrcp28sd-2.c: Ditto. * gcc.target/i386/avx512er-vrcp28ss-1.c: Ditto. * gcc.target/i386/avx512er-vrcp28ss-2.c: Ditto. * gcc.target/i386/avx512er-vrsqrt28pd-1.c: Ditto. * gcc.target/i386/avx512er-vrsqrt28pd-2.c: Ditto. * gcc.target/i386/avx512er-vrsqrt28ps-1.c: Ditto. * gcc.target/i386/avx512er-vrsqrt28ps-2.c: Ditto. * gcc.target/i386/avx512er-vrsqrt28ps-3.c: Ditto. * gcc.target/i386/avx512er-vrsqrt28ps-4.c: Ditto. * gcc.target/i386/avx512er-vrsqrt28ps-5.c: Ditto. * gcc.target/i386/avx512er-vrsqrt28ps-6.c: Ditto. * gcc.target/i386/avx512er-vrsqrt28sd-1.c: Ditto. * gcc.target/i386/avx512er-vrsqrt28sd-2.c: Ditto. * gcc.target/i386/avx512er-vrsqrt28ss-1.c: Ditto. * gcc.target/i386/avx512er-vrsqrt28ss-2.c: Ditto. * gcc.target/i386/avx512pf-vgatherpf0dpd-1.c: Ditto. * gcc.target/i386/avx512pf-vgatherpf0dps-1.c: Ditto. * gcc.target/i386/avx512pf-vgatherpf0qpd-1.c: Ditto. * gcc.target/i386/avx512pf-vgatherpf0qps-1.c: Ditto. * gcc.target/i386/avx512pf-vgatherpf1dpd-1.c: Ditto. * gcc.target/i386/avx512pf-vgatherpf1dps-1.c: Ditto. * gcc.target/i386/avx512pf-vgatherpf1qpd-1.c: Ditto. * gcc.target/i386/avx512pf-vgatherpf1qps-1.c: Ditto. * gcc.target/i386/avx512pf-vscatterpf0dpd-1.c: Ditto. * gcc.target/i386/avx512pf-vscatterpf0dps-1.c: Ditto. * gcc.target/i386/avx512pf-vscatterpf0qpd-1.c: Ditto. * gcc.target/i386/avx512pf-vscatterpf0qps-1.c: Ditto. * gcc.target/i386/avx512pf-vscatterpf1dpd-1.c: Ditto. * gcc.target/i386/avx512pf-vscatterpf1dps-1.c: Ditto. * gcc.target/i386/avx512pf-vscatterpf1qpd-1.c: Ditto. * gcc.target/i386/avx512pf-vscatterpf1qps-1.c: Ditto. * gcc.target/i386/pr104448.c: Ditto. * gcc.target/i386/pr82941-2.c: Ditto. * gcc.target/i386/pr82942-2.c: Ditto. * gcc.target/i386/pr82990-1.c: Ditto. * gcc.target/i386/pr82990-3.c: Ditto. * gcc.target/i386/pr82990-6.c: Ditto. * gcc.target/i386/pr82990-7.c: Ditto. * gcc.target/i386/pr89523-5.c: Ditto. * gcc.target/i386/pr89523-6.c: Ditto. * gcc.target/i386/pr91033.c: Ditto. * gcc.target/i386/prefetchwt1-1.c: Ditto.
2024-05-20DSE: Fix ICE after allow vector type in get_stored_valPan Li2-1/+25
We allowed vector type for get_stored_val when read is less than or equal to store in previous. Unfortunately, the valididate_subreg treats the vector type's size is less than vector register as invalid. Then we will have ICE here. This patch would like to fix it by filter-out the invalid type size, and make sure the subreg is valid for both the read_mode and store_mode before perform the real gen_lowpart. The below test suites are passed for this patch: * The x86 bootstrap test. * The x86 regression test. * The riscv rv64gcv regression test. * The riscv rv64gc regression test. * The aarch64 regression test. gcc/ChangeLog: * dse.cc (get_stored_val): Make sure read_mode/write_mode is valid subreg before gen_lowpart. gcc/testsuite/ChangeLog: * gcc.target/riscv/rvv/base/bug-6.c: New test. Signed-off-by: Pan Li <pan2.li@intel.com>
2024-05-20Daily bump.GCC Administrator1-1/+1
2024-05-19Daily bump.GCC Administrator9-1/+1321
2024-05-19[to-be-committed][RISC-V][PR target/115142] Do not create invalidate ↵Jeff Law2-0/+11
shift-add insn The circumstances which triggered this weren't something that should appear in the wild (-ftree-ter, without optimization enabled). So I wasn't planning to backport. Obviously if it shows up in another context we can revisit that decision. I've run this through my rv32gcv and rv64gc tester. Waiting on the CI system before committing. PR target/115142 gcc/ * config/riscv/riscv.cc (mem_shadd_or_shadd_rtx_p): Make sure shifted argument is a register. gcc/testsuite * gcc.target/riscv/pr115142.c: New test.
2024-05-19testsuite, C++, Darwin: Skip cxa_atexit-6, which is not applicable.Iain Sandoe1-1/+5
For Darwin, non-weak functions defined in a TU always bind locally and so cxa_atexit-6.C is not applicable here. PR testsuite/114982 gcc/testsuite/ChangeLog: * g++.dg/tree-ssa/cxa_atexit-6.C: Skip for Darwin. Signed-off-by: Iain Sandoe <iain@sandoe.co.uk>
2024-05-19testsuite, darwin: Compile a test without unwind frames.Iain Sandoe1-2/+3
In the current Darwin implementation, we do not use .cfi_ insns and emitted EH frames contain 'coalesced' section designations which interfere with the scan asm. gcc/testsuite/ChangeLog: * gcc.dg/darwin-weakimport-3.c: Suppress unwind frames. Signed-off-by: Iain Sandoe <iain@sandoe.co.uk>
2024-05-19Fix oversight in latest change to can_mult_highpart_pEric Botcazou1-4/+3
gcc/ * optabs-query.cc (can_mult_highpart_p): Test for the existence of a wider mode instead of requiring it.
2024-05-19nvptx: Correct pattern for popcountdi2 insn in nvptx.md.Roger Sayle1-3/+10
The result of a POPCOUNT operation in RTL should have the same mode as its operand. This corrects the specification of popcount in the nvptx backend, splitting the current generic define_insn into two, one for popcountsi2 and the other for popcountdi2 (the latter with an explicit truncate). 2024-05-19 Roger Sayle <roger@nextmovesoftware.com> gcc/ChangeLog * config/nvptx/nvptx.md (popcount<mode>2): Split into... (popcountsi2): define_insn handling SImode popcount. (popcountdi2): define_insn handling DImode popcount, with an explicit truncate:SI to produce an SImode result.
2024-05-18RISC-V: Implement -m{,no}fence-tsoPalmer Dabbelt3-1/+13
Some processors from T-Head don't implement the `fence.tso` instruction natively and instead trap to firmware. This breaks some users who haven't yet updated the firmware and one could imagine it breaking users who are trying to build firmware if they're using the C memory model. So just add an option to disable emitting it, in a similar fashion to how we allow users to forbid other instructions. Link: https://bugs.debian.org/cgi-bin/bugreport.cgi?bug=1070959 --- I've just smoke tested this one, but void func(void) { __atomic_thread_fence(__ATOMIC_ACQ_REL); } generates `fence.tso` without the argument and `fence rw,rw` with `-mno-fence-tso`, so it seems to be at least mostly there. I figured I'd just send it up for comments before putting together the DG bits: it's kind of a pain to carry around these workarounds for unimplemented instructions, but it's in HW so there's not much we can do about that. gcc/ChangeLog: * config/riscv/riscv.opt: Add -mno-fence-tso. * config/riscv/sync-rvwmo.md (mem_thread_fence_rvwmo): Respect -mno-fence-tso. * doc/invoke.texi (RISC-V): Document -mno-fence-tso.
2024-05-18[to-be-committed,RISC-V] Improve some shift-add sequencesJeff Law2-0/+77
So this is a minor fix/improvement for shift-add sequences. This was supposed to help xz in a minor way IIRC. Combine may present us with (x + C2') << C1 which was canonicalized from (x << C1) + C2. Depending on the precise values of C2 and C2' one form may be better than the other. We can (somewhat awkwardly) use riscv_const_insns to test for which sequence would be preferred. Tested on Ventana's CI system as well as my own. Waiting on CI results from Rivos's tester before moving forward. Jeff gcc/ * config/riscv/riscv.md: Add new patterns to allow selection between (x << C1) + C2 vs (x + C2') << C1 depending on the cost C2 vs C2'. gcc/testsuite * gcc.target/riscv/shift-add-1.c: New test.
2024-05-18RISC-V: Fix "Nan-box the result of movbf on soft-bf16"Xiao Zeng2-23/+11
1 According to unpriv-isa spec: <https://github.com/riscv/riscv-isa-manual/releases/download/riscv-isa-release-221bd85-2024-05-14/unpriv-isa-asciidoc.pdf> 1.1 "FMV.H.X moves the half-precision value encoded in IEEE 754-2008 standard encoding from the lower 16 bits of integer register rs1 to the floating-point register rd, NaN-boxing the result." 1.2 "FMV.W.X moves the single-precision value encoded in IEEE 754-2008 standard encoding from the lower 32 bits of integer register rs1 to the floating-point register rd. The bits are not modified in the transfer, and in particular, the payloads of non-canonical NaNs are preserved." 2 When (!TARGET_ZFHMIN == true && TARGET_HARD_FLOAT == true), instruction needs to be added to complete the Nan-box, as done in "RISC-V: Nan-box the result of movhf on soft-fp16": <https://gcc.gnu.org/git/?p=gcc.git;a=commit;h=057dc349021660c40699fb5c98fd9cac8e168653> 3 Consider the "RISC-V: Nan-box the result of movbf on soft-bf16" in: <https://gcc.gnu.org/git/?p=gcc.git;a=commit;h=ce51e6727c9d69bbab0e766c449e60fd41f5f2f9> It ignores that both hf16 and bf16 are 16bits floating-point. 4 zfbfmin -> zfhmin in: <https://gcc.gnu.org/git/?p=gcc.git;a=commit;h=35224ead63732a3550ba4b1332c06e9dc7999c31> gcc/ChangeLog: * config/riscv/riscv.cc (riscv_legitimize_move): Optimize movbf with Nan-boxing value. * config/riscv/riscv.md (*movhf_softfloat_boxing): Expand movbf with Nan-boxing value. (*mov<HFBF:mode>_softfloat_boxing): Ditto. with Nan-boxing value. (*movbf_softfloat_boxing): Delete abandon pattern.
2024-05-18RISC-V: Modify _Bfloat16 to __bf16Xiao Zeng8-20/+20
According to the description in: <https://github.com/riscv-non-isa/riscv-elf-psabi-doc/pull/367>, the type representation symbol of BF16 has been corrected. Kito Cheng pointed out relevant information in the email: <https://gcc.gnu.org/pipermail/gcc-patches/2024-May/651850.html> gcc/ChangeLog: * config/riscv/riscv-builtins.cc (riscv_init_builtin_types): Modify _Bfloat16 to __bf16. * config/riscv/riscv.cc (riscv_mangle_type): Ditto. gcc/testsuite/ChangeLog: * gcc.target/riscv/_Bfloat16-nanboxing.c: Move to... * gcc.target/riscv/__bf16-nanboxing.c: ...here. * gcc.target/riscv/bf16_arithmetic.c: Modify _Bfloat16 to __bf16. * gcc.target/riscv/bf16_call.c: Ditto. * gcc.target/riscv/bf16_comparison.c: Ditto. * gcc.target/riscv/bf16_float_libcall_convert.c: Ditto. * gcc.target/riscv/bf16_integer_libcall_convert.c: Ditto.
2024-05-18RISC-V: Implement IFN SAT_ADD for both the scalar and vectorPan Li25-6/+755
The patch implement the SAT_ADD in the riscv backend as the sample for both the scalar and vector. Given below vector as example: void vec_sat_add_u64 (uint64_t *out, uint64_t *x, uint64_t *y, unsigned n) { unsigned i; for (i = 0; i < n; i++) out[i] = (x[i] + y[i]) | (- (uint64_t)((uint64_t)(x[i] + y[i]) < x[i])); } Before this patch: vec_sat_add_u64: ... vsetvli a5,a3,e64,m1,ta,ma vle64.v v0,0(a1) vle64.v v1,0(a2) slli a4,a5,3 sub a3,a3,a5 add a1,a1,a4 add a2,a2,a4 vadd.vv v1,v0,v1 vmsgtu.vv v0,v0,v1 vmerge.vim v1,v1,-1,v0 vse64.v v1,0(a0) ... After this patch: vec_sat_add_u64: ... vsetvli a5,a3,e64,m1,ta,ma vle64.v v1,0(a1) vle64.v v2,0(a2) slli a4,a5,3 sub a3,a3,a5 add a1,a1,a4 add a2,a2,a4 vsaddu.vv v1,v1,v2 <= Vector Single-Width Saturating Add vse64.v v1,0(a0) ... The below test suites are passed for this patch. * The riscv fully regression tests. * The aarch64 fully regression tests. * The x86 bootstrap tests. * The x86 fully regression tests. PR target/51492 PR target/112600 gcc/ChangeLog: * config/riscv/autovec.md (usadd<mode>3): New pattern expand for the unsigned SAT_ADD in vector mode. * config/riscv/riscv-protos.h (riscv_expand_usadd): New func decl to expand usadd<mode>3 pattern. (expand_vec_usadd): Ditto but for vector. * config/riscv/riscv-v.cc (emit_vec_saddu): New func impl to emit the vsadd insn. (expand_vec_usadd): New func impl to expand usadd<mode>3 for vector. * config/riscv/riscv.cc (riscv_expand_usadd): New func impl to expand usadd<mode>3 for scalar. * config/riscv/riscv.md (usadd<mode>3): New pattern expand for the unsigned SAT_ADD in scalar mode. * config/riscv/vector.md: Allow VLS mode for vsaddu. gcc/testsuite/ChangeLog: * gcc.target/riscv/rvv/autovec/binop/vec_sat_binary.h: New test. * gcc.target/riscv/rvv/autovec/binop/vec_sat_u_add-1.c: New test. * gcc.target/riscv/rvv/autovec/binop/vec_sat_u_add-2.c: New test. * gcc.target/riscv/rvv/autovec/binop/vec_sat_u_add-3.c: New test. * gcc.target/riscv/rvv/autovec/binop/vec_sat_u_add-4.c: New test. * gcc.target/riscv/rvv/autovec/binop/vec_sat_u_add-run-1.c: New test. * gcc.target/riscv/rvv/autovec/binop/vec_sat_u_add-run-2.c: New test. * gcc.target/riscv/rvv/autovec/binop/vec_sat_u_add-run-3.c: New test. * gcc.target/riscv/rvv/autovec/binop/vec_sat_u_add-run-4.c: New test. * gcc.target/riscv/sat_arith.h: New test. * gcc.target/riscv/sat_u_add-1.c: New test. * gcc.target/riscv/sat_u_add-2.c: New test. * gcc.target/riscv/sat_u_add-3.c: New test. * gcc.target/riscv/sat_u_add-4.c: New test. * gcc.target/riscv/sat_u_add-run-1.c: New test. * gcc.target/riscv/sat_u_add-run-2.c: New test. * gcc.target/riscv/sat_u_add-run-3.c: New test. * gcc.target/riscv/sat_u_add-run-4.c: New test. * gcc.target/riscv/scalar_sat_binary.h: New test. Signed-off-by: Pan Li <pan2.li@intel.com>
2024-05-18Fix Ada runtime library breakage on SolarisEric Botcazou5-8/+15
The recent changes made to the runtime library broke its build on Solaris because it uses Solaris threads instead of POSIX threads on this platform. gcc/ada/ PR ada/115133 * libgnarl/s-osinte__solaris.ads (mutex_t): Fix typo. * libgnarl/s-taprop__solaris.adb (Record_Lock): Add conversion. (Check_Sleep): Likewise. (Record_Wakeup): Likewise. (Check_Unlock): Likewise. * libgnarl/s-tasini.adb (Initialize_RTS_Lock): Add pragma Import on the overlaid variable. (Finalize_RTS_Lock): Likewise. (Acquire_RTS_Lock): Likewise. (Release_RTS_Lock): Likewise. * libgnarl/s-taspri__solaris.ads (To_RTS_Lock_Ptr): New instance of Ada.Unchecked_Conversion. * libgnat/s-oslock__solaris.ads: Add with clause for Ada.Unchecked_Conversion. (array_type_9): Add missing name qualification. (record_type_3): Likewise. (mutex_t): Fix formatting.
2024-05-17Regenerate common.opt.urlsDavid Malcolm1-0/+3
I forgot to do this for r15-636-g770657d02c986c. gcc/ChangeLog: * common.opt.urls: Regenerate to add fdiagnostics-show-event-links. Signed-off-by: David Malcolm <dmalcolm@redhat.com>
2024-05-17RISC-V: Add initial cost handling for segment loads/stores.Robin Dapp4-44/+146
This patch makes segment loads and stores more expensive. It adds segment_permute_2 as well as 3 to 8 cost fields to the common vector costs and adds handling to adjust_stmt_cost. gcc/ChangeLog: * config/riscv/riscv-protos.h (struct common_vector_cost): Add segment_permute cost. * config/riscv/riscv-vector-costs.cc (costs::adjust_stmt_cost): Handle segment loads/stores. * config/riscv/riscv.cc: Initialize segment_permute_[2-8] to 1. gcc/testsuite/ChangeLog: * gcc.dg/vect/costmodel/riscv/rvv/pr113112-4.c: Adjust test.
2024-05-17internal-fn: Do not force vcond_mask operands to reg.Robin Dapp2-3/+13
In order to directly use constants this patch removes force_regs in the vcond_mask expander. gcc/ChangeLog: PR middle-end/113474 * internal-fn.cc (expand_vec_cond_mask_optab_fn): Remove force_regs. gcc/testsuite/ChangeLog: * gcc.target/riscv/rvv/autovec/pr113474.c: New test.
2024-05-17Use DW_TAG_module for AdaTom Tromey1-1/+1
DWARF is not especially clear on the distinction between DW_TAG_namespace and DW_TAG_module, but I think that DW_TAG_module is more appropriate for Ada. This patch changes the compiler to do this. Note that the Ada compiler does not yet create NAMESPACE_DECLs. gcc * dwarf2out.cc (gen_namespace_die): Use DW_TAG_module for Ada.
2024-05-17diagnostics, analyzer: add CFG edge visualization to path-printingDavid Malcolm20-68/+1952
This patch adds some ability for links between labelled ranges when quoting the user's source code, and uses this to add links between events when printing diagnostic_paths, chopping them up further into event ranges that can be printed together. It adds links to the various "from..." - "...to" events in the analyzer. For example, previously we emitted this for c-c++-common/analyzer/infinite-loop-linked-list.c's while_loop_missing_next': infinite-loop-linked-list.c:30:10: warning: infinite loop [CWE-835] [-Wanalyzer-infinite-loop] 30 | while (n) | ^ 'while_loop_missing_next': events 1-5 30 | while (n) | ^ | | | (1) infinite loop here | (2) when 'n' is non-NULL: always following 'true' branch... | (5) ...to here 31 | { 32 | sum += n->val; | ~~~~~~~~~~~~~ | | | | | (3) ...to here | (4) looping back... whereas with the patch we now emit: infinite-loop-linked-list.c:30:10: warning: infinite loop [CWE-835] [-Wanalyzer-infinite-loop] 30 | while (n) | ^ 'while_loop_missing_next': events 1-3 30 | while (n) | ^ | | | (1) infinite loop here | (2) when 'n' is non-NULL: always following 'true' branch... ->-+ | | | | |+------------------------------------------------------------------------+ 31 || { 32 || sum += n->val; || ~~~~~~ || | |+------------->(3) ...to here 'while_loop_missing_next': event 4 32 | sum += n->val; | ~~~~^~~~~~~~~ | | | (4) looping back... ->-+ | | 'while_loop_missing_next': event 5 | | |+---------------------------------+ 30 || while (n) || ^ || | |+-------->(5) ...to here which I believe is easier to understand. The patch also implements the use of unicode characters and colorization for the lines (not shown in the above example). There is a new option -fno-diagnostics-show-event-links for getting back the old behavior (added to -fdiagnostics-plain-output). gcc/analyzer/ChangeLog: * checker-event.h (checker_event::connect_to_next_event_p): Implement new diagnostic_event::connect_to_next_event_p vfunc. (start_cfg_edge_event::connect_to_next_event_p): Likewise. (start_consolidated_cfg_edges_event::connect_to_next_event_p): Likewise. * infinite-loop.cc (class looping_back_event): New subclass. (infinite_loop_diagnostic::add_final_event): Use it. gcc/ChangeLog: * common.opt (fdiagnostics-show-event-links): New option. * diagnostic-label-effects.h: New file. * diagnostic-path.h (diagnostic_event::connect_to_next_event_p): New pure virtual function. (simple_diagnostic_event::connect_to_next_event_p): Implement it. (simple_diagnostic_event::connect_to_next_event): New. (simple_diagnostic_event::m_connected_to_next_event): New field. (simple_diagnostic_path::connect_to_next_event): New decl. * diagnostic-show-locus.cc: Include "text-art/theme.h" and "diagnostic-label-effects.h". (colorizer::set_cfg_edge): New. (layout::m_fallback_theme): New field. (layout::m_theme): New field. (layout::m_effect_info): New field. (layout::m_link_lhs_state): New enum and field. (layout::m_link_rhs_column): New field. (layout_range::has_in_edge): New. (layout_range::has_out_edge): New. (layout::layout): Add "effect_info" optional param. Initialize m_theme, m_link_lhs_state, and m_link_rhs_column. (layout::maybe_add_location_range): Remove stray "FIXME" from leading comment. (layout::print_source_line): Replace space after margin with a call to print_leftmost_column. (layout::print_leftmost_column): New. (layout::start_annotation_line): Make non-const. Gain responsibility for printing the leftmost column after the margin. (layout::print_annotation_line): Drop pp_space, as this is now added by start_annotation_line. (line_label::line_label): Add "has_in_edge" and "has_out_edge" params and initialize... (line_label::m_has_in_edge): New field. (line_label::m_has_out_edge): New field. (layout::print_any_labels): Pass edge information to line_label ctor. Keep track of in-edges and out-edges, adding visualizations of these links between labels. (layout::print_leading_fixits): Drop pp_character, as this is now added by start_annotation_line. (layout::print_trailing_fixits): Fix off-by-one errors in column calculation. (layout::move_to_column): Add comment about debugging. (layout::show_ruler): Make non-const. Drop pp_space calls, as this is now added by start_annotation_line. (layout::print_line): Call print_any_right_to_left_edge_lines. (layout::print_any_right_to_left_edge_lines): New. (layout::update_any_effects): New. (gcc_rich_location::add_location_if_nearby): Initialize loc_range.m_label. (diagnostic_context::maybe_show_locus): Add "effects" param and pass it to diagnostic_context::show_locus. (diagnostic_context::show_locus): Add "effects" param, passing it to layout's ctor. Call update_any_effects on the layout after printing the lines. (selftest::test_layout_x_offset_display_utf8): Update expected result for eliminated trailing newline. (selftest::test_layout_x_offset_display_utf8): Likewise. (selftest::test_layout_x_offset_display_tab): Likewise. * diagnostic.cc (diagnostic_context::initialize): Initialize m_source_printing.show_event_links_p. (simple_diagnostic_path::connect_to_next_event): New. (simple_diagnostic_event::simple_diagnostic_event): Initialize m_connected_to_next_event. * diagnostic.h (class diagnostic_source_effect_info): New forward decl. (diagnostic_source_printing_options::show_event_links_p): New field. (diagnostic_context::maybe_show_locus): Add optional "effect_info" param. (diagnostic_context::show_locus): Add "effect_info" param. (diagnostic_show_locus): Add optional "effect_info" param. * doc/invoke.texi: Add -fno-diagnostics-show-event-links. * lto-wrapper.cc (merge_and_complain): Add OPT_fdiagnostics_show_event_links to switch. (append_compiler_options): Likewise. (append_diag_options): Likewise. * opts-common.cc (decode_cmdline_options_to_array): Add "-fno-diagnostics-show-event-links" to -fdiagnostics-plain-output. * opts.cc (common_handle_option): Add case for OPT_fdiagnostics_show_event_links. * text-art/theme.cc (ascii_theme::get_cppchar): Handle cell_kind::CFG_*. (unicode_theme::get_cppchar): Likewise. * text-art/theme.h (theme::cell_kind): Add CFG_*. * toplev.cc (general_init): Initialize global_dc->m_source_printing.show_event_links_p. * tree-diagnostic-path.cc: Define INCLUDE_ALGORITHM, INCLUDE_MEMORY, and INCLUDE_STRING. Include "diagnostic-label-effects.h". (path_label::path_label): Initialize m_effects. (path_label::get_effects): New. (class path_label::path_label_effects): New. (path_label::m_effects): New field. (class per_thread_summary): Add "friend struct event_range;". (per_thread_summary::per_thread_summary): Initialize m_last_event. (per_thread_summary::m_last_event): New field. (struct event_range::per_source_line_info): New. (event_range::event_range): Make "t" non-const. Add "show_event_links" param and use it to initialize m_show_event_links. Add info for initial event. (event_range::get_per_source_line_info): New. (event_range::maybe_add_event): Verify compatibility of the new label and existing labels with respect to the link-printing code. Update per-source-line info when an event is added. (event_range::print): Add"effect_info" param and pass to diagnostic_show_locus. (event_range::m_per_thread_summary): Make non-const. (event_range::m_source_line_info_map): New field. (event_range::m_show_event_links): New field. (path_summary::path_summary): Add "show_event_links" optional param, passing it to event_range ctor calls. Update pts.m_last_event. (thread_event_printer::print_swimlane_for_event_range): Add "effect_info" param and pass it to range->print. (print_path_summary_as_text): Keep track of the column for any out-edges at the end of printing each event_range and use as the leading in-edge for the next event_range. (default_tree_diagnostic_path_printer): Pass in show_event_links_p to path_summary ctor. (selftest::path_events_have_column_data_p): New. (class selftest::control_flow_test): New. (selftest::test_control_flow_1): New. (selftest::test_control_flow_2): New. (selftest::test_control_flow_3): New. (selftest::assert_cfg_edge_path_streq): New. (ASSERT_CFG_EDGE_PATH_STREQ): New macro. (selftest::test_control_flow_4): New. (selftest::test_control_flow_5): New. (selftest::test_control_flow_6): New. (selftest::control_flow_tests): New. (selftest::tree_diagnostic_path_cc_tests): Disable colorization on global_dc's printer. Convert event_pp to a std::unique_ptr. Call control_flow_tests via for_each_line_table_case. (gen_command_line_string): Likewise. gcc/testsuite/ChangeLog: * gcc.dg/analyzer/event-links-ascii.c: New test. * gcc.dg/analyzer/event-links-color.c: New test. * gcc.dg/analyzer/event-links-disabled.c: New test. * gcc.dg/analyzer/event-links-unicode.c: New test. libcpp/ChangeLog: * include/rich-location.h (class label_effects): New forward decl. (range_label::get_effects): New vfunc. Signed-off-by: David Malcolm <dmalcolm@redhat.com>
2024-05-17i386: Rename sat_plusminus expanders to standard names [PR112600]Uros Bizjak5-42/+79
Rename <sse2_avx2>_<insn><mode>3<mask_name> expander to a standard ssadd, usadd, sssub and ussub name to enable corresponding optab expansion. Also add named expander for MMX modes. PR middle-end/112600 gcc/ChangeLog: * config/i386/mmx.md (<insn><mode>3): New expander. * config/i386/sse.md (<sse2_avx2>_<sat_plusminus:insn><mode>3<mask_name>): Rename expander to <sat_plusminus:insn><mode>3<mask_name>. (<umaxmin:code><mode>3): Update for rename. * config/i386/i386-builtin.def: Update for rename. gcc/testsuite/ChangeLog: * gcc.target/i386/pr112600-1a.c: New test. * gcc.target/i386/pr112600-1b.c: New test.
2024-05-17Fortran: Fix select type regression due to r14-9489 [PR114874]Paul Thomas6-9/+128
2024-05-17 Paul Thomas <pault@gcc.gnu.org> gcc/fortran PR fortran/114874 * gfortran.h: Add 'assoc_name_inferred' to gfc_namespace. * match.cc (gfc_match_select_type): Set 'assoc_name_inferred' in select type namespace if the selector has inferred type. * primary.cc (gfc_match_varspec): If a select type temporary is apparently scalar and a left parenthesis has been detected, check the current namespace has 'assoc_name_inferred' set. If so, set inferred_type. * resolve.cc (resolve_variable): If the namespace of a select type temporary is marked with 'assoc_name_inferred' call gfc_fixup_inferred_type_refs to ensure references are OK. (gfc_fixup_inferred_type_refs): Catch invalid array refs.. gcc/testsuite/ PR fortran/114874 * gfortran.dg/pr114874_1.f90: New test for valid code. * gfortran.dg/pr114874_2.f90: New test for invalid code.
2024-05-17[prange] Drop range to VARYING if the bitmask intersection made it so [PR115131]Aldy Hernandez1-0/+21
If the intersection of the bitmasks made the range span the entire domain, normalize the range to VARYING. gcc/ChangeLog: PR middle-end/115131 * value-range.cc (prange::intersect): Set VARYING if intersection of bitmasks made the range span the entire domain. (range_tests_misc): New test.
2024-05-17c++: aggregate CTAD w/ paren init and bases [PR115114]Patrick Palka2-0/+30
During aggregate CTAD with paren init, we're accidentally overlooking base classes since TYPE_FIELDS of a template type doesn't contain corresponding base fields. So we need to consider them separately. PR c++/115114 gcc/cp/ChangeLog: * pt.cc (maybe_aggr_guide): Consider bases in the paren init case. gcc/testsuite/ChangeLog: * g++.dg/cpp2a/class-deduction-aggr15.C: New test. Reviewed-by: Jason Merrill <jason@redhat.com>
2024-05-17tree-into-ssa: speed up sorting in prune_unused_phi_nodes [PR114480]Alexander Monakov1-8/+9
In PR 114480 we are hitting a case where tree-into-ssa scales quadratically due to prune_unused_phi_nodes doing O(N log N) work for N basic blocks, for each variable individually. Sorting the 'defs' array is especially costly. It is possible to assist gcc_qsort by laying out dfs_out entries in the reverse order in the 'defs' array, starting from its tail. This is not always a win (in fact it flips most of 7-element qsorts in this testcase from 9 comparisons (best case) to 15 (worst case)), but overall it helps on the testcase and on libstdc++ build. On the testcase we go from 1.28e9 comparator invocations to 1.05e9, on libstdc++ from 2.91e6 to 2.84e6. gcc/ChangeLog: PR c++/114480 * tree-into-ssa.cc (prune_unused_phi_nodes): Add dfs_out entries to the 'defs' array in the reverse order.
2024-05-17[prange] Avoid looking at type() for undefined rangesAldy Hernandez2-0/+35
Undefined ranges have no type. This patch fixes the thinko. gcc/ChangeLog: PR middle-end/115128 * ipa-cp.cc (ipa_value_range_from_jfunc): Check for undefined_p before looking at type. (propagate_vr_across_jump_function): Same. gcc/testsuite/ChangeLog: * gcc.dg/tree-ssa/pr115128.c: New test.
2024-05-17middle-end/115110 - Fix view_converted_memref_pRichard Biener1-2/+3
view_converted_memref_p was checking the reference type against the pointer type of the offset operand rather than its pointed-to type which leads to all refs being subject to view-convert treatment in get_alias_set causing numerous testsuite fails but with its new uses from r15-512-g9b7cad5884f21c is also a wrong-code issue. PR middle-end/115110 * tree-ssa-alias.cc (view_converted_memref_p): Fix.
2024-05-17Small fix to implementation of -fdump-ada-specEric Botcazou1-4/+3
gcc/c-family/ * c-ada-spec.cc (bitfield_used): Move around. (packed_layout): Likewise. (dump_ada_array_type): Do not put "aliased" for a packed layout.
2024-05-17Remove spurious lineEric Botcazou1-1/+0
2024-05-17Add widening expansion of MULT_HIGHPART_EXPR for integral modesEric Botcazou4-35/+52
For integral modes the expansion of MULT_HIGHPART_EXPR requires the presence of an {s,u}mul_highpart optab whereas, for vector modes, widening expansion is supported. This adds a widening expansion for integral modes too, which is in fact already implemented in expmed_mult_highpart_optab. gcc/ * expmed.h (expmed_mult_highpart_optab): Declare. * expmed.cc (expmed_mult_highpart_optab): Remove static keyword. Do not assume that OP1 is a constant integer. Fix pasto. (expmed_mult_highpart): Pass OP1 narrowed to MODE in all the calls to expmed_mult_highpart_optab. * optabs-query.cc (can_mult_highpart_p): Use 2 for integer widening and shift subsequent values accordingly. * optabs.cc (expand_mult_highpart): Call expmed_mult_highpart_optab when can_mult_highpart_p returns 2 and adjust to above change.
2024-05-17Add missing check for const_pool in the escaped solutionsRichard Biener4-1/+40
The ptr-vs-ptr compare folding using points-to info was missing a check for const_pool being included in the escaped solution. The following fixes that, fixing the observed execute FAIL of experimental/functional/searchers.cc * tree-ssa-alias.h (pt_solution_includes_const_pool): Declare. * tree-ssa-alias.cc (ptrs_compare_unequal): Use pt_solution_includes_const_pool. * tree-ssa-structalias.cc (pt_solution_includes_const_pool): New. * gcc.dg/torture/20240517-1.c: New testcase.
2024-05-17ada: Improve deriving initial sizes for container aggregatesViljar Indus1-28/+55
Deriving the initial size of container aggregates is necessary for deriving the correct capacity for bounded containers. Add support for deriving the correct initial size when the container aggregate is iterating over an array object. gcc/ada/ * exp_aggr.adb (Expand_Container_Aggregate): Derive the size for iterable aggregates in the case of one-dimensional array objects.
2024-05-17ada: Remove outdated workaround in aggregate expansionRonan Desplanques1-5/+4
Before this patch, the compiler refrained from rewriting aggregates into purely positional form in some cases of one-component aggregates. As explained in comments, this was because the back end could not handle positional aggregates in those situations. As the back end seems to have grown more capable, this patch removes the workaround. It also extends the comments describing a warning that is emitted in the same configuration with aggregates. gcc/ada/ * exp_aggr.adb (Aggr_Size_OK): Remove workaround and extend comment.
2024-05-17ada: Start the initialization of the tasking runtime earlierEric Botcazou3-12/+40
This installs the tasking versions of the RTS_Lock manipulation routines very early, before the elaboration of all the Ada units of the program, including those of the runtime, because this elaboration may require the initialization of RTS_Lock objects. gcc/ada/ * bindgen.adb (Gen_Adainit): Generate declaration and call to the imported procedure __gnat_tasking_runtime_initialize if need be. * libgnat/s-soflin.ads (Locking Soft-Links): Add commentary. * libgnarl/s-tasini.adb (Tasking_Runtime_Initialize): New procedure exported as __gnat_tasking_runtime_initialize. Initialize RTS_Lock manipulation routines here instead of... (Init_RTS): ...here.
2024-05-17ada: Improve test for unprocessed preprocessor directivesSteve Baird1-61/+122
Preprocessor directives are case insensitive and may have spaces or tabs between the '#' and the keyword. When checking for the error case of unprocessed preprocessor directives, take these rules into account. gcc/ada/ * scng.adb (scan): When checking for an unprocessed preprocessor directive, take into account the preprocessor's rules about case insensitivity and about white space between the '#' and the keyword.
2024-05-17ada: Restore dependency on System.OS_Interface in System.Task_PrimitivesEric Botcazou1-1/+2
The dependency is relied upon by the binder to drag the tasking runtime. gcc/ada/ * libgnarl/s-taspri__mingw.ads: Add clause for System.OS_Interface. (Private_Data): Change type of Thread component.
2024-05-17ada: Further adjustments coming from aliasing considerationsEric Botcazou2-0/+14
They are needed on 32-bit platforms because of different calling conventions and again in the units implementing AltiVec and Streams support. gcc/ada/ * libgnat/g-alvevi.ads: Add pragma Universal_Aliasing for all the view types. * libgnat/s-stratt.ads: Likewise for Fat_Pointer type.
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