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2024-11-01Support Intel SM4 EVEX instructionsHaochen Jiang10-10/+186
gcc/ChangeLog: * config/i386/i386-builtin-types.def: Add DEF_FUNCTION_TYPE (V16SI, V16SI, V16SI). * config/i386/i386-builtin.def (BDESC): Add new builtins. * config/i386/i386-expand.cc (ix86_expand_args_builtin): Handle V16SI_FTYPE_V16SI_V16SI. * config/i386/sm4intrin.h: Add zmm insns. * config/i386/sse.md (vsm4key4_<mode>): Add EVEX pattern. (vsm4rnds4_<mode>): Ditto. gcc/testsuite/ChangeLog: * gcc.target/i386/sm4-check.h: Add zmm test. * gcc.target/i386/sm4-avx10_2-1.c: New test. * gcc.target/i386/sm4-avx10_2-512-1.c: Ditto. * gcc.target/i386/sm4key4-avx10_2-512-2.c: Ditto. * gcc.target/i386/sm4rnds4-avx10_2-512-2.c: Ditto.
2024-11-01testsuite: g++.dg: debug: fix test filenamesSam James2-0/+0
gcc/testsuite/ChangeLog: PR debug/15736 PR debug/46240 * g++.dg/debug/pr15736.cc: Move to... * g++.dg/debug/pr15736.C: ...here. * g++.dg/debug/pr46240.cc: Move to... * g++.dg/debug/pr46240.C: ...here.
2024-11-01testsuite: g++.dg: torture: fix PR111520 filenameSam James1-0/+0
gcc/testsuite/ChangeLog: PR tree-optimization/111520 * g++.dg/torture/harden-comp-pr111520.cc: Move to... * g++.dg/torture/harden-comp-pr111520.C: ...here.
2024-11-01testsuite: g++.dg: fix PR90313 filenameSam James1-0/+0
gcc/testsuite/ChangeLog: PR c++/90313 * g++.dg/torture/pr90313.cc: Move to... * g++.dg/torture/pr90313.C: ...here.
2024-11-01testsuite: fixup pr66655.CSam James1-1/+1
In r15-4823-g14e2f3233bf0ef, I renamed pr66655_1.cc but neglected to update a dg-additional-sources reference. gcc/testsuite/ChangeLog: PR target/66655 * g++.dg/pr66655.C: Adjust filename in dg-additional-sources.
2024-10-31testsuite: g++.dg: rename pr66655 testSam James1-0/+0
The test was being ignored because dg.exp looks for .C in g++.dg/. gcc/testsuite/ChangeLog: PR target/66655 * g++.dg/pr66655_1.cc: Move to... * g++.dg/pr66655_1.C: ...here.
2024-10-31testsuite: g++.dg: rename pr42965 testSam James1-0/+0
.c is used for C and .C is for C++. The test was being ignored before. gcc/testsuite/ChangeLog: PR other/42965 * g++.dg/warn/unused-result1-Werror.c: Move to... * g++.dg/warn/unused-result1-Werror.C: ...here.
2024-10-31testsuite: g++.dg: rename pr105820 testSam James1-0/+0
.c is used for C and .C is for C++. The test was being ignored before. gcc/testsuite/ChangeLog: PR tree-optimization/105820 * g++.dg/tree-ssa/pr105820.c: Move to... * g++.dg/tree-ssa/pr105820.C: ...here.
2024-10-31testsuite: move single-file LTO pr47333 test to tortureSam James1-2/+1
This only started being used recently in r15-4683-g04e0fbbc34e101 and pinskia pointed out we may as well make it a proper torture test instead as it's a single file LTO test. gcc/testsuite/ChangeLog: PR target/47333 * g++.dg/lto/pr47333_0.C: Move to... * g++.dg/torture/pr47333.C: ...here.
2024-10-31testsuite: move single-file LTO pr95677 test to tortureSam James1-5/+1
This only started being used recently in r15-4681-g96110c14cf61a1 and pinskia pointed out we may as well make it a proper torture test instead as it's a single file LTO test. gcc/testsuite/ChangeLog: PR c++/95677 * g++.dg/lto/pr95677_0.C: Move to... * g++.dg/torture/pr95677.C: ...here.
2024-10-31aarch64: Require SVE2 and/or SME2 for SVE FAMINMAX intrinsicsRichard Sandiford11-15/+44
After the previous patch, we can now accurately model the ISA requirements for the SVE FAMINMAX intrinsics. They can be used in non-streaming mode if TARGET_SVE2 and in streaming mode if TARGET_SME2 (with both cases also requiring TARGET_FAMINMAX). They can be used in streaming-compatible mode if TARGET_SVE2 && TARGET_SME2. Also, Kyrill pointed out in the original review of the FAMINMAX support that it would be more consistent to define the rtl patterns in aarch64-sve2.md rather than aarch64-sve.md, so the pushed patch did that. This patch moves the definitions of the intrinsics to the sve2 files too, for consistency. gcc/ * config/aarch64/aarch64-sve-builtins-base.cc (svmax, svamin): Move definitions to... * config/aarch64/aarch64-sve-builtins-sve2.cc: ...here. * config/aarch64/aarch64-sve-builtins-base.def (svmax, svamin): Move definitions to... * config/aarch64/aarch64-sve-builtins-sve2.def: ...here. Require SME2 in streaming mode. gcc/testsuite/ * gcc.target/aarch64/sve/acle/general/amin_1.c: New test. * gcc.target/aarch64/sve2/acle/asm/amax_f16.c: Enabled sve2 and (for streaming mode) sme2. * gcc.target/aarch64/sve2/acle/asm/amax_f32.c: Likewise. * gcc.target/aarch64/sve2/acle/asm/amax_f64.c: Likewise. * gcc.target/aarch64/sve2/acle/asm/amin_f16.c: Likewise. * gcc.target/aarch64/sve2/acle/asm/amin_f32.c: Likewise. * gcc.target/aarch64/sve2/acle/asm/amin_f64.c: Likewise.
2024-10-31aarch64: Record separate streaming and non-streaming ISA requirementsRichard Sandiford9-148/+226
For some upcoming extensions, we need to add intrinsics whose ISA requirements differ between streaming mode and non-streaming mode. This patch tries to generalise the infrastructure to support that: - Rather than have a single set of feature flags, the patch uses a separate set for sm_off (non-streaming, PSTATE.SM==0) and sm_on (streaming, PSTATE.SM==1). - The sm_off set is zero if the intrinsic is streaming-only. Otherwise it is AARCH64_FL_SM_OFF | <requirements>. - Similarly, the sm_on set is zero if the intrinsic is non-streaming-only. Otherwise it is AARCH64_FL_SM_ON | <requirements>. AARCH64_FL_SME is taken as given in streaming mode. - Streaming-compatible code must satisfy both sets of requirements. There should be no functional change. gcc/ * config.gcc (aarch64*-*-*): Add aarch64-protos.h to target_gtfiles. * config/aarch64/aarch64-protos.h (aarch64_required_extensions): New structure. (aarch64_check_required_extensions): Change the type of the required_extensions parameter from aarch64_feature_flags to aarch64_required_extensions. * config/aarch64/aarch64-sve-builtins.h (function_builder::add_unique_function): Likewise. (function_builder::add_overloaded_function): Likewise. (function_builder::get_attributes): Likewise. (function_builder::add_function): Likewise. (function_group_info): Change the type of required_extensions in the same way. * config/aarch64/aarch64-builtins.cc (aarch64_pragma_builtins_data::required_extensions): Change the type from aarch64_feature_flags to aarch64_required_extensions. (aarch64_check_required_extensions): Likewise change the type of the required_extensions parameter. Separate the requirements for non-streaming mode and streaming mode, ORing them together for streaming-compatible mode. (aarch64_general_required_extensions): New function. (aarch64_general_check_builtin_call): Use it. * config/aarch64/aarch64-sve-builtins.cc (registered_function::required_extensions): Change the type from aarch64_feature_flags to aarch64_required_extensions. (DEF_NEON_SVE_FUNCTION, DEF_SME_ZA_FUNCTION_GS): Update accordingly. (function_builder::get_attributes): Change the type of the required_extensions parameter from aarch64_feature_flags to aarch64_required_extensions. (function_builder::add_function): Likewise. (function_builder::add_unique_function): Likewise. (function_builder::add_overloaded_function): Likewise. * config/aarch64/aarch64-simd-pragma-builtins.def: Update REQUIRED_EXTENSIONS definitions to use aarch64_required_extensions. * config/aarch64/aarch64-sve-builtins-base.def: Likewise. * config/aarch64/aarch64-sve-builtins-sme.def: Likewise. * config/aarch64/aarch64-sve-builtins-sve2.def: Likewise.
2024-10-31aarch64: Move ENTRY_VHSDF to aarch64-simd-pragma-builtins.defRichard Sandiford2-21/+15
It's more convenient for later patches if we only define ENTRY_VHSDF once, in the .def file. Then the only macro that needs to be defined before including the file is ENTRY itself. The patch also moves the architecture requirements out of the individual ENTRY invocations into a block-level definition of REQUIRED_EXTENSIONS. This reduces cut-&-paste a little and makes things more consistent with aarch64-sve-builtins*.def. gcc/ * config/aarch64/aarch64-builtins.cc (ENTRY): Remove the features argument and get the features from REQUIRED_EXTENSIONS instead. (ENTRY_VHSDF): Move definition to... * config/aarch64/aarch64-simd-pragma-builtins.def: ...here. Move the architecture requirements to REQUIRED_EXTENSIONS.
2024-10-31aarch64: Forbid F64MM permutes in streaming modeRichard Sandiford74-8/+83
The current code was based on an early version of the SME spec, which allowed the .Q forms of TRN1, TRN2, UZP1, UZP2, ZIP1, and ZIP2 to be used in streaming mode. We should now forbid them instead; see https://developer.arm.com/documentation/ddi0602/2024-09/SVE-Instructions/TRN1--TRN2--vectors---Interleave-even-or-odd-elements-from-two-vectors-?lang=en and the corresponding entries for the others. gcc/ * config/aarch64/aarch64-sve-builtins-base.def (svtrn1q, svtrn2q) (svuzp1q, svuzp2q, svzip1q, svzip2q): Require SM_OFF. gcc/testsuite/ * g++.target/aarch64/sve/aarch64-ssve.exp: Add tests for trn[12]q, uzp[12].c, and zip[12]q. * gcc.target/aarch64/sve/acle/asm/trn1q_bf16.c: Skip for STREAMING_COMPATIBLE. * gcc.target/aarch64/sve/acle/asm/trn1q_f16.c: Likewise. * gcc.target/aarch64/sve/acle/asm/trn1q_f32.c: Likewise. * gcc.target/aarch64/sve/acle/asm/trn1q_f64.c: Likewise. * gcc.target/aarch64/sve/acle/asm/trn1q_s16.c: Likewise. * gcc.target/aarch64/sve/acle/asm/trn1q_s32.c: Likewise. * gcc.target/aarch64/sve/acle/asm/trn1q_s64.c: Likewise. * gcc.target/aarch64/sve/acle/asm/trn1q_s8.c: Likewise. * gcc.target/aarch64/sve/acle/asm/trn1q_u16.c: Likewise. * gcc.target/aarch64/sve/acle/asm/trn1q_u32.c: Likewise. * gcc.target/aarch64/sve/acle/asm/trn1q_u64.c: Likewise. * gcc.target/aarch64/sve/acle/asm/trn1q_u8.c: Likewise. * gcc.target/aarch64/sve/acle/asm/trn2q_bf16.c: Likewise. * gcc.target/aarch64/sve/acle/asm/trn2q_f16.c: Likewise. * gcc.target/aarch64/sve/acle/asm/trn2q_f32.c: Likewise. * gcc.target/aarch64/sve/acle/asm/trn2q_f64.c: Likewise. * gcc.target/aarch64/sve/acle/asm/trn2q_s16.c: Likewise. * gcc.target/aarch64/sve/acle/asm/trn2q_s32.c: Likewise. * gcc.target/aarch64/sve/acle/asm/trn2q_s64.c: Likewise. * gcc.target/aarch64/sve/acle/asm/trn2q_s8.c: Likewise. * gcc.target/aarch64/sve/acle/asm/trn2q_u16.c: Likewise. * gcc.target/aarch64/sve/acle/asm/trn2q_u32.c: Likewise. * gcc.target/aarch64/sve/acle/asm/trn2q_u64.c: Likewise. * gcc.target/aarch64/sve/acle/asm/trn2q_u8.c: Likewise. * gcc.target/aarch64/sve/acle/asm/uzp1q_bf16.c: Likewise. * gcc.target/aarch64/sve/acle/asm/uzp1q_f16.c: Likewise. * gcc.target/aarch64/sve/acle/asm/uzp1q_f32.c: Likewise. * gcc.target/aarch64/sve/acle/asm/uzp1q_f64.c: Likewise. * gcc.target/aarch64/sve/acle/asm/uzp1q_s16.c: Likewise. * gcc.target/aarch64/sve/acle/asm/uzp1q_s32.c: Likewise. * gcc.target/aarch64/sve/acle/asm/uzp1q_s64.c: Likewise. * gcc.target/aarch64/sve/acle/asm/uzp1q_s8.c: Likewise. * gcc.target/aarch64/sve/acle/asm/uzp1q_u16.c: Likewise. * gcc.target/aarch64/sve/acle/asm/uzp1q_u32.c: Likewise. * gcc.target/aarch64/sve/acle/asm/uzp1q_u64.c: Likewise. * gcc.target/aarch64/sve/acle/asm/uzp1q_u8.c: Likewise. * gcc.target/aarch64/sve/acle/asm/uzp2q_bf16.c: Likewise. * gcc.target/aarch64/sve/acle/asm/uzp2q_f16.c: Likewise. * gcc.target/aarch64/sve/acle/asm/uzp2q_f32.c: Likewise. * gcc.target/aarch64/sve/acle/asm/uzp2q_f64.c: Likewise. * gcc.target/aarch64/sve/acle/asm/uzp2q_s16.c: Likewise. * gcc.target/aarch64/sve/acle/asm/uzp2q_s32.c: Likewise. * gcc.target/aarch64/sve/acle/asm/uzp2q_s64.c: Likewise. * gcc.target/aarch64/sve/acle/asm/uzp2q_s8.c: Likewise. * gcc.target/aarch64/sve/acle/asm/uzp2q_u16.c: Likewise. * gcc.target/aarch64/sve/acle/asm/uzp2q_u32.c: Likewise. * gcc.target/aarch64/sve/acle/asm/uzp2q_u64.c: Likewise. * gcc.target/aarch64/sve/acle/asm/uzp2q_u8.c: Likewise. * gcc.target/aarch64/sve/acle/asm/zip1q_bf16.c: Likewise. * gcc.target/aarch64/sve/acle/asm/zip1q_f16.c: Likewise. * gcc.target/aarch64/sve/acle/asm/zip1q_f32.c: Likewise. * gcc.target/aarch64/sve/acle/asm/zip1q_f64.c: Likewise. * gcc.target/aarch64/sve/acle/asm/zip1q_s16.c: Likewise. * gcc.target/aarch64/sve/acle/asm/zip1q_s32.c: Likewise. * gcc.target/aarch64/sve/acle/asm/zip1q_s64.c: Likewise. * gcc.target/aarch64/sve/acle/asm/zip1q_s8.c: Likewise. * gcc.target/aarch64/sve/acle/asm/zip1q_u16.c: Likewise. * gcc.target/aarch64/sve/acle/asm/zip1q_u32.c: Likewise. * gcc.target/aarch64/sve/acle/asm/zip1q_u64.c: Likewise. * gcc.target/aarch64/sve/acle/asm/zip1q_u8.c: Likewise. * gcc.target/aarch64/sve/acle/asm/zip2q_bf16.c: Likewise. * gcc.target/aarch64/sve/acle/asm/zip2q_f16.c: Likewise. * gcc.target/aarch64/sve/acle/asm/zip2q_f32.c: Likewise. * gcc.target/aarch64/sve/acle/asm/zip2q_f64.c: Likewise. * gcc.target/aarch64/sve/acle/asm/zip2q_s16.c: Likewise. * gcc.target/aarch64/sve/acle/asm/zip2q_s32.c: Likewise. * gcc.target/aarch64/sve/acle/asm/zip2q_s64.c: Likewise. * gcc.target/aarch64/sve/acle/asm/zip2q_s8.c: Likewise. * gcc.target/aarch64/sve/acle/asm/zip2q_u16.c: Likewise. * gcc.target/aarch64/sve/acle/asm/zip2q_u32.c: Likewise. * gcc.target/aarch64/sve/acle/asm/zip2q_u64.c: Likewise. * gcc.target/aarch64/sve/acle/asm/zip2q_u8.c: Likewise.
2024-10-31testsuite: fix c23-constexpr-2a.c test to use dg-do runSam James1-1/+1
The comment at the top of the test indicates it should be an execution test, but it was only using 'dg-do link'. Correct that. The only change in test results is as expected: ``` +PASS: gcc.dg/c23-constexpr-2a.c execution test ``` gcc/testsuite/ChangeLog: PR testsuite/117183 * gcc.dg/c23-constexpr-2a.c: Use dg-do run.
2024-10-31c: detect variably-modified types [PR117145,PR117245,PR100420]Martin Uecker13-187/+393
This fixes two cases where variably-modified types were not recognized as such. The first is when building composite types and the other when a type is reconstructed for the 'vector' attribute. Construction of types in the C FE is reorganized to use c_build_* functions which are responsible for setting C_TYPE_VARIABLE_SIZE, C_TYPE_VARIABLY_MODIFIED and TYPE_TYPELESS_STORAGE based on the properties of the type itself and these replace all other logic elsewhere (e.g. in grokdeclarator). A new 'c_reconstruct_complex_type' based on these functions is introduced which is called via a language hook when the 'vector' attribute is processed (as for C++). One problem is are arrays of unspecified size 'T[*]' which were represented identically to zero-sized arrays but with C_TYPE_VARIABLE_SIZE set. To avoid having to create distinct type copies for this, the representation was changed to make it a natural VLA by giving it an upper bound of '(0, 0)'. This also then allows fixing of PR100420 where such arrays were printed as 'T[0]'. Finally, a new function 'c_verify_type' checks consistency of properties specific to C FE and is called when checking is on. PR c/117145 PR c/117245 PR c/100420 gcc/c/ChangeLog: * c-decl.cc (c_build_pointer_type): Move to c-typeck.cc (grokdeclarator): Simplify logic. (match_builtin_function_types): Adapt. (push_decl): Adapt. (implicitly_declare): Adapt. (c_update_type_canonical): Adapt. (c_make_fname_decl): Adapt. (start_function): Adapt. * c-objc-common.h: Add LANG_HOOKS_RECONSTRUCT_COMPLEX_TYPE. * c-tree.h: Add prototypes. * c-typeck.cc (c_verify_type): New function. (c_set_type_bits). New function. (c_build_pointer_type): Moved from c-decl.cc. (c_build_pointer_type_for_mode): New function. (c_build_function_type): New function. (c_build_array_type): New function. (c_build_type_attribute_variant): New function. (c_reconstruct_complex_type): New function. (c_build_functype_attribute_variant): Renamed. (array_to_pointer_conversion): Simplify logic. (composite_type_internal): Simplify logic.. (build_unary_op): Simplify logic.. (comptypes_verify): Add checking assertions. (c_build_qualified_type): Add checking assertions. (c_build_function_call_vec): Adapt. (qualify_type): Adapt. (build_functype_attribute_variant): Adapt. (common_pointer_type): Adapt. (c_common_type): Adapt. (convert_for_assignment): Adapt. (type_or_builtin_type): Adapt. (build_access_with_size_for_counted_by): Adapt. (build_conditional_expr): Adapt. (build_modify_expr): Adapt. (build_binary_op): Adapt. (build_omp_array_section): Adapt. (handle_omp_array_sections): Adapt. (c_finish_omp_clauses): Adapt. * c-parser.cc (c_parser_typeof_specifier): Adapt. (c_parser_generic_selection): Adapt. gcc/c-family/ChangeLog: * c-pretty-print.cc (c_pretty_printer::direct_abstract_declarator): Detect arrays of unspecified size. gcc/testsuite/ChangeLog: * gcc.dg/c23-tag-composite-11.c: New test. * gcc.dg/Warray-parameter-4.c: Resolve xfails. * gcc.dg/Wvla-parameter-2.c: Resolve xfails. * gcc.dg/Wvla-parameter-3.c: Resolve xfails. * gcc.dg/pr117145-1.c: New test. * gcc.dg/pr117145-2.c: New test. * gcc.dg/pr117245.c: New test.
2024-10-31testsuite: Fix prototype in gcc.dg/pr114115.cJoseph Myers1-1/+1
One test failing with a -std=gnu23 default that I wanted to investigate further is gcc.dg/pr114115.c. Building with -std=gnu23 produces a warning: pr114115.c:18:8: warning: 'ifunc' resolver for 'foo_ifunc2' should return 'void * (*)(void)' [-Wattribute-alias=] It turns out that this warning (from cgraphunit.cc) is disabled for unprototyped functions. Fix the return type for foo_ifunc2 so the test builds without warnings both with and without -std=gnu23. Tested for x86_64. * gcc.dg/pr114115.c (foo_ifunc2): Return void.
2024-10-31Add autoconf check for clock_gettimeAndi Kleen4-5/+70
Reported by Andrew Stubbs gcc/ChangeLog: * config.in: Regenerate. * configure: Regenerate. * configure.ac: Check for HAVE_CLOCK_GETTIME. * timevar.cc (get_time): Use HAVE_CLOCK_GETTIME.
2024-10-31testsuite: Use noinline in gcc.dg/simulate-thread/simulate-thread.hJoseph Myers1-1/+1
Among the changes of test results with a -std=gnu23 default were two tests changing from PASS to UNSUPPORTED: UNSUPPORTED: gcc.dg/simulate-thread/speculative-store.c -O2 -g thread simulation test UNSUPPORTED: gcc.dg/simulate-thread/speculative-store.c -O3 -g thread simulation test It appears that functions defined with () becoming prototyped affects inlining, and changing the code to use (void) allows UNSUPPORTED results to be reproduced with -std=gnu17. Add __attribute__ ((noinline)) on one more function to avoid the UNSUPPORTED results; some of the tests in this directory already have such an attribute on some functions. Tested for x86_64-pc-linux-gnu. * gcc.dg/simulate-thread/simulate-thread.h (simulate_thread_wrapper_final_verify): Mark noinline.
2024-10-31RISC-V: fix const interleaved stepped vector with a scalar patternVineet Gupta2-3/+38
When bisecting for ICE in PR/117353, commit 771256bcb9dd ("RISC-V: Emit costs for bool and stepped const vectors") uncovered yet another latent issue (first noted [1]) [1] https://github.com/patrick-rivos/gcc-postcommit-ci/issues/1625 This patch fixes some of the fortran regressions from that report. Fixes 71a5ac6703d1 ("RISC-V: Support interleave vector with different step sequence") rv64imafdcv_zvl256b_zba_zbb_zbs_zicond/lp64d/medlow | # of unexpected case / # of unique unexpected case | gcc | g++ | gfortran | | 392 / 108 | 7 / 3 | 91 / 24 | | 392 / 108 | 7 / 3 | 67 / 12 | gcc/ChangeLog: * config/riscv/riscv-v.cc (expand_const_vector): Use IOR op. gcc/testsuite/ChangeLog: * gcc.target/riscv/rvv/autovec/slp-interleave-5.c: New test. Tested-by: Edwin Lu <ewlu@rivosinc.com> # Pre-commit CU #2503 Signed-off-by: Vineet Gupta <vineetg@rivosinc.com>
2024-10-31diagnostics: add class lazy_diagnostic_pathDavid Malcolm6-0/+296
This patch adds a new class lazy_diagnostic_path for use when creating rich_location instances, to allow deferring expensive computations until the path is actually used (when a diagnostic using the rich_location is emitted). gcc/ChangeLog: * Makefile.in (OBJS): Add lazy-diagnostic-path.o. * lazy-diagnostic-path.cc: New file. * lazy-diagnostic-path.h: New file. * selftest-diagnostic.cc: Include "diagnostic-format.h". (test_diagnostic_context::test_diagnostic_context): Turn off flushing for the output format's printer. * selftest-run-tests.cc (selftest::run_tests): Call selftest::lazy_diagnostic_path_cc_tests. * selftest.h (selftest::lazy_diagnostic_path_cc_tests): New decl. Signed-off-by: David Malcolm <dmalcolm@redhat.com>
2024-10-31diagnostics: use std::move in output_factory::handler ctorDavid Malcolm1-1/+1
gcc/ChangeLog: * opts-diagnostic.cc (output_factory::handler::handler): Use std::move on name. Signed-off-by: David Malcolm <dmalcolm@redhat.com>
2024-10-31diagnostics: fix memory leak of m_option_mgrDavid Malcolm1-0/+3
Fix some noise seen in "make selftest-valgrind". gcc/ChangeLog: * diagnostic.cc (diagnostic_context::finish): Delete and reset m_option_mgr. Signed-off-by: David Malcolm <dmalcolm@redhat.com>
2024-10-31[PATCH v2] RISC-V: Fix gcc.target/riscv/rvv/base/cpymem-1.c f3Craig Blackmore1-59/+48
The function body checks for f3 only ran with -mcmodel explicitly set which meant I missed a regression in my local testing of: commit b039d06c9a810a3fab4c5eb9d50b0c7aff94b2d8 Author: Craig Blackmore <craig.blackmore@embecosm.com> Date: Fri Oct 18 09:17:21 2024 -0600 [PATCH 3/7] RISC-V: Fix vector memcpy smaller LMUL generation The failure showed up in the rivos CI and it is due to f3 now using LMUL m1 instead of m8. I have reworked the test to make it more robust and maintainable. This allowed most of the special casing of command line arguments to be removed. It also fixes an issue where some targets would enable multiple versions of the function body check e.g. `-march=rv32gcv -mcmodel=medany`. Changes since v1: Added missing ChangeLog. gcc/testsuite/ChangeLog: * gcc.target/riscv/rvv/base/cpymem-1.c: Fix and rework f3.
2024-10-31testsuite: add testcase for fixed PR106073Sam James1-0/+123
This was fixed by r12-8835-ge8d5f3a1b5a583 which surely made it latent but richi points out it was likely an instance of PR90348. -fstack-reuse continues to be a menace, so let's add the testcase. gcc/testsuite/ChangeLog: PR middle-end/90348 PR tree-optimization/106073 * gcc.dg/pr106073.c: New test.
2024-10-31middle-end: Lower all gconds during vector pattern matching [PR117176]Tamar Christina3-39/+40
I have been taking a look at boolean handing once more in the vectorizer. There are two situation to consider: 1. when the boolean being created are created from comparing data inputs then for the resulting vector boolean we need to know the vector type and the precision. In this case, when we have an operation such as NOT on the data element, this has to be lowered to XOR because the truncation to the vector precision needs to be explicit. 2. when the boolean being created comes from another boolean operation, then we don't need to lower NOT, as the precision doesn't change. We don't do any lowering for these (as denoted in check_bool_pattern) and instead the precision is copied from the element feeding the boolean statement during VF analysis. For early break gcond lowering in order to correctly handle the second scenario above we punted the lowering of VECT_SCALAR_BOOLEAN_TYPE_P comparisons that were already in the right shape. e.g. e != 0 where e is a boolean does not need any lowering. The issue however is that the statement feeding e may need to be lowered in the case where it's a data expression. This patch changes a bit how we do the lowering. We now always emit an additional compare. e.g. if the input is; if (e != 0) where is a boolean we would punt on thi before, but now we generate f = e != 0 if (f != 0) We then use the same infrastructre as recog_bool to ask it to lower f, and in doing so handle and boolean conversions that need to be lowered. Because we now guarantee that f is an internal def we can also simplify the SLP building code. When e is a boolean, the precision we build for f needs to reflect the precision of the operation feeding e. To get this value we use integer_type_for_mask the same way recog_bool does, and if it's defined (e.g. we have a data conversions somewhere) we pass that precision on instead. This gets us the correct VF on the newly lowered boolean expressions. gcc/ChangeLog: PR tree-optimization/117176 * tree-vect-patterns.cc (vect_recog_gcond_pattern): Lower all gconds. * tree-vect-slp.cc (vect_analyze_slp): No longer check for in vect def. gcc/testsuite/ChangeLog: PR tree-optimization/117176 * gcc.dg/vect/vect-early-break_130-pr117176.c: New test.
2024-10-31OpenMP/C++: Use STRIP_REFERENCE_REF to fix declare variant with ↵Tobias Burnus1-4/+1
reference-returning functions As Jakub suggested, use STRIP_REFERENCE_REF instead of doing it manually as r15-4800-geb828a1e380e7b did. gcc/cp/ChangeLog: * decl.cc (omp_declare_variant_finalize_one): Use STRIP_REFERENCE_REF instead of doing it manually.
2024-10-31RISC-V: Do not inline when callee is versioned but caller is notYangyu Chen1-0/+4
When the callee is versioned but the caller is not, we should not inline the callee into the caller, to prevent the default version of the callee from being inlined into a not versioned caller. gcc/ChangeLog: * config/riscv/riscv.cc (riscv_can_inline_p): Refuse to inline when callee is versioned but caller is not.
2024-10-31OpenMP/C++: Fix declare variant with reference-returning functionsTobias Burnus2-0/+32
gcc/cp/ChangeLog: * decl.cc (omp_declare_variant_finalize_one): Strip indirect ref around variant-function call when processing a variant. gcc/testsuite/ChangeLog: * g++.dg/gomp/declare-variant-9.C: New test.
2024-10-31RISC-V: Split riscv_process_target_attr with const char *args argumentYangyu Chen2-28/+39
This patch splits static bool riscv_process_target_attr (tree args, location_t loc) into two functions: - bool riscv_process_target_attr (const char *args, location_t loc) - static bool riscv_process_target_attr (tree args, location_t loc) Thus, we can call `riscv_process_target_attr` with a `const char *` argument. This is useful for implementation of `target_version` attribute. gcc/ChangeLog: * config/riscv/riscv-protos.h (riscv_process_target_attr): New. * config/riscv/riscv-target-attr.cc (riscv_process_target_attr): Split into two functions with const char *args argument
2024-10-31expand: Fix up expansion of VIEW_CONVERT_EXPR to BITINT_TYPE [PR117354]Jakub Jelinek2-2/+42
The following testcase ICEs, because when trying to expand the VIEW_CONVERT_EXPR operand which is SSA_NAME defined to V32QI or V4DI MEM_REF which is aligned just to 8 bytes we force it as unaligned into a register, but then try to call extract_bit_field from the V32QI or V4DI register to BLKmode. extract_bit_field doesn't obviously support BLKmode extraction and so ICEs. The second hunk fixes the ICE by not calling extract_bit_field when it can't handle it, the last if will handle it properly by storing it to memory and using BLKmode access to the copy. The first hunk is an optimization, if mode is BLKmode, by setting inner_reference_p argument to expand_expr_real we avoid the expand_misaligned_mem_ref calls which load it from memory into a register. 2024-10-31 Jakub Jelinek <jakub@redhat.com> PR middle-end/117354 * expr.cc (expand_expr_real_1) <case VIEW_CONVERT_EXPR>: Pass true as inner_reference_p argument to expand_expr_real if mode is BLKmode. Don't call extract_bit_field if mode is BLKmode. * gcc.dg/bitint-113.c: New test.
2024-10-31RISC-V: allow -fno-plt to disable PLTYangyu Chen2-3/+3
Currently, the RISC-V target uses the target specific mplt option to control PLT generation. This patch deprecates the target specific mplt option and uses the common fplt option instead. This allows users to use the same option for most targets. Co-Developed-by: Liao Shihua <shihua@iscas.ac.cn> Signed-off-by: Yangyu Chen <cyy@cyyself.name> gcc/ChangeLog: * config/riscv/predicates.md: Use flag_plt instead of TARGET_PLT. * config/riscv/riscv.opt: alias common option fplt to mplt.
2024-10-31tree: Fix up comment wording in valid_new_delete_pair_pJakub Jelinek1-1/+1
I've noticed duplicated word in a comment, fixed thusly. 2024-10-31 Jakub Jelinek <jakub@redhat.com> * tree.cc (valid_new_delete_pair_p): Fix up duplicate "or or" in comment.
2024-10-31Fortran: Fix problem with substring selectors in ASSOCIATE [PR115700]Paul Thomas2-5/+68
2024-10-31 Paul Thomas <pault@gcc.gnu.org> gcc/fortran PR fortran/115700 * resolve.cc (resolve_variable): The typespec of an expression, which is not a substring, can be shared with a deferred length associate name. (resolve_assoc_var): Extract a substring reference with non- constant start or end. Use it to flag up the need for array associate name to be a pointer. (resolve_block_construct): Change comment from past to future tense. gcc/testsuite/ PR fortran/115700 * gfortran.dg/associate_70.f90: New test.
2024-10-31testsuite: fix syntax in Wstringop-overflow-59.cSam James1-4/+4
Fix quoting issues, escaping, and dg directive types. There were two issues here: 1) The incorrect quoting in an earlier dg-message was covering up that the syntax in the next part was wrong; 2) Fix dg-warning -> dg-message to correctly pick up the notes. Once 1) was fixed, this was exposed. With this, I get: ``` +PASS: gcc.dg/Wstringop-overflow-59.c note (test for warnings, line 192) +PASS: gcc.dg/Wstringop-overflow-59.c note (test for warnings, line 193) ``` gcc/testsuite/ChangeLog: PR middle-end/92936 * gcc.dg/Wstringop-overflow-59.c: Fix dg-* syntax.
2024-10-30gimple: Remove special handling of COND_EXPR for COMPARISON_CLASS_P ↵Andrew Pinski3-22/+4
[PR116949, PR114785] After r13-707-g68e0063397ba82, COND_EXPR for gimple assign no longer could contain a comparison. The vectorizer was builting gimple assigns with comparison until r15-4695-gd17e672ce82e69 (which added an assert to make sure it no longer builds it). So let's remove the special handling COND_EXPR in a few places and add an assert to gimple_build_assign_1 to make sure we don't build a gimple assign any more with a comparison. Bootstrapped and tested on x86_64-linux-gnu. gcc/ChangeLog: PR middle-end/114785 PR middle-end/116949 * gimple-match-exports.cc (maybe_push_res_to_seq): Remove special handling of COMPARISON_CLASS_P in COND_EXPR/VEC_COND_EXPR. (gimple_extract): Likewise. * gimple-walk.cc (walk_stmt_load_store_addr_ops): Likewise. * gimple.cc (gimple_build_assign_1): Add assert for COND_EXPR so its 1st operand is not a comparison. Signed-off-by: Andrew Pinski <quic_apinski@quicinc.com>
2024-10-31Daily bump.GCC Administrator7-1/+250
2024-10-31[PATCH] Fix SLP when ifcvt versioned loop is not vectorizedKugan Vivekanandarajah2-0/+76
When ifcvt version a loop, it sets dont_vectorize to the scalar loop. If the vector loop is not vectorized and removed, the scalar loop is still left with dont_vectorize. As a result, BB vectorization will not happen. This patch resets dont_vectorize to scalar loop when IFN_LOOP_VECTORIZED is set to false. gcc/ChangeLog: * tree-vectorizer.cc (pass_vectorize::execute): Reset dont_vectorize to scalar loop when setting IFN_LOOP_VECTORIZED to false. gcc/testsuite/ChangeLog: * gcc.dg/vect/bb-slp-77.c: New test.
2024-10-31[PATCH] Adjust param_vect_max_version_for_alias_checksKugan Vivekanandarajah2-1/+86
This patch sets param_vect_max_version_for_alias_checks to 15. This was causing GCC to miss vectorization opportunities for an application, making it slower than LLVM by about ~14%. Original default of 10 itself is arbitary. Given that, GCC's vectoriser does consideres cost of alias checks, increasing this param is reasonable. In this case we need a value of at teast 11 whereas the current default is 10. gcc/ChangeLog: * params.opt: Adjust param_vect_max_version_for_alias_checks gcc/testsuite/ChangeLog: * g++.dg/alias-checks.C: New test. Signed-off-by: Kugan Vivekanandarajah <kvivekananda@nvidia.com>
2024-10-30c: Do not document C23 support as experimental and incompleteJoseph Myers4-11/+9
Since C23 support is substantially feature-complete, update documentation to no longer refer to it as experimental and incomplete. Bootstrapped with no regressions for x86_64-pc-linux-gnu. gcc/ * doc/cpp.texi (__STDC_VERSION__): Do not refer to C23 support as experimental. * doc/invoke.texi (std=c23, std=gnu23): Do not document as experimental and incomplete. * doc/standards.texi: Do not refer to C23 support as experimental and incomplete. gcc/c-family/ * c.opt (std=c23, std=gnu23, std=iso9899:2024): Do not mark as experimental and incomplete.
2024-10-30syscall: don't define syscall stub on HurdIan Lance Taylor1-1/+1
Patch from Samuel Thibault. Reviewed-on: https://go-review.googlesource.com/c/gofrontend/+/623415
2024-10-30Remove sys/user time in -ftime-reportAndi Kleen2-177/+22
Retrieving sys/user time in timevars is quite expensive because it always needs a system call. Only getting the wall time is much cheaper because operating systems have optimized paths for this. The sys time isn't that interesting for a compiler and wall time is usually close to user time except when the system is overloaded. On the other hand when it is not wall time is more accurate because it has less overhead. For building tramp3d with -O0 the -ftime-report overhead drops from 18% to 3%. For -O2 it drops from 8% to not measurable. I changed the code to use gettimeofday as a fallback for clock_gettime CLOCK_MONOTONIC. If a host has neither of those the time will not be measured. Previously clock was the fallback. This removes a lot of code in timevar.cc: gcc/timevar.cc | 167 ++++++--------------------------------------------------- gcc/timevar.h | 10 +--- 2 files changed, 17 insertions(+), 160 deletions(-) gcc/ChangeLog: * timevar.cc (struct tms): Remove. (RUSAGE_SELF): Remove. (TICKS_PER_SECOND): Remove. (USE_TIMES): Remove. (HAVE_USER_TIME): Remove. (HAVE_SYS_TIME): Remove. (HAVE_WALL_TIME): Remove. (USE_GETRUSAGE): Remove. (USE_CLOCK): Remove. (NANOSEC_PER_SEC): Remove. (TICKS_TO_NANOSEC): Remove. (CLOCKS_TO_NANOSEC): Remove. (timer::named_items::push): Remove sys/user. (get_time): Remove clock and times and getruage code. (timevar_accumulate): Remove sys/user. (timevar_diff): Dito. (timer::validate_phases): Dito. (timer::print_row): Dito. (timer::all_zero): Dito. (timer::print): Dito. (make_json_for_timevar_time_def): Dito. * timevar.h (struct timevar_time_def): Dito.
2024-10-30Remove vectorizer finish_cost wrapperRichard Biener3-26/+14
The inline function wraps the vector_cost class API and no longer is a good representation of the query style of that class which makes it also difficult to extend. * tree-vectorizer.h (finish_cost): Inline everywhere and remove. * tree-vect-loop.cc (vect_estimate_min_profitable_iters): Inline finish_cost. * tree-vect-slp.cc (vect_bb_vectorization_profitable_p): Likewise.
2024-10-30Fix function multiversioning dispatcher link error with LTOYangyu Chen1-0/+7
We forgot to apply DECL_EXTERNAL to __init_cpu_features_resolver decl. When building with LTO, the linker cannot find the __init_cpu_features_resolver.lto_priv* symbol, causing the link error. This patch gets this fixed by adding DECL_EXTERNAL to the decl. To avoid used but never defined warning for this symbol, we also mark TREE_PUBLIC to the decl. We should also mark the decl having hidden visibility. And fix the attribute in the same way for __aarch64_cpu_features identifier. Minimal steps to reproduce the bug: echo '__attribute__((target_clones("default", "aes"))) void func1() { }' > 1.c echo '__attribute__((target_clones("default", "aes"))) void func2() { }' > 2.c echo 'void func1();void func2();int main(){func1();func2();return 0;}' > main.c gcc -flto -c 1.c 2.c gcc -flto main.c 1.o 2.o Fixes: 0cfde688e213 ("[aarch64] Add function multiversioning support") Signed-off-by: Yangyu Chen <cyy@cyyself.name> gcc/ChangeLog: * config/aarch64/aarch64.cc (dispatch_function_versions): Adding DECL_EXTERNAL, TREE_PUBLIC and hidden DECL_VISIBILITY to __init_cpu_features_resolver and __aarch64_cpu_features.
2024-10-30c: Diagnose char argument to __builtin_stdc_*Jakub Jelinek3-0/+38
When working on __builtin_stdc_rotate_*, I've noticed that while the second argument to those is explicitly allowed to have char type, the first argument to all the stdc_* type-generic functions is - standard unsigned integer type, excluding bool; - extended unsigned integer type; - or, bit-precise unsigned integer type whose width matches a standard or extended integer type, excluding bool. but the __builtin_stdc_* lowering code was diagnosing just !INTEGRAL_TYPE_P ENUMERAL_TYPE BOOLEAN_TYPE !TYPE_UNSIGNED Now, with -funsigned-char plain char type is TYPE_UNSIGNED, yet it isn't allowed because it isn't standard unsigned integer type, nor extended unsigned integer type, nor bit-precise unsigned integer type. The following patch diagnoses char arguments and adds testsuite coverage for that. Or should I make it a pedwarn instead? 2024-10-30 Jakub Jelinek <jakub@redhat.com> gcc/c/ * c-parser.cc (c_parser_postfix_expression): Diagnose if first __builtin_stdc_* argument has char type even when -funsigned-char. gcc/testsuite/ * gcc.dg/builtin-stdc-bit-3.c: New test. * gcc.dg/builtin-stdc-rotate-3.c: New test.
2024-10-30[RISC-V] Aggressively hoist VXRM assignmentsJeff Law1-0/+69
So a while back I was looking at pixel_avg for RISC-V where we try to use vaaddu for the halfword-ceiling-average step. The problem with vaaddu is that you must set VXRM to a suitable rounding mode as it has an undetermined state at function entry or after a function call. It turns out some designs will fully flush their pipelines on a write to VXRM which you can imagine is incredibly expensive. VXRM assignments are handled by an LCM based algorithm to find "optimal" placement points based on what insns in the stream need VXRM assignments and the particular mode they need. Unfortunately in pixel_avg an LCM algorithm only allows hoisting out of the innermost loop, but not the outer loop. The core issue is that LCM does not allow any speculation and there are paths which would bypass the inner loop (which don't actually trigger at runtime IIRC). The expectation is that VXRM assignments should be exceedingly rare and needing more than one mode even rarer. So hoisting more aggressively seems like a reasonable thing to do, but we don't want to burn too much time trying to do something fancy. So what this patch does is scan the IL once collecting any VXRM needs. If the current function has precisely one VXRM mode needed, then we pretend (for the sake of LCM) that the first instruction in the function also has that need. By doing so the VXRM assignment is essentially anticipated everywhere in the function. The standard LCM algorithm is run and has enough information to hoist the VXRM assignment more aggressively, most often to the prologue. This helps the BPI in a measurable way (IIRC it was 2-3%). It probably helps some of the SiFive designs, but I've been told they still benefit from the longer sequence of shifts & adds, hoisting just isn't enough for those designs. The Ventana design basically doesn't care where the VXRM assignment is. Point is we may want to have a tuning knob for the patterns which need VXRM (vaadd[u], vasub[u]) at some point in the near future. Bootstrapped and regression tested on riscv64 and regression tested on riscv32-elf and riscv64-elf. We've been using this internally for a while a while on spec as well. Obviously I'll wait for the pre-commit tester to do its thing. gcc/ * config/riscv/riscv.cc (singleton_vxrm_need): New function. (riscv_mode_needed): See if there is a singleton need and if so, claim it happens on the first insn in the chain.
2024-10-30c++, contracts: Only check contracts attributes [PR116607].Iain Sandoe2-1/+7
The ICE described in the PR is caused by not filtering out non- contract attributes before making the has_active_contract_condition test. Fixed, as suggested by Andrew Pinski, by just using the existing CONTRACT_CHAIN () macro to advance through the list. PR c++/116607 gcc/cp/ChangeLog: * contracts.cc (has_active_contract_condition): Use the CONTRACT_CHAIN macro to advance through the attribute list. gcc/testsuite/ChangeLog: * g++.dg/contracts/pr116607.C: New test. Signed-off-by: Iain Sandoe <iain@sandoe.co.uk>
2024-10-30Fix ICE due to subreg:us_truncate.liuhongt2-170/+110
Force_operand issues an ICE when input is (subreg:DI (us_truncate:V8QI)), it's probably because it's an invalid rtx, So refine backend patterns for that. gcc/ChangeLog: PR target/117318 * config/i386/sse.md (*avx512vl_<code>v2div2qi2_mask_store_1): Rename to .. (avx512vl_<code>v2div2qi2_mask_store_1): .. this. (avx512vl_<code>v2div2qi2_mask_store_2): Change to define_expand. (*avx512vl_<code><mode>v4qi2_mask_store_1): Rename to .. (avx512vl_<code><mode>v4qi2_mask_store_1): .. this. (avx512vl_<code><mode>v4qi2_mask_store_2): Change to define_expand. (*avx512vl_<code><mode>v8qi2_mask_store_1): Rename to .. (avx512vl_<code><mode>v8qi2_mask_store_1): .. this. (avx512vl_<code><mode>v8qi2_mask_store_2): Change to define_expand. (*avx512vl_<code><mode>v4hi2_mask_store_1): Rename to .. (avx512vl_<code><mode>v4hi2_mask_store_1): .. this. (avx512vl_<code><mode>v4hi2_mask_store_2): Change to define_expand. (*avx512vl_<code>v2div2hi2_mask_store_1): Rename to .. (avx512vl_<code>v2div2hi2_mask_store_1): .. this. (avx512vl_<code>v2div2hi2_mask_store_2): Change to define_expand. (*avx512vl_<code>v2div2si2_mask_store_1): Rename to .. (avx512vl_<code>v2div2si2_mask_store_1): .. this. (avx512vl_<code>v2div2si2_mask_store_2): Change to define_expand. (*avx512f_<code>v8div16qi2_mask_store_1): Rename to .. (avx512f_<code>v8div16qi2_mask_store_1): .. this. (avx512f_<code>v8div16qi2_mask_store_2): Change to define_expand. gcc/testsuite/ChangeLog: * gcc.target/i386/pr117318.c: New test.
2024-10-30Fortran: fix several front-end memleaksHarald Anlauf2-0/+7
gcc/fortran/ChangeLog: * trans-expr.cc (gfc_trans_class_init_assign): Free intermediate gfc_expr's. * trans.cc (get_final_proc_ref): Likewise. (get_elem_size): Likewise. (gfc_add_finalizer_call): Likewise.
2024-10-30arm: [MVE intrinsics] Remove unused builtins qualifiersChristophe Lyon1-41/+0
After the re-implementation of MVE vld/vst intrinsics, a few builtins qualifiers became useless. This patch removes them to restore bootstrap (otherwise the build fails because of 'defined but not used' errors. gcc/ChangeLog: * config/arm/arm-builtins.cc (STRS_QUALIFIERS): Delete. (STRU_QUALIFIERS): Delete. (STRS_P_QUALIFIERS): Delete. (STRU_P_QUALIFIERS): Delete. (LDRS_QUALIFIERS): Delete. (LDRU_QUALIFIERS): Delete. (LDRS_Z_QUALIFIERS): Delete. (LDRU_Z_QUALIFIERS): Delete.
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