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Since some of the c2y-if-decls tests use _Atomic, add a
requirement for target to support atomic operations on
int and long types.
This fixes spurious test link failures on pru-unknown-elf,
which lacks atomic ops. The tests still pass on x86_64-linux-gnu.
gcc/testsuite/ChangeLog:
* gcc.dg/c2y-if-decls-1.c: Require target that supports atomic
operations on int and long types.
* gcc.dg/c2y-if-decls-11.c: Ditto.
* gcc.dg/c2y-if-decls-4.c: Ditto.
* gcc.dg/c2y-if-decls-8.c: Ditto.
Signed-off-by: Dimitar Dimitrov <dimitar@dinux.eu>
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With the change in 15-3128-gde1923f9f4d, this test case no longer xfail.
gcc/testsuite/ChangeLog:
* gcc.dg/vect/complex/fast-math-complex-add-half-float.c: Remove
xfail from test.
Signed-off-by: Torbjörn SVENSSON <torbjorn.svensson@foss.st.com>
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According to the aapcs64: If the argument is an 8-bit (...) precision
Floating-point or short vector type and the NSRN is less than 8, then the
argument is allocated to the least significant bits of register v[NSRN].
gcc/
* config/aarch64/aarch64.cc
(aarch64_vfp_is_call_or_return_candidate): use fp registers to
return svmfloat8_t parameters.
gcc/testsuite/
* gcc.target/aarch64/fp8_scalar_1.c:
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Lewis' r15-5067 fixing the marking of TRAIT_EXPR led me to compare some
other front-end type definitions to their marking in cp_common_init_ts; it
seems we can change tree_common to something smaller in several cases, to
match how they are marked.
gcc/cp/ChangeLog:
* cp-tree.h (struct ptrmem_cst): Change tree_common to tree_typed.
(struct tree_trait_expr): Likewise.
(struct tree_static_assert): Change tree_common to tree_base.
(struct tree_argument_pack_select): Likewise.
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This was responsible for a bunch of SVE FAILs with --param vect-force-slp=1
* tree-vect-slp.cc (arg1_arg3_map): New.
(arg1_arg3_arg4_map): Likewise.
(vect_get_operand_map): Handle IFN_SCATTER_STORE,
IFN_MASK_SCATTER_STORE and IFN_MASK_LEN_SCATTER_STORE.
(vect_build_slp_tree_1): Likewise.
* tree-vect-stmts.cc (vectorizable_store): For SLP masked
gather/scatter record the mask with proper number of copies.
* tree-vect-loop.cc (vectorizable_recurr): Avoid costing
the initial value construction in the prologue twice with SLP.
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Previous patches are supposed to add full support for SVE2.1,
so this patch advertises that through __ARM_FEATURE_SVE2p1.
pragma_cpp_predefs_3.c had one fewer pop than push. The final
test is triple-nested:
- armv8-a (to start with a clean slate, untainted by command-line flags)
- the maximal SVE set
- general-regs-only
gcc/
* config/aarch64/aarch64-c.cc (aarch64_update_cpp_builtins): Handle
__ARM_FEATURE_SVE2p1.
gcc/testsuite/
* gcc.target/aarch64/pragma_cpp_predefs_3.c: Add SVE2p1 tests.
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This patch adds the instructions that are new to FEAT_SVE2p1.
It mostly contains simple additions, so it didn't seem worth
splitting up further.
It's likely that we'll find more autovec uses for some of these
instructions, but for now this patch just deals with one obvious case:
using the new hybrid-VLA permutations to handle "stepped" versions of
some Advanced SIMD permutations. See aarch64_evpc_hvla for details.
The patch also continues the existing practice of lowering ACLE
permutation intrinsics to VEC_PERM_EXPR. That's admittedly a bit
inconsistent with the approach I've been advocating for when it comes
to arithmetic, but I think the difference is that (a) these are pure
data movement, and so there's limited scope for things like gimple
canonicalisations to mess with the instruction selection or operation
mix; and (b) there are no added UB rules to worry about.
Another new thing in the patch is the concept of "memory-only"
SVE vector modes. These are used to represent the memory operands
of the new LD1[DW] (to .Q), LD[234]Q, ST1[DW] (from .Q), and ST[234]Q
instructions. We continue to use .B, .H, .S, and .D modes for the
registers, since there's no predicated contiguous LD1Q instruction,
and since there's no arithmetic that can be done on TI. (The new
instructions are instead intended for hybrid VLA, i.e. for vectors
of vectors.)
For now, all of the new instructions are non-streaming-only.
Some of them are streaming-compatible with SME2p1, but that's
a later patch.
gcc/
* config/aarch64/aarch64-modes.def (VNx1SI, VNx1DI): New modes.
* config/aarch64/aarch64-sve-builtins-base.cc
(svdup_lane_impl::expand): Update generation of TBL instruction.
(svtbl_impl): Delete.
(svtbl): Use unspec_based_uncond_function instead.
* config/aarch64/aarch64-sve-builtins-functions.h
(permute::fold_permute): Handle trailing immediate arguments.
* config/aarch64/aarch64-sve-builtins-shapes.h (extq): Declare.
(load_gather64_sv_index, load_gather64_sv_offset): Likewise.
(load_gather64_vs_index, load_gather64_vs_offset): Likewise.
(pmov_from_vector, pmov_from_vector_lane, pmov_to_vector_lane)
(reduction_neonq, store_scatter64_index, store_scatter64_offset)
(unary_lane): Likewise.
* config/aarch64/aarch64-sve-builtins-shapes.cc
(load_gather64_sv_base, store_scatter64_base): New classes.
(extq_def, ext): New shape.
(load_gather64_sv_index_def, load_gather64_sv_index): Likewise.
(load_gather64_sv_offset_def, load_gather64_sv_offset): Likewise.
(load_gather64_vs_index_def, load_gather64_vs_index): Likewise.
(load_gather64_vs_offset_def, load_gather64_vs_offset): Likewise.
(pmov_from_vector_def, pmov_from_vector): Likewise.
(pmov_from_vector_lane_def, pmov_from_vector_lane): Likewise.
(pmov_to_vector_lane_def, pmov_to_vector_lane): Likewise.
(reduction_neonq_def, reduction_neonq): Likewise.
(store_scatter64_index_def, store_scatter64_index): Likewise.
(store_scatter64_offset_def, store_scatter64_offset): Likewise.
(unary_lane_def, unary_lane): Likewise.
* config/aarch64/aarch64-sve-builtins-sve2.h (svaddqv, svandqv)
(svdup_laneq, sveorqv, svextq, svld1q_gather, svld1udq, svld1uwq)
(svld2q, svld3q, svld4q, svmaxnmqv, svmaxqv, svminnmqv, svminqv)
(svorqv, svpmov, svpmov_lane, svst1qd, svst1q_scatter, svst1wq)
(svst2q, svst3q, svst4q, svtblq, svtbx, svtbxq, svuzpq1, svuzpq2)
(svzipq1, svzipq2): Declare.
* config/aarch64/aarch64-sve-builtins-sve2.cc (ld1uxq_st1xq_base)
(ld234q_st234q_base, svdup_laneq_impl, svextq_impl): New classes.
(svld1q_gather_impl, svld1uxq_impl, svld234q_impl): Likewise.
(svpmov_impl, svpmov_lane_impl, svst1q_scatter_impl): Likewise.
(svst1xq_impl, svst234q_impl, svuzpq_impl, svzipq_impl): Likewise.
(svaddqv, svandqv, svdup_laneq, sveorqv, svextq, svld1q_gather)
(svld1udq, svld1uwq, svld2q, svld3q, svld4q, svmaxnmqv, svmaxqv)
(svminnmqv, svminqv, svorqv, svpmov, svpmov_lane, svst1qd)
(svst1q_scatter, svst1wq, svst2q, svst3q, svst4q, svtblq, svtbx)
(svtbxq, svuzpq1, svuzpq2, svzipq1, svzipq2): New function entries.
* config/aarch64/aarch64-sve-builtins-sve2.def (svaddqv, svandqv)
(svdup_laneq, sveorqv, svextq, svld2q, svld3q, svld4q, svmaxnmqv)
(svmaxqv, svminnmqv, svminqv, svorqv, svpmov, svpmov_lanes, vst2q)
(svst3q, svst4q, svtblq, svtbxq, svuzpq1, svuzpq2, svzipq1, svzipq2)
(svld1q_gather, svld1udq, svld1uwq, svst1dq, svst1q_scatter)
(svst1wq): New function definitions.
* config/aarch64/aarch64-sve-builtins.cc (TYPES_hsd_data)
(hsd_data, s_data): New type lists.
(function_resolver::infer_pointer_type): Give a specific error about
passing a pointer to 8-bit elements to an _index function.
(function_resolver::resolve_sv_displacement): Check whether the
function allows 32-bit bases.
* config/aarch64/iterators.md (UNSPEC_TBLQ, UNSPEC_TBXQ): New unspecs.
(UNSPEC_ADDQV, UNSPEC_ANDQV, UNSPEC_DUPQ, UNSPEC_EORQV, UNSPEC_EXTQ)
(UNSPEC_FADDQV, UNSPEC_FMAXQV, UNSPEC_FMAXNMQV, UNSPEC_FMINQV)
(UNSPEC_FMINNMQV, UNSPEC_LD1_EXTENDQ, UNSPEC_LD1Q_GATHER): Likewise.
(UNSPEC_LDNQ, UNSPEC_ORQV, UNSPEC_PMOV_PACK, UNSPEC_PMOV_PACK_LANE)
(UNSPEC_PMOV_UNPACK, UNSPEC_PMOV_UNPACK_LANE, UNSPEC_SMAXQV): Likewise.
(UNSPEC_SMINQV, UNSPEC_ST1_TRUNCQ, UNSPEC_ST1Q_SCATTER, UNSPEC_STNQ)
(UNSPEC_UMAXQV, UNSPEC_UMINQV, UNSPEC_UZPQ1, UNSPEC_UZPQ2): Likewise.
(UNSPEC_ZIPQ1, UNSPEC_ZIPQ2): Likewise.
(Vtype): Handle single-vector SVE modes.
(Vendreg): Handle SVE structure modes.
(VNxTI, LD1_EXTENDQ_MEM): New mode attributes.
(SVE_PERMUTE, SVE_TBL, SVE_TBX): New int iterators.
(SVE_INT_REDUCTION_128, SVE_FP_REDUCTION_128): Likewise.
(optab): Handle the new SVE2.1 reductions.
(perm_insn): Handle the new SVE2.1 permutations.
* config/aarch64/aarch64-sve.md
(@aarch64_sve_tbl<mode>): Generalize to...
(@aarch64_sve_<SVE_TBL:perm_insn><mode>): ...this.
(@aarch64_sve_<PERMUTE:perm_insn><mode>): Generalize to...
(@aarch64_sve_<SVE_PERMUTE:perm_insn><mode>): ...this.
* config/aarch64/aarch64-sve2.md (@aarch64_pmov_to_<mode>)
(@aarch64_pmov_lane_to_<mode>, @aarch64_pmov_from_<mode>)
(@aarch64_pmov_lane_from_<mode>, @aarch64_sve_ld1_extendq<mode>)
(@aarch64_sve_ldnq<mode>, aarch64_gather_ld1q): New patterns.
(@aarch64_sve_st1_truncq<mode>, @aarch64_sve_stnq<mode>): Likewise.
(aarch64_scatter_st1q, @aarch64_pred_reduc_<optab>_<mode>): Likewise.
(@aarch64_sve_dupq<mode>, @aarch64_sve_extq<mode>): Likewise.
(@aarch64_sve2_tbx<mode>): Generalize to...
(@aarch64_sve_<SVE_TBX:perm_insn><mode>): ...this.
* config/aarch64/aarch64.cc
(aarch64_classify_vector_memory_mode): New function.
(aarch64_regmode_natural_size): Use it.
(aarch64_classify_index): Likewise.
(aarch64_classify_address): Likewise.
(aarch64_print_address_internal): Likewise.
(aarch64_evpc_hvla): New function.
(aarch64_expand_vec_perm_const_1): Use it.
gcc/testsuite/
* gcc.target/aarch64/sve/acle/general-c/load_ext_gather_index_1.c,
* gcc.target/aarch64/sve/acle/general-c/load_ext_gather_offset_1.c,
* gcc.target/aarch64/sve/acle/general-c/load_ext_gather_offset_2.c,
* gcc.target/aarch64/sve/acle/general-c/load_ext_gather_offset_3.c,
* gcc.target/aarch64/sve/acle/general-c/load_ext_gather_offset_4.c,
* gcc.target/aarch64/sve/acle/general-c/load_ext_gather_offset_5.c:
Adjust the "did you mean" suggestion.
* gcc.target/aarch64/sve/acle/general-c/ld1sh_gather_1.c: Removed.
* gcc.target/aarch64/sve/acle/general-c/extq_1.c: New test.
* gcc.target/aarch64/sve/acle/general-c/load_gather64_sv_index_1.c: Likewise.
* gcc.target/aarch64/sve/acle/general-c/load_gather64_sv_offset_1.c: Likewise.
* gcc.target/aarch64/sve/acle/general-c/pmov_from_vector_1.c: Likewise.
* gcc.target/aarch64/sve/acle/general-c/pmov_from_vector_lane_1.c: Likewise.
* gcc.target/aarch64/sve/acle/general-c/pmov_to_vector_lane_1.c: Likewise.
* gcc.target/aarch64/sve/acle/general-c/pmov_to_vector_lane_2.c: Likewise.
* gcc.target/aarch64/sve/acle/general-c/store_scatter64_1.c: Likewise.
* gcc.target/aarch64/sve/acle/general-c/store_scatter64_index_1.c: Likewise.
* gcc.target/aarch64/sve/acle/general-c/store_scatter64_offset_1.c: Likewise.
* gcc.target/aarch64/sve/acle/general-c/unary_lane_1.c: Likewise.
* gcc.target/aarch64/sve2/acle/asm/addqv_f16.c: Likewise.
* gcc.target/aarch64/sve2/acle/asm/addqv_f32.c: Likewise.
* gcc.target/aarch64/sve2/acle/asm/addqv_f64.c: Likewise.
* gcc.target/aarch64/sve2/acle/asm/addqv_s16.c: Likewise.
* gcc.target/aarch64/sve2/acle/asm/addqv_s32.c: Likewise.
* gcc.target/aarch64/sve2/acle/asm/addqv_s64.c: Likewise.
* gcc.target/aarch64/sve2/acle/asm/addqv_s8.c: Likewise.
* gcc.target/aarch64/sve2/acle/asm/addqv_u16.c: Likewise.
* gcc.target/aarch64/sve2/acle/asm/addqv_u32.c: Likewise.
* gcc.target/aarch64/sve2/acle/asm/addqv_u64.c: Likewise.
* gcc.target/aarch64/sve2/acle/asm/addqv_u8.c: Likewise.
* gcc.target/aarch64/sve2/acle/asm/andqv_s16.c: Likewise.
* gcc.target/aarch64/sve2/acle/asm/andqv_s32.c: Likewise.
* gcc.target/aarch64/sve2/acle/asm/andqv_s64.c: Likewise.
* gcc.target/aarch64/sve2/acle/asm/andqv_s8.c: Likewise.
* gcc.target/aarch64/sve2/acle/asm/andqv_u16.c: Likewise.
* gcc.target/aarch64/sve2/acle/asm/andqv_u32.c: Likewise.
* gcc.target/aarch64/sve2/acle/asm/andqv_u64.c: Likewise.
* gcc.target/aarch64/sve2/acle/asm/andqv_u8.c: Likewise.
* gcc.target/aarch64/sve2/acle/asm/dup_laneq_bf16.c: Likewise.
* gcc.target/aarch64/sve2/acle/asm/dup_laneq_f16.c: Likewise.
* gcc.target/aarch64/sve2/acle/asm/dup_laneq_f32.c: Likewise.
* gcc.target/aarch64/sve2/acle/asm/dup_laneq_f64.c: Likewise.
* gcc.target/aarch64/sve2/acle/asm/dup_laneq_s16.c: Likewise.
* gcc.target/aarch64/sve2/acle/asm/dup_laneq_s32.c: Likewise.
* gcc.target/aarch64/sve2/acle/asm/dup_laneq_s64.c: Likewise.
* gcc.target/aarch64/sve2/acle/asm/dup_laneq_s8.c: Likewise.
* gcc.target/aarch64/sve2/acle/asm/dup_laneq_u16.c: Likewise.
* gcc.target/aarch64/sve2/acle/asm/dup_laneq_u32.c: Likewise.
* gcc.target/aarch64/sve2/acle/asm/dup_laneq_u64.c: Likewise.
* gcc.target/aarch64/sve2/acle/asm/dup_laneq_u8.c: Likewise.
* gcc.target/aarch64/sve2/acle/asm/eorqv_s16.c: Likewise.
* gcc.target/aarch64/sve2/acle/asm/eorqv_s32.c: Likewise.
* gcc.target/aarch64/sve2/acle/asm/eorqv_s64.c: Likewise.
* gcc.target/aarch64/sve2/acle/asm/eorqv_s8.c: Likewise.
* gcc.target/aarch64/sve2/acle/asm/eorqv_u16.c: Likewise.
* gcc.target/aarch64/sve2/acle/asm/eorqv_u32.c: Likewise.
* gcc.target/aarch64/sve2/acle/asm/eorqv_u64.c: Likewise.
* gcc.target/aarch64/sve2/acle/asm/eorqv_u8.c: Likewise.
* gcc.target/aarch64/sve2/acle/asm/extq_bf16.c: Likewise.
* gcc.target/aarch64/sve2/acle/asm/extq_f16.c: Likewise.
* gcc.target/aarch64/sve2/acle/asm/extq_f32.c: Likewise.
* gcc.target/aarch64/sve2/acle/asm/extq_f64.c: Likewise.
* gcc.target/aarch64/sve2/acle/asm/extq_s16.c: Likewise.
* gcc.target/aarch64/sve2/acle/asm/extq_s32.c: Likewise.
* gcc.target/aarch64/sve2/acle/asm/extq_s64.c: Likewise.
* gcc.target/aarch64/sve2/acle/asm/extq_s8.c: Likewise.
* gcc.target/aarch64/sve2/acle/asm/extq_u16.c: Likewise.
* gcc.target/aarch64/sve2/acle/asm/extq_u32.c: Likewise.
* gcc.target/aarch64/sve2/acle/asm/extq_u64.c: Likewise.
* gcc.target/aarch64/sve2/acle/asm/extq_u8.c: Likewise.
* gcc.target/aarch64/sve2/acle/asm/ld1q_gather_bf16.c: Likewise.
* gcc.target/aarch64/sve2/acle/asm/ld1q_gather_f16.c: Likewise.
* gcc.target/aarch64/sve2/acle/asm/ld1q_gather_f32.c: Likewise.
* gcc.target/aarch64/sve2/acle/asm/ld1q_gather_f64.c: Likewise.
* gcc.target/aarch64/sve2/acle/asm/ld1q_gather_s16.c: Likewise.
* gcc.target/aarch64/sve2/acle/asm/ld1q_gather_s32.c: Likewise.
* gcc.target/aarch64/sve2/acle/asm/ld1q_gather_s64.c: Likewise.
* gcc.target/aarch64/sve2/acle/asm/ld1q_gather_s8.c: Likewise.
* gcc.target/aarch64/sve2/acle/asm/ld1q_gather_u16.c: Likewise.
* gcc.target/aarch64/sve2/acle/asm/ld1q_gather_u32.c: Likewise.
* gcc.target/aarch64/sve2/acle/asm/ld1q_gather_u64.c: Likewise.
* gcc.target/aarch64/sve2/acle/asm/ld1q_gather_u8.c: Likewise.
* gcc.target/aarch64/sve2/acle/asm/ld1udq_f64.c: Likewise.
* gcc.target/aarch64/sve2/acle/asm/ld1udq_s64.c: Likewise.
* gcc.target/aarch64/sve2/acle/asm/ld1udq_u64.c: Likewise.
* gcc.target/aarch64/sve2/acle/asm/ld1uwq_f32.c: Likewise.
* gcc.target/aarch64/sve2/acle/asm/ld1uwq_s32.c: Likewise.
* gcc.target/aarch64/sve2/acle/asm/ld1uwq_u32.c: Likewise.
* gcc.target/aarch64/sve2/acle/asm/ld2q_bf16.c: Likewise.
* gcc.target/aarch64/sve2/acle/asm/ld2q_f16.c: Likewise.
* gcc.target/aarch64/sve2/acle/asm/ld2q_f32.c: Likewise.
* gcc.target/aarch64/sve2/acle/asm/ld2q_f64.c: Likewise.
* gcc.target/aarch64/sve2/acle/asm/ld2q_s16.c: Likewise.
* gcc.target/aarch64/sve2/acle/asm/ld2q_s32.c: Likewise.
* gcc.target/aarch64/sve2/acle/asm/ld2q_s64.c: Likewise.
* gcc.target/aarch64/sve2/acle/asm/ld2q_s8.c: Likewise.
* gcc.target/aarch64/sve2/acle/asm/ld2q_u16.c: Likewise.
* gcc.target/aarch64/sve2/acle/asm/ld2q_u32.c: Likewise.
* gcc.target/aarch64/sve2/acle/asm/ld2q_u64.c: Likewise.
* gcc.target/aarch64/sve2/acle/asm/ld2q_u8.c: Likewise.
* gcc.target/aarch64/sve2/acle/asm/ld3q_bf16.c: Likewise.
* gcc.target/aarch64/sve2/acle/asm/ld3q_f16.c: Likewise.
* gcc.target/aarch64/sve2/acle/asm/ld3q_f32.c: Likewise.
* gcc.target/aarch64/sve2/acle/asm/ld3q_f64.c: Likewise.
* gcc.target/aarch64/sve2/acle/asm/ld3q_s16.c: Likewise.
* gcc.target/aarch64/sve2/acle/asm/ld3q_s32.c: Likewise.
* gcc.target/aarch64/sve2/acle/asm/ld3q_s64.c: Likewise.
* gcc.target/aarch64/sve2/acle/asm/ld3q_s8.c: Likewise.
* gcc.target/aarch64/sve2/acle/asm/ld3q_u16.c: Likewise.
* gcc.target/aarch64/sve2/acle/asm/ld3q_u32.c: Likewise.
* gcc.target/aarch64/sve2/acle/asm/ld3q_u64.c: Likewise.
* gcc.target/aarch64/sve2/acle/asm/ld3q_u8.c: Likewise.
* gcc.target/aarch64/sve2/acle/asm/ld4q_bf16.c: Likewise.
* gcc.target/aarch64/sve2/acle/asm/ld4q_f16.c: Likewise.
* gcc.target/aarch64/sve2/acle/asm/ld4q_f32.c: Likewise.
* gcc.target/aarch64/sve2/acle/asm/ld4q_f64.c: Likewise.
* gcc.target/aarch64/sve2/acle/asm/ld4q_s16.c: Likewise.
* gcc.target/aarch64/sve2/acle/asm/ld4q_s32.c: Likewise.
* gcc.target/aarch64/sve2/acle/asm/ld4q_s64.c: Likewise.
* gcc.target/aarch64/sve2/acle/asm/ld4q_s8.c: Likewise.
* gcc.target/aarch64/sve2/acle/asm/ld4q_u16.c: Likewise.
* gcc.target/aarch64/sve2/acle/asm/ld4q_u32.c: Likewise.
* gcc.target/aarch64/sve2/acle/asm/ld4q_u64.c: Likewise.
* gcc.target/aarch64/sve2/acle/asm/ld4q_u8.c: Likewise.
* gcc.target/aarch64/sve2/acle/asm/maxnmqv_f16.c: Likewise.
* gcc.target/aarch64/sve2/acle/asm/maxnmqv_f32.c: Likewise.
* gcc.target/aarch64/sve2/acle/asm/maxnmqv_f64.c: Likewise.
* gcc.target/aarch64/sve2/acle/asm/maxqv_f16.c: Likewise.
* gcc.target/aarch64/sve2/acle/asm/maxqv_f32.c: Likewise.
* gcc.target/aarch64/sve2/acle/asm/maxqv_f64.c: Likewise.
* gcc.target/aarch64/sve2/acle/asm/maxqv_s16.c: Likewise.
* gcc.target/aarch64/sve2/acle/asm/maxqv_s32.c: Likewise.
* gcc.target/aarch64/sve2/acle/asm/maxqv_s64.c: Likewise.
* gcc.target/aarch64/sve2/acle/asm/maxqv_s8.c: Likewise.
* gcc.target/aarch64/sve2/acle/asm/maxqv_u16.c: Likewise.
* gcc.target/aarch64/sve2/acle/asm/maxqv_u32.c: Likewise.
* gcc.target/aarch64/sve2/acle/asm/maxqv_u64.c: Likewise.
* gcc.target/aarch64/sve2/acle/asm/maxqv_u8.c: Likewise.
* gcc.target/aarch64/sve2/acle/asm/minnmqv_f16.c: Likewise.
* gcc.target/aarch64/sve2/acle/asm/minnmqv_f32.c: Likewise.
* gcc.target/aarch64/sve2/acle/asm/minnmqv_f64.c: Likewise.
* gcc.target/aarch64/sve2/acle/asm/minqv_f16.c: Likewise.
* gcc.target/aarch64/sve2/acle/asm/minqv_f32.c: Likewise.
* gcc.target/aarch64/sve2/acle/asm/minqv_f64.c: Likewise.
* gcc.target/aarch64/sve2/acle/asm/minqv_s16.c: Likewise.
* gcc.target/aarch64/sve2/acle/asm/minqv_s32.c: Likewise.
* gcc.target/aarch64/sve2/acle/asm/minqv_s64.c: Likewise.
* gcc.target/aarch64/sve2/acle/asm/minqv_s8.c: Likewise.
* gcc.target/aarch64/sve2/acle/asm/minqv_u16.c: Likewise.
* gcc.target/aarch64/sve2/acle/asm/minqv_u32.c: Likewise.
* gcc.target/aarch64/sve2/acle/asm/minqv_u64.c: Likewise.
* gcc.target/aarch64/sve2/acle/asm/minqv_u8.c: Likewise.
* gcc.target/aarch64/sve2/acle/asm/orqv_s16.c: Likewise.
* gcc.target/aarch64/sve2/acle/asm/orqv_s32.c: Likewise.
* gcc.target/aarch64/sve2/acle/asm/orqv_s64.c: Likewise.
* gcc.target/aarch64/sve2/acle/asm/orqv_s8.c: Likewise.
* gcc.target/aarch64/sve2/acle/asm/orqv_u16.c: Likewise.
* gcc.target/aarch64/sve2/acle/asm/orqv_u32.c: Likewise.
* gcc.target/aarch64/sve2/acle/asm/orqv_u64.c: Likewise.
* gcc.target/aarch64/sve2/acle/asm/orqv_u8.c: Likewise.
* gcc.target/aarch64/sve2/acle/asm/pmov_s16.c: Likewise.
* gcc.target/aarch64/sve2/acle/asm/pmov_s32.c: Likewise.
* gcc.target/aarch64/sve2/acle/asm/pmov_s64.c: Likewise.
* gcc.target/aarch64/sve2/acle/asm/pmov_s8.c: Likewise.
* gcc.target/aarch64/sve2/acle/asm/pmov_u16.c: Likewise.
* gcc.target/aarch64/sve2/acle/asm/pmov_u32.c: Likewise.
* gcc.target/aarch64/sve2/acle/asm/pmov_u64.c: Likewise.
* gcc.target/aarch64/sve2/acle/asm/pmov_u8.c: Likewise.
* gcc.target/aarch64/sve2/acle/asm/st1dq_f64.c: Likewise.
* gcc.target/aarch64/sve2/acle/asm/st1dq_s64.c: Likewise.
* gcc.target/aarch64/sve2/acle/asm/st1dq_u64.c: Likewise.
* gcc.target/aarch64/sve2/acle/asm/st1q_scatter_bf16.c: Likewise.
* gcc.target/aarch64/sve2/acle/asm/st1q_scatter_f16.c: Likewise.
* gcc.target/aarch64/sve2/acle/asm/st1q_scatter_f32.c: Likewise.
* gcc.target/aarch64/sve2/acle/asm/st1q_scatter_f64.c: Likewise.
* gcc.target/aarch64/sve2/acle/asm/st1q_scatter_s16.c: Likewise.
* gcc.target/aarch64/sve2/acle/asm/st1q_scatter_s32.c: Likewise.
* gcc.target/aarch64/sve2/acle/asm/st1q_scatter_s64.c: Likewise.
* gcc.target/aarch64/sve2/acle/asm/st1q_scatter_s8.c: Likewise.
* gcc.target/aarch64/sve2/acle/asm/st1q_scatter_u16.c: Likewise.
* gcc.target/aarch64/sve2/acle/asm/st1q_scatter_u32.c: Likewise.
* gcc.target/aarch64/sve2/acle/asm/st1q_scatter_u64.c: Likewise.
* gcc.target/aarch64/sve2/acle/asm/st1q_scatter_u8.c: Likewise.
* gcc.target/aarch64/sve2/acle/asm/st1wq_f32.c: Likewise.
* gcc.target/aarch64/sve2/acle/asm/st1wq_s32.c: Likewise.
* gcc.target/aarch64/sve2/acle/asm/st1wq_u32.c: Likewise.
* gcc.target/aarch64/sve2/acle/asm/st2q_bf16.c: Likewise.
* gcc.target/aarch64/sve2/acle/asm/st2q_f16.c: Likewise.
* gcc.target/aarch64/sve2/acle/asm/st2q_f32.c: Likewise.
* gcc.target/aarch64/sve2/acle/asm/st2q_f64.c: Likewise.
* gcc.target/aarch64/sve2/acle/asm/st2q_s16.c: Likewise.
* gcc.target/aarch64/sve2/acle/asm/st2q_s32.c: Likewise.
* gcc.target/aarch64/sve2/acle/asm/st2q_s64.c: Likewise.
* gcc.target/aarch64/sve2/acle/asm/st2q_s8.c: Likewise.
* gcc.target/aarch64/sve2/acle/asm/st2q_u16.c: Likewise.
* gcc.target/aarch64/sve2/acle/asm/st2q_u32.c: Likewise.
* gcc.target/aarch64/sve2/acle/asm/st2q_u64.c: Likewise.
* gcc.target/aarch64/sve2/acle/asm/st2q_u8.c: Likewise.
* gcc.target/aarch64/sve2/acle/asm/st3q_bf16.c: Likewise.
* gcc.target/aarch64/sve2/acle/asm/st3q_f16.c: Likewise.
* gcc.target/aarch64/sve2/acle/asm/st3q_f32.c: Likewise.
* gcc.target/aarch64/sve2/acle/asm/st3q_f64.c: Likewise.
* gcc.target/aarch64/sve2/acle/asm/st3q_s16.c: Likewise.
* gcc.target/aarch64/sve2/acle/asm/st3q_s32.c: Likewise.
* gcc.target/aarch64/sve2/acle/asm/st3q_s64.c: Likewise.
* gcc.target/aarch64/sve2/acle/asm/st3q_s8.c: Likewise.
* gcc.target/aarch64/sve2/acle/asm/st3q_u16.c: Likewise.
* gcc.target/aarch64/sve2/acle/asm/st3q_u32.c: Likewise.
* gcc.target/aarch64/sve2/acle/asm/st3q_u64.c: Likewise.
* gcc.target/aarch64/sve2/acle/asm/st3q_u8.c: Likewise.
* gcc.target/aarch64/sve2/acle/asm/st4q_bf16.c: Likewise.
* gcc.target/aarch64/sve2/acle/asm/st4q_f16.c: Likewise.
* gcc.target/aarch64/sve2/acle/asm/st4q_f32.c: Likewise.
* gcc.target/aarch64/sve2/acle/asm/st4q_f64.c: Likewise.
* gcc.target/aarch64/sve2/acle/asm/st4q_s16.c: Likewise.
* gcc.target/aarch64/sve2/acle/asm/st4q_s32.c: Likewise.
* gcc.target/aarch64/sve2/acle/asm/st4q_s64.c: Likewise.
* gcc.target/aarch64/sve2/acle/asm/st4q_s8.c: Likewise.
* gcc.target/aarch64/sve2/acle/asm/st4q_u16.c: Likewise.
* gcc.target/aarch64/sve2/acle/asm/st4q_u32.c: Likewise.
* gcc.target/aarch64/sve2/acle/asm/st4q_u64.c: Likewise.
* gcc.target/aarch64/sve2/acle/asm/st4q_u8.c: Likewise.
* gcc.target/aarch64/sve2/acle/asm/tblq_bf16.c: Likewise.
* gcc.target/aarch64/sve2/acle/asm/tblq_f16.c: Likewise.
* gcc.target/aarch64/sve2/acle/asm/tblq_f32.c: Likewise.
* gcc.target/aarch64/sve2/acle/asm/tblq_f64.c: Likewise.
* gcc.target/aarch64/sve2/acle/asm/tblq_s16.c: Likewise.
* gcc.target/aarch64/sve2/acle/asm/tblq_s32.c: Likewise.
* gcc.target/aarch64/sve2/acle/asm/tblq_s64.c: Likewise.
* gcc.target/aarch64/sve2/acle/asm/tblq_s8.c: Likewise.
* gcc.target/aarch64/sve2/acle/asm/tblq_u16.c: Likewise.
* gcc.target/aarch64/sve2/acle/asm/tblq_u32.c: Likewise.
* gcc.target/aarch64/sve2/acle/asm/tblq_u64.c: Likewise.
* gcc.target/aarch64/sve2/acle/asm/tblq_u8.c: Likewise.
* gcc.target/aarch64/sve2/acle/asm/tbxq_bf16.c: Likewise.
* gcc.target/aarch64/sve2/acle/asm/tbxq_f16.c: Likewise.
* gcc.target/aarch64/sve2/acle/asm/tbxq_f32.c: Likewise.
* gcc.target/aarch64/sve2/acle/asm/tbxq_f64.c: Likewise.
* gcc.target/aarch64/sve2/acle/asm/tbxq_s16.c: Likewise.
* gcc.target/aarch64/sve2/acle/asm/tbxq_s32.c: Likewise.
* gcc.target/aarch64/sve2/acle/asm/tbxq_s64.c: Likewise.
* gcc.target/aarch64/sve2/acle/asm/tbxq_s8.c: Likewise.
* gcc.target/aarch64/sve2/acle/asm/tbxq_u16.c: Likewise.
* gcc.target/aarch64/sve2/acle/asm/tbxq_u32.c: Likewise.
* gcc.target/aarch64/sve2/acle/asm/tbxq_u64.c: Likewise.
* gcc.target/aarch64/sve2/acle/asm/tbxq_u8.c: Likewise.
* gcc.target/aarch64/sve2/acle/asm/uzpq1_bf16.c: Likewise.
* gcc.target/aarch64/sve2/acle/asm/uzpq1_f16.c: Likewise.
* gcc.target/aarch64/sve2/acle/asm/uzpq1_f32.c: Likewise.
* gcc.target/aarch64/sve2/acle/asm/uzpq1_f64.c: Likewise.
* gcc.target/aarch64/sve2/acle/asm/uzpq1_s16.c: Likewise.
* gcc.target/aarch64/sve2/acle/asm/uzpq1_s32.c: Likewise.
* gcc.target/aarch64/sve2/acle/asm/uzpq1_s64.c: Likewise.
* gcc.target/aarch64/sve2/acle/asm/uzpq1_s8.c: Likewise.
* gcc.target/aarch64/sve2/acle/asm/uzpq1_u16.c: Likewise.
* gcc.target/aarch64/sve2/acle/asm/uzpq1_u32.c: Likewise.
* gcc.target/aarch64/sve2/acle/asm/uzpq1_u64.c: Likewise.
* gcc.target/aarch64/sve2/acle/asm/uzpq1_u8.c: Likewise.
* gcc.target/aarch64/sve2/acle/asm/uzpq2_bf16.c: Likewise.
* gcc.target/aarch64/sve2/acle/asm/uzpq2_f16.c: Likewise.
* gcc.target/aarch64/sve2/acle/asm/uzpq2_f32.c: Likewise.
* gcc.target/aarch64/sve2/acle/asm/uzpq2_f64.c: Likewise.
* gcc.target/aarch64/sve2/acle/asm/uzpq2_s16.c: Likewise.
* gcc.target/aarch64/sve2/acle/asm/uzpq2_s32.c: Likewise.
* gcc.target/aarch64/sve2/acle/asm/uzpq2_s64.c: Likewise.
* gcc.target/aarch64/sve2/acle/asm/uzpq2_s8.c: Likewise.
* gcc.target/aarch64/sve2/acle/asm/uzpq2_u16.c: Likewise.
* gcc.target/aarch64/sve2/acle/asm/uzpq2_u32.c: Likewise.
* gcc.target/aarch64/sve2/acle/asm/uzpq2_u64.c: Likewise.
* gcc.target/aarch64/sve2/acle/asm/uzpq2_u8.c: Likewise.
* gcc.target/aarch64/sve2/acle/asm/zipq1_bf16.c: Likewise.
* gcc.target/aarch64/sve2/acle/asm/zipq1_f16.c: Likewise.
* gcc.target/aarch64/sve2/acle/asm/zipq1_f32.c: Likewise.
* gcc.target/aarch64/sve2/acle/asm/zipq1_f64.c: Likewise.
* gcc.target/aarch64/sve2/acle/asm/zipq1_s16.c: Likewise.
* gcc.target/aarch64/sve2/acle/asm/zipq1_s32.c: Likewise.
* gcc.target/aarch64/sve2/acle/asm/zipq1_s64.c: Likewise.
* gcc.target/aarch64/sve2/acle/asm/zipq1_s8.c: Likewise.
* gcc.target/aarch64/sve2/acle/asm/zipq1_u16.c: Likewise.
* gcc.target/aarch64/sve2/acle/asm/zipq1_u32.c: Likewise.
* gcc.target/aarch64/sve2/acle/asm/zipq1_u64.c: Likewise.
* gcc.target/aarch64/sve2/acle/asm/zipq1_u8.c: Likewise.
* gcc.target/aarch64/sve2/acle/asm/zipq2_bf16.c: Likewise.
* gcc.target/aarch64/sve2/acle/asm/zipq2_f16.c: Likewise.
* gcc.target/aarch64/sve2/acle/asm/zipq2_f32.c: Likewise.
* gcc.target/aarch64/sve2/acle/asm/zipq2_f64.c: Likewise.
* gcc.target/aarch64/sve2/acle/asm/zipq2_s16.c: Likewise.
* gcc.target/aarch64/sve2/acle/asm/zipq2_s32.c: Likewise.
* gcc.target/aarch64/sve2/acle/asm/zipq2_s64.c: Likewise.
* gcc.target/aarch64/sve2/acle/asm/zipq2_s8.c: Likewise.
* gcc.target/aarch64/sve2/acle/asm/zipq2_u16.c: Likewise.
* gcc.target/aarch64/sve2/acle/asm/zipq2_u32.c: Likewise.
* gcc.target/aarch64/sve2/acle/asm/zipq2_u64.c: Likewise.
* gcc.target/aarch64/sve2/acle/asm/zipq2_u8.c: Likewise.
* gcc.target/aarch64/sve2/dupq_1.c: Likewise.
* gcc.target/aarch64/sve2/extq_1.c: Likewise.
* gcc.target/aarch64/sve2/uzpq_1.c: Likewise.
* gcc.target/aarch64/sve2/zipq_1.c: Likewise.
|
|
This patch handles the SVE2p1 instructions that are shared
with SME2. This includes the consecutive-register forms of
the 2-register and 4-register loads and stores, but not the
strided-register forms.
gcc/
* config/aarch64/aarch64.h (TARGET_SVE2p1_OR_SME2): New macro.
* config/aarch64/aarch64-early-ra.cc
(is_stride_candidate): Require TARGET_STREAMING_SME2
(early_ra::maybe_convert_to_strided_access): Likewise.
* config/aarch64/aarch64-sve-builtins-sve2.def: Mark instructions
that are common to both SVE2p1 and SME2.
* config/aarch64/aarch64-sve.md
(@aarch64_<sur>dot_prod_lane<SVE_FULL_SDI:mode><SVE_FULL_BHI:mode>):
Test TARGET_SVE2p1_OR_SME2 instead of TARGET_STREAMING_SME2.
(@aarch64_sve_<sve_fp_op>vnx4sf): Move TARGET_SVE_BF16 condition
into SVE_BFLOAT_TERNARY_LONG.
(@aarch64_sve_<sve_fp_op>_lanevnx4sf): Likewise
SVE_BFLOAT_TERNARY_LONG_LANE.
* config/aarch64/aarch64-sve2.md
(@aarch64_<LD1_COUNT:optab><mode>): Require TARGET_SVE2p1_OR_SME2
instead of TARGET_STREAMING_SME2.
(@aarch64_<ST1_COUNT:optab><mode>): Likewise.
(@aarch64_sve_ptrue_c<BHSD_BITS>): Likewise.
(@aarch64_sve_pext<BHSD_BITS>): Likewise.
(@aarch64_sve_pext<BHSD_BITS>x2): Likewise.
(@aarch64_sve_cntp_c<BHSD_BITS>): Likewise.
(@aarch64_sve_fclamp<mode>): Likewise.
(*aarch64_sve_fclamp<mode>_x): Likewise.
(<sur>dot_prodvnx4sivnx8hi): Likewise.
(aarch64_sve_fdotvnx4sfvnx8hf): Likewise.
(aarch64_fdot_prod_lanevnx4sfvnx8hf): Likewise.
(@aarch64_sve_while<while_optab_cmp>_b<BHSD_BITS>_x2): Likewise.
(@aarch64_sve_while<while_optab_cmp>_c<BHSD_BITS>): Likewise.
(@aarch64_sve_<optab><VNx8HI_ONLY:mode><VNx8SI_ONLY:mode>): Move
TARGET_STREAMING_SME2 condition into SVE_QCVTxN.
(@aarch64_sve_<sve_int_op><mode>): Likewise
SVE2_INT_SHIFT_IMM_NARROWxN, but also require TARGET_STREAMING_SME2
for the 4-register forms.
* config/aarch64/iterators.md (SVE_BFLOAT_TERNARY_LONG): Require
TARGET_SVE2p1_OR_SME2 rather than TARGET_STREAMING_SME2 for
UNSPEC_BFMLSLB and UNSPEC_BFMLSLT. Require TARGET_SVE_BF16
for the others.
(SVE_BFLOAT_TERNARY_LONG_LANE): Likewise.
(SVE2_INT_SHIFT_IMM_NARROWxN): Require TARGET_SVE2p1_OR_SME2 for
the interleaving forms and TARGET_STREAMING_SME2 for the rest.
(SVE_QCVTxN): Likewise.
gcc/testsuite/
* gcc.target/aarch64/sve/clamp_3.c: New test.
* gcc.target/aarch64/sve/clamp_4.c: Likewise.
* gcc.target/aarch64/sve2/acle/asm/bfmlslb_f32.c: Likewise.
* gcc.target/aarch64/sve2/acle/asm/bfmlslb_lane_f32.c: Likewise.
* gcc.target/aarch64/sve2/acle/asm/bfmlslt_f32.c: Likewise.
* gcc.target/aarch64/sve2/acle/asm/bfmlslt_lane_f32.c: Likewise.
* gcc.target/aarch64/sve2/acle/asm/clamp_f16.c: Likewise.
* gcc.target/aarch64/sve2/acle/asm/clamp_f32.c: Likewise.
* gcc.target/aarch64/sve2/acle/asm/clamp_f64.c: Likewise.
* gcc.target/aarch64/sve2/acle/asm/cntp_c16.c: Likewise.
* gcc.target/aarch64/sve2/acle/asm/cntp_c32.c: Likewise.
* gcc.target/aarch64/sve2/acle/asm/cntp_c64.c: Likewise.
* gcc.target/aarch64/sve2/acle/asm/cntp_c8.c: Likewise.
* gcc.target/aarch64/sve2/acle/asm/dot_f32.c: Likewise.
* gcc.target/aarch64/sve2/acle/asm/dot_lane_f32.c: Likewise.
* gcc.target/aarch64/sve2/acle/asm/dot_lane_s32.c: Likewise.
* gcc.target/aarch64/sve2/acle/asm/dot_lane_u32.c: Likewise.
* gcc.target/aarch64/sve2/acle/asm/dot_s32.c: Likewise.
* gcc.target/aarch64/sve2/acle/asm/dot_u32.c: Likewise.
* gcc.target/aarch64/sve2/acle/asm/ld1_bf16_x2.c: Likewise.
* gcc.target/aarch64/sve2/acle/asm/ld1_bf16_x4.c: Likewise.
* gcc.target/aarch64/sve2/acle/asm/ld1_f16_x2.c: Likewise.
* gcc.target/aarch64/sve2/acle/asm/ld1_f16_x4.c: Likewise.
* gcc.target/aarch64/sve2/acle/asm/ld1_f32_x2.c: Likewise.
* gcc.target/aarch64/sve2/acle/asm/ld1_f32_x4.c: Likewise.
* gcc.target/aarch64/sve2/acle/asm/ld1_f64_x2.c: Likewise.
* gcc.target/aarch64/sve2/acle/asm/ld1_f64_x4.c: Likewise.
* gcc.target/aarch64/sve2/acle/asm/ld1_s16_x2.c: Likewise.
* gcc.target/aarch64/sve2/acle/asm/ld1_s16_x4.c: Likewise.
* gcc.target/aarch64/sve2/acle/asm/ld1_s32_x2.c: Likewise.
* gcc.target/aarch64/sve2/acle/asm/ld1_s32_x4.c: Likewise.
* gcc.target/aarch64/sve2/acle/asm/ld1_s64_x2.c: Likewise.
* gcc.target/aarch64/sve2/acle/asm/ld1_s64_x4.c: Likewise.
* gcc.target/aarch64/sve2/acle/asm/ld1_s8_x2.c: Likewise.
* gcc.target/aarch64/sve2/acle/asm/ld1_s8_x4.c: Likewise.
* gcc.target/aarch64/sve2/acle/asm/ld1_u16_x2.c: Likewise.
* gcc.target/aarch64/sve2/acle/asm/ld1_u16_x4.c: Likewise.
* gcc.target/aarch64/sve2/acle/asm/ld1_u32_x2.c: Likewise.
* gcc.target/aarch64/sve2/acle/asm/ld1_u32_x4.c: Likewise.
* gcc.target/aarch64/sve2/acle/asm/ld1_u64_x2.c: Likewise.
* gcc.target/aarch64/sve2/acle/asm/ld1_u64_x4.c: Likewise.
* gcc.target/aarch64/sve2/acle/asm/ld1_u8_x2.c: Likewise.
* gcc.target/aarch64/sve2/acle/asm/ld1_u8_x4.c: Likewise.
* gcc.target/aarch64/sve2/acle/asm/ldnt1_bf16_x2.c: Likewise.
* gcc.target/aarch64/sve2/acle/asm/ldnt1_bf16_x4.c: Likewise.
* gcc.target/aarch64/sve2/acle/asm/ldnt1_f16_x2.c: Likewise.
* gcc.target/aarch64/sve2/acle/asm/ldnt1_f16_x4.c: Likewise.
* gcc.target/aarch64/sve2/acle/asm/ldnt1_f32_x2.c: Likewise.
* gcc.target/aarch64/sve2/acle/asm/ldnt1_f32_x4.c: Likewise.
* gcc.target/aarch64/sve2/acle/asm/ldnt1_f64_x2.c: Likewise.
* gcc.target/aarch64/sve2/acle/asm/ldnt1_f64_x4.c: Likewise.
* gcc.target/aarch64/sve2/acle/asm/ldnt1_s16_x2.c: Likewise.
* gcc.target/aarch64/sve2/acle/asm/ldnt1_s16_x4.c: Likewise.
* gcc.target/aarch64/sve2/acle/asm/ldnt1_s32_x2.c: Likewise.
* gcc.target/aarch64/sve2/acle/asm/ldnt1_s32_x4.c: Likewise.
* gcc.target/aarch64/sve2/acle/asm/ldnt1_s64_x2.c: Likewise.
* gcc.target/aarch64/sve2/acle/asm/ldnt1_s64_x4.c: Likewise.
* gcc.target/aarch64/sve2/acle/asm/ldnt1_s8_x2.c: Likewise.
* gcc.target/aarch64/sve2/acle/asm/ldnt1_s8_x4.c: Likewise.
* gcc.target/aarch64/sve2/acle/asm/ldnt1_u16_x2.c: Likewise.
* gcc.target/aarch64/sve2/acle/asm/ldnt1_u16_x4.c: Likewise.
* gcc.target/aarch64/sve2/acle/asm/ldnt1_u32_x2.c: Likewise.
* gcc.target/aarch64/sve2/acle/asm/ldnt1_u32_x4.c: Likewise.
* gcc.target/aarch64/sve2/acle/asm/ldnt1_u64_x2.c: Likewise.
* gcc.target/aarch64/sve2/acle/asm/ldnt1_u64_x4.c: Likewise.
* gcc.target/aarch64/sve2/acle/asm/ldnt1_u8_x2.c: Likewise.
* gcc.target/aarch64/sve2/acle/asm/ldnt1_u8_x4.c: Likewise.
* gcc.target/aarch64/sve2/acle/asm/pext_lane_c16.c: Likewise.
* gcc.target/aarch64/sve2/acle/asm/pext_lane_c16_x2.c: Likewise.
* gcc.target/aarch64/sve2/acle/asm/pext_lane_c32.c: Likewise.
* gcc.target/aarch64/sve2/acle/asm/pext_lane_c32_x2.c: Likewise.
* gcc.target/aarch64/sve2/acle/asm/pext_lane_c64.c: Likewise.
* gcc.target/aarch64/sve2/acle/asm/pext_lane_c64_x2.c: Likewise.
* gcc.target/aarch64/sve2/acle/asm/pext_lane_c8.c: Likewise.
* gcc.target/aarch64/sve2/acle/asm/pext_lane_c8_x2.c: Likewise.
* gcc.target/aarch64/sve2/acle/asm/ptrue_c16.c: Likewise.
* gcc.target/aarch64/sve2/acle/asm/ptrue_c32.c: Likewise.
* gcc.target/aarch64/sve2/acle/asm/ptrue_c64.c: Likewise.
* gcc.target/aarch64/sve2/acle/asm/ptrue_c8.c: Likewise.
* gcc.target/aarch64/sve2/acle/asm/qcvtn_s16_s32_x2.c: Likewise.
* gcc.target/aarch64/sve2/acle/asm/qcvtn_u16_s32_x2.c: Likewise.
* gcc.target/aarch64/sve2/acle/asm/qcvtn_u16_u32_x2.c: Likewise.
* gcc.target/aarch64/sve2/acle/asm/qrshrn_s16_x2.c: Likewise.
* gcc.target/aarch64/sve2/acle/asm/qrshrn_u16_x2.c: Likewise.
* gcc.target/aarch64/sve2/acle/asm/qrshrun_u16_x2.c: Likewise.
* gcc.target/aarch64/sve2/acle/asm/st1_bf16_x2.c: Likewise.
* gcc.target/aarch64/sve2/acle/asm/st1_bf16_x4.c: Likewise.
* gcc.target/aarch64/sve2/acle/asm/st1_f16_x2.c: Likewise.
* gcc.target/aarch64/sve2/acle/asm/st1_f16_x4.c: Likewise.
* gcc.target/aarch64/sve2/acle/asm/st1_f32_x2.c: Likewise.
* gcc.target/aarch64/sve2/acle/asm/st1_f32_x4.c: Likewise.
* gcc.target/aarch64/sve2/acle/asm/st1_f64_x2.c: Likewise.
* gcc.target/aarch64/sve2/acle/asm/st1_f64_x4.c: Likewise.
* gcc.target/aarch64/sve2/acle/asm/st1_s16_x2.c: Likewise.
* gcc.target/aarch64/sve2/acle/asm/st1_s16_x4.c: Likewise.
* gcc.target/aarch64/sve2/acle/asm/st1_s32_x2.c: Likewise.
* gcc.target/aarch64/sve2/acle/asm/st1_s32_x4.c: Likewise.
* gcc.target/aarch64/sve2/acle/asm/st1_s64_x2.c: Likewise.
* gcc.target/aarch64/sve2/acle/asm/st1_s64_x4.c: Likewise.
* gcc.target/aarch64/sve2/acle/asm/st1_s8_x2.c: Likewise.
* gcc.target/aarch64/sve2/acle/asm/st1_s8_x4.c: Likewise.
* gcc.target/aarch64/sve2/acle/asm/st1_u16_x2.c: Likewise.
* gcc.target/aarch64/sve2/acle/asm/st1_u16_x4.c: Likewise.
* gcc.target/aarch64/sve2/acle/asm/st1_u32_x2.c: Likewise.
* gcc.target/aarch64/sve2/acle/asm/st1_u32_x4.c: Likewise.
* gcc.target/aarch64/sve2/acle/asm/st1_u64_x2.c: Likewise.
* gcc.target/aarch64/sve2/acle/asm/st1_u64_x4.c: Likewise.
* gcc.target/aarch64/sve2/acle/asm/st1_u8_x2.c: Likewise.
* gcc.target/aarch64/sve2/acle/asm/st1_u8_x4.c: Likewise.
* gcc.target/aarch64/sve2/acle/asm/stnt1_bf16_x2.c: Likewise.
* gcc.target/aarch64/sve2/acle/asm/stnt1_bf16_x4.c: Likewise.
* gcc.target/aarch64/sve2/acle/asm/stnt1_f16_x2.c: Likewise.
* gcc.target/aarch64/sve2/acle/asm/stnt1_f16_x4.c: Likewise.
* gcc.target/aarch64/sve2/acle/asm/stnt1_f32_x2.c: Likewise.
* gcc.target/aarch64/sve2/acle/asm/stnt1_f32_x4.c: Likewise.
* gcc.target/aarch64/sve2/acle/asm/stnt1_f64_x2.c: Likewise.
* gcc.target/aarch64/sve2/acle/asm/stnt1_f64_x4.c: Likewise.
* gcc.target/aarch64/sve2/acle/asm/stnt1_s16_x2.c: Likewise.
* gcc.target/aarch64/sve2/acle/asm/stnt1_s16_x4.c: Likewise.
* gcc.target/aarch64/sve2/acle/asm/stnt1_s32_x2.c: Likewise.
* gcc.target/aarch64/sve2/acle/asm/stnt1_s32_x4.c: Likewise.
* gcc.target/aarch64/sve2/acle/asm/stnt1_s64_x2.c: Likewise.
* gcc.target/aarch64/sve2/acle/asm/stnt1_s64_x4.c: Likewise.
* gcc.target/aarch64/sve2/acle/asm/stnt1_s8_x2.c: Likewise.
* gcc.target/aarch64/sve2/acle/asm/stnt1_s8_x4.c: Likewise.
* gcc.target/aarch64/sve2/acle/asm/stnt1_u16_x2.c: Likewise.
* gcc.target/aarch64/sve2/acle/asm/stnt1_u16_x4.c: Likewise.
* gcc.target/aarch64/sve2/acle/asm/stnt1_u32_x2.c: Likewise.
* gcc.target/aarch64/sve2/acle/asm/stnt1_u32_x4.c: Likewise.
* gcc.target/aarch64/sve2/acle/asm/stnt1_u64_x2.c: Likewise.
* gcc.target/aarch64/sve2/acle/asm/stnt1_u64_x4.c: Likewise.
* gcc.target/aarch64/sve2/acle/asm/stnt1_u8_x2.c: Likewise.
* gcc.target/aarch64/sve2/acle/asm/stnt1_u8_x4.c: Likewise.
* gcc.target/aarch64/sve2/acle/asm/whilege_b16_x2.c: Likewise.
* gcc.target/aarch64/sve2/acle/asm/whilege_b32_x2.c: Likewise.
* gcc.target/aarch64/sve2/acle/asm/whilege_b64_x2.c: Likewise.
* gcc.target/aarch64/sve2/acle/asm/whilege_b8_x2.c: Likewise.
* gcc.target/aarch64/sve2/acle/asm/whilege_c16.c: Likewise.
* gcc.target/aarch64/sve2/acle/asm/whilege_c32.c: Likewise.
* gcc.target/aarch64/sve2/acle/asm/whilege_c64.c: Likewise.
* gcc.target/aarch64/sve2/acle/asm/whilege_c8.c: Likewise.
* gcc.target/aarch64/sve2/acle/asm/whilegt_b16_x2.c: Likewise.
* gcc.target/aarch64/sve2/acle/asm/whilegt_b32_x2.c: Likewise.
* gcc.target/aarch64/sve2/acle/asm/whilegt_b64_x2.c: Likewise.
* gcc.target/aarch64/sve2/acle/asm/whilegt_b8_x2.c: Likewise.
* gcc.target/aarch64/sve2/acle/asm/whilegt_c16.c: Likewise.
* gcc.target/aarch64/sve2/acle/asm/whilegt_c32.c: Likewise.
* gcc.target/aarch64/sve2/acle/asm/whilegt_c64.c: Likewise.
* gcc.target/aarch64/sve2/acle/asm/whilegt_c8.c: Likewise.
* gcc.target/aarch64/sve2/acle/asm/whilele_b16_x2.c: Likewise.
* gcc.target/aarch64/sve2/acle/asm/whilele_b32_x2.c: Likewise.
* gcc.target/aarch64/sve2/acle/asm/whilele_b64_x2.c: Likewise.
* gcc.target/aarch64/sve2/acle/asm/whilele_b8_x2.c: Likewise.
* gcc.target/aarch64/sve2/acle/asm/whilele_c16.c: Likewise.
* gcc.target/aarch64/sve2/acle/asm/whilele_c32.c: Likewise.
* gcc.target/aarch64/sve2/acle/asm/whilele_c64.c: Likewise.
* gcc.target/aarch64/sve2/acle/asm/whilele_c8.c: Likewise.
* gcc.target/aarch64/sve2/acle/asm/whilelt_b16_x2.c: Likewise.
* gcc.target/aarch64/sve2/acle/asm/whilelt_b32_x2.c: Likewise.
* gcc.target/aarch64/sve2/acle/asm/whilelt_b64_x2.c: Likewise.
* gcc.target/aarch64/sve2/acle/asm/whilelt_b8_x2.c: Likewise.
* gcc.target/aarch64/sve2/acle/asm/whilelt_c16.c: Likewise.
* gcc.target/aarch64/sve2/acle/asm/whilelt_c32.c: Likewise.
* gcc.target/aarch64/sve2/acle/asm/whilelt_c64.c: Likewise.
* gcc.target/aarch64/sve2/acle/asm/whilelt_c8.c: Likewise.
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|
Some instructions that were previously restricted to streaming mode
can also be used in non-streaming mode with SVE2.1. This patch adds
support for those, as well as the usual new-extension boilerplate.
A later patch will add the feature macro.
gcc/
* config/aarch64/aarch64-option-extensions.def (sve2p1): New extension.
* doc/invoke.texi (sve2p1): Document it.
* config/aarch64/aarch64-sve-builtins-sve2.def: Mark instructions
that are common to both SVE2p1 and SME.
* config/aarch64/aarch64.h (TARGET_SVE2p1): New macro.
(TARGET_SVE2p1_OR_SME): Likewise.
* config/aarch64/aarch64-sve2.md
(@aarch64_sve_psel<BHSD_BITS>): Require TARGET_SVE2p1_OR_SME
instead of TARGET_STREAMING.
(*aarch64_sve_psel<BHSD_BITS>_plus): Likewise.
(@aarch64_sve_<su>clamp<mode>): Likewise.
(*aarch64_sve_<su>clamp<mode>_x): Likewise.
(@aarch64_pred_<optab><mode>): Likewise.
(@cond_<optab><mode>): Likewise.
gcc/testsuite/
* lib/target-supports.exp
(check_effective_target_aarch64_asm_sve2p1_ok): New procedure.
* gcc.target/aarch64/sve/clamp_1.c: New test.
* gcc.target/aarch64/sve/clamp_2.c: Likewise.
* gcc.target/aarch64/sve2/acle/asm/clamp_s16.c: Likewise.
* gcc.target/aarch64/sve2/acle/asm/clamp_s32.c: Likewise.
* gcc.target/aarch64/sve2/acle/asm/clamp_s64.c: Likewise.
* gcc.target/aarch64/sve2/acle/asm/clamp_s8.c: Likewise.
* gcc.target/aarch64/sve2/acle/asm/clamp_u16.c: Likewise.
* gcc.target/aarch64/sve2/acle/asm/clamp_u32.c: Likewise.
* gcc.target/aarch64/sve2/acle/asm/clamp_u64.c: Likewise.
* gcc.target/aarch64/sve2/acle/asm/clamp_u8.c: Likewise.
* gcc.target/aarch64/sve2/acle/asm/psel_lane_b16.c: Likewise.
* gcc.target/aarch64/sve2/acle/asm/psel_lane_b32.c: Likewise.
* gcc.target/aarch64/sve2/acle/asm/psel_lane_b64.c: Likewise.
* gcc.target/aarch64/sve2/acle/asm/psel_lane_b8.c: Likewise.
* gcc.target/aarch64/sve2/acle/asm/psel_lane_c16.c: Likewise.
* gcc.target/aarch64/sve2/acle/asm/psel_lane_c32.c: Likewise.
* gcc.target/aarch64/sve2/acle/asm/psel_lane_c64.c: Likewise.
* gcc.target/aarch64/sve2/acle/asm/psel_lane_c8.c: Likewise.
* gcc.target/aarch64/sve2/acle/asm/revd_bf16.c: Likewise.
* gcc.target/aarch64/sve2/acle/asm/revd_f16.c: Likewise.
* gcc.target/aarch64/sve2/acle/asm/revd_f32.c: Likewise.
* gcc.target/aarch64/sve2/acle/asm/revd_f64.c: Likewise.
* gcc.target/aarch64/sve2/acle/asm/revd_s16.c: Likewise.
* gcc.target/aarch64/sve2/acle/asm/revd_s32.c: Likewise.
* gcc.target/aarch64/sve2/acle/asm/revd_s64.c: Likewise.
* gcc.target/aarch64/sve2/acle/asm/revd_s8.c: Likewise.
* gcc.target/aarch64/sve2/acle/asm/revd_u16.c: Likewise.
* gcc.target/aarch64/sve2/acle/asm/revd_u32.c: Likewise.
* gcc.target/aarch64/sve2/acle/asm/revd_u64.c: Likewise.
* gcc.target/aarch64/sve2/acle/asm/revd_u8.c: Likewise.
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|
This patch moves the scalar and single-vector Advanced SIMD types
from arm_neon.h into a private header, so that they can be defined
by arm_sve.h as well. This is needed for the upcoming SVE2.1
hybrid-VLA reductions, which return 128-bit Advanced SIMD vectors.
The approach follows Claudio's patch for FP8.
gcc/
* config.gcc (extra_headers): Add arm_private_neon_types.h.
* config/aarch64/arm_private_neon_types.h: New file, split out
from...
* config/aarch64/arm_neon.h: ...here.
* config/aarch64/arm_sve.h: Include arm_private_neon_types.h
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|
This patch adds an svboolx4_t type, to go alongside the existing
svboolx2_t type. It doesn't require any special ISA support beyond
SVE itself and it currently has no associated instructions.
gcc/
* config/aarch64/aarch64-modes.def (VNx64BI): New mode.
* config/aarch64/aarch64-protos.h
(aarch64_split_double_move): Generalize to...
(aarch64_split_move): ...this.
* config/aarch64/aarch64-sve-builtins-base.def (svcreate4, svget4)
(svset4, svundef4): Add bool variants.
* config/aarch64/aarch64-sve-builtins.cc (handle_arm_sve_h): Add
svboolx4_t.
* config/aarch64/iterators.md (SVE_STRUCT_BI): New mode iterator.
* config/aarch64/aarch64-sve.md (movvnx32bi): Generalize to...
(mov<SVE_STRUCT_BI:mode>): ...this.
* config/aarch64/aarch64.cc
(pure_scalable_type_info::piece::get_rtx): Allow num_prs to be 4.
(aarch64_classify_vector_mode): Handle VNx64BI.
(aarch64_hard_regno_nregs): Likewise.
(aarch64_class_max_nregs): Likewise.
(aarch64_array_mode): Use VNx64BI for arrays of 4 svbool_ts.
(aarch64_split_double_move): Generalize to...
(aarch64_split_move): ...this.
(aarch64_split_128bit_move): Update call accordingly.
gcc/testsuite/
* gcc.target/aarch64/sve/acle/general-c/create_5.c: Expect svcreate4
to succeed for svbool_ts.
* gcc.target/aarch64/sve/acle/asm/test_sve_acle.h
(TEST_UNDEF_B): New macro.
* gcc.target/aarch64/sve/acle/asm/create4_1.c: Test _b form.
* gcc.target/aarch64/sve/acle/asm/undef2_1.c: Likewise.
* gcc.target/aarch64/sve/acle/asm/undef4_1.c: Likewise.
* gcc.target/aarch64/sve/acle/asm/get4_b.c: New test.
* gcc.target/aarch64/sve/acle/asm/set4_b.c: Likewise.
* gcc.target/aarch64/sve/acle/general-c/svboolx4_1.c: Likewise.
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|
gcc/
* config/aarch64/aarch64-sve-builtins-sve2.def: Sort entries
alphabetically.
* config/aarch64/aarch64-sve-builtins-sve2.h: Likewise.
* config/aarch64/aarch64-sve-builtins-sve2.cc: Likewise.
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|
This patch factors out some of ext_def into a base class,
so that it can be reused for the SVE2.1 svextq intrinsic.
gcc/
* config/aarch64/aarch64-sve-builtins-shapes.cc (ext_base): New base
class, extracted from...
(ext_def): ...here.
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|
All extending gather load intrinsics encode the source type in
their name (e.g. svld1sb for an extending load from signed bytes).
The type of the extension result has to be specified using an
explicit type suffix; it isn't something that can be inferred
from the arguments, since there are multiple valid choices for
the same arguments.
This meant that type inference for gather loads was only needed for
non-extending loads, in which case the pointer target had to be a
32-bit or 64-bit element type. The gather_scatter_p argument to
function_resolver::infer_pointer_type therefore controlled two things:
how we should react to vector base addresses, and whether we should
require a minimum element size of 32.
The element size restriction doesn't apply to the upcomding SVE2.1
svld1q intrinsic, so this patch adds a separate argument for the minimum
element size requirement.
gcc/
* config/aarch64/aarch64-sve-builtins.h
(function_resolver::target_type_restrictions): New enum.
(function_resolver::infer_pointer_type): Add an extra argument
that specifies what the target type can be.
* config/aarch64/aarch64-sve-builtins.cc
(function_resolver::infer_pointer_type): Likewise.
* config/aarch64/aarch64-sve-builtins-shapes.cc
(load_gather_sv_base::get_target_type_restrictions): New virtual
member function.
(load_gather_sv_base::resolve): Use it. Update call to
infer_pointer_type.
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|
Until now, all data arguments to a scatter store needed to have
32-bit or 64-bit elements. This isn't true for the upcoming SVE2.1
svst1q scatter intrinsic, so this patch adds an abstraction around the
restriction.
gcc/
* config/aarch64/aarch64-sve-builtins-shapes.cc
(store_scatter_base::infer_vector_type): New virtual member function.
(store_scatter_base::resolve): Use it.
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|
In the upcoming SVE2.1 svld1q and svst1q intrinsics, the relationship
between the base vector and the data vector differs from existing
gather/scatter intrinsics. This patch adds a new abstraction to
handle the difference.
gcc/
* config/aarch64/aarch64-sve-builtins.h
(function_shape::vector_base_type): New member function.
* config/aarch64/aarch64-sve-builtins.cc
(function_shape::vector_base_type): Likewise.
(function_resolver::resolve_sv_displacement): Use it.
(function_resolver::resolve_gather_address): Likewise.
|
|
GCC previously used the older assembly syntax for SVE TBL, with no
braces around the second operand. This patch switches to the newer,
official syntax, with braces around the operand.
The initial SVE binutils submission supported both syntaxes, so there
should be no issues with backwards compatibility.
gcc/
* config/aarch64/aarch64-sve.md (@aarch64_sve_tbl<mode>): Wrap
the second operand in braces.
gcc/testsuite/
* gcc.target/aarch64/sve/acle/asm/dup_lane_bf16.c: Wrap the second
TBL operand in braces
* gcc.target/aarch64/sve/acle/asm/dup_lane_f16.c: Likewise.
* gcc.target/aarch64/sve/acle/asm/dup_lane_f32.c: Likewise.
* gcc.target/aarch64/sve/acle/asm/dup_lane_f64.c: Likewise.
* gcc.target/aarch64/sve/acle/asm/dup_lane_s16.c: Likewise.
* gcc.target/aarch64/sve/acle/asm/dup_lane_s32.c: Likewise.
* gcc.target/aarch64/sve/acle/asm/dup_lane_s64.c: Likewise.
* gcc.target/aarch64/sve/acle/asm/dup_lane_s8.c: Likewise.
* gcc.target/aarch64/sve/acle/asm/dup_lane_u16.c: Likewise.
* gcc.target/aarch64/sve/acle/asm/dup_lane_u32.c: Likewise.
* gcc.target/aarch64/sve/acle/asm/dup_lane_u64.c: Likewise.
* gcc.target/aarch64/sve/acle/asm/dup_lane_u8.c: Likewise.
* gcc.target/aarch64/sve/acle/asm/tbl_bf16.c: Likewise.
* gcc.target/aarch64/sve/acle/asm/tbl_f16.c: Likewise.
* gcc.target/aarch64/sve/acle/asm/tbl_f32.c: Likewise.
* gcc.target/aarch64/sve/acle/asm/tbl_f64.c: Likewise.
* gcc.target/aarch64/sve/acle/asm/tbl_s16.c: Likewise.
* gcc.target/aarch64/sve/acle/asm/tbl_s32.c: Likewise.
* gcc.target/aarch64/sve/acle/asm/tbl_s64.c: Likewise.
* gcc.target/aarch64/sve/acle/asm/tbl_s8.c: Likewise.
* gcc.target/aarch64/sve/acle/asm/tbl_u16.c: Likewise.
* gcc.target/aarch64/sve/acle/asm/tbl_u32.c: Likewise.
* gcc.target/aarch64/sve/acle/asm/tbl_u64.c: Likewise.
* gcc.target/aarch64/sve/acle/asm/tbl_u8.c: Likewise.
* gcc.target/aarch64/sve/slp_perm_6.c: Likewise.
* gcc.target/aarch64/sve/slp_perm_7.c: Likewise.
* gcc.target/aarch64/sve/vec_perm_1.c: Likewise.
* gcc.target/aarch64/sve/vec_perm_const_1.c: Likewise.
* gcc.target/aarch64/sve/vec_perm_const_1_overrun.c: Likewise.
* gcc.target/aarch64/sve/vec_perm_const_single_1.c: Likewise.
* gcc.target/aarch64/sve/vec_perm_single_1.c: Likewise.
* gcc.target/aarch64/sve/uzp1_1.c: Shorten the scan-assembler-nots
to just "\ttbl\".
* gcc.target/aarch64/sve/uzp2_1.c: Likewise.
|
|
Past extensions to SVE have required new subsets of all_data; the
SVE2.1 patches will add another. This patch tries to make this more
scalable by defining the multi-size *_data macros to be unions of
single-size *_data macros.
gcc/
* config/aarch64/aarch64-sve-builtins.cc (TYPES_all_data): Redefine
in terms of single-size *_data definitions.
(TYPES_bhs_data, TYPES_hs_data, TYPES_sd_data): Likewise.
(TYPES_b_data, TYPES_h_data, TYPES_s_data): New macros.
|
|
g:ede97598e2c recorded separate ISA requirements for streaming
and non-streaming mode. The premise there was that AARCH64_FL_SME
should not be included in the streaming mode requirements, since:
(a) an __arm_streaming_compatible function wouldn't be in streaming
mode if SME wasn't available.
(b) __arm_streaming_compatible functions only allow things that are
possible in non-streaming mode, so the non-streaming architecture
is enough to assemble the code, even if +sme isn't enabled.
(c) we reject __arm_streaming if +sme isn't enabled, so don't need
to test it for individual intrinsics as well.
Later patches lean into this further.
This patch applies the same reasoning to the .md constructs for
base streaming-only SME instructions, guarding them with
TARGET_STREAMING rather than TARGET_STREAMING_SME.
gcc/
* config/aarch64/aarch64.h (TARGET_SME): Expand comment.
(TARGET_STREAMING_SME): Delete.
* config/aarch64/aarch64-sme.md: Use TARGET_STREAMING instead of
TARGET_STREAMING_SME.
* config/aarch64/aarch64-sve2.md: Likewise.
|
|
Some code was checking TARGET_STREAMING and TARGET_SME2 separately,
but we now have a macro to test both at once.
gcc/
* config/aarch64/aarch64-sme.md: Use TARGET_STREAMING_SME2
instead of separate TARGET_STREAMING and TARGET_SME2 tests.
* config/aarch64/aarch64-sve2.md: Likewise.
* config/aarch64/iterators.md: Likewise.
|
|
For the aarch64 simd clones patches, it would be useful to be able to
push a function declaration onto the cfun stack, even though it has no
function body associated with it. That is, we want cfun to be null,
current_function_decl to be the decl itself, and the target and
optimisation flags to reflect the declaration.
This patch adds a push/pop_function_decl pair to do that.
I think the more direct way of doing what I want to do under the
existing interface would have been:
push_cfun (nullptr);
invoke_set_current_function_hook (fndecl);
pop_cfun ();
where invoke_set_current_function_hook would need to become public.
But it seemed safer to use the higher-level routines, since it makes
sure that the target/optimisation changes are synchronised with the
function changes. In particular, if cfun was null before the
sequence above, the pop_cfun would leave the flags unchanged,
rather than restore them to the state before the push_cfun.
gcc/
* function.h (push_function_decl, pop_function_decl): Declare.
* function.cc (set_function_decl): New function, extracted from...
(set_cfun): ...here.
(push_function_decl): New function, extracted from...
(push_cfun): ...here.
(pop_cfun_1): New function, extracted from...
(pop_cfun): ...here.
(pop_function_decl): New function.
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2024-11-10 Paul Thomas <pault@gcc.gnu.org>
gcc/fortran
PR fortran/109345
* trans-array.cc (gfc_get_array_span): Unlimited polymorphic
expressions are now treated separately since the span need not
be the same as the element size.
gcc/testsuite/
PR fortran/109345
* gfortran.dg/character_workout_1.f90: Cut trailing whitespace.
* gfortran.dg/pr109345.f90: New test.
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For the loop in the testcase we currently fail to hoist the guard
check of the inner loop (m > 0) out of the outer loop because
find_loop_guard checks all blocks of the outer loop for side-effects,
including those that are skipped by the guard. This usually
is harmless as the guard does not skip any blocks in the outer loop
but in this case store-motion was applied to the inner loop and thus
there's now a skipped store in the outer loop.
The following properly skips blocks that are dominated by the
entry to the skipped region.
PR tree-optimization/117510
* tree-ssa-loop-unswitch.cc (find_loop_guard): Only check
not skipped blocks for side-effects.
* gcc.dg/vect/vect-outer-pr117510.c: New testcase.
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This patch improves the parameter declaration by saving all parameter
kinds: proper procedure, definition module procedure and forward
procedures. This allows error messages to reference any parameter
in the three kinds of procedures. Variables and their declaration
are also stored. The expression, assignment and parameter checking
has been improved to highlight any variable or parameter and
its declaration causing a conflict.
gcc/m2/ChangeLog:
* gm2-compiler/M2Base.def (MixTypes): Rename parameters.
(MixTypesDecl): New procedure function.
* gm2-compiler/M2Base.mod (BuildOrdFunctions): Add
DefProcedure parameter to PutFunction.
(BuildTruncFunctions): Ditto.
(BuildFloatFunctions): Ditto.
(BuildIntFunctions): Ditto.
(InitBaseFunctions): Ditto.
(MixTypesDecl): New procedure function.
(MixTypes): Reimplement.
* gm2-compiler/M2Check.mod (checkProcType): Replace
NoOfParam with NoOfParamAny.
Replace IsVarParam with IsVarParamAny.
(checkProcedureProcType): Ditto.
* gm2-compiler/M2Error.def: Remove unnecessary export qualified list.
* gm2-compiler/M2GCCDeclare.mod: Replace NoOfParam with NoOfParamAny.
Replace IsVarParam with IsVarParamAny.
(DeclareProcedureToGccWholeProgram): Rename son to
Variable.
(DeclareProcedureToGccSeparateProgram): Ditto.
(PrintKind): New procedure.
(PrintProcedureParameters): Ditto.
(PrintProcedureReturnType): Ditto.
(PrintProcedure): Reimplement.
(PrintProcTypeParameters): New procedure.
(PrintProcType): Ditto.
(DeclareProcType): Rename Son to Parameter.
* gm2-compiler/M2GenGCC.mod: Replace NoOfParam with NoOfParamAny.
Replace IsVarParam with IsVarParamAny.
(ErrorMessageDecl): New procedure.
(checkIncorrectMeta): Replace call to MetaErrorT2 with
ErrorMessageDecl.
(ComparisonMixTypes): Add varleft and varright parameters.
Adjust all callers of ComparisonMixTypes.
* gm2-compiler/M2MetaError.def (MetaErrorDecl): New procedure.
* gm2-compiler/M2MetaError.mod (MetaErrorDecl): New procedure.
* gm2-compiler/M2Options.def (SetXCode): Add -fd flag description
to comment.
* gm2-compiler/M2Options.mod (SetXCode): Add -fd flag description
to comment.
* gm2-compiler/M2Quads.mod (CheckBreak): New procedure.
Replace NoOfParam with NoOfParamAny.
Replace IsVarParam with IsVarParamAny.
(FailParameter): Reimplement using GetVarDeclFullTok.
Generate message for formal parameter, actual parameter and
declaration of actual parameter.
(WarnParameter): Ditto.
(CheckBuildFunction): Reimplement error message using MetaErrorT1.
* gm2-compiler/M2Range.mod: Replace NoOfParam with NoOfParamAny.
Replace IsVarParam with IsVarParamAny.
* gm2-compiler/M2Scaffold.mod (DeclareScaffoldFunctions): Call
PutProcedureDefined after every procedure declaration.
(DeclareArgEnvParams): Add ProperProcedure parameter to PutParam.
* gm2-compiler/M2Size.mod (MakeSize): Add DefProcedure parameter
to PutFunction.
* gm2-compiler/M2Swig.mod: Replace NoOfParam with NoOfParamAny.
Replace IsVarParam with IsVarParamAny.
* gm2-compiler/M2SymInit.mod: Ditto.
* gm2-compiler/M2System.mod (InitSystem): Add DefProcedure
parameter to PutFunction.
* gm2-compiler/P1SymBuild.mod (StartBuildProcedure): Reimplement.
(EndBuildProcedure): Ditto.
(EndBuildForward): Ditto.
* gm2-compiler/P2Build.bnf (BuildProcedureDefinedByForward):
Remove.
(BuildProcedureDefinedByProper): Ditto.
(ForwardDeclaration): Remove BuildProcedureDefinedByForward.
(BuildNoReturnAttribute): Remove parameter.
* gm2-compiler/P2SymBuild.def (BuildNoReturnAttribute): Remove
parameter.
(BuildProcedureDefinedByForward): Remove.
(BuildProcedureDefinedByProper): Ditto.
* gm2-compiler/P2SymBuild.mod (Import): Remove
AreParametersDefinedInDefinition,
AreParametersDefinedInImplementation,
AreProcedureParametersDefined,
ParametersDefinedInDefinition,
ParametersDefinedInImplementation,
GetProcedureDeclaredDefinition,
GetProcedureDeclaredForward,
GetProcedureDeclaredProper,
GetParametersDefinedByForward,
GetParametersDefinedByProper and
PutProcedureNoReturn.
Add PutProcedureParametersDefined,
GetProcedureParametersDefined,
GetProcedureKindDesc,
GetProcedureDeclaredTok,
GetProcedureKind,
GetReturnTypeTok,
SetReturnOptional,
IsReturnOptional,
PutProcedureNoReturn and
PutProcedureDefined.
(Debug): New procedure.
(P2StartBuildDefModule): Space formatting.
(BuildVariable): Reimplement to record full declaration.
(StartBuildProcedure): Reimplement using token to determine
the kind of procedure.
(BuildProcedureHeading): Ditto.
(BuildFPSection): Ditto.
(BuildVarArgs): Ditto.
(BuildOptArg): Ditto.
(BuildProcedureDefinedByForward): Remove.
(BuildProcedureDefinedByProper): Ditto.
(BuildFormalParameterSection): Reimplement so that the
quad stack is unchanged.
(CheckFormalParameterSection): Ditto.
(RemoveFPParameters): New procedure.
(ParameterError): Reimplement.
(StartBuildFormalParameters): Add annotation.
(ParameterMismatch): Reimplement.
(EndBuildFormalParameters): Reimplement to check against
all procedure kinds.
(GetSourceDesc): Remove.
(GetCurSrcDesc): Ditto.
(GetDeclared): Ditto.
(ReturnTypeMismatch): Reimplement.
(BuildFunction): Ditto.
(BuildOptFunction): Ditto.
(CheckOptFunction): New procedure.
(BuildNoReturnAttribute): Remove parameter and obtain
procedure symbol from quad stack.
(CheckProcedureReturn): New procedure.
* gm2-compiler/P3SymBuild.mod (BuildOptArgInitializer):
Preserve ProcSym tok on the quad stack.
Add Assert.
* gm2-compiler/PCSymBuild.mod (fixupProcedureType): Replace
NoOfParam with NoOfParamAny.
* gm2-compiler/SymbolTable.def (GetNthParam): Add ProcedureKind
parameter.
(PutFunction): Ditto.
(PutOptFunction): Ditto.
(IsReturnOptional): Ditto.
(PutParam): Ditto.
(PutVarParam): Ditto.
(PutParamName): Ditto.
(PutProcedureNoReturn): Ditto.
(IsProcedureNoReturn): Ditto.
(IsVarParam): Ditto.
(IsUnboundedParam): Ditto.
(NoOfParam): Ditto.
(ForeachLocalSymDo): Ditto.
(GetProcedureKind): Ditto.
(GetProcedureDeclaredTok): Ditto.
(PutProcedureDeclaredTok): Ditto.
(GetReturnTypeTok): Ditto.
(PutReturnTypeTok): Ditto.
(PutParametersDefinedByForward): New procedure.
(PutProcedureParametersDefined): Ditto.
(PutProcedureDefined): Ditto.
(GetParametersDefinedByProper): Ditto.
(GetProcedureDeclaredForward): Ditto.
(GetProcedureDeclaredProper): Ditto.
(PutProcedureDeclaredProper): Ditto.
(GetProcedureDeclaredDefinition): Ditto.
(PutProcedureDeclaredDefinition): Ditto.
(GetProcedureDefined): Ditto.
(PutUseOptArg): Ditto.
(UsesOptArg): Ditto.
(PutOptArgInit): Ditto.
(SetReturnOptional): Ditto.
(UsesOptArgAny): Ditto.
(GetProcedureKindDesc): Ditto.
(IsReturnOptionalAny): New procedure function.
(GetNthParamAny): Ditto.
(NoOfParamAny): Ditto.
(IsProcedureAnyNoReturn): Ditto.
(AreParametersDefinedInImplementation): Remove.
(ParametersDefinedInImplementation): Ditto.
(AreParametersDefinedInDefinition): Ditto.
(AreProcedureParametersDefined): Ditto.
(ParametersDefinedInDefinition): Ditto.
(ProcedureParametersDefined): Ditto.
(PutParametersDefinedByProper): Ditto.
(PutProcedureDeclaredForward): Ditto.
(GetParametersDefinedByForward): Ditto.
(GetProcedureParametersDefined): Ditto.
(PushOffset): Ditto.
(PopSize): Ditto.
(PushParamSize): Ditto.
(PushSumOfLocalVarSize): Ditto.
(PushSumOfParamSize): Ditto.
(PopOffset): Ditto.
(PopSumOfParamSize): Ditto.
* gm2-compiler/SymbolTable.mod (MakeProcedure): Reimplement.
(PutProcedureNoReturn): Add ProcedureKind parameter.
(GetNthParam): Ditto.
(PutFunction): Ditto.
(PutOptFunction): Ditto.
(IsReturnOptional): Ditto.
(MakeVariableForParam): Ditto.
(PutParam): Ditto.
(PutVarParam): Ditto.
(PutParamName): Ditto.
(AddParameter): Ditto.
(IsVarParam): Ditto.
(IsVarParamAny): Ditto.
(NoOfParam): Ditto.
(HasVarParameters): Ditto.
(IsUnboundedParam): Ditto.
(PutUseVarArgs): Ditto.
(UsesVarArgs): Ditto.
(PutUseOptArg): Ditto.
(UsesOptArg): Ditto.
(UsesOptArgAny): Ditto.
(PutOptArgInit): Ditto.
(IsProcedure): Ditto.
(IsPointer): Ditto.
(IsRecord): Ditto.
(IsArray): Ditto.
(IsEnumeration): Ditto.
(IsUnbounded): Ditto.
(IsSet): Ditto.
(IsSetPacked): Ditto.
(CheckUnbounded): Ditto.
(IsOAFamily): Ditto.
(IsModuleWithinProcedure): Ditto.
(GetDeclaredDef): Ditto.
(GetDeclaredMod): Ditto.
(GetDeclaredFor): Ditto.
(GetProcedureDeclaredForward): Ditto.
(GetProcedureKind): Ditto.
(PutProcedureDeclaredForward): Ditto.
(GetProcedureDeclaredTok): Ditto.
(GetProcedureDeclaredProper): Ditto.
(PutProcedureDeclaredTok): Ditto.
(PutProcedureDeclaredProper): Ditto.
(GetReturnTypeTok): Ditto.
(GetProcedureDeclaredDefinition): Ditto.
(PutReturnTypeTok): Ditto.
(PutProcedureDeclaredDefinition): Ditto.
(GetProcedureKindDesc): Ditto.
(IsProcedureVariable): Ditto.
(IsAModula2Type): Ditto.
(GetParam): Ditto.
(ProcedureParametersDefined): Ditto.
(AreParametersDefinedInImplementation): Remove.
(AreParametersDefinedInDefinition): Ditto.
(AreProcedureParametersDefined): Ditto.
(IsSizeSolved): Ditto.
(IsOffsetSolved): Ditto.
(IsValueSolved): Ditto.
(IsSumOfParamSizeSolved): Ditto.
(PushSize): Ditto.
(PushOffset): Ditto.
(PopSize): Ditto.
(PushValue): Ditto.
(PushParamSize): Ditto.
(PushSumOfLocalVarSize): Ditto.
(PushSumOfParamSize): Ditto.
(PushVarSize): Ditto.
(PopValue): Ditto.
(PopSize): Ditto.
(PopOffset): Ditto.
(PopSumOfParamSize): Ditto.
(PutParametersDefinedByForward): New procedure.
(PutProcedureParametersDefined): Ditto.
(PutProcedureDefined): Ditto.
(GetParametersDefinedByProper): Ditto.
(GetProcedureDeclaredForward): Ditto.
(GetProcedureDeclaredProper): Ditto.
(PutProcedureDeclaredProper): Ditto.
(GetProcedureDeclaredDefinition): Ditto.
(PutProcedureDeclaredDefinition): Ditto.
(GetProcedureDefined): Ditto.
(PutUseOptArg): Ditto.
(UsesOptArg): Ditto.
(PutOptArgInit): Ditto.
(SetReturnOptional): Ditto.
(UsesOptArgAny): Ditto.
(GetProcedureKindDesc): Ditto.
(PutParametersDefinedByProper): Ditto.
(GetParametersDefinedByProper): Ditto.
(IsReturnOptionalAny): New procedure function.
(IsProcedureAnyDefaultBoolean): Ditto.
(IsProcedureAnyBoolean): Ditto.
(IsProcedureAnyNoReturn): Ditto.
(GetNthParamAny): Ditto.
(NoOfParamAny): Ditto.
(IsProcedureAnyNoReturn): Ditto.
(GetProcedureKind): Ditto.
(IsVarParamAny): Ditto.
(IsUnboundedParamAny): Ditto.
(ForeachParamSymDo): New comment.
* gm2-libs-coroutines/SYSTEM.mod: Reformat.
gcc/testsuite/ChangeLog:
* gm2/iso/fail/badexpression3.mod: New test.
* gm2/iso/fail/badparam4.def: New test.
* gm2/iso/fail/badparam4.mod: New test.
Signed-off-by: Gaius Mulley <gaiusmod2@gmail.com>
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Just notice the indent is not that right for ustrunc pattern from
the md files. Thus, make it correct. It is somehow very obvious
and will commit it after next 48H if no more comments.
gcc/ChangeLog:
* config/riscv/autovec.md: Fix indent format issue.
Signed-off-by: Pan Li <pan2.li@intel.com>
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2024-11-11 Tomas Trnka <trnka@scm.com>
Paul Thomas <pault@gcc.gnu.org>
gcc/fortran
PR fortran/116388
* class.cc (finalize_component): Leading underscore in the name
of 'byte_stride' to suppress invalid finalization.
gcc/testsuite/
PR fortran/116388
* gfortran.dg/finalize_58.f90: New test.
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gcc/fortran/ChangeLog:
* check.cc (gfc_check_complex): Reject UNSIGNED.
* gfortran.texi: Update example program. Note that
CMPLX, INT and REAL also take unsigned arguments.
* intrinsic.texi (CMPLX): Document UNSIGNED.
(INT): Likewise.
(REAL): Likewise.
gcc/testsuite/ChangeLog:
* gfortran.dg/unsigned_41.f90: New test.
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Explain that 'bootstrap-ubsan' won't abort on errors by default and how
to override that by setting UBSAN_OPTIONS.
gcc/ChangeLog:
PR other/116948
* doc/install.texi (Building a native compiler): Document UBSAN_OPTIONS.
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gcc/ChangeLog:
PR other/116948
* doc/install.texi (Building a native compiler): Mention bootstrap-ubsan.
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The second source register of insn "*extzvsi-1bit_addsubx" cannot be the
same as the destination register, because that register will be overwritten
with an intermediate value after insn splitting.
/* example #1 */
int test1(int b, int a) {
return ((a & 1024) ? 4 : 0) + b;
}
;; result #1 (incorrect)
test1:
extui a2, a3, 10, 1 ;; overwrites A2 before used
addx4 a2, a2, a2
ret.n
This patch fixes that.
;; result #1 (correct)
test1:
extui a3, a3, 10, 1 ;; uses A3 and then overwrites
addx4 a2, a3, a2
ret.n
However, it should be noted that the first source register can be the same
as the destination without any problems.
/* example #2 */
int test2(int a, int b) {
return ((a & 1024) ? 4 : 0) + b;
}
;; result (correct)
test2:
extui a2, a2, 10, 1 ;; uses A2 and then overwrites
addx4 a2, a2, a3
ret.n
gcc/ChangeLog:
* config/xtensa/xtensa.md (*extzvsi-1bit_addsubx):
Add '&' to the destination register constraint to indicate that
it is 'earlyclobber', append '0' to the first source register
constraint to indicate that it can be the same as the destination
register, and change the split condition from 1 to reload_completed
so that the insn will be split only after RA in order to obtain
allocated registers that satisfy the above constraints.
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gcc/ChangeLog:
* common/config/i386/cpuinfo.h
(get_intel_cpu): Handle Diamond Rapids.
* common/config/i386/i386-common.cc (processor_name):
Add Diamond Rapids.
(processor_alias_table): Ditto.
* common/config/i386/i386-cpuinfo.h (enum processor_types):
Add INTEL_COREI7_DIAMONDRAPIDS.
* config.gcc: Add -march=diamondrapids.
* config/i386/driver-i386.cc (host_detect_local_cpu): Handle
diamondrapids.
* config/i386/i386-c.cc (ix86_target_macros_internal): Ditto.
* config/i386/i386-options.cc (processor_cost_table): Ditto.
(m_DIAMONDRAPIDS): New.
(m_CORE_AVX512): Add diamondrapids.
* config/i386/i386.h (enum processor_type): Ditto.
* doc/extend.texi: Ditto.
* doc/invoke.texi: Ditto.
gcc/testsuite/ChangeLog:
* g++.target/i386/mv16.C: Ditto.
* gcc.target/i386/funcspec-56.inc: Handle new march.
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gcc/ChangeLog:
* common/config/i386/cpuinfo.h (get_intel_cpu): Add new model
number for Arrow Lake.
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&& HONOR_NANS (BFmode).
hw instruction doesn't raise exceptions, turns sNAN into qNAN quietly,
and always round to nearest (even). Output denormals are always
flushed to zero and input denormals are always treated as zero. MXCSR
is not consulted nor updated.
W/o native instructions, flag_unsafe_math_optimizations is needed for
the permutation instructions.
Similar guard extend from vector __bf16 to vector float with
!HONOR_NANS (BFmode).
gcc/ChangeLog:
* config/i386/i386.md (truncsf2bf2): Add !flag_rounding_math
to the condition, require flag_unsafe_math_optimizations when
native instruction is not available.
* config/i386/mmx.md: (truncv2sfv2bf2): Ditto.
(extendv2bfv2sf2): Add !HONOR_NANS (BFmode) to the condition.
* config/i386/sse.md: (truncv4sfv4sf2): Add
!flag_rounding_math to the condition, require
flag_unsafe_math_optimizations when native instruction is not
available.
(truncv8sfv8bf2): Ditto.
(truncv16sfv16bf2): Ditto.
(extendv4bfv4sf2): Add !HONOR_NANS (BFmode) to the condition.
(extendv8bfv8sf2): Ditto.
(extendv16bfv16sf2): Ditto.
gcc/testsuite/ChangeLog:
* gcc.target/i386/avx512bf16-truncsfbf.c: Add -ffast-math.
* gcc.target/i386/avx512bw-extendbf2sf.c: Ditto.
* gcc.target/i386/avx512bw-truncsfbf.c: Ditto.
* gcc.target/i386/sse2-extendbf2sf.c: Ditto.
* gcc.target/i386/ssse3-truncsfbf.c: Ditto.
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There are some SVE testsuite fails when forcing SLP because costing
prevents VLA vectors from being used as we add permute cost for
the VEC_PERM nodes that are part of a SLP load-lanes node. The
permutes only exist for representational reasons and pessimize SLP
vs non-SLP so the following makes sure to cost them as zero.
* tree-vect-slp.cc (vectorizable_slp_permutation_1): Return
zero for the permute nodes part of load-lanes.
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CODE_CONTAINS_STRUCT () currently reports that a TRAIT_EXPR contains a
TS_EXP struct, but it does not actually start with a TS_EXP as an initial
sequence. In modules.cc, when we stream out a tree, we explicitly check for the
TS_EXP case and call note_location(t->exp.locus) if so. Currently, this
actually queries the tree_common::chain field of a tree_trait_expr, which
seems not to be used, returning 0, which is interpreted as UNKNOWN_LOCATION
and does no harm.
If location_t will change to be 64 bytes, as is under discussion, then on
32-bit platforms (well those, such as sparc, on which uint64_t has higher
alignment requirement than a pointer), reading t->exp.locus will end up
reading a different field (tree_trait_expr::type1) due to padding
offsets. That field is not generally 0, and the resulting bogus location_t
is sufficiently problematic to cause an ICE in the line_map code. Pretty
much any modules testcase displays the issue, such as partial-2_a.C.
Resolve by initializing tree_contains_struct with the correct value for
TRAIT_EXPR, namely TS_TYPED.
gcc/cp/ChangeLog:
* cp-objcp-common.cc (cp_common_init_ts): Change TRAIT_EXPR from
TS_EXP to TS_TYPED.
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This improves compatibility with clang, and is used by some projects.
PR target/117478
gcc/ChangeLog:
* config/darwin-driver.cc (darwin_driver_init): Handle ObjC/ObjC++
* config/darwin.opt: Add ObjC/ObjC++ as driver-only options.
Signed-off-by: Iain Sandoe <iain@sandoe.co.uk>
|
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This removes an (broken) simplification from fold which is already handled in match.
The reason why it was broken is because of the use of wi::to_wide on the RHS of the
rotate which could be 2 different types even though the LHS was the same type.
Since it is already handled in match (by the patterns for
`Turn (a OP c1) OP c2 into a OP (c1+c2).`). It can be removed without losing any optimizations.
Bootstrapped and tested on x86_64-linux-gnu.
PR middle-end/117492
gcc/ChangeLog:
* fold-const.cc (fold_binary_loc): Remove `Two consecutive rotates adding up
to the some integer` simplifcation.
gcc/testsuite/ChangeLog:
* gcc.dg/torture/pr117492-1.c: New test.
Signed-off-by: Andrew Pinski <quic_apinski@quicinc.com>
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After adding vn_valueize to the handle the `a | b ==/!= 0` case
of insert_predicates_for_cond, it would go into an infinite loop
as the Value number for either a or b could be the same as what it
is for the whole expression. This avoids that recursion so there is
no infinite loop here.
Bootstrapped and tested on x86_64-linux.
PR tree-optimization/117496
gcc/ChangeLog:
* tree-ssa-sccvn.cc (insert_predicates_for_cond): If the
valueization for the new lhs is the same as the old one,
don't recurse.
gcc/testsuite/ChangeLog:
* gcc.dg/torture/pr117496-1.c: New test.
Signed-off-by: Andrew Pinski <quic_apinski@quicinc.com>
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This is the followup as mentioned in
https://gcc.gnu.org/pipermail/gcc-patches/2024-November/667987.html .
We need to canonicalize the compares using tree_swap_operands_p instead
of checking CONSTANT_CLASS_P.
Bootstrapped and tested on x86_64-linux-gnu.
gcc/ChangeLog:
* tree-ssa-sccvn.cc (visit_phi): Swap the operands
before calling vn_nary_op_lookup_pieces if
tree_swap_operands_p returns true.
(insert_predicates_for_cond): Use tree_swap_operands_p
instead of checking for CONSTANT_CLASS_P.
(process_bb): Swap the comparison and operands
if tree_swap_operands_p returns true.
Signed-off-by: Andrew Pinski <quic_apinski@quicinc.com>
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These commits used *.c rather than *.cc suffix and miracuously got through
the pre-commit hook but broke ChangeLog generation.
|
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Every now and then my x86_64-linux bootstrap fails due to missing
dependencies somewhere in m2, usually during stage3. I'm using
make -j32 and run 2 bootstraps concurrently (x86_64-linux and i686-linux)
on the same box.
Last night the same happened to me again,
with the first error
In file included from ./tm.h:29,
from ../../gcc/backend.h:28,
from ../../gcc/m2/gm2-gcc/gcc-consolidation.h:27,
from m2/gm2-compiler-boot/M2AsmUtil.c:26:
../../gcc/config/i386/i386.h:2484:10: fatal error: insn-attr-common.h: No such file or directory
2484 | #include "insn-attr-common.h"
| ^~~~~~~~~~~~~~~~~~~~
compilation terminated.
make[3]: *** [../../gcc/m2/Make-lang.in:1576: m2/gm2-compiler-boot/M2AsmUtil.o] Error 1
make[3]: *** Waiting for unfinished jobs....
Now, gcc/Makefile.in has a general rule:
# In order for parallel make to really start compiling the expensive
# objects from $(OBJS) as early as possible, build all their
# prerequisites strictly before all objects.
$(ALL_HOST_OBJS) : | $(generated_files)
which ensures that everything that might depend on the generated files
waits for those to be generated.
The above error clearly shows that such waiting didn't happen for
m2/gm2-compiler-boot/M2AsmUtil.o and some others.
ALL_HOST_OBJS includes $(ALL_HOST_FRONTEND_OBJS),
where the latter is
ALL_HOST_FRONTEND_OBJS = $(foreach v,$(CONFIG_LANGUAGES),$($(v)_OBJS))
m2_OBJS already includes various *.o files, for all those we wait until
the generated files are generated. Though, seems
cc1gm2 depends on m2/stage1/cc1gm2 (which is just copied there),
and that depends on m2/gm2-compiler-boot/m2flex.o,
$(GM2_C_OBJS) and m2/gm2-gcc/rtegraph.o already included in m2_OBJS,
but also on
$(GM2_LIBS_BOOT) $(MC_LIBS)
where
MC_LIBS=m2/mc-boot-ch/Glibc.o m2/mc-boot-ch/Gmcrts.o
GM2_LIBS_BOOT = m2/gm2-compiler-boot/gm2.a \
m2/gm2-libs-boot/libgm2.a \
$(GM2-BOOT-O)
GM2-BOOT-O isn't defined, and the 2 libraries depend on
$(BUILD-LIBS-BOOT) $(BUILD-COMPILER-BOOT)
So, the following patch adds those to m2_OBJS.
I'm not sure if something further is needed, like some objects
used to build the helper programs, mc and whatever else is needed,
I guess it depends on if they use or can use say tm.h or similar
headers which depend on the generated headers.
2024-11-09 Jakub Jelinek <jakub@redhat.com>
gcc/m2/
* Make-lang.in (m2_OBJS): Add $(BUILD-LIBS-BOOT),
$(BUILD-COMPILER-BOOT) and $(MC_LIBS).
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Starting with r14-435-g00d97bf3b5a, doing `#pragma arm "arm_mve.h"
false` or `#pragma arm "arm_mve.h" true` without first doing
`#pragma arm "arm_mve_types.h"` causes GCC to ICE.
gcc/ChangeLog:
PR target/117408
* config/arm/arm-mve-builtins.cc(handle_arm_mve_h): Detect if MVE
types is missing and if so, return error.
gcc/testsuite/ChangeLog:
PR target/117408
* gcc.target/arm/mve/pr117408-1.c: New test.
* gcc.target/arm/mve/pr117408-2.c: Likewise.
Signed-off-by: Torbjörn SVENSSON <torbjorn.svensson@foss.st.com>
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My https://gcc.gnu.org/pipermail/gcc-patches/2024-November/668065.html
patch regressed
+FAIL: g++.dg/tm/pr45940-3.C -std=gnu++11 (internal compiler error: in create_tmp_var, at gimple-expr.cc:484)
+FAIL: g++.dg/tm/pr45940-3.C -std=gnu++11 (test for excess errors)
+FAIL: g++.dg/tm/pr45940-3.C -std=gnu++14 (internal compiler error: in create_tmp_var, at gimple-expr.cc:484)
+FAIL: g++.dg/tm/pr45940-3.C -std=gnu++14 (test for excess errors)
...
+FAIL: g++.dg/tm/pr45940-4.C -std=gnu++26 (internal compiler error: in create_tmp_var, at gimple-expr.cc:484)
+FAIL: g++.dg/tm/pr45940-4.C -std=gnu++26 (test for excess errors)
+FAIL: g++.dg/tm/pr45940-4.C -std=gnu++98 (internal compiler error: in create_tmp_var, at gimple-expr.cc:484)
+FAIL: g++.dg/tm/pr45940-4.C -std=gnu++98 (test for excess errors)
tests, but it turns out it is a preexisting bug.
If I modify the pr45940-3.C testcase
--- gcc/testsuite/g++.dg/tm/pr45940-3.C 2020-01-12 11:54:37.258400660 +0100
+++ gcc/testsuite/g++.dg/tm/pr45940-3.C 2024-11-08 10:35:11.918390743 +0100
@@ -16,6 +16,7 @@ class sp_counted_base
{
protected:
int use_count_; // #shared
+ int a, b, c, d, e, f, g, h, i, j, k, l, m, n, o, p, q, r, s, t, u, v, w, x, y, z, aa, ab, ac, ad, ae, af;
public:
__attribute__((transaction_safe))
virtual void dispose() = 0; // nothrow
then it ICEs already on vanilla trunk.
The problem is that expand_assign_tm just wants to force it into
TM memcpy argument, if is_gimple_reg (reg), then it creates a temporary,
stores the value there and takes temporary address, otherwise it takes
address of rhs. That doesn't work if rhs is an empty CONSTRUCTOR with
C++ non-POD type (TREE_ADDRESSABLE type), we ICE trying to create temporary,
because we shouldn't be creating a temporary.
Now before my patch with the CONSTRUCTOR only having a vtable pointer
(64bit) and 32-bit field, we gimplified the zero initialization just
as storing of 0s to the 2 fields, but as we are supposed to also clear
padding bits, we now gimplify it as MEM[...] = {}; to make sure
even the padding bits are cleared. With the adjusted testcase,
we gimplified it even before as MEM[...] = {}; because it was simply
too large and clearing everything looked beneficial.
The following patch fixes this ICE by using TM memset, it is both
wasteful to force zero constructor into a temporary just to TM memcpy
it into the lhs, and in C++ cases like this invalid.
2024-11-09 Jakub Jelinek <jakub@redhat.com>
* trans-mem.cc (expand_assign_tm): Don't take address
of empty CONSTRUCTOR, instead use BUILT_IN_TM_MEMSET
to clear lhs in that case. Formatting fixes.
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The patch for PR117145 and PR117245 also fixed PR100420 and PR116284 which
are bugs related to arrays of unspecified size. Those are now represented
as variable size arrays with size (0, 0). There are still some loose ends,
which are resolved here by
1. adding a testcase for PR116284,
2. moving code related to creation and detection of arrays of unspecified
sizes in their own functions,
3. preferring a specified size over an unspecified size when forming
a composite type as required by C99 (PR118391)
4. removing useless code in comptypes_internal and composite_type_internal.
PR c/116284
PR c/117391
gcc/c/ChangeLog:
* c-tree.h (c_type_unspecified_p): New inline function.
* c-typeck.cc (c_build_array_type_unspecified): New function.
(comptypes_interal): Remove useless code.
(composite_type_internal): Update.
* c-decl.cc (grokdeclarator): Revise.
gcc/testsuite/ChangeLog:
* gcc.dg/pr116284.c: New test.
* gcc.dg/pr117391.c: New test.
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- Fix warnings with newer python versions about bad escapes by
making all the python string raw.
- Add a fallback for using the builtin perf event list if the
CPU model number is unknown.
- Regenerate the shipped gcc-auto-profile with the changes.
contrib/ChangeLog:
* gen_autofdo_event.py: Convert strings to raw.
Add fallback to using builtin perf event list.
gcc/ChangeLog:
* config/i386/gcc-auto-profile: Regenerate.
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This patch implements C2y N3356, if declarations as described at
<https://www.open-std.org/jtc1/sc22/wg14/www/docs/n3356.htm>.
This feature is cognate with C++17 Selection statements with initializer
<https://www.open-std.org/jtc1/sc22/wg21/docs/papers/2016/p0305r1.html>,
but they are not the same yet. For example, C++17 allows
if (lock (); int i = getval ())
whereas C2y does not.
The proposal adds new grammar productions. selection-header is handled
in c_parser_selection_header which is the gist of the patch.
simple-declaration is handled by c_parser_declaration_or_fndef, which
gets a new parameter.
PR c/117019
gcc/c/ChangeLog:
* c-parser.cc (c_parser_declaration_or_fndef): Adjust declaration.
(c_parser_external_declaration): Adjust a call to
c_parser_declaration_or_fndef.
(c_parser_declaration_or_fndef): New bool parameter. Return a tree
instead of void. Adjust for N3356. Adjust a call to
c_parser_declaration_or_fndef.
(c_parser_compound_statement_nostart): Adjust calls to
c_parser_declaration_or_fndef.
(c_parser_selection_header): New.
(c_parser_paren_selection_header): New.
(c_parser_if_statement): Call c_parser_paren_selection_header
instead of c_parser_paren_condition.
(c_parser_switch_statement): Call c_parser_selection_header instead of
c_parser_expression.
(c_parser_for_statement): Adjust calls to c_parser_declaration_or_fndef.
(c_parser_objc_methodprotolist): Likewise.
(c_parser_oacc_routine): Likewise.
(c_parser_omp_loop_nest): Likewise.
(c_parser_omp_declare_simd): Likewise.
gcc/testsuite/ChangeLog:
* gcc.dg/c23-if-decls-1.c: New test.
* gcc.dg/c23-if-decls-2.c: New test.
* gcc.dg/c2y-if-decls-1.c: New test.
* gcc.dg/c2y-if-decls-2.c: New test.
* gcc.dg/c2y-if-decls-3.c: New test.
* gcc.dg/c2y-if-decls-4.c: New test.
* gcc.dg/c2y-if-decls-5.c: New test.
* gcc.dg/c2y-if-decls-6.c: New test.
* gcc.dg/c2y-if-decls-7.c: New test.
* gcc.dg/c2y-if-decls-8.c: New test.
* gcc.dg/c2y-if-decls-9.c: New test.
* gcc.dg/c2y-if-decls-10.c: New test.
* gcc.dg/c2y-if-decls-11.c: New test.
* gcc.dg/gnu2y-if-decls-1.c: New test.
* gcc.dg/gnu99-if-decls-1.c: New test.
* gcc.dg/gnu99-if-decls-2.c: New test.
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LRA has problems handling spills for OI mode. There are issues with
SUBREG support as well.
2024-11-08 John David Anglin <danglin@gcc.gnu.org>
gcc/ChangeLog:
PR target/117238
* config/pa/pa64-regs.h (PA_HARD_REGNO_MODE_OK): Don't allow
mode size 32.
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