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From-SVN: r247805
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2017-05-09 Dominique d'Humieres <dominiq@lps.ens.fr>
* gfortran.dg/coarray_lock_7.f90: Fix dg-final regexps.
From-SVN: r247803
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gcc/
2017-05-09 Claudiu Zissulescu <claziss@synopsys.com>
* config/arc/arc.c (arc_conditional_register_usage): Handle ACCL,
ACCH registers.
* config/arc/arc.md (mulsidi3): Use advanced mpy instructions when
available.
(umulsidi3): Likewise.
(mulsidi3_700): Disable this pattern when we have advanced mpy
instructions.
(umulsidi3_700): Likewise.
(maddsidi4): New pattern.
(macd, mac, mac_r, umaddsidi4, macdu, macu, macu_r): Likewise.
(mpyd_arcv2hs, mpyd_imm_arcv2hs, mpydu_arcv2hs): Likewise.
(mpydu_imm_arcv2hs): Likewise.
* config/arc/predicates.md (accl_operand): New predicate.
From-SVN: r247797
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When a processor enters a fast interrupts handler, and duplicate
register banks are configured, the processor saves the user context by
saving the registers in the main register bank to these additional
registers in the duplicate register bank. In this fast interrupt
context, when you specify the rgf_banked_regs option,the compiler does
not save the registers duplicated in the additional register bank are
not saved.
gcc/
2017-05-09 Claudiu Zissulescu <claziss@synopsys.com>
Andrew Burgess <andrew.burgess@embecosm.com>
* config/arc/arc.c (ARC_AUTOBLINK_IRQ_P): Consider fast interrupts
case also.
(ARC_AUTOFP_IRQ_P): Likewise.
(ARC_AUTO_IRQ_P): Likewise.
(rgf_banked_register_count): New variable.
(parse_mrgf_banked_regs_option): New function.
(arc_override_options): Handle rgf_banked_regs option.
(arc_handle_interrupt_attribute): Add firq option.
(arc_compute_function_type): Return fast irq type when required.
(arc_must_save_register): Handle fast interrupts.
(arc_expand_prologue): Do not emit dwarf info for fast interrupts.
(arc_return_address_regs): Update.
* config/arc/arc.h (arc_return_address_regs): Update.
(arc_function_type): Add fast interrupt type.
(ARC_INTERRUPT_P): Update.
(RC_FAST_INTERRUPT_P): Define.
* config/arc/arc.md (simple_return): Update for fast interrupts.
(p_return_i): Likewise.
* config/arc/arc.opt (mrgf-banked-regs): New option.
* doc/invoke.texi (mrgf-banked-regs): Document.
testsuite/
2017-05-09 Claudiu Zissulescu <claziss@synopsys.com>
Andrew Burgess <andrew.burgess@embecosm.com>
* gcc.target/arc/firq-1.c: New file.
* gcc.target/arc/firq-2.c: Likewise.
* gcc.target/arc/firq-3.c: Likewise.
* gcc.target/arc/firq-4.c: Likewise.
* gcc.target/arc/firq-5.c: Likewise.
* gcc.target/arc/firq-6.c: Likewise.
Co-Authored-By: Andrew Burgess <andrew.burgess@embecosm.com>
From-SVN: r247796
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The AUX_IRQ_CTRL register controls the behavior of automated register
save and restore or prologue and epilogue sequences during a non-fast
interrupt entry and exit, and context save and restore instructions.
A user passes to the compiler the configuration of the AUX_IRQ_CTRL
register via mirq-ctrl-saved option. This option, specifies
gneral-purposes registers that the processor saves/restores on
interrupt entry and exit, and it is only valid for ARC EM and ARC HS
cores.
gcc/
2017-05-09 Claudiu Zissulescu <claziss@synopsys.com>
* config/arc/arc.c (irq_ctrl_saved): New variable.
(ARC_AUTOBLINK_IRQ_P): Define.
(ARC_AUTOFP_IRQ_P): Likewise.
(ARC_AUTO_IRQ_P): Likewise.
(irq_range): New function.
(arc_must_save_register): Likewise.
(arc_must_save_return_addr): Likewise.
(arc_dwarf_emit_irq_save_regs): Likewise.
(arc_override_options): Handle deferred options.
(MUST_SAVE_REGISTER): Deleted, replaced by arc_must_save_register.
(MUST_SAVE_RETURN_ADDR): Deleted, replaced by
arc_must_save_return_addr.
(arc_compute_frame_size): Handle automated save and restore of
registers.
(arc_expand_prologue): Likewise.
(arc_expand_epilogue): Likewise.
* config/arc/arc.md (stack_irq_dwarf): New unspec instruction.
* config/arc/arc.opt (mirq-ctrl-saved): New option.
* doc/invoke.texi (mirq-ctrl-saved): Document option.
testsuite/
2017-05-09 Claudiu Zissulescu <claziss@synopsys.com>
* gcc.target/arc/interrupt-5.c: Newfile.
* gcc.target/arc/interrupt-6.c: Likewise.
* gcc.target/arc/interrupt-7.c: Likewise.
* gcc.target/arc/interrupt-8.c: Likewise.
* gcc.target/arc/interrupt-9.c: Likewise.
From-SVN: r247795
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2017-05-09 Richard Biener <rguenther@suse.de>
* gcc.dg/vect/vect-44.c: Add --param vect-max-peeling-for-alignment=0
and adjust.
* gcc.dg/vect/vect-50.c: Likewise.
From-SVN: r247794
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* cp-tree.h (CONSTRUCTOR_C99_COMPOUND_LITERAL): New.
(enum fcl_t): New.
* semantics.c (finish_compound_literal): Add fcl_context parameter.
Only make a static variable for C99 syntax.
* parser.c (cp_parser_postfix_expression): Pass it.
* pt.c (tsubst_copy_and_build): Likewise.
* call.c (extend_ref_init_temps): Set
DECL_INITIALIZED_BY_CONSTANT_EXPRESSION_P.
From-SVN: r247793
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PR c/80525
* c-warn.c (unwrap_c_maybe_const): New.
(warn_logical_operator): Call it.
* c-c++-common/Wlogical-op-1.c: Don't use -fwrapv anymore.
* c-c++-common/Wlogical-op-2.c: New test.
From-SVN: r247786
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The test reports bogus failures because the loop variable i is declared
as int, and the constant expected in the dump doesn't fit in an int for avr.
Fixed by explicitly using __INT32_TYPE__ for targets with __SIZEOF_INT__ < 4.
gcc/testsuite/
2017-05-09 Senthil Kumar Selvaraj <senthil_kumar.selvaraj@atmel.com>
* gcc.dg/tree-ssa/cunroll-13.c: Use __INT32_TYPE__ for
for targets with __SIZEOF_INT__ < 4.
From-SVN: r247782
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2017-05-09 Richard Biener <rguenther@suse.de>
* gcc.dg/vect/vect-50.c: Revert last change.
* gcc.dg/vect/vect-44.c: Likewise.
From-SVN: r247780
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gcc/c-family/ChangeLog:
PR translation/80280
* c-format.h (struct format_flag_spec): Add new member.
(T89_T): New macro.
* c-format.c (local_tree_type_node): New global.
(printf_flag_specs, asm_fprintf_flag_spec): Initialize new data.
(gcc_diag_flag_specs, scanf_flag_specs, strftime_flag_specs): Ditto.
(strfmon_flag_specs): Likewise.
(gcc_diag_char_table, gcc_cdiag_char_table): Split up specifiers
with distinct quoting properties.
(gcc_tdiag_char_table, gcc_cxxdiag_char_table): Same.
(flag_chars_t::validate): Add argument and handle bad quoting.
(check_format_info_main): Handle quoting problems.
(init_dynamic_diag_info): Simplify.
gcc/testsuite/ChangeLog:
PR translation/80280
* gcc.dg/format/gcc_diag-10.c: New test.
From-SVN: r247778
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gcc/testsuite/ChangeLog:
2017-05-08 Kelvin Nilsen <kelvin@gcc.gnu.org>
PR target/80101
* gcc.target/powerpc/pr80101-1.c: New test.
gcc/ChangeLog:
2017-05-08 Kelvin Nilsen <kelvin@gcc.gnu.org>
PR target/80101
* config/rs6000/power6.md: Replace store_data_bypass_p calls with
rs6000_store_data_bypass_p in seven define_bypass directives and
in several comments.
* config/rs6000/rs6000-protos.h: Add prototype for
rs6000_store_data_bypass_p function.
* config/rs6000/rs6000.c (rs6000_store_data_bypass_p): New
function implements slightly different (rs6000-specific) semantics
than store_data_bypass_p, returning false rather than aborting
with assertion error when arguments do not satisfy the
requirements of store data bypass.
(rs6000_adjust_cost): Replace six calls of store_data_bypass_p with
rs6000_store_data_bypass_p.
From-SVN: r247777
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* tree.c (type_has_nontrivial_copy_init): True for classes with only
deleted copy/move ctors.
(remember_deleted_copy, maybe_warn_parm_abi): New.
* decl.c (require_complete_types_for_parms, check_function_type):
Call maybe_warn_parm_abi.
* call.c (convert_for_arg_passing, build_cxx_call): Likewise.
From-SVN: r247757
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* c-opts.c (c_common_post_options): Update defaults for
flag_abi_version and flag_abi_compat_version.
From-SVN: r247756
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2017-05-08 Thomas Koenig <tkoenig@gcc.gnu.org>
PR fortran/79930
* frontend-passes.c (matmul_to_var_expr): New function,
add prototype.
(matmul_to_var_code): Likewise.
(optimize_namespace): Use them from gfc_code_walker.
2017-05-08 Thomas Koenig <tkoenig@gcc.gnu.org>
PR fortran/79930
* gfortran.dg/inline_transpose_1.f90: Add
-finline-matmul-limit=0 to options.
* gfortran.dg/matmul_5.f90: Likewise.
* gfortran.dg/vect/vect-8.f90: Likewise.
* gfortran.dg/inline_matmul_14.f90: New test.
* gfortran.dg/inline_matmul_15.f90: New test.
From-SVN: r247755
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2017-05-08 Thomas Koenig <tkoenig@gcc.gnu.org>
PR fortran/80602
* m4/matmul_internal.m4: 'matmul_name`: Change
t1 to a VLA of the required size.
* generated/matmul_c10.c: Regenerated.
* generated/matmul_c16.c: Regenerated.
* generated/matmul_c4.c: Regenerated.
* generated/matmul_c8.c: Regenerated.
* generated/matmul_i1.c: Regenerated.
* generated/matmul_i16.c: Regenerated.
* generated/matmul_i2.c: Regenerated.
* generated/matmul_i4.c: Regenerated.
* generated/matmul_i8.c: Regenerated.
* generated/matmul_r10.c: Regenerated.
* generated/matmul_r16.c: Regenerated.
* generated/matmul_r4.c: Regenerated.
* generated/matmul_r8.c: Regenerated.
2017-05-08 Thomas Koenig <tkoenig@gcc.gnu.org>
PR fortran/80602
* gfortran.dg/matmul_15.f90: New test case.
From-SVN: r247753
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This fixes a few failures on ARM and AArch64 due to a recent change in
alignment peeling by switching the vector cost model off.
Tested on AArch64, ARM and x64 - committed as obvious.
testsuite/
* gcc.dg/vect/vect-44.c: Add -fno-vect-cost-model.
* gcc.dg/vect/vect-50.c: Likewise.
From-SVN: r247737
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2017-05-07 Jeff Law <law@redhat.com>
Revert:
2017-05-06 Jeff Law <law@redhat.com>
PR tree-optimization/78496
* tree-vrp.c (simplify_assert_expr_using_ranges): Remove debugging
code.
PR tree-optimization/78496
* tree-vrp.c (simplify_assert_expr_using_ranges): New function.
(simplify_stmt_using_ranges): Call it.
(vrp_dom_walker::before_dom_children): Extract equivalences
from an ASSERT_EXPR with an equality comparison against a
constant.
Revert:
2017-05-06 Jeff Law <law@redhat.com>
PR tree-optimization/78496
* gcc.dg/tree-ssa/ssa-thread-16.c: New test.
* gcc.dg/tree-ssa/ssa-thread-17.c: New test.
From-SVN: r247727
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PR tree-optimization/78496
* tree-vrp.c (simplify_assert_expr_using_ranges): New function.
(simplify_stmt_using_ranges): Call it.
(vrp_dom_walker::before_dom_children): Extract equivalences
from an ASSERT_EXPR with an equality comparison against a
constant.
PR tree-optimization/78496
* gcc.dg/tree-ssa/ssa-thread-16.c: New test.
* gcc.dg/tree-ssa/ssa-thread-17.c: New test.
From-SVN: r247721
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If we decide to allocate a call-clobbered register R to a value that
is live across a call, LRA will create a new spill register TMPR,
insert:
TMPR <- R
before the call and
R <- TMPR
after it. But if we then failed to allocate a register to TMPR, we would
always spill it to the stack, even if R was known to be equivalent to
a constant or to some existing memory location. And on AArch64, we'd
always fail to allocate such a register for 128-bit Advanced SIMD modes,
since no registers of those modes are call-preserved.
This patch avoids the problem by copying the equivalence information
from the original pseudo to the spill register. It means that the
code for the testcase is as good with -O2 as it is with -O,
whereas previously the -O code was better.
[Based on the code ARM contributed in branches/ARM/sve-branch@247248]
2017-05-06 Richard Sandiford <richard.sandiford@linaro.org>
gcc/
* lra-constraints.c (lra_copy_reg_equiv): New function.
(split_reg): Use it to copy equivalence information from the
original register to the spill register.
gcc/testsuite/
* gcc.target/aarch64/spill_1.c: New test.
From-SVN: r247720
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RTL has no distinction between signed and unsigned values, so it
doesn't make sense to test for signed overflow.
2017-05-06 Richard Sandiford <richard.sandiford@linaro.org>
gcc/
PR rtl-optimization/75964
* simplify-rtx.c (simplify_const_relational_operation): Remove
invalid handling of comparisons of integer ABS.
gcc/testsuite/
PR rtl-optimization/75964
* gcc.dg/torture/pr75964.c: New test.
From-SVN: r247719
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2017-05-06 Tom de Vries <tom@codesourcery.com>
PR testsuite/80606
* gcc.target/i386/avx-vtestpd-1.c: Remove default_packed lines.
* gcc.target/i386/avx-vtestpd-2.c: Same.
* gcc.target/i386/avx-vtestpd-256-1.c: Same.
* gcc.target/i386/avx-vtestpd-256-2.c: Same.
* gcc.target/i386/avx-vtestpd-256-3.c: Same.
* gcc.target/i386/avx-vtestpd-3.c: Same.
* gcc.target/i386/avx-vtestps-1.c: Same.
* gcc.target/i386/avx-vtestps-2.c: Same.
* gcc.target/i386/avx-vtestps-256-1.c: Same.
* gcc.target/i386/avx-vtestps-256-2.c: Same.
* gcc.target/i386/avx-vtestps-256-3.c: Same.
* gcc.target/i386/avx-vtestps-3.c: Same.
From-SVN: r247718
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2017-05-06 Tom de Vries <tom@codesourcery.com>
* gcc.target/avr/progmem-error-1.cpp: Add abolute line number comment.
From-SVN: r247717
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2017-05-06 Tom de Vries <tom@codesourcery.com>
PR testsuite/80557
* gcc.target/powerpc/altivec-macros.c: Replace absolute line numbers.
* gcc.target/powerpc/altivec-types-1.c: Same.
From-SVN: r247716
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2017-05-06 Tom de Vries <tom@codesourcery.com>
PR testsuite/80557
* gcc.target/spu/Wmain.c: Replace absolute line numbers.
* gcc.target/spu/intrinsics-1.c: Same.
From-SVN: r247715
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2017-05-06 Tom de Vries <tom@codesourcery.com>
PR testsuite/80557
* gcc.target/arm/pr69180.c: Replace absolute line numbers.
From-SVN: r247714
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2017-05-06 Tom de Vries <tom@codesourcery.com>
PR testsuite/80557
* gcc.target/aarch64/spellcheck_1.c: Replace absolute line numbers.
* gcc.target/aarch64/spellcheck_2.c: Same.
* gcc.target/aarch64/spellcheck_3.c: Same.
From-SVN: r247713
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2017-05-06 Tom de Vries <tom@codesourcery.com>
PR testsuite/80557
* g++.dg/debug/dwarf2/dwarf2-1.C: Replace absolute line numbers.
* g++.dg/debug/dwarf2/dwarf2-2.C: Same.
* g++.dg/debug/dwarf2/pr46123-2.C: Same.
* g++.dg/debug/dwarf2/typedef5.C: Same.
* g++.dg/goacc/data-1.C: Same.
From-SVN: r247712
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[gcc]
2017-05-05 Bill Schmidt <wschmidt@linux.vnet.ibm.com>
* config/rs6000/rs6000.c (rs6000_vect_nonmem): New static var.
(rs6000_init_cost): Initialize rs6000_vect_nonmem.
(rs6000_add_stmt_cost): Update rs6000_vect_nonmem.
(rs6000_finish_cost): Avoid vectorizing simple copy loops with
VF=2 that require versioning.
[gcc/testsuite]
2017-05-05 Bill Schmidt <wschmidt@linux.vnet.ibm.com>
* gcc.target/powerpc/versioned-copy-loop.c: New file.
From-SVN: r247671
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hardware _Float128)
[gcc]
2017-05-05 Michael Meissner <meissner@linux.vnet.ibm.com>
PR target/79038
PR target/79202
PR target/79203
* config/rs6000/rs6000.md (u code attribute): Add FIX and
UNSIGNED_FIX.
(extendsi<mode>2): Add support for doing sign extension via
VUPKHSW and XXPERMDI if the value is in Altivec registers and we
don't have ISA 3.0 instructions.
(extendsi<mode>2 splitter): Likewise.
(fix_trunc<mode>si2): If we are at ISA 2.07 (VSX small integer),
generate the normal insns since SImode can now go in vector
registers. Disallow the special UNSPECs needed for previous
machines to hide SImode being used. Add new insns
fctiw{,w}_<mode>_smallint if SImode can go in vector registers.
(fix_trunc<mode>si2_stfiwx): Likewise.
(fix_trunc<mode>si2_internal): Likewise.
(fixuns_trunc<mode>si2): Likewise.
(fixuns_trunc<mode>si2_stfiwx): Likewise.
(fctiw<u>z_<mode>_smallint): Likewise.
(fctiw<u>z_<mode>_mem): New combiner pattern to prevent conversion
of floating point to 32-bit integer from doing a direct move to
the GPR registers to do a store.
(fctiwz_<mode>): Break long line.
[gcc/testsuite]
2017-05-05 Michael Meissner <meissner@linux.vnet.ibm.com>
PR target/79038
PR target/79202
PR target/79203
* gcc.target/powerpc/ppc-round3.c: New test.
* gcc.target/powerpc/ppc-round2.c: Update expected code.
From-SVN: r247657
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resolution.
gcc/ChangeLog:
* builtins.c (check_sizes, check_strncat_sizes): Fix typos
introduced during merge conflict resolution.
(expand_builtin_strncat): Same.
gcc/testsuite/ChangeLog:
* gcc.dg/pr78138.c: Adjust text of expected diagnostics.
* gcc.dg/pr79214.c: Same.
* gcc.dg/pr79222.c: Same.
* gcc.dg/pr79223.c: Same.
* gcc.dg/tree-ssa/builtins-folding-gimple-ub.c: Expect warnings.
From-SVN: r247652
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PR tree-optimization/80632
* tree-switch-conversion.c (struct switch_conv_info): Add target_vop
field.
(build_arrays): Initialize it for virtual phis.
(fix_phi_nodes): Use it for virtual phis.
* gcc.dg/pr80632.c: New test.
From-SVN: r247642
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PR tree-optimization/80558
* tree-vrp.c (extract_range_from_binary_expr_1): Optimize
[x, y] op z into [x op, y op z] for op & or | if conditions
are met.
* gcc.dg/tree-ssa/vrp115.c: New test.
From-SVN: r247641
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2017-05-05 Andre Vieira <andre.simoesdiasvieira@arm.com>
Prakhar Bahuguna <prakhar.bahuguna@arm.com>
gcc/
PR target/71607
* config/arm/arm.md (use_literal_pool): Remove.
(64-bit immediate split): No longer takes cost into consideration
if arm_disable_literal_pool is enabled.
* config/arm/arm.c (arm_tls_referenced_p): Add diagnostic if TLS is
used when arm_disable_literal_pool is enabled.
(arm_max_const_double_inline_cost): Remove use of
arm_disable_literal_pool.
(push_minipool_fix): Add assert.
(arm_reorg): Add return if arm_disable_literal_pool is enabled.
* config/arm/vfp.md (no_literal_pool_df_immediate): New.
(no_literal_pool_sf_immediate): New.
2017-05-05 Andre Vieira <andre.simoesdiasvieira@arm.com>
Thomas Preud'homme <thomas.preudhomme@arm.com>
Prakhar Bahuguna <prakhar.bahuguna@arm.com>
gcc/testsuite/
PR target/71607
* gcc.target/arm/thumb2-slow-flash-data.c: Renamed to ...
* gcc.target/arm/thumb2-slow-flash-data-1.c: ... this.
* gcc.target/arm/thumb2-slow-flash-data-2.c: New.
* gcc.target/arm/thumb2-slow-flash-data-3.c: New.
* gcc.target/arm/thumb2-slow-flash-data-4.c: New.
* gcc.target/arm/thumb2-slow-flash-data-5.c: New.
* gcc.target/arm/tls-disable-literal-pool.c: New.
Co-Authored-By: Prakhar Bahuguna <prakhar.bahuguna@arm.com>
Co-Authored-By: Thomas Preud'homme <thomas.preudhomme@arm.com>
From-SVN: r247640
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2017-05-05 Prathamesh Kulkarni <prathamesh.kulkarni@linaro.org>
PR tree-optimization/80613
* tree-ssa-dce.c (propagate_necessity): Remove cases for
BUILT_IN_STRDUP and BUILT_IN_STRNDUP.
testsuite/
* gcc.dg/tree-ssa/pr79697.c (k): Remove.
From-SVN: r247635
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in digest_init_r, at cp/typeck2.c:1117)
/cp
2017-05-05 Paolo Carlini <paolo.carlini@oracle.com>
PR c++/71577
* decl.c (reshape_init): Unconditionally return error_mark_node
upon error about too many initializers.
/testsuite
2017-05-05 Paolo Carlini <paolo.carlini@oracle.com>
PR c++/71577
* g++.dg/cpp0x/pr71577.C: New.
From-SVN: r247630
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PR libstdc++/54924 - Warn for std::string constructor with wrong size
PR middle-end/79234 - warn on past the end reads by library functions
gcc/ChangeLog:
PR middle-end/79234
* builtins.c (check_sizes): Adjust to handle reading past the end.
Avoid printing excessive upper bound of ranges. Use %E to print
tree nodes instead of converting them to %wu.
(expand_builtin_memchr): New function.
(compute_dest_size): Rename...
(compute_objsize): ...to this.
(expand_builtin_memcpy): Adjust.
(expand_builtin_mempcpy): Adjust.
(expand_builtin_strcat): Adjust.
(expand_builtin_strcpy): Adjust.
(check_strncat_sizes): Adjust.
(expand_builtin_strncat): Adjust.
(expand_builtin_strncpy): Adjust and simplify.
(expand_builtin_memset): Adjust.
(expand_builtin_bzero): Adjust.
(expand_builtin_memcmp): Adjust.
(expand_builtin): Handle memcmp.
(maybe_emit_chk_warning): Check strncat just once.
gcc/testsuite/ChangeLog:
PR middle-end/79234
* gcc.dg/builtin-stringop-chk-8.c: New test.
* gcc.dg/builtin-stringop-chk-1.c: Adjust.
* gcc.dg/builtin-stringop-chk-4.c: Same.
* gcc.dg/builtin-strncat-chk-1.c: Same.
* g++.dg/ext/strncpy-chk1.C: Same.
* g++.dg/torture/Wsizeof-pointer-memaccess1.C: Same.
* gcc.dg/out-of-bounds-1.c: Same.
* gcc.dg/pr78138.c: Same.
* gcc.dg/torture/Wsizeof-pointer-memaccess1.c: Same.
* gfortran.dg/mvbits_7.f90: Same.
From-SVN: r247622
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warnings
PR preprocessor/79214 - -Wno-system-header defeats strncat buffer overflow warnings
PR middle-end/79222 - missing -Wstringop-overflow= on a stpcpy overflow
PR middle-end/79223 - missing -Wstringop-overflow on a memmove overflow
gcc/ChangeLog:
PR preprocessor/79214
PR middle-end/79222
PR middle-end/79223
* builtins.c (check_sizes): Add inlinining context and issue
warnings even when -Wno-system-headers is set.
(check_strncat_sizes): Same.
(expand_builtin_strncat): Same.
(expand_builtin_memmove): New function.
(expand_builtin_stpncpy): Same.
(expand_builtin): Handle memmove and stpncpy.
gcc/testsuite/ChangeLog:
PR preprocessor/79214
PR middle-end/79222
PR middle-end/79223
* gcc.dg/pr79214.c: New test.
* gcc.dg/pr79214.h: New test header.
* gcc.dg/pr79222.c: New test.
* gcc.dg/pr79223.c: New test.
* gcc.dg/pr78138.c: Adjust.
* gfortran.dg/unconstrained_commons.f: Same.
From-SVN: r247618
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gcc/c-family/ChangeLog:
PR translation/80280
* c-attribs.c (handle_alias_ifunc_attribute): Quote a %D directive.
(handle_weakref_attribute): Same.
PR translation/80280 - Missing closing quote (%>) c/semantics.c and c/c-typeck.c
gcc/ChangeLog:
PR translation/80280
* config/i386/i386.c (ix86_function_versions): Quote a %D directive.
PR translation/80280 - Missing closing quote (%>) c/semantics.c and c/c-typeck.c
gcc/cp/ChangeLog:
PR translation/80280
* call.c (print_z_candidate): Add missing quoting to %D and other
like directives.
(build_op_call_1): Same.
* constraint.cc (diagnose_check_constraint): Same.
* mangle.c (mangle_decl): Same.
* name-lookup.c (cp_binding_level_debug): Same.
(set_decl_namespace): Same.
* parser.c (cp_parser_tx_qualifier_opt): Same.
* pt.c (print_candidates_1): Same.
(check_template_variable): Same.
(tsubst_default_argument): Same.
(most_specialized_partial_spec): Same.
* semantics.c (omp_reduction_lookup): Same.
* tree.c (check_abi_tag_redeclaration): Same.
* typeck.c (comptypes): Same.
* typeck2.c (abstract_virtuals_error_sfinae): Same.
PR translation/80280 - Missing closing quote (%>) c/semantics.c and c/c-typeck.c
gcc/ChangeLog:
PR translation/80280
* builtins.c (expand_builtin_object_size): Add missing quoting to
%D and like directives.
* hsa-gen.c (hsa_type_for_scalar_tree_type): Same.
(hsa_type_for_tree_type): Same.
(verify_function_arguments): Same.
* symtab.c (symbol_table::change_decl_assembler_name): Same.
* varasm.c (get_section): Same.
(mark_weak): Same.
PR translation/80280 - Missing closing quote (%>) c/semantics.c and c/c-typeck.c
gcc/objc/ChangeLog:
PR translation/80280
* objc-gnu-runtime-abi-01.c (objc_eh_runtime_type): Add missing
quoting to directives.
* objc-next-runtime-abi-01.c (objc_eh_runtime_type): Ditto.
* objc-next-runtime-abi-02.c (next_runtime_02_eh_type): Ditto.
PR translation/80280 - Missing closing quote (%>) c/semantics.c and c/c-typeck.c
gcc/testsuite/ChangeLog:
PR translation/80280
* g++.dg/abi/Wabi-2-3.C: Adjust.
* g++.dg/abi/Wabi-3-2.C: Ditto.
* g++.dg/lookup/using17.C: Ditto.
* gcc.dg/format/gcc_diag-1.c (foo): Ditto.
From-SVN: r247607
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2017-05-04 Martin Jambor <mjambor@suse.cz>
PR tree-optimization/80622
* tree-sra.c (comes_initialized_p): New function.
(build_accesses_from_assign): Only set write lazily when
comes_initialized_p is false.
(analyze_access_subtree): Use comes_initialized_p.
(propagate_subaccesses_across_link): Assert !comes_initialized_p
instead of testing for PARM_DECL.
testsuite/
* gcc.dg/tree-ssa/pr80622.c: New test.
From-SVN: r247604
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* config/aarch64/aarch64.md (prefetch); Adjust predicate and
constraint on operand 0 to allow more general addressing modes.
Adjust output template.
* config/aarch64/aarch64.c (aarch64_address_valid_for_prefetch_p):
New function.
* config/aarch64/aarch64-protos.h
(aarch64_address_valid_for_prefetch_p): Declare prototype.
* config/aarch64/constraints.md (Dp): New address constraint.
* config/aarch64/predicates.md (aarch64_prefetch_operand): New
predicate.
* gcc.target/aarch64/prfm_imm_offset_1.c: New test.
From-SVN: r247603
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use of estimate_ipcp_clone_size_and_time.
* ipa-cp.c (perform_estimation_of_a_value): Drop base_time parameter;
update use of estimate_ipcp_clone_size_and_time.
(estimate_local_effects): Update use of
estimate_ipcp_clone_size_and_time and perform_estimation_of_a_value.
* ipa-inline.h (estimate_ipcp_clone_size_and_time): Update prototype.
* ipa-inline-analysis.c (estimate_ipcp_clone_size_and_time):
Return nonspecialized time.
* gcc.dg/ipa/ipcp-2.c: Decrease ipcp threshold
* gcc.dg/tree-ssa/ipa-cp-1.c: Likewise.
From-SVN: r247597
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VUSE which def dominates the PHI.
2017-05-04 Richard Biener <rguenther@suse.de>
* tree-ssa-alias.c (get_continuation_for_phi): Improve looking
for the last VUSE which def dominates the PHI. Directly call
maybe_skip_until.
(get_continuation_for_phi_1): Remove.
* gcc.dg/tree-ssa/ssa-fre-58.c: New testcase.
From-SVN: r247596
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For the reasons explained in PR77536, niter_for_unrolled_loop assumes 5
iterations in the absence of profiling information, although it doesn't
increase beyond the estimate for the original loop. This left a hole in
which the new estimate could be less than the old one but still greater
than the limit imposed by CEIL (nb_iterations_upper_bound, unroll factor).
2017-05-04 Richard Sandiford <richard.sandiford@linaro.org>
gcc/
* tree-ssa-loop-manip.c (niter_for_unrolled_loop): Add commentary
to explain the use of truncating division. Cap the number of
iterations to the maximum given by nb_iterations_upper_bound,
if defined.
gcc/testsuite/
* gcc.dg/vect/vect-profile-1.c: New test.
From-SVN: r247591
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From-SVN: r247589
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From-SVN: r247587
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PR tree-optimization/80612
* calls.c (get_size_range): Check for INTEGRAL_TYPE_P.
* gcc.dg/torture/pr80612.c: New test.
From-SVN: r247586
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This patch adds support for purecode to ARMv8-M Baseline, in addition to
the existing support for ARMv7-M and ARMv8-M Mainline.
2017-05-04 Prakhar Bahuguna <prakhar.bahuguna@arm.com>
Andre Simoes Dias Vieira <andre.simoesdiasvieira@arm.com>
gcc/
* config/arm/arm.md (movsi): Change TARGET_32BIT to TARGET_HAVE_MOVT.
(movt splitter): Likewise.
* config/arm/arm.c (arm_option_check_internal): Change arm_arch_thumb2
to TARGET_HAVE_MOVT, and merge with -mslow-flash-data check.
(const_ok_for_arm): Change else to else if (TARGET_THUMB2) and add else
block for Thumb-1 with MOVT.
(thumb2_legitimate_address_p): Move code block ...
(can_avoid_literal_pool_for_label_p): ... into this new function.
(thumb1_legitimate_address_p): Add check for TARGET_HAVE_MOVT and
literal pool.
(thumb_legitimate_constant_p): Add conditional on TARGET_HAVE_MOVT
* doc/invoke.texi (-mpure-code): Change "ARMv7-M targets" for
"M-profile targets with the MOVT instruction".
gcc/testsuite/
* gcc.target/arm/pure-code/pure-code.exp: Add conditional for
check_effective_target_arm_thumb1_movt_ok.
Co-Authored-By: Andre Vieira <andre.simoesdiasvieira@arm.com>
From-SVN: r247585
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The GCC documentation in section 6.60.8 ARM Floating Point Status and
Control Intrinsics states that the FPSCR register can be read and
written to using the intrinsics __builtin_arm_get_fpscr and
__builtin_arm_set_fpscr. However, these are misnamed within GCC itself
and these intrinsic names are not recognised.
This patch corrects the intrinsic names to match the documentation, and
adds tests to verify these intrinsics generate the correct
instructions.
2017-05-04 Prakhar Bahuguna <prakhar.bahuguna@arm.com>
gcc/
* gcc/config/arm/arm-builtins.c (arm_init_builtins): Rename
__builtin_arm_ldfscr to __builtin_arm_get_fpscr, and rename
__builtin_arm_stfscr to __builtin_arm_set_fpscr.
gcc/testsuite/
* gcc.target/arm/fpscr.c: New file.
From-SVN: r247584
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2017-05-04 Thomas Preud'homme <thomas.preudhomme@arm.com>
gcc/testsuite/
* gcc.c-torture/execute/pr78622.c: Require c99_runtime effective
target.
From-SVN: r247582
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