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2017-08-29re PR target/82015 (PowerPC should check if 2nd argument to __builtin_unpackv...Michael Meissner1-0/+14
2017-08-29*.c: Remove excess braces from target selectors.Uros Bizjak83-91/+89
2017-08-2920030926-1.c: Add dg-additional-options.Uros Bizjak29-48/+45
2017-08-29re PR target/80993 ([msp430] __attribute__((interrupt)) should imply __attrib...Jozef Lawrynowicz1-0/+13
2017-08-27re PR target/81995 (gcc/reg-stack.c:2073:1: error: unrecognizable insn:)Uros Bizjak2-0/+2
2017-08-25Part 3/3 for contributing PPC64LE support for X86 SSE instrisics. Steven Munroe65-0/+3079
2017-08-24rs6000.opt (-mpower9-dform-scalar): Delete undocumented switches.Michael Meissner7-14/+8
2017-08-24Adds the powerpc equivalent mm_malloc.h header which is needed by xmmintrin.h...Steven Munroe1-0/+2
2017-08-24re PR target/81921 (Fails to always-inline intrinsics with -flto)Richard Biener1-0/+14
2017-08-23PR target/80969 - Fix ICE with -mabi=ms -mavx512f, reduce wasted space when r...Daniel Santos8-0/+229
2017-08-23fold-vec-perm-char.c: New.Will Schmidt7-0/+172
2017-08-22PR target/71958: Error on -mx32 with -mabi=msDaniel Santos5-4/+11
2017-08-22fold-vec-sums-int.c: New.Will Schmidt1-0/+16
2017-08-21re PR target/46091 (missed optimization: x86 bt/btc/bts instructions)Uros Bizjak4-0/+120
2017-08-18re PR target/80210 (ICE in in extract_insn, at recog.c:2311 on ppc64 for with...Peter Bergner1-0/+10
2017-08-17altivec.md (VParity): Remove TARGET_VSX_TIMODE.Peter Bergner4-11/+3
2017-08-17re PR target/72804 (Poor code gen with -mvsx-timode)Peter Bergner1-0/+25
2017-08-17[AArch64] Improve SIMD store of zero.Jackson Woodruff1-0/+22
2017-08-16re PR target/46091 (missed optimization: x86 bt/btc/bts instructions)Uros Bizjak3-3/+24
2017-08-14ucnid-5.c: Skip on AIX.David Edelsohn1-0/+1
2017-08-14re PR target/46091 (missed optimization: x86 bt/btc/bts instructions)Uros Bizjak3-0/+27
2017-08-14[AArch64] Fix longbranch testWilco Dijkstra1-4/+2
2017-08-14re PR target/79845 (rs6000: make code in rs6000.c more i18n-friendly)Bill Schmidt75-95/+95
2017-08-14[AArch64] Fix dbl_mov_immediate_1.c testSzabolcs Nagy1-1/+1
2017-08-11Do not instrument void variables with MPX (PR tree-opt/79987).Martin Liska1-0/+5
2017-08-11Fix ifunc and resolver (PR ipa/81213).Martin Liska1-0/+19
2017-08-10re PR target/81708 (The x86 stack canary location should be customizable)Uros Bizjak1-0/+6
2017-08-10i386: Don't use frame pointer without stack accessH.J. Lu7-0/+98
2017-08-10fold-vec-msum-short.c: Fix typo.Will Schmidt2-2/+2
2017-08-09vect-xorsign_exec.c: Add --save-temps to the options passed.Andrew Pinski1-1/+1
2017-08-09fold-vec-pack-double.c: New.Will Schmidt4-0/+102
2017-08-09fold-vec-msum-char.c: New.Will Schmidt2-0/+50
2017-08-09fold-vec-madd-double.c: New.Will Schmidt3-0/+72
2017-08-09fold-vec-cntlz-int.c: New.Will Schmidt4-0/+88
2017-08-08re PR target/81708 (The x86 stack canary location should be customizable)Uros Bizjak1-0/+6
2017-08-08re PR middle-end/19706 (Recognize common Fortran usages of copysign.)Tamar Christina3-0/+170
2017-08-08scalar-extract-exp-2.c: Adjust diagnostic string.Bill Schmidt12-12/+12
2017-08-07re PR target/81593 (Optimize PowerPC vector set from vector extract)Michael Meissner7-0/+459
2017-08-07Revert r250916H.J. Lu4-49/+0
2017-08-07i386: Don't use frame pointer without stack accessH.J. Lu4-0/+49
2017-08-06target_attr_10.c: Add -mcpu=generic.Andrew Pinski10-10/+10
2017-08-06atomic_cmp_exchange_zero_reg_1.c: Pass -march=armv8-a+nolse, skip if -mcpu= i...Andrew Pinski2-2/+4
2017-08-06_Float16_1.c: Skip if supplied a -mcpu= option.Andrew Pinski3-0/+3
2017-08-04builtins-3.c: Remove ISA 3.0 word variant builtin test cases for vec_mule, an...Carl Love2-33/+34
2017-08-04i386: Rewrite check for AVX512 featuresH.J. Lu14-576/+130
2017-08-03rs6000-c.c (altivec_resolve_overloaded_builtin): Don't start diagnostic messa...Bill Schmidt57-63/+63
2017-08-03Error out on nvptx for fpatchable-function-entryTom de Vries1-0/+15
2017-08-02re PR target/81644 (ICE in rtl_verify_bb_insn, BBRO pass duplicates BB that e...Uros Bizjak1-0/+15
2017-08-02funcspec-56.inc (no_3dnowa): Properly test "no-3dnowa" target attribute.Uros Bizjak1-1/+1
2017-08-01386: Disallow naked attribute with interrupt attributeH.J. Lu1-0/+8
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