riscv-gnu-toolchain/gcc.git - Unnamed repository; edit this file 'description' to name the repository.

Age	Commit message (Expand)	Author	Files	Lines
2024-04-25	RISC-V: Add xfail test case for highpart register overlap of vwcvt	Pan Li	3	-0/+223
2024-04-24	Revert "RISC-V: Support highpart register overlap for vwcvt"	Pan Li	6	-226/+3
2024-04-24	RISC-V: Add xfail test case for highpart overlap of vext.vf	Pan Li	4	-1/+224
2024-04-24	Revert "RISC-V: Support highpart overlap for vext.vf"	Pan Li	4	-224/+1
2024-04-22	RISC-V: Add xfail test case for highpart overlap floating-point widen insn	Pan Li	9	-0/+839
2024-04-22	Revert "RISC-V: Support highpart overlap for floating-point widen instructions"	Pan Li	9	-841/+0
2024-04-22	RISC-V: Add xfail test case for indexed load overlap with SRC EEW < DEST EEW	Pan Li	7	-1/+394
2024-04-22	Revert "RISC-V: Support highpart overlap for indexed load with SRC EEW < DEST...	Pan Li	6	-393/+0
2024-04-22	RISC-V: Add xfail test case for highest-number regno ternary overlap	Pan Li	2	-0/+185
2024-04-22	Revert "RISC-V: Support highest-number regno overlap for widen ternary"	Pan Li	2	-185/+0
2024-04-22	RISC-V: Add xfail test case for widening register overlap of vf4/vf8	Pan Li	3	-0/+170
2024-04-22	Revert "RISC-V: Support widening register overlap for vf4/vf8"	Pan Li	3	-170/+0
2024-04-22	RISC-V: Add xfail test case for highpart register overlap of vx/vf widen	Pan Li	6	-0/+616
2024-04-21	Revert "RISC-V: Support highpart register overlap for widen vx/vf instructions"	Pan Li	6	-616/+0
2024-04-21	RISC-V: Add xfail test case for incorrect overlap on v0	Pan Li	1	-0/+101
2024-04-20	Revert "RISC-V: Fix overlap group incorrect overlap on v0"	Pan Li	1	-101/+0
2024-04-20	RISC-V: Add xfail test case for wv insn highest overlap	Pan Li	3	-0/+314
2024-04-20	Revert "RISC-V: Support highest overlap for wv instructions"	Pan Li	3	-314/+0
2024-04-20	RISC-V: Add xfail test case for wv insn register overlap	Pan Li	1	-0/+30
2024-04-20	Revert "RISC-V: Support one more overlap for wv instructions"	Pan Li	1	-30/+0
2024-04-16	optimize Zicond conditional select cases.	Fei Gao	1	-0/+16
2024-04-15	RISC-V: Add VLS to mask vec_extract [PR114668].	Robin Dapp	1	-0/+35
2024-04-12	RISC-V: Bugfix ICE non-vector in TARGET_FUNCTION_VALUE_REGNO_P	Pan Li	4	-0/+44
2024-04-11	RISC-V: Remove -Wno-psabi for test build option [NFC]	Pan Li	60	-60/+60
2024-04-11	RISC-V: Bugfix ICE for the vector return arg in mode switch	Pan Li	1	-0/+14
2024-04-08	RISC-V: Implement TLS Descriptors.	Tatsuyuki Ishi	2	-0/+17
2024-04-08	RISC-V: Refine the error msg for RVV intrinisc required ext	Pan Li	12	-2/+111
2024-04-08	RISC-V: Allow RVV intrinsic for more function target	Pan Li	61	-418/+1604
2024-03-31	RISC-V: Fix misspelled term builtin in error message	Pan Li	2	-2/+2
2024-03-28	RISC-V: testsuite: ensure vtype is call clobbered	Vineet Gupta	1	-0/+47
2024-03-25	RISC-V: Allow RVV intrinsic when function target("arch=+v")	Pan Li	9	-4/+102
2024-03-22	RISC-V: Require a extension for ztso testcases with atomic insns	Patrick O'Neill	17	-0/+17
2024-03-22	RISC-V: Introduce gcc attribute riscv_rvv_vector_bits for RVV	Pan Li	19	-0/+610
2024-03-22	RISC-V: Don't add fractional LMUL types to V_VLS for XTheadVector	Christoph Müllner	1	-0/+56
2024-03-22	RISC-V: Bugfix function target attribute pollution	Pan Li	1	-0/+113
2024-03-22	RISC-V: Bugfix ICE for __attribute__((target("arch=+v"))	Pan Li	2	-0/+85
2024-03-20	RISC-V: Introduce option -mrvv-max-lmul for RVV autovec	demin.han	475	-529/+529
2024-03-19	RISC-V: Update test expectancies with recent scheduler change	Edwin Lu	21	-69/+73
2024-03-18	[PATCH v5 1/1] RISC-V: Add support for XCVbi extension in CV32E40P	Mary Bennett	4	-0/+130
2024-03-18	[PATCH] RISC-V: Add XiangShan Nanhu microarchitecture.	Chen Jiawei	1	-0/+34
2024-03-10	VECT: Fix ICE for vectorizable LD/ST when both len and store are enabled	Pan Li	1	-0/+15
2024-03-09	[committed] [PR target/111362] Fix compare-debug issue with mode switching	jlaw	2	-0/+12
2024-03-07	vect: Do not peel epilogue for partial vectors.	Robin Dapp	1	-0/+19
2024-03-06	RISC-V: Use vmv1r.v instead of vmv.v.v for fma output reloads [PR114200].	Robin Dapp	2	-0/+38
2024-03-06	[PR target/113001] Fix incorrect operand swapping in conditional move	Jeff Law	2	-0/+37
2024-03-01	[14 regression] Fix insn types in risc-v port	Jeff Law	7	-7/+7
2024-03-01	RISC-V: Add riscv_vector_cc function attribute	xuli	2	-0/+41
2024-03-01	RISC-V: Introduce gcc option mrvv-vector-bits for RVV	Pan Li	1332	-1358/+1424
2024-02-29	RISC-V: Fix __atomic_compare_exchange with 32 bit value on RV64	Kito Cheng	1	-0/+12
2024-02-23	RISC-V: Fix vec_init for simple sequences [PR114028].	Robin Dapp	1	-0/+25