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2016-09-26 Andre Vieira <andre.simoesdiasvieira@arm.com>
* target.def(elf_flags_numeric): Change documentation to
present tense.
* doc/tm.texi: Regenerate.
From-SVN: r240490
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* hooks.h (hook_uint_uintp_false): Rename to...
(hook_bool_uint_uintp_false): ... this.
* hooks.c (hook_uint_uintp_false): Rename to...
(hook_bool_uint_uintp_false): ... this.
* target.def (elf_flags_numeric): Use hook_bool_uint_uintp_false
instead of hook_uint_uintp_false.
Co-Authored-By: Jakub Jelinek <jakub@redhat.com>
From-SVN: r240417
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gcc/ChangeLog:
2016-09-22 Andre Vieira <andre.simoesdiasvieira@arm.com>
Terry Guo <terry.guo@arm.com>
* target.def (elf_flags_numeric): New target hook.
* targhooks.h (default_asm_elf_flags_numeric): New.
* varasm.c (default_asm_elf_flags_numeric): New.
(default_elf_asm_named_section): Use new target hook.
* config/arm/arm.opt (mpure-code): New.
* config/arm/arm.h (SECTION_ARM_PURECODE): New.
* config/arm/arm.c (arm_asm_init_sections): Add section
attribute to default text section if -mpure-code.
(arm_option_check_internal): Diagnose use of option with
non supported targets and/or options.
(arm_asm_elf_flags_numeric): New.
(arm_function_section): New.
(arm_elf_section_type_flags): New.
* config/arm/elf.h (JUMP_TABLES_IN_TEXT_SECTION): Disable
for -mpure-code.
* gcc/doc/texi (TARGET_ASM_ELF_FLAGS_NUMERIC): New.
* gcc/doc/texi.in (TARGET_ASM_ELF_FLAGS_NUMERIC): Likewise.
gcc/testsuite/ChangeLog:
2016-09-22 Andre Vieira <andre.simoesdiasvieira@arm.com>
Terry Guo <terry.guo@arm.com>
* gcc.target/arm/pure-code/ffunction-sections.c: New.
* gcc.target/arm/pure-code/no-literal-pool.c: New.
* gcc.target/arm/pure-code/pure-code.exp: New.
Co-Authored-By: Terry Guo <terry.guo@arm.com>
From-SVN: r240379
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gcc/ChangeLog:
PR middle-end/49905
* Makefile.in (OBJS): Add gimple-ssa-sprintf.o.
* config/linux.h (TARGET_PRINTF_POINTER_FORMAT): Redefine.
* config/linux.c (gnu_libc_printf_pointer_format): New function.
* config/sol2.h (TARGET_PRINTF_POINTER_FORMAT): Same.
* config/sol2.c (solaris_printf_pointer_format): New function.
* doc/invoke.texi (-Wformat-length, -fprintf-return-value): New
options.
* doc/tm.texi.in (TARGET_PRINTF_POINTER_FORMAT): Document.
* doc/tm.texi: Regenerate.
* gimple-fold.h (get_range_strlen): New function.
(get_maxval_strlen): Declare existing function.
* gimple-fold.c (get_range_strlen): Add arguments and compute both
maximum and minimum.
(get_range_strlen): Define overload.
(get_maxval_strlen): Adjust.
* gimple-ssa-sprintf.c: New file and pass.
* passes.def (pass_sprintf_length): Add new pass.
* targhooks.h (default_printf_pointer_format): Declare new function.
(gnu_libc_printf_pointer_format): Same.
(solaris_libc_printf_pointer_format): Same.
* targhooks.c (default_printf_pointer_format): Define new function.
* tree-pass.h (make_pass_sprintf_length): Declare new function.
* print-tree.c: Increase buffer size.
gcc/c-family/ChangeLog:
PR middle-end/49905
* c.opt: Add -Wformat-length and -fprintf-return-value.
gcc/testsuite/ChangeLog:
PR middle-end/49905
* gcc.dg/builtin-stringop-chk-1.c: Adjust.
* gcc.dg/tree-ssa/builtin-sprintf-warn-1.c: New test.
* gcc.dg/tree-ssa/builtin-sprintf-warn-2.c: New test.
* gcc.dg/tree-ssa/builtin-sprintf-warn-3.c: New test.
* gcc.dg/tree-ssa/builtin-sprintf-warn-4.c: New test.
* gcc.dg/tree-ssa/builtin-sprintf.c: New test.
* gcc.dg/tree-ssa/builtin-sprintf-2.c: New test.
From-SVN: r240298
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* target.def (lra_p): Wordsmithing.
* doc/tm.texi: Regenerate.
From-SVN: r240236
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2016-09-14 Segher Boessenkool <segher@kernel.crashing.org>
* target.def (lra_p): Change commentary (for the manual) for the
new default.
* doc/tm.texi: Regenerate.
From-SVN: r240133
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* doc/extend.texi: Use lowercase "boolean".
* doc/invoke.texi: Likewise.
* doc/md.texi: Likewise.
* target.def: Likewise.
* doc/tm.texi: Regenerated.
From-SVN: r240091
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2016-09-10 Bernd Edlinger <bernd.edlinger@hotmail.de>
* doc/tm.texi.in (INITIAL_FRAME_POINTER_OFFSET): Remove.
(ELIMINABLE_REGS, TARGET_CAN_ELIMINATE,
INITIAL_ELIMINATION_OFFSET) : Update documentation.
* target.def (frame_pointer_required, can_eliminate): Likewise.
* doc/tm.texi: Regenerated.
* builtins.c (expand_builtin_setjmp_receiver): Remove #ifdef
ELIMINABLE_REGS.
* df-scan.c (df_hard_reg_init): Likewise.
* ira.c (ira_setup_eliminable_regset): Likewise.
* lra-eliminations.c (reg_eliminate_1, (update_reg_eliminate,
init_elim_table): Likewise.
* reload1.c (reg_eliminate_1, verify_initial_elim_offsets,
set_initial_elim_offsets, update_eliminables,
init_elim_table): Likewise.
* rtlanal.c (get_initial_register_offset): Likewise.
* config/ft32/ft32.h (INITIAL_FRAME_POINTER_OFFSET): Remove.
* config/m32r/m32r.h (INITIAL_FRAME_POINTER_OFFSET): Likewise.
* config/moxie/moxie.h (INITIAL_FRAME_POINTER_OFFSET): Likewise.
* config/vax/vax.h (INITIAL_FRAME_POINTER_OFFSET): Likewise.
* config/fr30/fr30.h: Fix comment.
* config/frv/frv.c: Likewise.
* config/frv/frv.h: Likewise.
* config/ft32/ft32.h: Likewise.
* config/visium/visium.h: Likewise.
* config/pa/pa64-linux.h: Likewise.
* config/v850/v850.h: Likewise.
* config/cris/cris.c: Likewise.
* config/ia64/ia64.h: Likewise.
* config/moxie/moxie.h: Likewise.
* config/m32r/m32r.h: Likewise.
From-SVN: r240058
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ISO/IEC TS 18661-3:2015 defines C bindings to IEEE interchange and
extended types, in the form of _FloatN and _FloatNx type names with
corresponding fN/FN and fNx/FNx constant suffixes and FLTN_* / FLTNX_*
<float.h> macros. This patch implements support for this feature in
GCC.
The _FloatN types, for N = 16, 32, 64 or >= 128 and a multiple of 32,
are types encoded according to the corresponding IEEE interchange
format (endianness unspecified; may use either the NaN conventions
recommended in IEEE 754-2008, or the MIPS NaN conventions, since the
choice of convention is only an IEEE recommendation, not a
requirement). The _FloatNx types, for N = 32, 64 and 128, are IEEE
"extended" types: types extending a narrower format with range and
precision at least as big as those specified in IEEE 754 for each
extended type (and with unspecified representation, but still
following IEEE semantics for their values and operations - and with
the set of values being determined by the precision and the maximum
exponent, which means that while Intel "extended" is suitable for
_Float64x, m68k "extended" is not). These types are always distinct
from and not compatible with each other and the standard floating
types float, double, long double; thus, double, _Float64 and _Float32x
may all have the same ABI, but they are three still distinct types.
The type names may be used with _Complex to construct corresponding
complex types (unlike __float128, which acts more like a typedef name
than a keyword - thus, this patch may be considered to fix PR
c/32187). The new suffixes can be combined with GNU "i" and "j"
suffixes for constants of complex types (e.g. 1.0if128, 2.0f64i).
The set of types supported is implementation-defined. In this GCC
patch, _Float32 is SFmode if that is suitable; _Float32x and _Float64
are DFmode if that is suitable; _Float128 is TFmode if that is
suitable; _Float64x is XFmode if that is suitable, and otherwise
TFmode if that is suitable. There is a target hook to override the
choices if necessary. "Suitable" means both conforming to the
requirements of that type, and supported as a scalar type including in
libgcc. The ABI is whatever the back end does for scalars of that
mode (but note that _Float32 is passed without promotion in variable
arguments, unlike float). All the existing issues with exceptions and
rounding modes for existing types apply equally to the new type names.
No GCC port supports a floating-point format suitable for _Float128x.
Although there is HFmode support for ARM and AArch64, use of that for
_Float16 is not enabled. Supporting _Float16 would require additional
work on the excess precision aspects of TS 18661-3: there are new
values of FLT_EVAL_METHOD, which are not currently supported in GCC,
and FLT_EVAL_METHOD == 0 now means that operations and constants on
types narrower than float are evaluated to the range and precision of
float. Implementing that, so that _Float16 gets evaluated with excess
range and precision, would involve changes to the excess precision
infrastructure so that the _Float16 case is enabled by default, unlike
the x87 case which is only enabled for -fexcess-precision=standard.
Other differences between _Float16 and __fp16 would also need to be
disentangled.
GCC has some prior support for nonstandard floating-point types in the
form of __float80 and __float128. Where these were previously types
distinct from long double, they are made by this patch into aliases
for _Float64x / _Float128 if those types have the required properties.
In principle the set of possible _FloatN types is infinite. This
patch hardcodes the four such types for N <= 128, but with as much
code as possible using loops over types to minimize the number of
places with such hardcoding. I don't think it's likely any further
such types will be of use in future (or indeed that formats suitable
for _Float128x will actually be implemented). There is a corner case
that all _FloatN, for N >= 128 and a multiple of 32, should be treated
as keywords even when the corresponding type is not supported; I
intend to deal with that in a followup patch.
Tests are added for various functionality of the new types, mostly
using type-generic headers. The tests use dg-add-options to pass any
extra options needed to enable the types; this is wired up to use the
same options as for __float128 on powerpc to enable _Float128 and
_Float64x, and effective-target keywords for runtime support do the
same hardware test as for __float128 to make sure the VSX instructions
generated by those options are supported. (Corresponding additions
would be needed for _Float16 on ARM as well if that were enabled with
-mfp16-format=ieee required to use it rather than unconditionally
available. Of course, -mfp16-format=alternative enables use of a
format which is not compatible with the requirements of the _Float16
type.)
C++ note: no support for the new types or constant suffixes is added
for C++. C++ decimal floating-point support was very different from
the C support, using class types, and the same may well apply to any
future C++ bindings for IEEE interchange and extended types. There is
a case, however, for supporting at least *f128 constants in C++, so
that code using __float128 can use the newer style for constants
throughout rather than needing to use the older *q constants in C++.
Also, if built-in functions are added that may provide a way in which
the types could leak into C++ code.
Fortran note: the float128_type_node used in the Fortran front end is
renamed to gfc_float128_type_node, since the semantics are different:
in particular, if long double has binary128 format, then the new
language-independent float128_type_node is a distinct type that also
has binary128 format, but the Fortran node is expected to be NULL in
that case. Likewise, Fortran's complex_float128_type_node is renamed
to gfc_complex_float128_type_node.
PowerPC note: the back end had an inconsistency that if TFmode was
binary128, *q constants were TFmode instead of KFmode but __float128
was KFmode. This patch follows the same logic as for *q constants, so
that _Float128 prefers TFmode (and __float128 becomes an alias for
_Float128).
ARM note: __fp16 is promoted to double (by convert_arguments) when
passed without a prototype / in variable arguments. But this is only
about the argument promotion; it is not handled as promoting in
c-common.c:self_promoting_args_p / c-typeck.c:c_type_promotes_to,
meaning that a K&R function definition for an argument of type __fp16
corresponds to a prototype with an argument of that type, not to one
with an argument of type double, whereas a float argument in a K&R
function definition corresponds to a double prototype argument - and
the same functions are also what's involved in making va_arg give a
warning and generate a call to abort when called with type float.
This is preserved by this patch, while arranging for _Float16 not to
be promoted when passed without a prototype / in variable arguments
(the promotion of float being considered a legacy feature, not applied
to any new types in C99 or later).
TS 18661-3 extends the set of decimal floating-point types similarly,
and adds new constant suffixes for the existing types, but this patch
does not do anything regarding that extension.
This patch does nothing regarding built-in functions, although
type-generic functions such as __builtin_isinf work for the new types
and associated tests are included. There are at least two levels of
built-in function support possible for these types. The minimal
level, implemented in
<https://gcc.gnu.org/ml/gcc-patches/2016-06/msg01702.html> (which
needs updating to use dg-add-options), adds built-in functions similar
to those x86 has for __float128: __builtin_inf* __builtin_huge_val*,
__builtin_nan*, __builtin_nans*, __builtin_fabs*, __builtin_copysign*.
That would be sufficient for glibc to use the *f128 names for built-in
functions by default with *q used only for backwards compatibility
when using older GCC versions. That would also allow c_cpp_builtins's
flag_building_libgcc code, defining __LIBGCC_%s_FUNC_EXT__, to use
such suffixes rather than the present code hardcoding logic about
target-specific constant suffixes and how those relate to function
suffixes.
Full built-in function support would cover the full range of built-in
functions for existing floating-point types, adding variants for all
the new types, except for a few obsolescent functions and
non-type-generic variants of type-generic functions. Some but not all
references to such functions in GCC use macros such as CASE_FLT_FN to
be type-generic; a fair amount of work would be needed to identify all
places to update. Adding all those functions would enable
optimizations (for constant arguments and otherwise) for TS 18661-3
functions, but it would also substantially expand the enum listing
built-in functions (and we've had problems with the size of that enum
in the past), and increase the amount of built-in function
initialization to do - I don't know what the startup cost involved in
built-in function initialization is, but it would be something to
consider when adding such a large set of functions.
There are also a range of optimizations, in match.pd and elsewhere,
that only operate on the three standard floating-point types. Ideally
those would be made generic to all floating-point types, but this
patch does nothing in that regard. Special care would be needed
regarding making sure library functions to which calls are generated
actually exist. For example, if sqrt is called on an argument of type
_Float32, and the result converted to _Float32, this is equivalent to
doing a square root operation directly on _Float32. But if the user's
libm does not have the sqrtf32 function, or the name is not reserved
because __STDC_WANT_IEC_60559_TYPES_EXT__ was not defined before
including <math.h>, you can only do that optimization if you convert
to a call to sqrtf instead.
DECIMAL_DIG now relates to all supported floating-point formats, not
just float, double and long double; I've raised the question with WG14
of how this relates to the formula for DECIMAL_DIG in C11 not
considering this. TS 18661-3 says it also covers non-arithmetic
formats only supported by library conversion functions; this patch
does not add any target hooks to allow for the case where there are
such formats wider than any supported for arithmetic types (where
e.g. libc supports conversions involving the binary128 representation,
but the _Float128 type is not supported).
GCC provides its own <tgmath.h> for some targets. No attempt is made
to adapt this to handle the new types.
Nothing is done regarding debug info for the new types (see the
"Debugger support for __float128 type?" thread on gcc@, Sep/Oct 2015).
No __SIZEOF_*__ macros are added for the new types.
Nothing is done with do_warn_double_promotion.
Nothing is done to include the new types in those determining
max_align_t, although properly it should be sufficiently aligned for
any of those types.
The logic for usual arithmetic conversions in c_common_type relies on
TYPE_PRECISION for floating-point types, which is less than ideal
(doesn't necessarily correspond to whether one type's values are
subset of another); looking in more detail at the formats might be
better. But since I included code in build_common_tree_nodes to work
around rs6000 KFmode having precision 113 not 128, I think it should
work. Ideally one might have errors in generic code for the case
where the two types do not have one type's values a subset of the
other (which is undefined behavior). But the only case where this can
actually occur is mixing IBM long double with binary128 on powerpc,
and rs6000_invalid_binary_op deals with that at present. TS 18661-3
does not fully specify the type resulting from the usual arithmetic
conversions in the case where two _FloatNx types have the same set of
values; I arranged the code to prefer the greater value of N in that
case.
The __FP_FAST_FMA* macros are not extended to cover the new types,
since there are no corresponding built-in functions (if built-in
fmafN, fmafNx are added, the macros should be extended, and the new
macros documented). Also, only a limited set of modes is handled in
mode_has_fma.
Diagnostics relating to the use of the new types with -pedantic do not
try to distinguish them from purely nonstandard types such as __int128
and constant suffixes such as *q.
If you use an unsupported _FloatN / _FloatNx type you get a warning
about the type defaulting to int after the warning about the type not
being supported. That's less than ideal, but it's also a pre-existing
condition if you use __int128 on a 32-bit system where it's
unsupported.
Bootstrapped with no regressions on x86_64-pc-linux-gnu. Other
back-end changes minimally tested by building cc1 for ia64-linux-gnu,
powerpc64le-linux-gnu, pdp11-none (the last failed for unrelated
reasons).
PR c/32187
gcc:
* tree-core.h (TI_COMPLEX_FLOAT16_TYPE)
(TI_COMPLEX_FLOATN_NX_TYPE_FIRST, TI_COMPLEX_FLOAT32_TYPE)
(TI_COMPLEX_FLOAT64_TYPE, TI_COMPLEX_FLOAT128_TYPE)
(TI_COMPLEX_FLOAT32X_TYPE, TI_COMPLEX_FLOAT64X_TYPE)
(TI_COMPLEX_FLOAT128X_TYPE, TI_FLOAT16_TYPE, TI_FLOATN_TYPE_FIRST)
(TI_FLOATN_NX_TYPE_FIRST, TI_FLOAT32_TYPE, TI_FLOAT64_TYPE)
(TI_FLOAT128_TYPE, TI_FLOATN_TYPE_LAST, TI_FLOAT32X_TYPE)
(TI_FLOATNX_TYPE_FIRST, TI_FLOAT64X_TYPE, TI_FLOAT128X_TYPE)
(TI_FLOATNX_TYPE_LAST, TI_FLOATN_NX_TYPE_LAST): New enum
tree_index values.
(NUM_FLOATN_TYPES, NUM_FLOATNX_TYPES, NUM_FLOATN_NX_TYPES): New
macros.
(struct floatn_type_info): New structure type.
(floatn_nx_types): New variable declaration.
* tree.h (FLOATN_TYPE_NODE, FLOATN_NX_TYPE_NODE)
(FLOATNX_TYPE_NODE, float128_type_node, float64x_type_node)
(COMPLEX_FLOATN_NX_TYPE_NODE): New macros.
* tree.c (floatn_nx_types): New variable.
(build_common_tree_nodes): Initialize _FloatN, _FloatNx and
corresponding complex types.
* target.def (floatn_mode): New hook.
* targhooks.c: Include "real.h".
(default_floatn_mode): New function.
* targhooks.h (default_floatn_mode): New prototype.
* doc/extend.texi (Floating Types): Document _FloatN and _FloatNx
types.
* doc/sourcebuild.texi (float@var{n}, float@var{n}x): Document new
effective-target and dg-add-options keywords.
(float@var{n}_runtime, float@var{n}x_runtime, floatn_nx_runtime):
Document new effective-target keywords.
* doc/tm.texi.in (TARGET_FLOATN_MODE): New @hook.
* doc/tm.texi: Regenerate.
* ginclude/float.h (LDBL_DECIMAL_DIG): Define to
__LDBL_DECIMAL_DIG__, not __DECIMAL_DIG__.
[__STDC_WANT_IEC_60559_TYPES_EXT__]: Define macros from TS
18661-3.
* real.h (struct real_format): Add field ieee_bits.
* real.c (ieee_single_format, mips_single_format)
(motorola_single_format, spu_single_format, ieee_double_format)
(mips_double_format, motorola_double_format)
(ieee_extended_motorola_format, ieee_extended_intel_96_format)
(ieee_extended_intel_128_format)
(ieee_extended_intel_96_round_53_format, ibm_extended_format)
(mips_extended_format, ieee_quad_format, mips_quad_format)
(vax_f_format, vax_d_format, vax_g_format, decimal_single_format)
(decimal_double_format, decimal_quad_format, ieee_half_format)
(arm_half_format, real_internal_format: Initialize ieee_bits
field.
* config/i386/i386.c (ix86_init_builtin_types): Do not initialize
float128_type_node. Set float80_type_node to float64x_type_node
if appropriate and long_double_type_node not appropriate.
* config/ia64/ia64.c (ia64_init_builtins): Likewise.
* config/pdp11/pdp11.c (pdp11_f_format, pdp11_d_format):
Initialize ieee_bits field.
* config/rs6000/rs6000.c (TARGET_FLOATN_MODE): New macro.
(rs6000_init_builtins): Set ieee128_float_type_node to
float128_type_node.
(rs6000_floatn_mode): New function.
gcc/c:
* c-tree.h (cts_floatn_nx): New enum c_typespec_keyword value.
(struct c_declspecs): Add field floatn_nx_idx.
* c-decl.c (declspecs_add_type, finish_declspecs): Handle _FloatN
and _FloatNx type specifiers.
* c-parser.c (c_keyword_starts_typename, c_token_starts_declspecs)
(c_parser_declspecs, c_parser_attribute_any_word)
(c_parser_objc_selector): Use CASE_RID_FLOATN_NX.
* c-typeck.c (c_common_type): Handle _FloatN and _FloatNx types.
(convert_arguments): Avoid promoting _FloatN and _FloatNx types
narrower than double.
gcc/c-family:
* c-common.h (RID_FLOAT16, RID_FLOATN_NX_FIRST, RID_FLOAT32)
(RID_FLOAT64, RID_FLOAT128, RID_FLOAT32X, RID_FLOAT64X)
(RID_FLOAT128X): New enum rid values.
(CASE_RID_FLOATN_NX): New macro.
* c-common.c (c_common_reswords): Add _FloatN and _FloatNx
keywords.
(c_common_type_for_mode): Check for _FloatN and _FloatNx and
corresponding complex types.
(c_common_nodes_and_builtins): For non-C++, register _FloatN and
_FloatNx and corresponding complex types.
(keyword_begins_type_specifier): Use CASE_RID_FLOATN_NX.
* c-cppbuiltin.c (builtin_define_float_constants): Check _FloatN
and _FloatNx types for the widest type for determining
DECIMAL_DIG. Define __LDBL_DECIMAL_DIG__ as well as
__DECIMAL_DIG__ for long double. Handle FMA_SUFFIX being NULL.
(c_cpp_builtins): Call builtin_define_float_constants for _FloatN
and _FloatNx types.
* c-lex.c (interpret_float): Handle _FloatN and _FloatNx
constants.
* c-pretty-print.c (pp_c_floating_constant): Handle _FloatN and
_FloatNx types.
gcc/fortran:
* trans-types.h (float128_type_node): Rename to
gfc_float128_type_node.
(complex_float128_type_node): Rename to
gfc_complex_float128_type_node.
* iso-c-binding.def, trans-intrinsic.c, trans-types.c: All users
changed.
gcc/testsuite:
* lib/target-supports.exp (check_effective_target_float16)
(check_effective_target_float32, check_effective_target_float64)
(check_effective_target_float128, check_effective_target_float32x)
(check_effective_target_float64x)
(check_effective_target_float128x)
(check_effective_target_float16_runtime)
(check_effective_target_float32_runtime)
(check_effective_target_float64_runtime)
(check_effective_target_float128_runtime)
(check_effective_target_float32x_runtime)
(check_effective_target_float64x_runtime)
(check_effective_target_float128x_runtime)
(check_effective_target_floatn_nx_runtime)
(add_options_for_float16, add_options_for_float32)
(add_options_for_float64, add_options_for_float128)
(add_options_for_float32x, add_options_for_float64x)
(add_options_for_float128x): New procedures.
* gcc.dg/dfp/floatn.c, gcc.dg/float128-typeof.c,
gcc.dg/float128x-typeof.c, gcc.dg/float16-typeof.c,
gcc.dg/float32-typeof.c, gcc.dg/float32x-typeof.c,
gcc.dg/float64-typeof.c, gcc.dg/float64x-typeof.c,
gcc.dg/floatn-arithconv.c, gcc.dg/floatn-errs.c,
gcc.dg/floatn-typeof.h, gcc.dg/torture/float128-basic.c,
gcc.dg/torture/float128-complex.c,
gcc.dg/torture/float128-floath.c, gcc.dg/torture/float128-tg.c,
gcc.dg/torture/float128x-basic.c,
gcc.dg/torture/float128x-complex.c,
gcc.dg/torture/float128x-floath.c, gcc.dg/torture/float128x-tg.c,
gcc.dg/torture/float16-basic.c, gcc.dg/torture/float16-complex.c,
gcc.dg/torture/float16-floath.c, gcc.dg/torture/float16-tg.c,
gcc.dg/torture/float32-basic.c, gcc.dg/torture/float32-complex.c,
gcc.dg/torture/float32-floath.c, gcc.dg/torture/float32-tg.c,
gcc.dg/torture/float32x-basic.c,
gcc.dg/torture/float32x-complex.c,
gcc.dg/torture/float32x-floath.c, gcc.dg/torture/float32x-tg.c,
gcc.dg/torture/float64-basic.c, gcc.dg/torture/float64-complex.c,
gcc.dg/torture/float64-floath.c, gcc.dg/torture/float64-tg.c,
gcc.dg/torture/float64x-basic.c,
gcc.dg/torture/float64x-complex.c,
gcc.dg/torture/float64x-floath.c, gcc.dg/torture/float64x-tg.c,
gcc.dg/torture/floatn-basic.h, gcc.dg/torture/floatn-complex.h,
gcc.dg/torture/floatn-convert.c, gcc.dg/torture/floatn-floath.h,
gcc.dg/torture/floatn-tg.h,
gcc.dg/torture/fp-int-convert-float128-ieee-timode.c,
gcc.dg/torture/fp-int-convert-float128-ieee.c,
gcc.dg/torture/fp-int-convert-float128x-timode.c,
gcc.dg/torture/fp-int-convert-float128x.c,
gcc.dg/torture/fp-int-convert-float16-timode.c,
gcc.dg/torture/fp-int-convert-float16.c,
gcc.dg/torture/fp-int-convert-float32-timode.c,
gcc.dg/torture/fp-int-convert-float32.c,
gcc.dg/torture/fp-int-convert-float32x-timode.c,
gcc.dg/torture/fp-int-convert-float32x.c,
gcc.dg/torture/fp-int-convert-float64-timode.c,
gcc.dg/torture/fp-int-convert-float64.c,
gcc.dg/torture/fp-int-convert-float64x-timode.c,
gcc.dg/torture/fp-int-convert-float64x.c: New tests.
* gcc.dg/torture/fp-int-convert.h (TEST_I_F): Add argument for
maximum exponent of floating-point type. Use it in testing
whether 0x8...0 fits in the floating-point type. Always treat -1
(signed 0xf...f) as fitting in the floating-point type.
(M_OK1): New macro.
* gcc.dg/torture/fp-int-convert-double.c,
gcc.dg/torture/fp-int-convert-float.c,
gcc.dg/torture/fp-int-convert-float128-timode.c,
gcc.dg/torture/fp-int-convert-float128.c,
gcc.dg/torture/fp-int-convert-float80-timode.c,
gcc.dg/torture/fp-int-convert-float80.c,
gcc.dg/torture/fp-int-convert-long-double.c,
gcc.dg/torture/fp-int-convert-timode.c: Update calls to TEST_I_F.
libcpp:
* include/cpplib.h (CPP_N_FLOATN, CPP_N_FLOATNX)
(CPP_N_WIDTH_FLOATN_NX, CPP_FLOATN_SHIFT, CPP_FLOATN_MAX): New
macros.
* expr.c (interpret_float_suffix): Handle fN, fNx, FN and FNx
suffixes.
From-SVN: r239625
|
|
gcc/ChangeLog:
2016-07-28 Trevor Saunders <tbsaunde+gcc@tbsaunde.org>
* config/alpha/alpha.c (alpha_adjust_cost): Adjust.
* config/arm/arm-protos.h (struct tune_params): Likewise.
* config/arm/arm.c (xscale_sched_adjust_cost): Likewise.
(cortex_a9_sched_adjust_cost): Likewise.
(fa726te_sched_adjust_cost): Likewise.
(arm_adjust_cost): Likewise.
* config/bfin/bfin.c (bfin_adjust_cost): Likewise.
* config/c6x/c6x.c (c6x_adjust_cost): Likewise.
* config/epiphany/epiphany.c (epiphany_adjust_cost): Likewise.
* config/i386/i386.c (ix86_adjust_cost): Likewise.
* config/ia64/ia64.c: Likewise.
* config/m68k/m68k.c: Likewise.
* config/mep/mep.c (mep_adjust_cost): Likewise.
* config/microblaze/microblaze.c (microblaze_adjust_cost):
* Likewise.
* config/mips/mips.c (mips_adjust_cost): Likewise.
* config/mn10300/mn10300.c (mn10300_adjust_sched_cost):
* Likewise.
* config/pa/pa.c (pa_adjust_cost): Likewise.
* config/rs6000/rs6000.c (rs6000_adjust_cost): Likewise.
(rs6000_debug_adjust_cost): Likewise.
* config/sh/sh.c (sh_adjust_cost): Likewise.
* config/sparc/sparc.c (supersparc_adjust_cost): Likewise.
(hypersparc_adjust_cost): Likewise.
(sparc_adjust_cost): Likewise.
* config/spu/spu.c (spu_sched_adjust_cost): Likewise.
* config/tilegx/tilegx.c (tilegx_sched_adjust_cost): Likewise.
* config/tilepro/tilepro.c (tilepro_sched_adjust_cost):
* Likewise.
* config/visium/visium.c (visium_adjust_cost): Likewise.
* doc/tm.texi: Regenerate.
* haifa-sched.c (dep_cost_1): Adjust.
* target.def: Merge adjust_cost and adjust_cost_2.
From-SVN: r238814
|
|
gcc/
* target.def (max_noce_ifcvt_seq_cost): New.
* doc/tm.texi.in (TARGET_MAX_NOCE_IFCVT_SEQ_COST): Document it.
* doc/tm.texi: Regenerate.
* targhooks.h (default_max_noce_ifcvt_seq_cost): New.
* targhooks.c (default_max_noce_ifcvt_seq_cost): New.
* params.def (PARAM_MAX_RTL_IF_CONVERSION_PREDICTABLE_COST): New.
(PARAM_MAX_RTL_IF_CONVERSION_UNPREDICTABLE_COST): Likewise.
* doc/invoke.texi: Document new params.
From-SVN: r238593
|
|
gcc/
* target.def (addr_space): Add new diagnose_usage to hook vector.
* targhooks.c (default_addr_space_diagnose_usage): Add default
implementation and...
* targhooks.h (default_addr_space_diagnose_usage): ... its prototype.
* c/c-parser.c (c_lex_one_token) [CPP_NAME]: If the token
is some address space, call targetm.addr_space.diagnose_usage.
* doc/tm.texi.in (Named Address Spaces): Add anchor for
TARGET_ADDR_SPACE_DIAGNOSE_USAGE documentation.
* doc/tm.texi: Regenerate.
From-SVN: r238514
|
|
the result is tested for [in]equality with 0)
PR tree-optimization/52171
* builtins.c (expand_cmpstrn_or_cmpmem): Delete, moved elsewhere.
(expand_builtin_memcmp): New arg RESULT_EQ. All callers changed.
Look for constant strings. Move some code to emit_block_cmp_hints
and use it.
* builtins.def (BUILT_IN_MEMCMP_EQ): New.
* defaults.h (COMPARE_MAX_PIECES): New macro.
* expr.c (move_by_pieces_d, store_by_pieces_d): Remove old structs.
(move_by_pieces_1, store_by_pieces_1, store_by_pieces_2): Remvoe.
(clear_by_pieces_1): Don't declare. Move definition before use.
(can_do_by_pieces): New static function.
(can_move_by_pieces): Use it. Return bool.
(by_pieces_ninsns): Renamed from move_by_pieces_ninsns. New arg
OP. All callers changed. Handle COMPARE_BY_PIECES.
(class pieces_addr); New.
(pieces_addr::pieces_addr, pieces_addr::decide_autoinc,
pieces_addr::adjust, pieces_addr::increment_address,
pieces_addr::maybe_predec, pieces_addr::maybe_postinc): New member
functions for it.
(class op_by_pieces_d): New.
(op_by_pieces_d::op_by_pieces_d, op_by_pieces_d::run): New member
functions for it.
(class move_by_pieces_d, class compare_by_pieces_d,
class store_by_pieces_d): New subclasses of op_by_pieces_d.
(move_by_pieces_d::prepare_mode, move_by_pieces_d::generate,
move_by_pieces_d::finish_endp, store_by_pieces_d::prepare_mode,
store_by_pieces_d::generate, store_by_pieces_d::finish_endp,
compare_by_pieces_d::generate, compare_by_pieces_d::prepare_mode,
compare_by_pieces_d::finish_mode): New member functions.
(compare_by_pieces, emit_block_cmp_via_cmpmem): New static
functions.
(expand_cmpstrn_or_cmpmem): Moved here from builtins.c.
(emit_block_cmp_hints): New function.
(move_by_pieces, store_by_pieces, clear_by_pieces): Rewrite to just
use the newly defined classes.
* expr.h (by_pieces_constfn): New typedef.
(can_store_by_pieces, store_by_pieces): Use it in arg declarations.
(emit_block_cmp_hints, expand_cmpstrn_or_cmpmem): Declare.
(move_by_pieces_ninsns): Don't declare.
(can_move_by_pieces): Change return value to bool.
* target.def (TARGET_USE_BY_PIECES_INFRASTRUCTURE_P): Update docs.
(compare_by_pieces_branch_ratio): New hook.
* target.h (enum by_pieces_operation): Add COMPARE_BY_PIECES.
(by_pieces_ninsns): Declare.
* targethooks.c (default_use_by_pieces_infrastructure_p): Handle
COMPARE_BY_PIECES.
(default_compare_by_pieces_branch_ratio): New function.
* targhooks.h (default_compare_by_pieces_branch_ratio): Declare.
* doc/tm.texi.in (STORE_MAX_PIECES, COMPARE_MAX_PIECES): Document.
* doc/tm.texi: Regenerate.
* tree-ssa-strlen.c: Include "builtins.h".
(handle_builtin_memcmp): New static function.
(strlen_optimize_stmt): Call it for BUILT_IN_MEMCMP.
* tree.c (build_common_builtin_nodes): Create __builtin_memcmp_eq.
testsuite/
PR tree-optimization/52171
* gcc.dg/pr52171.c: New test.
* gcc.target/i386/pr52171.c: New test.
From-SVN: r237069
|
|
On x86, interrupt handlers are only called by processors which push
interrupt data onto stack at the address where the normal return address
is. Since interrupt handlers must access interrupt data via pointers so
that they can update interrupt data, the pointer argument is passed as
"argument pointer - word".
TARGET_FUNCTION_INCOMING_ARG defines how callee sees its argument.
Normally it returns REG, NULL, or CONST_INT. This patch adds arbitrary
address computation based on hard register, which can be forced into a
register, to the list.
When copying an incoming argument onto stack, assign_parm_setup_stack
has:
if (argument in memory)
copy argument in memory to stack
else
move argument to stack
Since an arbitrary address computation may be passed as an argument, we
change it to:
if (argument in memory)
copy argument in memory to stack
else
{
if (argument isn't in register)
force argument into a register
move argument to stack
}
* function.c (assign_parm_setup_stack): Force source into a
register if needed.
* target.def (function_incoming_arg): Update documentation to
allow arbitrary address computation based on hard register.
* doc/tm.texi: Regenerated.
Co-Authored-By: Julia Koval <julia.koval@intel.com>
From-SVN: r237037
|
|
c/
2016-05-16 Matthew Wahab <matthew.wahab@arm.com>
* c-decl.c (grokdeclarator): Remove errmsg and use of
targetm.invalid_return_type.
(grokparms): Remove errmsg and use of
targetm.invalid_parameter_type.
cp/
2016-05-16 Matthew Wahab <matthew.wahab@arm.com>
* decl.c (grokdeclarator): Remove errmsg and use of
targetm.invalid_return_type.
(grokparms): Remove errmsg and use of
targetm.invalid_parameter_type.
gcc/
2016-05-16 Matthew Wahab <matthew.wahab@arm.com>
* doc/tm.texi: Regenerate.
* doc/tm.texi.in (TARGET_INVALID_PARAMETER_TYPE): Remove.
(TARGET_INVALID_RETURN_TYPE): Remove.
* system.h: Poison TARGET_INVALID_PARAMETER_TYPE and
TARGET_INVALID_RETURN_TYPE.
* target.def (invalid_parameter_type): Remove.
(invalid_return_type): Remove.
From-SVN: r236276
|
|
2016-03-02 Manuel Lopez-Ibanez <manu@gcc.gnu.org>
* target.def(lra_p): Specify that new ports should use LRA.
From-SVN: r233914
|
|
* cgraph.c: Spelling fixes - behaviour -> behavior and
neighbour -> neighbor.
* target.def: Likewise.
* sel-sched.c: Likewise.
* config/mips/mips.c: Likewise.
* config/arc/arc.md: Likewise.
* config/arm/cortex-a57.md: Likewise.
* config/arm/arm.c: Likewise.
* config/arm/neon.md: Likewise.
* config/arm/arm-c.c: Likewise.
* config/vms/vms-c.c: Likewise.
* config/s390/s390.c: Likewise.
* config/i386/znver1.md: Likewise.
* config/i386/i386.c: Likewise.
* config/ia64/hpux-unix2003.h: Likewise.
* config/msp430/msp430.md: Likewise.
* config/rx/rx.c: Likewise.
* config/rx/rx.md: Likewise.
* config/aarch64/aarch64-simd.md: Likewise.
* config/aarch64/aarch64.c: Likewise.
* config/nvptx/nvptx.c: Likewise.
* config/bfin/bfin.c: Likewise.
* config/cris/cris.opt: Likewise.
* config/rs6000/rs6000.c: Likewise.
* target.h: Likewise.
* spellcheck.c: Likewise.
* ira-build.c: Likewise.
* tree-inline.c: Likewise.
* builtins.c: Likewise.
* lra-constraints.c: Likewise.
* explow.c: Likewise.
* hwint.h: Likewise.
* targhooks.c: Likewise.
* tree-vect-data-refs.c: Likewise.
* expr.c: Likewise.
* doc/tm.texi: Likewise.
* doc/extend.texi: Likewise.
* doc/install.texi: Likewise.
* doc/md.texi: Likewise.
* tree-ssa-tail-merge.c: Likewise.
* sched-int.h: Likewise.
* match.pd: Likewise.
* sched-ebb.c: Likewise.
* target.def (omit_struct_return_reg): Likewise.
* gimple-ssa-isolate-paths.c: Likewise.
(find_implicit_erroneous_behaviour): Renamed to...
(find_implicit_erroneous_behavior): ... this.
(find_explicit_erroneous_behaviour): Renamed to...
(find_explicit_erroneous_behavior): ... this.
(gimple_ssa_isolate_erroneous_paths): Adjust caller.
gcc/cp/
* error.c: Spelling fixes - behaviour -> behavior and
neighbour -> neighbor.
* decl.c: Likewise.
* typeck.c (cp_build_binary_op): Fix up behavior spelling in
diagnostics.
* init.c (build_delete): Likewise.
gcc/objc/
* objc-act.c: Spelling fixes - behaviour -> behavior and
neighbour -> neighbor.
* objc-map.h: Likewise.
gcc/go/
* gofrontend/lex.cc: Spelling fixes - behaviour -> behavior and
neighbour -> neighbor.
* gccgo.texi: Likewise.
gcc/ada/
* prj-tree.ads: Spelling fixes - behaviour -> behavior and
neighbour -> neighbor.
* prep.adb: Likewise.
* prj.ads: Likewise.
* prepcomp.adb: Likewise.
* g-socket.ads: Likewise.
* s-imgrea.adb: Likewise.
* a-calend.adb: Likewise.
* exp_disp.adb: Likewise.
* doc/gnat_ugn/gnat_utility_programs.rst: Likewise.
* g-socket.adb: Likewise.
* sem_ch12.adb: Likewise.
* terminals.c: Likewise.
gcc/testsuite/
* objc.dg/gnu-api-2-method.m: Spelling fixes - behaviour -> behavior
and neighbour -> neighbor.
* objc.dg/attributes/method-nonnull-1.m: Likewise.
* objc.dg/gnu-api-2-class-meta.m: Likewise.
* c-c++-common/Wvarargs.c: Likewise.
* c-c++-common/goacc/host_data-5.c: Likewise.
* obj-c++.dg/gnu-api-2-class-meta.mm: Likewise.
* obj-c++.dg/attributes/method-nonnull-1.mm: Likewise.
* obj-c++.dg/gnu-api-2-method.mm: Likewise.
* gcc.target/aarch64/pr60697.c: Likewise.
* gcc.target/aarch64/advsimd-intrinsics/vldX_lane.c: Likewise.
* gcc.target/aarch64/advsimd-intrinsics/vqshl.c: Likewise.
* gcc.target/aarch64/advsimd-intrinsics/vshuffle.inc: Likewise.
* gcc.target/aarch64/advsimd-intrinsics/vrshl.c: Likewise.
* gcc.target/aarch64/advsimd-intrinsics/vldX_dup.c: Likewise.
* gcc.target/aarch64/advsimd-intrinsics/vstX_lane.c: Likewise.
* gcc.target/aarch64/advsimd-intrinsics/vqrshl.c: Likewise.
* gcc.target/aarch64/advsimd-intrinsics/vldX.c: Likewise.
* gcc.target/aarch64/aapcs64/ice_2.c: Likewise.
* gcc.target/aarch64/aapcs64/test_23.c: Likewise.
* gcc.target/aarch64/vrnd_f64_1.c: Likewise.
* g++.dg/warn/Wconversion-real-integer-3.C: Likewise.
* g++.dg/lookup/koenig5.C: Likewise.
* g++.dg/ext/no-asm-2.C: Likewise.
* gfortran.dg/bounds_check_array_ctor_3.f90: Likewise.
* gfortran.dg/bounds_check_array_ctor_7.f90: Likewise.
* gfortran.dg/used_types_16.f90: Likewise.
* gfortran.dg/assumed_rank_bounds_1.f90: Likewise.
* gfortran.dg/bounds_check_array_ctor_1.f90: Likewise.
* gfortran.dg/assumed_rank_bounds_2.f90: Likewise.
* gfortran.dg/bounds_check_array_ctor_4.f90: Likewise.
* gfortran.dg/abstract_type_6.f03: Likewise.
* gfortran.dg/bounds_check_array_ctor_5.f90: Likewise.
* gfortran.dg/used_types_15.f90: Likewise.
* gfortran.dg/bounds_check_array_ctor_8.f90: Likewise.
* gfortran.dg/exit_3.f08: Likewise.
* gfortran.dg/open_status_2.f90: Likewise.
* gfortran.dg/derived_pointer_recursion_2.f90: Likewise.
* gfortran.dg/intrinsic_std_1.f90: Likewise.
* gfortran.dg/associate_1.f03: Likewise.
* gfortran.dg/bounds_check_array_ctor_2.f90: Likewise.
* gfortran.dg/intrinsic_std_6.f90: Likewise.
* gfortran.dg/bounds_check_array_ctor_6.f90: Likewise.
* gcc.dg/builtin-object-size-1.c: Likewise.
* gcc.dg/noreturn-6.c: Likewise.
* gcc.dg/builtin-stringop-chk-1.c: Likewise.
* gcc.dg/globalalias.c: Likewise.
* gcc.dg/builtins-config.h: Likewise.
* gcc.dg/pr30457.c: Likewise.
* gcc.c-torture/compile/volatile-1.c: Likewise.
* gcc.c-torture/execute/20101011-1.c: Likewise.
* c-c++-common/Waddress-1.c: Likewise.
From-SVN: r233358
|
|
Improve TARGET_IRA_CHANGE_PSEUDO_ALLOCNO_CLASS target hook. It turns out there
is another case where the register allocator uses the union of register classes
without checking that the cost of the resulting register class is lower than
both (see https://gcc.gnu.org/ml/gcc-patches/2015-12/msg01765.html ). This
happens when the cost of the best and alternative class are both lower than the
memory cost. In this case we typically end up with ALL_REGS as the allocno
class, which almost invariably results in bad allocations with many redundant
int<->FP moves (which are expensive on various cores). AArch64 is affected by
this significantly due to supporting many scalar integer operations in SIMD.
Currently the TARGET_IRA_CHANGE_PSEUDO_ALLOCNO_CLASS hook forces the class to
GENERAL_REGS if the allocno class is ALL_REGS and the register has an integer
mode. This is bad if the best class happens to be FP_REGS. To handle this
case as well, an extra argument is needed in the hook to pass the best class.
If the allocno class is ALL_REGS, but the best class isn't, we use the best
class instead (rather than using the mode to force to GENERAL_REGS or FP_REGS).
Previously this might happen:
r79: preferred FP_REGS, alternative GENERAL_REGS, allocno GENERAL_REGS
a1 (r79,l0) best GENERAL_REGS, allocno GENERAL_REGS
a1(r79,l0) costs: CALLER_SAVE_REGS:5000,5000 GENERAL_REGS:5000,5000
FP_LO_REGS:0,0 FP_REGS:0,0 ALL_REGS:10000,10000 MEM:9000,9000
The proposed allocno is ALL_REGS (despite having the highest cost!) and is then
forced by the hook to GENERAL_REGS because r79 has integer mode. However
FP_REGS has the lowest cost. After this patch the choice is as follows:
r79: preferred FP_REGS, alternative GENERAL_REGS, allocno FP_REGS
a1 (r79,l0) best FP_REGS, allocno FP_REGS
As a result it is now no longer a requirement to use register move costs that
are larger than the memory move cost. So it will be feasible to use realistic
costs for both without a huge penalty.
2016-02-02 Wilco Dijkstra <wdijkstr@arm.com>
gcc/
* ira-costs.c (find_costs_and_classes): Add extra argument.
* target.def (ira_change_pseudo_allocno_class): Add parameter.
* targhooks.h (ira_change_pseudo_allocno_class): Likewise.
* targhooks.c (ira_change_pseudo_allocno_class): Likewise.
* config/aarch64/aarch64.c (aarch64_ira_change_pseudo_allocno_class)
Add best_class parameter, and return it if not ALL_REGS.
* config/mips/mips.c (mips_ira_change_pseudo_allocno_class):
Add parameter.
* doc/tm.texi (TARGET_IRA_CHANGE_PSEUDO_ALLOCNO_CLASS):
Update target hook.
From-SVN: r233084
|
|
gcc/
* config/nvptx/nvptx.c (PTX_GANG_DEFAULT): New.
(nvptx_goacc_validate_dims): Extend to handle global defaults.
* target.def (OACC_VALIDATE_DIMS): Extend documentation.
* doc/tm.texti: Rebuilt.
* doc/invoke.texi (fopenacc-dim): Document.
* lto-wrapper.c (merge_and_complain): Add OPT_fopenacc_dim_ case.
(append_compiler_options): Likewise.
* omp-low.c (oacc_default_dims, oacc_min_dims): New.
(oacc_parse_default_dims): New.
(oacc_validate_dims): Add USED arg. Select non-unity default when
possible.
(oacc_loop_fixed_partitions): Return mask of used partitions.
(oacc_loop_auto_partitions): Emit dump info.
(oacc_loop_partition): Return mask of used partitions.
(execute_oacc_device_lower): Parse default dimension arg. Adjust
loop partitioning and validation calls.
gcc/c-family/
* c.opt (fopenacc-dim=): New option.
gcc/fortran/
* lang.opt (fopenacc-dim=): New option.
libgomp/
* testsuite/libgomp.oacc-c-c++-common/loop-dim-default.c: New.
* testsuite/libgomp.oacc-fortran/routine-7.f90: Serialize loop.
From-SVN: r233041
|
|
2015-01-19 Wilco Dijkstra <wdijkstr@arm.com>
gcc/
* target.def (gen_ccmp_first): Update documentation.
(gen_ccmp_next): Likewise.
* doc/tm.texi (gen_ccmp_first): Update documentation.
(gen_ccmp_next): Likewise.
* ccmp.c (expand_ccmp_expr): Extract cmp_code from return value of
expand_ccmp_expr_1. Improve comments.
* config/aarch64/aarch64.md (ccmp_and): Use if_then_else for ccmp.
(ccmp_ior<mode>): Remove pattern.
(cmp<mode>): Remove expand.
(cmp): Globalize pattern.
(cstorecc4): Use cc_register.
(mov<mode>cc): Remove ccmp_cc_register check.
* config/aarch64/aarch64.c (aarch64_get_condition_code_1):
Simplify after removal of CC_DNE/* modes.
(aarch64_ccmp_mode_to_code): Remove.
(aarch64_print_operand): Remove 'K' case. Merge 'm' and 'M' cases.
In 'k' case use integer as condition.
(aarch64_nzcv_codes): Remove inverted cases.
(aarch64_code_to_ccmode): Remove.
(aarch64_gen_ccmp_first): Use cmp pattern directly. Return the correct
comparison with CC register to be used in folowing CCMP/branch/CSEL.
(aarch64_gen_ccmp_next): Use previous comparison and mode in CCMP
pattern. Return the comparison with CC register. Invert conditions
when bitcode is OR.
* config/aarch64/aarch64-modes.def: Remove CC_DNE/* modes.
* config/aarch64/predicates.md (ccmp_cc_register): Remove.
From-SVN: r232561
|
|
gcc.dg/tm/20100610.c since r231674)
PR 68964
gcc/
PR tree-opt/68964
* target.def (builtin_tm_load, builtin_tm_store): Remove.
* config/i386/i386.c (ix86_builtin_tm_load): Remove.
(ix86_builtin_tm_store): Remove.
(TARGET_VECTORIZE_BUILTIN_TM_LOAD): Remove.
(TARGET_VECTORIZE_BUILTIN_TM_STORE): Remove.
* doc/tm.texi.in (TARGET_VECTORIZE_BUILTIN_TM_LOAD): Remove.
(TARGET_VECTORIZE_BUILTIN_TM_STORE): Remove.
* doc/tm.texi: Rebuild.
* gtm-builtins.def (BUILT_IN_TM_MEMCPY_RNWT): New.
(BUILT_IN_TM_MEMCPY_RTWN): New.
* trans-mem.c (tm_log_emit_stmt): Rearrange code for better
fallback from vector to integer helpers.
(build_tm_load): Handle vector types directly, instead of
via target hook.
(build_tm_store): Likewise.
(expand_assign_tm): Prepare for register types not handled by
the above. Copy them to memory and use memcpy.
* tree.c (tm_define_builtin): New.
(find_tm_vector_type): New.
(build_tm_vector_builtins): New.
(build_common_builtin_nodes): Call it.
libitm/
* Makefile.am (libitm_la_SOURCES) [ARCH_AARCH64]: Add vect128.cc
(libitm_la_SOURCES) [ARCH_ARM]: Add neon.cc
(libitm_la_SOURCES) [ARCH_PPC]: Add vect128.cc
(libitm_la_SOURCES) [ARCH_S390]: Add vect128.cc
* configure.ac (ARCH_AARCH64): New conditional.
(ARCH_PPC, ARCH_S390): Likewise.
* Makefile.in, configure: Rebuild.
* libitm.h (_ITM_TYPE_M128): Always define.
* vect64.cc: Split ...
* vect128.cc: ... out of...
* config/x86/x86_sse.cc: ... here.
* config/arm/neon.cc: New file.
From-SVN: r232330
|
|
From-SVN: r232055
|
|
All current uses of builtin_reciprocal convert 1.0/sqrt into rsqrt.
This patch adds an rsqrt optab and associated internal function for
that instead. We can then pick up the vector forms of rsqrt automatically,
fixing an AArch64 regression from my internal_fn patches.
With that change, builtin_reciprocal only needs to handle target-specific
built-in functions. I've restricted the hook to those since, if we need
a reciprocal of another standard function later, I think there should be
a strong preference for adding a new optab and internal function for it,
rather than hiding the code in a backend.
Three targets implement builtin_reciprocal: aarch64, i386 and rs6000.
i386 and rs6000 already used the obvious rsqrt<mode>2 pattern names
for the instructions, so they pick up the new code automatically.
aarch64 needs a slight rename.
mn10300 is unusual in that its native operation is rsqrt, and
sqrt is approximated as 1.0/rsqrt. The port also uses rsqrt<mode>2
for the rsqrt pattern, so after the patch we now pick it up as a native
operation.
Two other ports define rsqrt patterns: sh and v850. AFAICT these
patterns aren't currently used, but I think the patch does what the
authors of the patterns would have expected. There's obviously some
risk of fallout though.
Tested on x86_64-linux-gnu, aarch64-linux-gnu, arm-linux-gnueabihf
(as a target without the hooks) and powerpc64-linux-gnu.
gcc/
* internal-fn.def (RSQRT): New function.
* optabs.def (rsqrt_optab): New optab.
* doc/md.texi (rsqrtM2): Document.
* target.def (builtin_reciprocal): Replace gcall argument with
a function decl. Restrict hook to machine functions.
* doc/tm.texi: Regenerate.
* targhooks.h (default_builtin_reciprocal): Update prototype.
* targhooks.c (default_builtin_reciprocal): Likewise.
* tree-ssa-math-opts.c: Include internal-fn.h.
(internal_fn_reciprocal): New function.
(pass_cse_reciprocals::execute): Call it, and build a call to an
internal function on success. Only call targetm.builtin_reciprocal
for machine functions.
* config/aarch64/aarch64-protos.h (aarch64_builtin_rsqrt): Remove
second argument.
* config/aarch64/aarch64-builtins.c (aarch64_expand_builtin_rsqrt):
Rename aarch64_rsqrt_<mode>2 to rsqrt<mode>2.
(aarch64_builtin_rsqrt): Remove md_fn argument and only handle
machine functions.
* config/aarch64/aarch64.c (use_rsqrt_p): New function.
(aarch64_builtin_reciprocal): Replace gcall argument with a
function decl. Use use_rsqrt_p. Remove optimize_size check.
Only handle machine functions. Update call to aarch64_builtin_rsqrt.
(aarch64_optab_supported_p): New function.
(TARGET_OPTAB_SUPPORTED_P): Define.
* config/aarch64/aarch64-simd.md (aarch64_rsqrt_<mode>2): Rename to...
(rsqrt<mode>2): ...this.
* config/i386/i386.c (use_rsqrt_p): New function.
(ix86_builtin_reciprocal): Replace gcall argument with a
function decl. Use use_rsqrt_p. Remove optimize_insn_for_size_p
check. Only handle machine functions.
(ix86_optab_supported_p): Handle rsqrt_optab.
* config/rs6000/rs6000.c (TARGET_OPTAB_SUPPORTED_P): Define.
(rs6000_builtin_reciprocal): Replace gcall argument with a
function decl. Remove optimize_insn_for_size_p check.
Only handle machine functions.
(rs6000_optab_supported_p): New function.
From-SVN: r231229
|
|
The problem in the PR is that some i386 optabs FAIL when
optimising for size rather than speed. The gimple level generally
needs access to this information before calling the generator,
so this patch adds a new hook to say whether an optab should
be used when optimising for size or speed. It also has a "both"
option for cases where we want code that is optimised for both
size and speed.
I've passed the optab to the target hook because I think in most
cases that's more useful than the instruction code. We could pass
both if there's a use for it though.
At the moment the match-and-simplify code doesn't have direct access
to the target block, so for now I've used "both" there.
Tested on x86_64-linux-gnu and powerpc64-linux-gnu.
gcc/
PR tree-optimization/68432
* coretypes.h (optimization_type): New enum.
* doc/tm.texi.in (TARGET_OPTAB_SUPPORTED_P): New hook.
* doc/tm.texi: Regenerate.
* target.def (optab_supported_p): New hook.
* targhooks.h (default_optab_supported_p): Declare.
* targhooks.c (default_optab_supported_p): New function.
* predict.h (function_optimization_type): Declare.
(bb_optimization_type): Likewise.
* predict.c (function_optimization_type): New function.
(bb_optimization_type): Likewise.
* optabs-query.h (convert_optab_handler): Define an overload
that takes an optimization type.
(direct_optab_handler): Likewise.
* optabs-query.c (convert_optab_handler): Likewise.
(direct_optab_handler): Likewise.
* internal-fn.h (direct_internal_fn_supported_p): Take an
optimization_type argument.
* internal-fn.c (direct_optab_supported_p): Likewise.
(multi_vector_optab_supported_p): Likewise.
(direct_internal_fn_supported_p): Likewise.
* builtins.c (replacement_internal_fn): Update call to
direct_internal_fn_supported_p.
* gimple-match-head.c (build_call_internal): Likewise.
* tree-vect-patterns.c (vect_recog_pow_pattern): Likewise.
* tree-vect-stmts.c (vectorizable_internal_function): Likewise.
* tree.c (maybe_build_call_expr_loc): Likewise.
* config/i386/i386.c (ix86_optab_supported_p): New function.
(TARGET_OPTAB_SUPPORTED_P): Define.
* config/i386/i386.md (asinxf2): Remove optimize_insn_for_size_p check.
(asin<mode>2, acosxf2, acos<mode>2, log1pxf2, log1p<mode>2)
(expNcorexf3, expxf2, exp<mode>2, exp10xf2, exp10<mode>2, exp2xf2)
(exp2<mode>2, expm1xf2, expm1<mode>2, ldexpxf3, ldexp<mode>3)
(scalbxf3, scalb<mode>3, rint<mode>2, round<mode>2)
(<rounding_insn>xf2, <rounding_insn><mode>2): Likewise.
gcc/testsuite/
* gcc.target/i386/pr68432-1.c: New test.
* gcc.target/i386/pr68432-2.c: Likewise.
* gcc.target/i386/pr68432-3.c: Likewise.
From-SVN: r231161
|
|
PR tree-optimization/68501
* target.def (builtin_reciprocal): Replace the 3 arguments with
a gcall * one, adjust description.
* targhooks.h (default_builtin_reciprocal): Replace the 3 arguments
with a gcall * one.
* targhooks.c (default_builtin_reciprocal): Likewise.
* tree-ssa-math-opts.c (pass_cse_reciprocals::execute): Use
targetm.builtin_reciprocal even on internal functions, adjust
the arguments and allow replacing an internal function with normal
built-in.
* config/i386/i386.c (ix86_builtin_reciprocal): Replace the 3 arguments
with a gcall * one. Handle internal fns too.
* config/rs6000/rs6000.c (rs6000_builtin_reciprocal): Likewise.
* config/aarch64/aarch64.c (aarch64_builtin_reciprocal): Likewise.
* doc/tm.texi (builtin_reciprocal): Document.
From-SVN: r231075
|
|
This patch replaces the fndecl argument to builtin_vectorized_function
with a combined_fn and gets the vectoriser to call it for internal
functions too. The patch also moves vectorisation of machine-specific
built-ins to a new hook, builtin_md_vectorized_function.
Tested on x86_64-linux-gnu, aarch64-linux-gnu, arm-linux-gnu and
powerpc64-linux-gnu.
gcc/
* target.def (builtin_vectorized_function): Take a combined_fn (in
the form of an unsigned int) rather than a function decl.
(builtin_md_vectorized_function): New.
* targhooks.h (default_builtin_vectorized_function): Replace the
fndecl argument with an unsigned int.
(default_builtin_md_vectorized_function): Declare.
* targhooks.c (default_builtin_vectorized_function): Replace the
fndecl argument with an unsigned int.
(default_builtin_md_vectorized_function): New function.
* doc/tm.texi.in (TARGET_VECTORIZE_BUILTIN_MD_VECTORIZED_FUNCTION):
New hook.
* doc/tm.texi: Regenerate.
* tree-vect-stmts.c (vectorizable_function): Update call to
builtin_vectorized_function, also passing internal functions.
Call builtin_md_vectorized_function for target-specific builtins.
* config/aarch64/aarch64-protos.h
(aarch64_builtin_vectorized_function): Replace fndecl argument
with an unsigned int.
* config/aarch64/aarch64-builtins.c: Include case-cfn-macros.h.
(aarch64_builtin_vectorized_function): Update after above changes.
Use CASE_CFN_*.
* config/arm/arm-protos.h (arm_builtin_vectorized_function): Replace
fndecl argument with an unsigned int.
* config/arm/arm-builtins.c: Include case-cfn-macros.h
(arm_builtin_vectorized_function): Update after above changes.
Use CASE_CFN_*.
* config/i386/i386.c: Include case-cfn-macros.h
(ix86_veclib_handler): Take a combined_fn rather than a
built_in_function.
(ix86_veclibabi_svml, ix86_veclibabi_acml): Likewise. Use
mathfn_built_in rather than calling builtin_decl_implicit directly.
(ix86_builtin_vectorized_function) Update after above changes.
Use CASE_CFN_*.
* config/rs6000/rs6000.c: Include case-cfn-macros.h
(rs6000_builtin_vectorized_libmass): Replace fndecl argument
with a combined_fn. Use CASE_CFN_*. Use mathfn_built_in rather
than calling builtin_decl_implicit directly.
(rs6000_builtin_vectorized_function): Update after above changes.
Use CASE_CFN_*. Move BUILT_IN_MD to...
(rs6000_builtin_md_vectorized_function): ...this new function.
(TARGET_VECTORIZE_BUILTIN_MD_VECTORIZED_FUNCTION): Define.
From-SVN: r230491
|
|
* final.c (output_asm_insn): Pass VOIDmode to output_address.
(output_address): Add MODE argument. Pass to print_operand_address
hook.
* targhooks.c (default_print_operand_address): Add MODE argument.
* targhooks.h (default_print_operand_address): Update prototype.
* output.h (output_address): Update prototype.
* target.def (print_operand_address): Add MODE argument.
* config/vax/vax.c (print_operand_address): Pass VOIDmode to
output_address.
(print_operand): Pass access mode to output_address.
* config/mcore/mcore.c (mcore_print_operand_address): Add MODE
argument.
(mcore_print_operand): Update calls to mcore_print_operand_address.
* config/fr30/fr30.c (fr30_print_operand): Pass VOIDmode to
output_address.
* config/lm32/lm32.c (lm32_print_operand): Pass mode in calls to
output_address.
* config/tilegx/tilegx.c (output_memory_reference_mode): Remove
global.
(tilegx_print_operand): Don't set above global. Update calls to
output_address.
(tilegx_print_operand_address): Add MODE argument. Use instead of
output_memory_reference_mode global.
* config/frv/frv.c (frv_print_operand_address): Add MODE argument.
(frv_print_operand): Pass mode to frv_print_operand_address calls.
* config/mn10300/mn10300.c (mn10300_print_operand): Pass mode to
output_address.
* config/cris/cris.c (cris_print_operand_address): Add MODE
argument.
(cris_print_operand): Pass mode to output_address calls.
* config/spu/spu.c (print_operand): Pass mode to output_address
calls.
* config/aarch64/aarch64.h (aarch64_print_operand)
(aarch64_print_operand_address): Remove prototypes.
* config/aarch64/aarch64.c (aarch64_memory_reference_mode): Delete
global.
(aarch64_print_operand): Make static. Update calls to
output_address.
(aarch64_print_operand_address): Add MODE argument. Use instead of
aarch64_memory_reference_mode global.
(TARGET_PRINT_OPERAND, TARGET_PRINT_OPERAND_ADDRESS): Define target
hooks.
* config/aarch64/aarch64.h (PRINT_OPERAND, PRINT_OPERAND_ADDRESS):
Delete macro definitions.
* config/pa/pa.c (pa_print_operand): Pass mode in output_address
calls.
* config/xtensa/xtensa.c (print_operand): Pass mode in
output_address calls.
* config/h8300/h8300.c (h8300_print_operand_address): Add MODE
argument.
(h83000_print_operand): Update calls to h8300_print_operand_address
and output_address.
* config/ia64/ia64.c (ia64_print_operand_address): Add MODE
argument.
* config/tilepro/tilepro.c (output_memory_reference_mode): Delete
global.
(tilepro_print_operand): Pass mode to output_address.
(tilepro_print_operand_address): Add MODE argument. Use instead of
output_memory_reference_mode.
* config/nvptx/nvptx.c (output_decl_chunk, nvptx_assemble_integer)
(nvptx_output_call_insn, nvptx_print_address_operand): Pass VOIDmode
to output_address calls.
(nvptx_print_operand_address): Add MODE argument.
* config/alpha/alpha.c (print_operand): Pass mode argument in
output_address calls.
* config/m68k/m68k.c (print_operand): Pass mode argument in
output_address call.
* config/avr/avr.c (avr_print_operand_address): Add MODE argument.
(avr_print_operand): Update calls to avr_print_operand_address.
* config/sparc/sparc.c (sparc_print_operand_address): Add MODE
argument. Update calls to output_address.
(sparc_print_operand): Pass mode to output_address.
* config/iq2000/iq2000.c (iq2000_print_operand_address): Add MODE
argument.
(iq2000_print_operand): Pass mode in output_address calls.
* config/stormy16/stormy16.c (xstormy16_print_operand_address): Add
MODE argument.
(xstormy16_print_operand): Pass mode to
xstormy16_print_operand_address calls.
* config/mips/mips.c (mips_print_operand): Update calls to
output_address.
(mips_print_operand_address): Add MODE argument.
* config/epiphany/epiphany.c (epiphany_print_operand): Update calls
to output_address.
(epiphany_print_operand_address): Add MODE argument. Add FIXME note.
* config/pdp11/pdp11.c (pdp11_asm_print_operand): Update call to
output_address.
* config/rx/rx.c (rx_print_operand_address): Add MODE argument.
(rx_print_operand): Update calls to output_address,
rx_print_operand_address.
* config/nds32/nds32.c (nds32_print_operand): Update calls to
output_address.
(nds32_print_operand_address): Add MODE argument.
* config/rs6000/rs6000.c (print_operand): Pass mem mode to
output_address calls.
* config/c6x/c6x.c (print_address_offset): Pass mem mode to
output_address call.
(c6x_print_address_operand): Update calls to output_address.
(c6x_print_operand_address): Pass mode to above.
* config/v850/v850.c (v850_print_operand_address): Add MODE
argument.
(v850_print_operand): Pass mode to v850_print_operand_address,
output_address.
* config/mmix/mmix.c (mmix_print_operand_address): Add MODE
argument.
(mmix_print_operand): Pass mode in output_address calls.
* config/sh/sh.c (sh_print_operand_address): Add MODE argument.
(sh_print_operand): Pass mem mode to output_address,
sh_print_operand_address.
* config/cr16/cr16.c (cr16_print_operand_address): Add MODE
argument.
(cr16_print_operand): Pass mode to output_address,
cr16_print_operand_address.
* config/bfin/bfin.c (print_address_operand): Pass VOIDmode to
output_address.
* config/microblaze/microblaze.c (print_operand): Pass mode to
output_address.
* config/nios2/nios2.c (nios2_print_operand): Pass VOIDmode to
output_address.
(nios2_print_operand_address): Add MODE argument. Update call to
nios2_print_operand_address.
* config/s390/s390.c (print_operand): Pass mode to output_address.
* config/m32c/m32c.c (m32c_print_operand_address): Add MODE
argument.
* config/arc/arc.c (arc_print_operand): Pass VOIDmode to
output_address.
* config/arm/arm.c (arm_print_operand_address): Add MODE argument.
Use instead of output_memory_reference_mode.
(output_memory_reference_mode): Delete global.
(arm_print_operand): Pass mem mode to output_address.
* config/m32r/m32r.c (m32r_print_operand_address): Add MODE
argument.
(m32r_print_operand): Pass mode to output_address.
* config/msp430/msp430.c (msp430_print_operand_addr): Add MODE
argument.
(msp430_print_operand): Pass mode to msp430_print_operand_addr.
* config/i386/i386.c (ix86_print_operand): Pass mode to
output_address calls.
(ix86_print_operand_address): Add MODE argument.
From-SVN: r230016
|
|
* dwarf2out.c (modified_type_die): Pass the address space number
through TARGET_ADDR_SPACE_DEBUG to produce the dwarf address class.
* target.def (TARGET_ADDR_SPACE_DEBUG): New.
* targhooks.c (default_addr_space_debug): New.
* targhooks.h (default_addr_space_debug): Declare.
* doc/tm.texi.in (TARGET_ADDR_SPACE_DEBUG): Mark it.
* doc/tm.texi: Rebuild.
From-SVN: r230000
|
|
* gimple.c (check_loadstore): Return false when 0 is a valid address.
* fold-const.c (const_unop) [ADDR_SPACE_CONVERT_EXPR]: Do not fold
null when 0 is valid in the source address space.
* target.def (TARGET_ADDR_SPACE_ZERO_ADDRESS_VALID): New.
* targhooks.c (default_addr_space_zero_address_valid): New.
* targhooks.h (default_addr_space_zero_address_valid): Declare.
* doc/tm.texi.in (TARGET_ADDR_SPACE_ZERO_ADDRESS_VALID): Mark it.
* doc/tm.texi: Rebuild.
From-SVN: r229999
|
|
* target.def (goacc.dim_limit): New hook.
* targhooks.h (default_goacc_dim_limit): Declare.
* doc/tm.texi.in (TARGET_GOACC_DIM_LIMIT): Add.
* doc/tm.texi: Rebuilt.
* omp-low.h (get_oacc_fn_dim_size, get_oacc_ifn_dim_arg): Declare.
* omp-low.c (get_oacc_fn_dim_size, get_oacc_ifn_dim_arg): New.
(default_goacc_dim_limit): New.
* config/nvptx/nvptx.c (PTX_VECTOR_LENGTH, PTX_WORKER_LENGTH): New.
(nvptx_goacc_dim_limit) New.
(TARGET_GOACC_DIM_LIMIT): Override.
* tree-vrp.c: Include omp-low.h, target.h.
(extract_range_basic): Add handling for IFN_GOACC_DIM_SIZE &
IFN_GOACC_DIM_POS.
From-SVN: r229809
|
|
* internal-fn.def (GOACC_REDUCTION): New.
* internal-fn.h (enum ifn_goacc_reduction_kind): New.
* internal-fn.c (expand_GOACC_REDUCTION): New.
* target.def (goacc.reduction): New OpenACC hook.
* targhooks.h (default_goacc_reduction): Declare.
* doc/tm.texi.in: Add TARGET_GOACC_REDUCTION.
* doc/tm.texi: Rebuilt.
* omp-low.c (oacc_get_reduction_array_id, oacc_max_threads,
scan_sharing_clauses): Remove oacc reduction handling here.
(lower_rec_input_clauses): Don't handle OpenACC reductions here.
(oacc_lower_reduction_var_helper): Delete.
(lower_oacc_reductions): New.
(lower_reduction_clauses): Don't handle OpenACC reductions here.
(lower_oacc_head_tail): Call lower_oacc_reductions.
(oacc_gimple_assign, oacc_init_reduction_array,
oacc_initialize_reduction_data, oacc_finalize_reduction_data,
oacc_process_reduction_data): Delete.
(lower_omp_target): Remove old OpenACC reduction handling. Insert
dummy OpenACC gang reduction for reductions at outer level.
(oacc_loop_xform_head_tail): Transform IFN_GOACC_REDUCTION.
(default_goacc_reduction): New.
(execute_oacc_device_lower): Handle IFN_GOACC_REDUCTION.
From-SVN: r229767
|
|
* internal-fn.def (IFN_GOACC_DIM_SIZE, IFN_GOACC_DIM_POS,
IFN_GOACC_LOOP): New.
* internal-fn.h (enum ifn_unique_kind): Add IFN_UNIQUE_OACC_FORK,
IFN_UNIQUE_OACC_JOIN, IFN_UNIQUE_OACC_HEAD_MARK,
IFN_UNIQUE_OACC_TAIL_MARK.
(enum ifn_goacc_loop_kind): New.
* internal-fn.c (expand_UNIQUE): Add IFN_UNIQUE_OACC_FORK,
IFN_UNIQUE_OACC_JOIN cases.
(expand_GOACC_DIM_SIZE, expand_GOACC_DIM_POS): New.
(expand_GOACC_LOOP): New.
* target-insns.def (oacc_dim_pos, oacc_dim_size): New.
* omp-low.c: Include gimple-pretty-print.h.
(struct oacc_loop): New.
(enum oacc_loop_flags): New.
(oacc_thread_numbers): New.
(oacc_xform_loop): New.
(new_oacc_loop_raw, new_oacc_loop_outer, new_oacc_loop,
new_oacc_loop_routine, finish_oacc_loop, free_oacc_loop): New,
(dump_oacc_loop_part, dump_oacc_loop, debug_oacc_loop): New,
(oacc_loop_discover_walk, oacc_loop_sibling_nrevers,
oacc_loop_discovery): New.
(oacc_loop_xform_head_tail, oacc_loop_xform_loop,
oacc_loop_process): New.
(oacc_loop_fixed_partitions, oacc_loop_partition): New.
(execute_oacc_device_lower): Discover & process loops. Process
internal fns.
* target.def (goacc.fork_join): Change sense of hook, clarify
documentation.
* doc/tm.texi: Regenerated.
From-SVN: r229466
|
|
* target-insns.def (oacc_fork, oacc_join): Define.
* target.def (goacc.validate_dims): Adjust doc to avoid warning.
(goacc.fork_join): New GOACC hook.
* targhooks.h (default_goacc_fork_join): Declare.
* omp-low.c (default_goacc_forkjoin): New.
* doc/tm.texi.in (TARGET_GOACC_FORK_JOIN): Add.
* doc/tm.texi: Regenerate.
From-SVN: r229465
|
|
gcc/
* target.def (TARGET_NO_SPECULATION_IN_DELAY_SLOTS_P): New hook.
* doc/tm.texi.in (TARGET_NO_SPECULATION_IN_DELAY_SLOTS_P): Document.
* doc/tm.texi: Regenerated.
* reorg.c (dbr_schedule): Use new hook.
* config/mips/mips.c (mips_no_speculation_in_delay_slots_p): New.
testsuite/
* gcc.target/mips/ds-schedule-1.c: New.
* gcc.target/mips/ds-schedule-2.c: New.
From-SVN: r229383
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* target.def (addr_space.pointer_mode): Update documentation
of default behavior.
(addr_space.address_mode): Likewise.
* tm.texi: Update.
From-SVN: r229144
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gcc/
* doc/tm.texi: Regenerated.
* doc/tm.texi.in (TARGET_VECTORIZE_GET_MASK_MODE): New.
* stor-layout.c (layout_type): Use mode to get vector mask size.
* target.def (get_mask_mode): New.
* targhooks.c (default_get_mask_mode): New.
* targhooks.h (default_get_mask_mode): New.
* gcc/tree-vect-stmts.c (get_same_sized_vectype): Add special case
for boolean vector.
* tree.c (MAX_BOOL_CACHED_PREC): New.
(nonstandard_boolean_type_cache): New.
(build_nonstandard_boolean_type): New.
(make_vector_type): Vector mask has no canonical type.
(build_truth_vector_type): New.
(build_same_sized_truth_vector_type): New.
(truth_type_for): Support vector masks.
* tree.h (VECTOR_BOOLEAN_TYPE_P): New.
(build_truth_vector_type): New.
(build_same_sized_truth_vector_type): New.
(build_nonstandard_boolean_type): New.
* tree-cfg.c (verify_gimple_comparison) Require boolean
vector type for vector comparison.
(verify_gimple_assign_ternary): Likewise.
* optabs.c (expand_vec_cond_expr): Accept boolean vector as
condition operand.
* tree-vect-stmts.c (vectorizable_condition): Use boolean
vector type for vector comparison.
* tree-vect-generic.c (elem_op_func): Add new operand to hold
vector type.
(do_unop): Adjust to modified function type.
(do_binop): Likewise.
(do_plus_minus): Likewise.
(do_negate); Likewise.
(expand_vector_piecewise): Likewise.
(do_cond): Likewise.
(do_compare): Use comparison instead of condition.
(expand_vector_divmod): Use boolean vector type for comparison.
(expand_vector_operations_1): Skip scalar mask operations.
gcc/c
* c-typeck.c (build_conditional_expr): Use boolean vector
type for vector comparison.
(build_vec_cmp): New.
(build_binary_op): Use build_vec_cmp for comparison.
gcc/cp
* call.c (build_conditional_expr_1): Use boolean vector
type for vector comparison.
* typeck.c (build_vec_cmp): New.
(cp_build_binary_op): Use build_vec_cmp for comparison.
gcc/testsuite/
* g++.dg/ext/vector22.C: Allow VEC_COND_EXPR.
From-SVN: r229128
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((optimize,target,align) is used)
2015-10-16 Christian Bruel <christian.bruel@st.com>
PR target/67745
* config/arm/arm.h (FUNCTION_BOUNDARY): Use FUNCTION_BOUNDARY_P.
(FUNCTION_BOUNDARY_P): New macro:
* config/arm/arm.c (TARGET_RELAYOUT_FUNCTION, arm_relayout_function):
New hook.
* doc/tm.texi.in (TARGET_RELAYOUT_FUNCTION): Document.
* doc/tm.texi (TARGET_RELAYOUT_FUNCTION): New hook.
* gcc/target.def (TARGET_RELAYOUT_FUNCTION): Likewise.
* gcc/function.c (allocate_struct_function): Call relayout_function hook.
* gcc/passes.c (rest_of_decl_compilation): Likewise.
From-SVN: r228912
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* config/nvptx/nvptx.c (nvptx_goacc_validate_dims): New.
(TARGET_GOACC_VALIDATE_DIMS): Override.
* target.def (TARGET_GOACC): New target hook prefix.
(validate_dims): New hook.
* targhooks.h (default_goacc_validate_dims): New.
* omp-low.c (oacc_validate_dims): New.
(execute_oacc_device_lower): New.
(default_goacc_validate_dims): New.
(pass_data_oacc_device_lower): New.
(pass_oacc_device_lower): New pass.
(make_pass_oacc_device_lower): New.
* tree-pass.h (make_pass_oacc_device_lower): Declare.
* passes.def (pass_oacc_device_lower): Add it.
* doc/tm.texi: Rebuilt.
* doc/tm.texi.in (TARGET_GOACC_VALIDATE_DIMS): Add hook.
* doc/invoke.texi (oaccdevlow): Document tree dump flag.
Co-Authored-By: Cesar Philippidis <cesar@codesourcery.com>
From-SVN: r228304
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This renames the gimple_statement_base struct to gimple removes the
typedef of gimple_statement_base * to gimple, and then adjusts all of
the places that use the type.
gcc/ChangeLog:
2015-09-19 Trevor Saunders <tbsaunde@tbsaunde.org>
* coretypes.h (gimple): Change typedef to be a forward
declaration.
* gimple.h (gimple_statement_base): rename to gimple.
* (all functions and types using gimple): Adjust.
* *.[ch]: Likewise.
gcc/cp/ChangeLog:
2015-09-19 Trevor Saunders <tbsaunde@tbsaunde.org>
* cp-gimplify.c (gimplify_must_not_throw_expr): Adjust.
From-SVN: r227941
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gcc/
* doc/tm.texi.in (TARGET_VECTORIZE_BUILTIN_SCATTER): New.
* doc/tm.texi: Regenerate.
* target.def: Add scatter builtin.
* tree-vectorizer.h: Rename gather_p to gather_scatter_p and use it
for loads/stores in case of gather/scatter accordingly.
(STMT_VINFO_GATHER_SCATTER_P(S)): Use it instead of STMT_VINFO_GATHER_P(S).
(vect_check_gather): Rename to ...
(vect_check_gather_scatter): this.
* tree-vect-data-refs.c (vect_analyze_data_ref_dependence): Use
STMT_VINFO_GATHER_SCATTER_P instead of STMT_VINFO_SCATTER_P.
(vect_check_gather_scatter): Use it instead of vect_check_gather.
(vect_analyze_data_refs): Add gatherscatter enum and maybe_scatter variable
and new checkings for it accordingly.
* tree-vect-stmts.c
(STMT_VINFO_GATHER_SCATTER_P(S)): Use it instead of STMT_VINFO_GATHER_P(S).
(vect_check_gather_scatter): Use it instead of vect_check_gather.
(vectorizable_store): Add checkings for STMT_VINFO_GATHER_SCATTER_P.
Co-Authored-By: Kirill Yukhin <kirill.yukhin@intel.com>
Co-Authored-By: Petr Murzin <petr.murzin@intel.com>
From-SVN: r227481
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* target.def (rtx_costs): Remove "code" param, add "mode".
* rtl.h (rtx_cost, get_full_rtx_cost): Update prototype.
(set_src_cost, get_full_set_src_cost): Likewise. Move later in file.
(set_rtx_cost, get_full_set_rtx_cost): Move later in file.
* rtlanal.c (rtx_cost): Add "mode" parameter. Update targetm.rtx_costs
call. Track mode when given in rtx.
(get_full_rtx_cost): Add "mode" parameter. Update rtx_cost calls.
(default_address_cost): Pass Pmode to rtx_cost.
(insn_rtx_cost): Pass dest mode of set to set_src_cost.
* cprop.c (try_replace_reg): Ensure set_rtx_cost is not called
with NULL set.
* cse.c (COST, COST_IN): Add MODE param. Update all uses.
(notreg_cost): Add mode param. Use it.
* gcse.c (want_to_gcse_p): Delete forward declaration. Add
mode param and pass to set_src_cost. Update all calls.
(hash_scan_set): Formatting.
* hooks.c (hook_bool_rtx_int_int_int_intp_bool_false): Delete.
(hook_bool_rtx_mode_int_int_intp_bool_false): New function.
* hooks.h: Ditto.
* expmed.c (init_expmed_one_conv, init_expmed_one_mode,
init_expmed, expand_mult, mult_by_coeff_cost, expand_smod_pow2,
emit_store_flag): Update set_src_cost and rtx_cost calls.
* auto-inc-dec.c (attempt_change): Likewise.
* calls.c (precompute_register_parameters): Likewise.
* combine.c (expand_compound_operation, make_extraction,
force_to_mode, distribute_and_simplify_rtx): Likewise.
* dojump.c (prefer_and_bit_test): Likewise.
* dse.c (find_shift_sequence): Likewise.
* expr.c (compress_float_constant): Likewise.
* fwprop.c (should_replace_address, try_fwprop_subst): Likewise.
* ifcvt.c (noce_try_sign_mask): Likewise.
* loop-doloop.c (doloop_optimize): Likewise.
* loop-invariant.c (create_new_invariant): Likewise.
* lower-subreg.c (shift_cost, compute_costs): Likewise.
* optabs.c (avoid_expensive_constant, prepare_cmp_insn,
lshift_cheap_p): Likewise.
* postreload.c (reload_cse_simplify_set, reload_cse_simplify_operands,
try_replace_in_use, reload_cse_move2add): Likewise.
* reload1.c (calculate_elim_costs_all_insns, note_reg_elim_costly):
Likewise.
* simplify-rtx.c (simplify_binary_operation_1): Likewise.
* tree-ssa-loop-ivopts.c (computation_cost): Likewise.
* tree-ssa-reassoc.c (optimize_range_tests_to_bit_test): Likewise.
* tree-switch-conversion.c (emit_case_bit_tests): Likewise.
* config/aarch64/aarch64.c (aarch64_rtx_costs): Delete "code" param,
add "mode" param. Use "mode: in place of GET_MODE (x). Pass mode
to rtx_cost calls.
* config/alpha/alpha.c (alpha_rtx_costs): Likewise.
* config/arc/arc.c (arc_rtx_costs): Likewise.
* config/arm/arm.c (arm_rtx_costs): Likewise.
* config/avr/avr.c (avr_rtx_costs, avr_rtx_costs_1): Likewise.
* config/bfin/bfin.c (bfin_rtx_costs): Likewise.
* config/c6x/c6x.c (c6x_rtx_costs): Likewise.
* config/cris/cris.c (cris_rtx_costs): Likewise.
* config/epiphany/epiphany.c (epiphany_rtx_costs): Likewise.
* config/frv/frv.c (frv_rtx_costs): Likewise.
* config/h8300/h8300.c (h8300_rtx_costs): Likewise.
* config/i386/i386.c (ix86_rtx_costs): Likewise.
* config/ia64/ia64.c (ia64_rtx_costs): Likewise.
* config/iq2000/iq2000.c (iq2000_rtx_costs): Likewise.
* config/lm32/lm32.c (lm32_rtx_costs): Likewise.
* config/m32c/m32c.c (m32c_rtx_costs): Likewise.
* config/m32r/m32r.c (m32r_rtx_costs): Likewise.
* config/m68k/m68k.c (m68k_rtx_costs): Likewise.
* config/mcore/mcore.c (mcore_rtx_costs): Likewise.
* config/mep/mep.c (mep_rtx_cost): Likewise.
* config/microblaze/microblaze.c (microblaze_rtx_costs): Likewise.
* config/mips/mips.c (mips_rtx_costs): Likewise.
* config/mmix/mmix.c (mmix_rtx_costs): Likewise.
* config/mn10300/mn10300.c (mn10300_rtx_costs): Likewise.
* config/msp430/msp430.c (msp430_rtx_costs): Likewise.
* config/nds32/nds32-cost.c (nds32_rtx_costs_impl): Likewise.
* config/nds32/nds32-protos.h (nds32_rtx_costs_impl): Likewise.
* config/nds32/nds32.c (nds32_rtx_costs): Likewise.
* config/nios2/nios2.c (nios2_rtx_costs): Likewise.
* config/pa/pa.c (hppa_rtx_costs): Likewise.
* config/pdp11/pdp11.c (pdp11_rtx_costs): Likewise.
* config/rl78/rl78.c (rl78_rtx_costs): Likewise.
* config/rs6000/rs6000.c (rs6000_rtx_costs): Likewise.
* config/s390/s390.c (s390_rtx_costs): Likewise.
* config/sh/sh.c (sh_rtx_costs): Likewise.
* config/sparc/sparc.c (sparc_rtx_costs): Likewise.
* config/spu/spu.c (spu_rtx_costs): Likewise.
* config/stormy16/stormy16.c (xstormy16_rtx_costs): Likewise.
* config/tilegx/tilegx.c (tilegx_rtx_costs): Likewise.
* config/tilepro/tilepro.c (tilepro_rtx_costs): Likewise.
* config/v850/v850.c (v850_rtx_costs): Likewise.
* config/vax/vax.c (vax_rtx_costs): Likewise.
* config/visium/visium.c (visium_rtx_costs): Likewise.
* config/xtensa/xtensa.c (xtensa_rtx_costs): Likewise.
* config/aarch64/aarch64.c (aarch64_rtx_mult_cost): Change type of
"code" param, and pass as outer_code to first rtx_cost call. Pass
mode to rtx_cost calls.
(aarch64_address_cost, aarch64_if_then_else_costs): Update rtx_cost
calls.
(aarch64_rtx_costs_wrapper): Update.
* config/arm/arm.c (arm_rtx_costs_1, arm_size_rtx_costs,
arm_unspec_cost, arm_new_rtx_costs, arm_slowmul_rtx_costs): Update
rtx_cost calls.
* config/avr/avr.c (avr_final_prescan_insn): Update set_src_cost
and rtx_cost calls.
(avr_operand_rtx_cost): Similarly.
(avr_rtx_costs_1): Correct mode passed to avr_operand_rtx_cost
for subexpressions of ZERO_EXTEND, SIGN_EXTEND and COMPARE.
* config/mips/mips.c (mips_stack_address_p): Comment typo.
(mips_binary_cost): Update rtx_cost and set_src_cost calls.
(mips_rtx_costs): Use GET_MODE (x) to detect const_int.
* config/mn10300/mn10300.c (mn10300_address_cost): Pass Pmode to
rtx_cost.
(mn10300_rtx_costs): Correct mode passed to mn10300_address_cost.
* config/rs6000/rs6000.c (rs6000_debug_rtx_costs): Update.
* config/sh/sh.c (and_xor_ior_costs): Update rtx_cost call.
* doc/tm.texi: Regenerate.
From-SVN: r225532
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gcc/
* target.def: Add code_for_* hooks.
* gentarget-def.c (def_target_insn): Add TARGET_CODE_FOR_* macros.
* defaults.h (HAVE_tablejump, gen_tablejump): Delete.
* target-insns.def (casesi, tablejump): New targetm instruction
patterns.
* expr.c (try_casesi): Use them instead of HAVE_*/gen_* interface.
(do_tablejump): Likewise.
* stmt.c (expand_switch_as_decision_tree_p): Likewise.
(expand_sjlj_dispatch_table): Likewise.
* targhooks.c (default_case_values_threshold): Likewise.
From-SVN: r225421
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gcc/
* Makefile.in (TARGET_DEF): Add target-insns.def.
(.PRECIOUS, simple_rtl_generated_h): Add insn-target-def.h.
(build/gentarget-def.o): New rule.
(genprogrtl): Add target-def.
* target-insns.def, gentarget-def.c: New files.
* target.def: Add targetm.have_* and targetm.gen_* hooks,
based on the contents of target-insns.def.
* defaults.h (HAVE_simple_return, gen_simple_return): Delete.
(HAVE_return, gen_return): Delete.
* target-def.h: Include insn-target-def.h.
* cfgrtl.c (force_nonfallthru_and_redirect): Use targetm interface
instead of direct calls. Rely on them to do the appropriate assertions.
* function.c (gen_return_pattern): Likewise. Return an rtx_insn *.
(convert_jumps_to_returns): Use targetm interface instead of
direct calls.
(thread_prologue_and_epilogue_insns): Likewise.
* reorg.c (find_end_label, dbr_schedule): Likewise.
* shrink-wrap.h (SHRINK_WRAPPING_ENABLED): Likewise.
* shrink-wrap.c (convert_to_simple_return): Likewise.
(try_shrink_wrapping): Use SHRINK_WRAPPING_ENABLED.
From-SVN: r224979
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This patch removes the special casing for targets with relaxed
memory ordering and handles guard accesses with equivalent
atomic load acquire operations. In this process we change the
algorithm to load the guard variable with an atomic load that
has ACQUIRE semantics.
This then means that on targets which have weak memory models, the
fast path is inlined and can directly use a load-acquire instruction
where available (and yay! one more hook gone).
2015-06-04 Ramana Radhakrishnan <ramana.radhakrishnan@arm.com>
PR c++/66192
PR target/66200
* doc/tm.texi: Regenerate.
* doc/tm.texi.in (TARGET_RELAXED_ORDERING): Delete.
* target.def (TARGET_RELAXED_ORDERING): Likewise.
* config/alpha/alpha.c (TARGET_RELAXED_ORDERING): Likewise.
* config/ia64/ia64.c (TARGET_RELAXED_ORDERING): Likewise.
* config/rs6000/rs6000.c (TARGET_RELAXED_ORDERING): Likewise.
* config/sparc/linux.h (SPARC_RELAXED_ORDERING): Likewise.
* config/sparc/linux64.h (SPARC_RELAXED_ORDERING): Likewise.
* config/sparc/sparc.c (TARGET_RELAXED_ORDERING): Likewise.
* config/sparc/sparc.h (SPARC_RELAXED_ORDERING): Likewise.
* system.h (TARGET_RELAXED_ORDERING): Poison.
2015-06-04 Ramana Radhakrishnan <ramana.radhakrishnan@arm.com>
PR c++/66192
PR target/66200
* cp-tree.h (get_guard_cond): Adjust declaration
* decl.c (expand_static_init): Use atomic load acquire
and adjust call to get_guard_cond.
* decl2.c (build_atomic_load_byte): New function.
(get_guard_cond): Handle thread_safety.
(one_static_initialization_or_destruction): Adjust call to
get_guard_cond.
From-SVN: r224118
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floating-point registers)
2015-05-14 Vladimir Makarov <vmakarov@redhat.com>
PR rtl-optimization/65862
* target.def (ira_change_pseudo_allocno_class): New hook.
* targhooks.c (default_ira_change_pseudo_allocno_class): Default
value of the hook.
* targhooks.h (default_ira_change_pseudo_allocno_class): New
extern
* doc/tm.texi.in (TARGET_IRA_CHANGE_PSEUDO_ALLOCNO_CLASS): Add the
hook.
* ira-costs.c (find_costs_and_classes): Call the hook and change
classes when it is necessary.
* doc/tm.texi: Update.
From-SVN: r223202
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Using proper vectors instead of lists of trees.
From-SVN: r223025
|
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* target.def (attribute_table): Mention that struct attribute_spec
is defined in tree-core.h rather than tree.h
* doc/tm.texi: Regenerate.
From-SVN: r222688
|
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PR lto/64374
* target.def (target_option_stream_in): New target hook.
* tree-streamer-in.c (streamer_read_tree_bitfields): Invoke
targetm.target_option.post_stream_in if non-NULL.
* doc/tm.texi.in: Add @hook TARGET_OPTION_POST_STREAM_IN.
* doc/tm.texi: Updated.
* config/i386/i386.c (ix86_function_specific_post_stream_in): New
function.
(TARGET_OPTION_POST_STREAM_IN): Redefine.
From-SVN: r220958
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ACCEL_COMPILER, restrict alignments to absolute_biggest_alignment.
* tree-streamer-in.c (unpack_ts_decl_common_value_fields,
unpack_ts_type_common_value_fields): If ACCEL_COMPILER,
restrict alignments to absolute_biggest_alignment.
* config/i386/i386.c (TARGET_ABSOLUTE_BIGGEST_ALIGNMENT):
Define.
* doc/tm.texi.in (TARGET_ABSOLUTE_BIGGEST_ALIGNMENT): Add.
* doc/tm.texi: Regenerate.
* target.def (absolute_biggest_alignment): New DEFHOOKPOD.
From-SVN: r220882
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gcc/
2015-01-16 Zhenqiang Chen <zhenqiang.chen@arm.com>
PR target/64015
* ccmp.c (expand_ccmp_next): New function.
(expand_ccmp_expr_1, expand_ccmp_expr): Handle operand insn sequence
and compare insn sequence.
* config/aarch64/aarch64.c (aarch64_code_to_ccmode,
aarch64_gen_ccmp_first, aarch64_gen_ccmp_next): New functions.
(TARGET_GEN_CCMP_FIRST, TARGET_GEN_CCMP_NEXT): New MICRO.
* config/aarch64/aarch64.md (*ccmp_and): Changed to ccmp_and<mode>.
(*ccmp_ior): Changed to ccmp_ior<mode>.
(cmp<mode>): New pattern.
* doc/tm.texi (TARGET_GEN_CCMP_FIRST, TARGET_GEN_CCMP_NEXT): Update
parameters.
* target.def (gen_ccmp_first, gen_ccmp_next): Update parameters.
gcc/testsuite/
2015-01-16 Zhenqiang Chen <zhenqiang.chen@arm.com>
* gcc.dg/pr64015.c: New test.
From-SVN: r219723
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