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PR rtl-optimization/83565
* rtlanal.c (nonzero_bits1): On WORD_REGISTER_OPERATIONS machines, do
not extend the result to a larger mode for rotate operations.
(num_sign_bit_copies1): Likewise.
From-SVN: r256572
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This patch changes GET_MODE_SIZE from unsigned short to poly_uint16.
The non-mechanical parts were handled by previous patches.
2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
Alan Hayward <alan.hayward@arm.com>
David Sherwood <david.sherwood@arm.com>
gcc/
* machmode.h (mode_size): Change from unsigned short to
poly_uint16_pod.
(mode_to_bytes): Return a poly_uint16 rather than an unsigned short.
(GET_MODE_SIZE): Return a constant if ONLY_FIXED_SIZE_MODES,
or if measurement_type is not polynomial.
(fixed_size_mode::includes_p): Check for constant-sized modes.
* genmodes.c (emit_mode_size_inline): Make mode_size_inline
return a poly_uint16 rather than an unsigned short.
(emit_mode_size): Change the type of mode_size from unsigned short
to poly_uint16_pod. Use ZERO_COEFFS for the initializer.
(emit_mode_adjustments): Cope with polynomial vector sizes.
* lto-streamer-in.c (lto_input_mode_table): Use bp_unpack_poly_value
for GET_MODE_SIZE.
* lto-streamer-out.c (lto_write_mode_table): Use bp_pack_poly_value
for GET_MODE_SIZE.
* auto-inc-dec.c (try_merge): Treat GET_MODE_SIZE as polynomial.
* builtins.c (expand_ifn_atomic_compare_exchange_into_call): Likewise.
* caller-save.c (setup_save_areas): Likewise.
(replace_reg_with_saved_mem): Likewise.
* calls.c (emit_library_call_value_1): Likewise.
* combine-stack-adj.c (combine_stack_adjustments_for_block): Likewise.
* combine.c (simplify_set, make_extraction, simplify_shift_const_1)
(gen_lowpart_for_combine): Likewise.
* convert.c (convert_to_integer_1): Likewise.
* cse.c (equiv_constant, cse_insn): Likewise.
* cselib.c (autoinc_split, cselib_hash_rtx): Likewise.
(cselib_subst_to_values): Likewise.
* dce.c (word_dce_process_block): Likewise.
* df-problems.c (df_word_lr_mark_ref): Likewise.
* dwarf2cfi.c (init_one_dwarf_reg_size): Likewise.
* dwarf2out.c (multiple_reg_loc_descriptor, mem_loc_descriptor)
(concat_loc_descriptor, concatn_loc_descriptor, loc_descriptor)
(rtl_for_decl_location): Likewise.
* emit-rtl.c (gen_highpart, widen_memory_access): Likewise.
* expmed.c (extract_bit_field_1, extract_integral_bit_field): Likewise.
* expr.c (emit_group_load_1, clear_storage_hints): Likewise.
(emit_move_complex, emit_move_multi_word, emit_push_insn): Likewise.
(expand_expr_real_1): Likewise.
* function.c (assign_parm_setup_block_p, assign_parm_setup_block)
(pad_below): Likewise.
* gimple-fold.c (optimize_atomic_compare_exchange_p): Likewise.
* gimple-ssa-store-merging.c (rhs_valid_for_store_merging_p): Likewise.
* ira.c (get_subreg_tracking_sizes): Likewise.
* ira-build.c (ira_create_allocno_objects): Likewise.
* ira-color.c (coalesced_pseudo_reg_slot_compare): Likewise.
(ira_sort_regnos_for_alter_reg): Likewise.
* ira-costs.c (record_operand_costs): Likewise.
* lower-subreg.c (interesting_mode_p, simplify_gen_subreg_concatn)
(resolve_simple_move): Likewise.
* lra-constraints.c (get_reload_reg, operands_match_p): Likewise.
(process_addr_reg, simplify_operand_subreg, curr_insn_transform)
(lra_constraints): Likewise.
(CONST_POOL_OK_P): Reject variable-sized modes.
* lra-spills.c (slot, assign_mem_slot, pseudo_reg_slot_compare)
(add_pseudo_to_slot, lra_spill): Likewise.
* omp-low.c (omp_clause_aligned_alignment): Likewise.
* optabs-query.c (get_best_extraction_insn): Likewise.
* optabs-tree.c (expand_vec_cond_expr_p): Likewise.
* optabs.c (expand_vec_perm_var, expand_vec_cond_expr): Likewise.
(expand_mult_highpart, valid_multiword_target_p): Likewise.
* recog.c (offsettable_address_addr_space_p): Likewise.
* regcprop.c (maybe_mode_change): Likewise.
* reginfo.c (choose_hard_reg_mode, record_subregs_of_mode): Likewise.
* regrename.c (build_def_use): Likewise.
* regstat.c (dump_reg_info): Likewise.
* reload.c (complex_word_subreg_p, push_reload, find_dummy_reload)
(find_reloads, find_reloads_subreg_address): Likewise.
* reload1.c (eliminate_regs_1): Likewise.
* rtlanal.c (for_each_inc_dec_find_inc_dec, rtx_cost): Likewise.
* simplify-rtx.c (avoid_constant_pool_reference): Likewise.
(simplify_binary_operation_1, simplify_subreg): Likewise.
* targhooks.c (default_function_arg_padding): Likewise.
(default_hard_regno_nregs, default_class_max_nregs): Likewise.
* tree-cfg.c (verify_gimple_assign_binary): Likewise.
(verify_gimple_assign_ternary): Likewise.
* tree-inline.c (estimate_move_cost): Likewise.
* tree-ssa-forwprop.c (simplify_vector_constructor): Likewise.
* tree-ssa-loop-ivopts.c (add_autoinc_candidates): Likewise.
(get_address_cost_ainc): Likewise.
* tree-vect-data-refs.c (vect_enhance_data_refs_alignment): Likewise.
(vect_supportable_dr_alignment): Likewise.
* tree-vect-loop.c (vect_determine_vectorization_factor): Likewise.
(vectorizable_reduction): Likewise.
* tree-vect-stmts.c (vectorizable_assignment, vectorizable_shift)
(vectorizable_operation, vectorizable_load): Likewise.
* tree.c (build_same_sized_truth_vector_type): Likewise.
* valtrack.c (cleanup_auto_inc_dec): Likewise.
* var-tracking.c (emit_note_insn_var_location): Likewise.
* config/arc/arc.h (ASM_OUTPUT_CASE_END): Use as_a <scalar_int_mode>.
(ADDR_VEC_ALIGN): Likewise.
Co-Authored-By: Alan Hayward <alan.hayward@arm.com>
Co-Authored-By: David Sherwood <david.sherwood@arm.com>
From-SVN: r256201
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This patch changes GET_MODE_PRECISION from an unsigned short
to a poly_uint16.
2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
Alan Hayward <alan.hayward@arm.com>
David Sherwood <david.sherwood@arm.com>
gcc/
* machmode.h (mode_precision): Change from unsigned short to
poly_uint16_pod.
(mode_to_precision): Return a poly_uint16 rather than an unsigned
short.
(GET_MODE_PRECISION): Return a constant if ONLY_FIXED_SIZE_MODES,
or if measurement_type is not polynomial.
(HWI_COMPUTABLE_MODE_P): Turn into a function. Optimize the case
in which the mode is already known to be a scalar_int_mode.
* genmodes.c (emit_mode_precision): Change the type of mode_precision
from unsigned short to poly_uint16_pod. Use ZERO_COEFFS for the
initializer.
* lto-streamer-in.c (lto_input_mode_table): Use bp_unpack_poly_value
for GET_MODE_PRECISION.
* lto-streamer-out.c (lto_write_mode_table): Use bp_pack_poly_value
for GET_MODE_PRECISION.
* combine.c (update_rsp_from_reg_equal): Treat GET_MODE_PRECISION
as polynomial.
(try_combine, find_split_point, combine_simplify_rtx): Likewise.
(expand_field_assignment, make_extraction): Likewise.
(make_compound_operation_int, record_dead_and_set_regs_1): Likewise.
(get_last_value): Likewise.
* convert.c (convert_to_integer_1): Likewise.
* cse.c (cse_insn): Likewise.
* expr.c (expand_expr_real_1): Likewise.
* lra-constraints.c (simplify_operand_subreg): Likewise.
* optabs-query.c (can_atomic_load_p): Likewise.
* optabs.c (expand_atomic_load): Likewise.
(expand_atomic_store): Likewise.
* ree.c (combine_reaching_defs): Likewise.
* rtl.h (partial_subreg_p, paradoxical_subreg_p): Likewise.
* rtlanal.c (nonzero_bits1, lsb_bitfield_op_p): Likewise.
* tree.h (type_has_mode_precision_p): Likewise.
* ubsan.c (instrument_si_overflow): Likewise.
gcc/ada/
* gcc-interface/misc.c (enumerate_modes): Treat GET_MODE_PRECISION
as polynomial.
Co-Authored-By: Alan Hayward <alan.hayward@arm.com>
Co-Authored-By: David Sherwood <david.sherwood@arm.com>
From-SVN: r256198
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This patch changes GET_MODE_NUNITS from unsigned char
to poly_uint16, although it remains a macro when compiling
target code with NUM_POLY_INT_COEFFS == 1.
We can handle permuted loads and stores for variable nunits if
the number of statements is a power of 2, but not otherwise.
The to_constant call in make_vector_type goes away in a later patch.
2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
Alan Hayward <alan.hayward@arm.com>
David Sherwood <david.sherwood@arm.com>
gcc/
* machmode.h (mode_nunits): Change from unsigned char to
poly_uint16_pod.
(ONLY_FIXED_SIZE_MODES): New macro.
(pod_mode::measurement_type, scalar_int_mode::measurement_type)
(scalar_float_mode::measurement_type, scalar_mode::measurement_type)
(complex_mode::measurement_type, fixed_size_mode::measurement_type):
New typedefs.
(mode_to_nunits): Return a poly_uint16 rather than an unsigned short.
(GET_MODE_NUNITS): Return a constant if ONLY_FIXED_SIZE_MODES,
or if measurement_type is not polynomial.
* genmodes.c (ZERO_COEFFS): New macro.
(emit_mode_nunits_inline): Make mode_nunits_inline return a
poly_uint16.
(emit_mode_nunits): Change the type of mode_nunits to poly_uint16_pod.
Use ZERO_COEFFS when emitting initializers.
* data-streamer.h (bp_pack_poly_value): New function.
(bp_unpack_poly_value): Likewise.
* lto-streamer-in.c (lto_input_mode_table): Use bp_unpack_poly_value
for GET_MODE_NUNITS.
* lto-streamer-out.c (lto_write_mode_table): Use bp_pack_poly_value
for GET_MODE_NUNITS.
* tree.c (make_vector_type): Remove temporary shim and make
the real function take the number of units as a poly_uint64
rather than an int.
(build_vector_type_for_mode): Handle polynomial nunits.
* dwarf2out.c (loc_descriptor, add_const_value_attribute): Likewise.
* emit-rtl.c (const_vec_series_p_1): Likewise.
(gen_rtx_CONST_VECTOR): Likewise.
* fold-const.c (test_vec_duplicate_folding): Likewise.
* genrecog.c (validate_pattern): Likewise.
* optabs-query.c (can_vec_perm_var_p, can_mult_highpart_p): Likewise.
* optabs-tree.c (expand_vec_cond_expr_p): Likewise.
* optabs.c (expand_vector_broadcast, expand_binop_directly): Likewise.
(shift_amt_for_vec_perm_mask, expand_vec_perm_var): Likewise.
(expand_vec_cond_expr, expand_mult_highpart): Likewise.
* rtlanal.c (subreg_get_info): Likewise.
* tree-vect-data-refs.c (vect_grouped_store_supported): Likewise.
(vect_grouped_load_supported): Likewise.
* tree-vect-generic.c (type_for_widest_vector_mode): Likewise.
* tree-vect-loop.c (have_whole_vector_shift): Likewise.
* simplify-rtx.c (simplify_unary_operation_1): Likewise.
(simplify_const_unary_operation, simplify_binary_operation_1)
(simplify_const_binary_operation, simplify_ternary_operation)
(test_vector_ops_duplicate, test_vector_ops): Likewise.
(simplify_immed_subreg): Use GET_MODE_NUNITS on a fixed_size_mode
instead of CONST_VECTOR_NUNITS.
* varasm.c (output_constant_pool_2): Likewise.
* rtx-vector-builder.c (rtx_vector_builder::build): Only include the
explicit-encoded elements in the XVEC for variable-length vectors.
gcc/ada/
* gcc-interface/misc.c (enumerate_modes): Handle polynomial
GET_MODE_NUNITS.
Co-Authored-By: Alan Hayward <alan.hayward@arm.com>
Co-Authored-By: David Sherwood <david.sherwood@arm.com>
From-SVN: r256195
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From-SVN: r256169
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PUSH_ROUNDING is difficult to convert to a hook since there is still
a lot of conditional code based on it. It isn't clear that a direct
conversion with checks for null hooks is the right thing to do.
Rather than untangle that, this patch converts all implementations
that do something to out-of-line functions that have the same
interface as a hook would have. This should at least help towards
any future hook conversion.
2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
Alan Hayward <alan.hayward@arm.com>
David Sherwood <david.sherwood@arm.com>
gcc/
* config/cr16/cr16-protos.h (cr16_push_rounding): Declare.
* config/cr16/cr16.h (PUSH_ROUNDING): Move implementation to...
* config/cr16/cr16.c (cr16_push_rounding): ...this new function.
* config/h8300/h8300-protos.h (h8300_push_rounding): Declare.
* config/h8300/h8300.h (PUSH_ROUNDING): Move implementation to...
* config/h8300/h8300.c (h8300_push_rounding): ...this new function.
* config/i386/i386-protos.h (ix86_push_rounding): Declare.
* config/i386/i386.h (PUSH_ROUNDING): Move implementation to...
* config/i386/i386.c (ix86_push_rounding): ...this new function.
* config/m32c/m32c-protos.h (m32c_push_rounding): Take and return
a poly_int64.
* config/m32c/m32c.c (m32c_push_rounding): Likewise.
* config/m68k/m68k-protos.h (m68k_push_rounding): Declare.
* config/m68k/m68k.h (PUSH_ROUNDING): Move implementation to...
* config/m68k/m68k.c (m68k_push_rounding): ...this new function.
* config/pdp11/pdp11-protos.h (pdp11_push_rounding): Declare.
* config/pdp11/pdp11.h (PUSH_ROUNDING): Move implementation to...
* config/pdp11/pdp11.c (pdp11_push_rounding): ...this new function.
* config/stormy16/stormy16-protos.h (xstormy16_push_rounding): Declare.
* config/stormy16/stormy16.h (PUSH_ROUNDING): Move implementation to...
* config/stormy16/stormy16.c (xstormy16_push_rounding): ...this new
function.
* expr.c (emit_move_resolve_push): Treat the input and result
of PUSH_ROUNDING as a poly_int64.
(emit_move_complex_push, emit_single_push_insn_1): Likewise.
(emit_push_insn): Likewise.
* lra-eliminations.c (mark_not_eliminable): Likewise.
* recog.c (push_operand): Likewise.
* reload1.c (elimination_effects): Likewise.
* rtlanal.c (nonzero_bits1): Likewise.
* calls.c (store_one_arg): Likewise. Require the padding to be
known at compile time.
Co-Authored-By: Alan Hayward <alan.hayward@arm.com>
Co-Authored-By: David Sherwood <david.sherwood@arm.com>
From-SVN: r256155
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This patch makes subreg_get_info handle polynomial sizes.
2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
Alan Hayward <alan.hayward@arm.com>
David Sherwood <david.sherwood@arm.com>
gcc/
* rtlanal.c (subreg_get_info): Handle polynomial mode sizes.
Co-Authored-By: Alan Hayward <alan.hayward@arm.com>
Co-Authored-By: David Sherwood <david.sherwood@arm.com>
From-SVN: r256150
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This patch makes target-independent code that uses REGMODE_NATURAL_SIZE
treat it as a poly_int rather than a constant.
2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
Alan Hayward <alan.hayward@arm.com>
David Sherwood <david.sherwood@arm.com>
gcc/
* combine.c (can_change_dest_mode): Handle polynomial
REGMODE_NATURAL_SIZE.
* expmed.c (store_bit_field_1): Likewise.
* expr.c (store_constructor): Likewise.
* emit-rtl.c (validate_subreg): Operate on polynomial mode sizes
and polynomial REGMODE_NATURAL_SIZE.
(gen_lowpart_common): Likewise.
* reginfo.c (record_subregs_of_mode): Likewise.
* rtlanal.c (read_modify_subreg_p): Likewise.
Co-Authored-By: Alan Hayward <alan.hayward@arm.com>
Co-Authored-By: David Sherwood <david.sherwood@arm.com>
From-SVN: r256149
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conditional at the top.
* rtlanal.c (canonicalize_condition): Return 0 if final rtx
does not have a conditional at the top.
From-SVN: r256079
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This patch adds new utility functions for manipulating REG_ARGS_SIZE
notes and allows the notes to carry polynomial as well as constant sizes.
The code was inconsistent about whether INT_MIN or HOST_WIDE_INT_MIN
should be used to represent an unknown size. The patch uses
HOST_WIDE_INT_MIN throughout.
2017-12-21 Richard Sandiford <richard.sandiford@linaro.org>
Alan Hayward <alan.hayward@arm.com>
David Sherwood <david.sherwood@arm.com>
gcc/
* rtl.h (get_args_size, add_args_size_note): New functions.
(find_args_size_adjust): Return a poly_int64 rather than a
HOST_WIDE_INT.
(fixup_args_size_notes): Likewise. Make the same change to the
end_args_size parameter.
* rtlanal.c (get_args_size, add_args_size_note): New functions.
* builtins.c (expand_builtin_trap): Use add_args_size_note.
* calls.c (emit_call_1): Likewise.
* explow.c (adjust_stack_1): Likewise.
* cfgcleanup.c (old_insns_match_p): Update use of
find_args_size_adjust.
* combine.c (distribute_notes): Track polynomial arg sizes.
* dwarf2cfi.c (dw_trace_info): Change beg_true_args_size,
end_true_args_size, beg_delay_args_size and end_delay_args_size
from HOST_WIDE_INT to poly_int64.
(add_cfi_args_size): Take the args_size as a poly_int64 rather
than a HOST_WIDE_INT.
(notice_args_size, notice_eh_throw, maybe_record_trace_start)
(maybe_record_trace_start_abnormal, scan_trace, connect_traces): Track
polynomial arg sizes.
* emit-rtl.c (try_split): Use get_args_size.
* recog.c (peep2_attempt): Likewise.
* reload1.c (reload_as_needed): Likewise.
* expr.c (find_args_size_adjust): Return the adjustment as a
poly_int64 rather than a HOST_WIDE_INT.
(fixup_args_size_notes): Change end_args_size from a HOST_WIDE_INT
to a poly_int64 and change the return type in the same way.
(emit_single_push_insn): Track polynomial arg sizes.
Co-Authored-By: Alan Hayward <alan.hayward@arm.com>
Co-Authored-By: David Sherwood <david.sherwood@arm.com>
From-SVN: r255919
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This patch converts the frame allocation code (mostly in function.c)
to use poly_int64 rather than HOST_WIDE_INT for frame offsets and
sizes.
2017-12-21 Richard Sandiford <richard.sandiford@linaro.org>
Alan Hayward <alan.hayward@arm.com>
David Sherwood <david.sherwood@arm.com>
gcc/
* function.h (frame_space): Change start and length from HOST_WIDE_INT
to poly_int64.
(get_frame_size): Return the size as a poly_int64 rather than a
HOST_WIDE_INT.
(frame_offset_overflow): Take the offset as a poly_int64 rather
than a HOST_WIDE_INT.
(assign_stack_local_1, assign_stack_local, assign_stack_temp_for_type)
(assign_stack_temp): Likewise for the size.
* function.c (get_frame_size): Return a poly_int64 rather than
a HOST_WIDE_INT.
(frame_offset_overflow): Take the offset as a poly_int64 rather
than a HOST_WIDE_INT.
(try_fit_stack_local): Take the start, length and size as poly_int64s
rather than HOST_WIDE_INTs. Return the offset as a poly_int64_pod
rather than a HOST_WIDE_INT.
(add_frame_space): Take the start and end as poly_int64s rather than
HOST_WIDE_INTs.
(assign_stack_local_1, assign_stack_local, assign_stack_temp_for_type)
(assign_stack_temp): Likewise for the size.
(temp_slot): Change size, base_offset and full_size from HOST_WIDE_INT
to poly_int64.
(find_temp_slot_from_address): Handle polynomial offsets.
(combine_temp_slots): Likewise.
* emit-rtl.h (rtl_data::x_frame_offset): Change from HOST_WIDE_INT
to poly_int64.
* cfgexpand.c (alloc_stack_frame_space): Return the offset as a
poly_int64 rather than a HOST_WIDE_INT.
(expand_one_stack_var_at): Take the offset as a poly_int64 rather
than a HOST_WIDE_INT.
(expand_stack_vars, expand_one_stack_var_1, expand_used_vars): Handle
polynomial frame offsets.
* config/m32r/m32r-protos.h (m32r_compute_frame_size): Take the size
as a poly_int64 rather than an int.
* config/m32r/m32r.c (m32r_compute_frame_size): Likewise.
* config/v850/v850-protos.h (compute_frame_size): Likewise.
* config/v850/v850.c (compute_frame_size): Likewise.
* config/xtensa/xtensa-protos.h (compute_frame_size): Likewise.
* config/xtensa/xtensa.c (compute_frame_size): Likewise.
* config/pa/pa-protos.h (pa_compute_frame_size): Likewise.
* config/pa/pa.c (pa_compute_frame_size): Likewise.
* explow.h (get_dynamic_stack_base): Take the offset as a poly_int64
rather than a HOST_WIDE_INT.
* explow.c (get_dynamic_stack_base): Likewise.
* final.c (final_start_function): Use the constant lower bound
of the frame size for -Wframe-larger-than.
* ira.c (do_reload): Adjust for new get_frame_size return type.
* lra.c (lra): Likewise.
* reload1.c (reload): Likewise.
* config/avr/avr.c (avr_asm_function_end_prologue): Likewise.
* config/pa/pa.h (EXIT_IGNORE_STACK): Likewise.
* rtlanal.c (get_initial_register_offset): Return the offset as
a poly_int64 rather than a HOST_WIDE_INT.
Co-Authored-By: Alan Hayward <alan.hayward@arm.com>
Co-Authored-By: David Sherwood <david.sherwood@arm.com>
From-SVN: r255917
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This patch changes SUBREG_BYTE from an int to a poly_int.
Since valid SUBREG_BYTEs must be contained within the mode of the
SUBREG_REG, the required range is the same as for GET_MODE_SIZE,
i.e. unsigned short. The patch therefore uses poly_uint16(_pod)
for the SUBREG_BYTE.
Using poly_uint16_pod rtx fields requires a new field code ('p').
Since there are no other uses of 'p' besides SUBREG_BYTE, the patch
doesn't add an XPOLY or whatever; all uses should go via SUBREG_BYTE
instead.
The patch doesn't bother implementing 'p' support for legacy
define_peepholes, since none of the remaining ones have subregs
in their patterns.
As it happened, the rtl documentation used SUBREG as an example of a
code with mixed field types, accessed via XEXP (x, 0) and XINT (x, 1).
Since there's no direct replacement for XINT, and since people should
never use it even if there were, the patch changes the example to use
INT_LIST instead.
The patch also changes subreg-related helper functions so that they too
take and return polynomial offsets. This makes the patch quite big, but
it's mostly mechanical. The patch generally sticks to existing choices
wrt signedness.
2017-12-20 Richard Sandiford <richard.sandiford@linaro.org>
Alan Hayward <alan.hayward@arm.com>
David Sherwood <david.sherwood@arm.com>
gcc/
* doc/rtl.texi: Update documentation of SUBREG_BYTE. Document the
'p' format code. Use INT_LIST rather than SUBREG as the example of
a code with an XINT and an XEXP. Remove the implication that
accessing an rtx field using XINT is expected to work.
* rtl.def (SUBREG): Change format from "ei" to "ep".
* rtl.h (rtunion::rt_subreg): New field.
(XCSUBREG): New macro.
(SUBREG_BYTE): Use it.
(subreg_shape): Change offset from an unsigned int to a poly_uint16.
Update constructor accordingly.
(subreg_shape::operator ==): Update accordingly.
(subreg_shape::unique_id): Return an unsigned HOST_WIDE_INT rather
than an unsigned int.
(subreg_lsb, subreg_lowpart_offset, subreg_highpart_offset): Return
a poly_uint64 rather than an unsigned int.
(subreg_lsb_1): Likewise. Take the offset as a poly_uint64 rather
than an unsigned int.
(subreg_size_offset_from_lsb, subreg_size_lowpart_offset)
(subreg_size_highpart_offset): Return a poly_uint64 rather than
an unsigned int. Take the sizes as poly_uint64s.
(subreg_offset_from_lsb): Return a poly_uint64 rather than
an unsigned int. Take the shift as a poly_uint64 rather than
an unsigned int.
(subreg_regno_offset, subreg_offset_representable_p): Take the offset
as a poly_uint64 rather than an unsigned int.
(simplify_subreg_regno): Likewise.
(byte_lowpart_offset): Return the memory offset as a poly_int64
rather than an int.
(subreg_memory_offset): Likewise. Take the subreg offset as a
poly_uint64 rather than an unsigned int.
(simplify_subreg, simplify_gen_subreg, subreg_get_info)
(gen_rtx_SUBREG, validate_subreg): Take the subreg offset as a
poly_uint64 rather than an unsigned int.
* rtl.c (rtx_format): Describe 'p' in comment.
(copy_rtx, rtx_equal_p_cb, rtx_equal_p): Handle 'p'.
* emit-rtl.c (validate_subreg, gen_rtx_SUBREG): Take the subreg
offset as a poly_uint64 rather than an unsigned int.
(byte_lowpart_offset): Return the memory offset as a poly_int64
rather than an int.
(subreg_memory_offset): Likewise. Take the subreg offset as a
poly_uint64 rather than an unsigned int.
(subreg_size_lowpart_offset, subreg_size_highpart_offset): Take the
mode sizes as poly_uint64s rather than unsigned ints. Return a
poly_uint64 rather than an unsigned int.
(subreg_lowpart_p): Treat subreg offsets as poly_ints.
(copy_insn_1): Handle 'p'.
* rtlanal.c (set_noop_p): Treat subregs offsets as poly_uint64s.
(subreg_lsb_1): Take the subreg offset as a poly_uint64 rather than
an unsigned int. Return the shift in the same way.
(subreg_lsb): Return the shift as a poly_uint64 rather than an
unsigned int.
(subreg_size_offset_from_lsb): Take the sizes and shift as
poly_uint64s rather than unsigned ints. Return the offset as
a poly_uint64.
(subreg_get_info, subreg_regno_offset, subreg_offset_representable_p)
(simplify_subreg_regno): Take the offset as a poly_uint64 rather than
an unsigned int.
* rtlhash.c (add_rtx): Handle 'p'.
* genemit.c (gen_exp): Likewise.
* gengenrtl.c (type_from_format, gendef): Likewise.
* gensupport.c (subst_pattern_match, get_alternatives_number)
(collect_insn_data, alter_predicate_for_insn, alter_constraints)
(subst_dup): Likewise.
* gengtype.c (adjust_field_rtx_def): Likewise.
* genrecog.c (find_operand, find_matching_operand, validate_pattern)
(match_pattern_2): Likewise.
(rtx_test::SUBREG_FIELD): New rtx_test::kind_enum.
(rtx_test::subreg_field): New function.
(operator ==, safe_to_hoist_p, transition_parameter_type)
(print_nonbool_test, print_test): Handle SUBREG_FIELD.
* genattrtab.c (attr_rtx_1): Say that 'p' is deliberately not handled.
* genpeep.c (match_rtx): Likewise.
* print-rtl.c (print_poly_int): Include if GENERATOR_FILE too.
(rtx_writer::print_rtx_operand): Handle 'p'.
(print_value): Handle SUBREG.
* read-rtl.c (apply_int_iterator): Likewise.
(rtx_reader::read_rtx_operand): Handle 'p'.
* alias.c (rtx_equal_for_memref_p): Likewise.
* cselib.c (rtx_equal_for_cselib_1, cselib_hash_rtx): Likewise.
* caller-save.c (replace_reg_with_saved_mem): Treat subreg offsets
as poly_ints.
* calls.c (expand_call): Likewise.
* combine.c (combine_simplify_rtx, expand_field_assignment): Likewise.
(make_extraction, gen_lowpart_for_combine): Likewise.
* loop-invariant.c (hash_invariant_expr_1, invariant_expr_equal_p):
Likewise.
* cse.c (remove_invalid_subreg_refs): Take the offset as a poly_uint64
rather than an unsigned int. Treat subreg offsets as poly_ints.
(exp_equiv_p): Handle 'p'.
(hash_rtx_cb): Likewise. Treat subreg offsets as poly_ints.
(equiv_constant, cse_insn): Treat subreg offsets as poly_ints.
* dse.c (find_shift_sequence): Likewise.
* dwarf2out.c (rtl_for_decl_location): Likewise.
* expmed.c (extract_low_bits): Likewise.
* expr.c (emit_group_store, undefined_operand_subword_p): Likewise.
(expand_expr_real_2): Likewise.
* final.c (alter_subreg): Likewise.
(leaf_renumber_regs_insn): Handle 'p'.
* function.c (assign_parm_find_stack_rtl, assign_parm_setup_stack):
Treat subreg offsets as poly_ints.
* fwprop.c (forward_propagate_and_simplify): Likewise.
* ifcvt.c (noce_emit_move_insn, noce_emit_cmove): Likewise.
* ira.c (get_subreg_tracking_sizes): Likewise.
* ira-conflicts.c (go_through_subreg): Likewise.
* ira-lives.c (process_single_reg_class_operands): Likewise.
* jump.c (rtx_renumbered_equal_p): Likewise. Handle 'p'.
* lower-subreg.c (simplify_subreg_concatn): Take the subreg offset
as a poly_uint64 rather than an unsigned int.
(simplify_gen_subreg_concatn, resolve_simple_move): Treat
subreg offsets as poly_ints.
* lra-constraints.c (operands_match_p): Handle 'p'.
(match_reload, curr_insn_transform): Treat subreg offsets as poly_ints.
* lra-spills.c (assign_mem_slot): Likewise.
* postreload.c (move2add_valid_value_p): Likewise.
* recog.c (general_operand, indirect_operand): Likewise.
* regcprop.c (copy_value, maybe_mode_change): Likewise.
(copyprop_hardreg_forward_1): Likewise.
* reginfo.c (simplifiable_subregs_hasher::hash, simplifiable_subregs)
(record_subregs_of_mode): Likewise.
* rtlhooks.c (gen_lowpart_general, gen_lowpart_if_possible): Likewise.
* reload.c (operands_match_p): Handle 'p'.
(find_reloads_subreg_address): Treat subreg offsets as poly_ints.
* reload1.c (alter_reg, choose_reload_regs): Likewise.
(compute_reload_subreg_offset): Likewise, and return an poly_int64.
* simplify-rtx.c (simplify_truncation, simplify_binary_operation_1):
(test_vector_ops_duplicate): Treat subreg offsets as poly_ints.
(simplify_const_poly_int_tests<N>::run): Likewise.
(simplify_subreg, simplify_gen_subreg): Take the subreg offset as
a poly_uint64 rather than an unsigned int.
* valtrack.c (debug_lowpart_subreg): Likewise.
* var-tracking.c (var_lowpart): Likewise.
(loc_cmp): Handle 'p'.
Co-Authored-By: Alan Hayward <alan.hayward@arm.com>
Co-Authored-By: David Sherwood <david.sherwood@arm.com>
From-SVN: r255882
|
|
This patch changes the MEM_OFFSET and MEM_SIZE memory attributes
from HOST_WIDE_INT to poly_int64. Most of it is mechanical,
but there is one nonbovious change in widen_memory_access.
Previously the main while loop broke with:
/* Similarly for the decl. */
else if (DECL_P (attrs.expr)
&& DECL_SIZE_UNIT (attrs.expr)
&& TREE_CODE (DECL_SIZE_UNIT (attrs.expr)) == INTEGER_CST
&& compare_tree_int (DECL_SIZE_UNIT (attrs.expr), size) >= 0
&& (! attrs.offset_known_p || attrs.offset >= 0))
break;
but it seemed wrong to optimistically assume the best case
when the offset isn't known (and thus might be negative).
As it happens, the "! attrs.offset_known_p" condition was
always false, because we'd already nullified attrs.expr in
that case:
/* If we don't know what offset we were at within the expression, then
we can't know if we've overstepped the bounds. */
if (! attrs.offset_known_p)
attrs.expr = NULL_TREE;
The patch therefore drops "! attrs.offset_known_p ||" when
converting the offset check to the may/must interface.
2017-12-20 Richard Sandiford <richard.sandiford@linaro.org>
Alan Hayward <alan.hayward@arm.com>
David Sherwood <david.sherwood@arm.com>
gcc/
* rtl.h (mem_attrs): Add a default constructor. Change size and
offset from HOST_WIDE_INT to poly_int64.
* emit-rtl.h (set_mem_offset, set_mem_size, adjust_address_1)
(adjust_automodify_address_1, set_mem_attributes_minus_bitpos)
(widen_memory_access): Take the sizes and offsets as poly_int64s
rather than HOST_WIDE_INTs.
* alias.c (ao_ref_from_mem): Handle the new form of MEM_OFFSET.
(offset_overlap_p): Take poly_int64s rather than HOST_WIDE_INTs
and ints.
(adjust_offset_for_component_ref): Change the offset from a
HOST_WIDE_INT to a poly_int64.
(nonoverlapping_memrefs_p): Track polynomial offsets and sizes.
* cfgcleanup.c (merge_memattrs): Update after mem_attrs changes.
* dce.c (find_call_stack_args): Likewise.
* dse.c (record_store): Likewise.
* dwarf2out.c (tls_mem_loc_descriptor, dw_sra_loc_expr): Likewise.
* print-rtl.c (rtx_writer::print_rtx): Likewise.
* read-rtl-function.c (test_loading_mem): Likewise.
* rtlanal.c (may_trap_p_1): Likewise.
* simplify-rtx.c (delegitimize_mem_from_attrs): Likewise.
* var-tracking.c (int_mem_offset, track_expr_p): Likewise.
* emit-rtl.c (mem_attrs_eq_p, get_mem_align_offset): Likewise.
(mem_attrs::mem_attrs): New function.
(set_mem_attributes_minus_bitpos): Change bitpos from a
HOST_WIDE_INT to poly_int64.
(set_mem_alias_set, set_mem_addr_space, set_mem_align, set_mem_expr)
(clear_mem_offset, clear_mem_size, change_address)
(get_spill_slot_decl, set_mem_attrs_for_spill): Directly
initialize mem_attrs.
(set_mem_offset, set_mem_size, adjust_address_1)
(adjust_automodify_address_1, offset_address, widen_memory_access):
Likewise. Take poly_int64s rather than HOST_WIDE_INT.
Co-Authored-By: Alan Hayward <alan.hayward@arm.com>
Co-Authored-By: David Sherwood <david.sherwood@arm.com>
From-SVN: r255875
|
|
This patch changes the offset and size arguments of
rtx_addr_can_trap_p_1 from HOST_WIDE_INT to poly_int64. It also
uses a size of -1 rather than 0 to represent an unknown size and
BLKmode rather than VOIDmode to represent an unknown mode.
2017-12-20 Richard Sandiford <richard.sandiford@linaro.org>
Alan Hayward <alan.hayward@arm.com>
David Sherwood <david.sherwood@arm.com>
gcc/
* rtlanal.c (rtx_addr_can_trap_p_1): Take the offset and size
as poly_int64s rather than HOST_WIDE_INTs. Use a size of -1
rather than 0 to represent an unknown size. Assert that the size
is known when the mode isn't BLKmode.
(may_trap_p_1): Use -1 for unknown sizes.
(rtx_addr_can_trap_p): Likewise. Pass BLKmode rather than VOIDmode.
Co-Authored-By: Alan Hayward <alan.hayward@arm.com>
Co-Authored-By: David Sherwood <david.sherwood@arm.com>
From-SVN: r255874
|
|
This patch adds an rtl representation of poly_int values.
There were three possible ways of doing this:
(1) Add a new rtl code for the poly_ints themselves and store the
coefficients as trailing wide_ints. This would give constants like:
(const_poly_int [c0 c1 ... cn])
The runtime value would be:
c0 + c1 * x1 + ... + cn * xn
(2) Like (1), but use rtxes for the coefficients. This would give
constants like:
(const_poly_int [(const_int c0)
(const_int c1)
...
(const_int cn)])
although the coefficients could be const_wide_ints instead
of const_ints where appropriate.
(3) Add a new rtl code for the polynomial indeterminates,
then use them in const wrappers. A constant like c0 + c1 * x1
would then look like:
(const:M (plus:M (mult:M (const_param:M x1)
(const_int c1))
(const_int c0)))
There didn't seem to be that much to choose between them. The main
advantage of (1) is that it's a more efficient representation and
that we can refer to the cofficients directly as wide_int_storage.
2017-12-20 Richard Sandiford <richard.sandiford@linaro.org>
Alan Hayward <alan.hayward@arm.com>
David Sherwood <david.sherwood@arm.com>
gcc/
* doc/rtl.texi (const_poly_int): Document. Also document the
rtl sharing behavior.
* gengenrtl.c (excluded_rtx): Return true for CONST_POLY_INT.
* rtl.h (const_poly_int_def): New struct.
(rtx_def::u): Add a cpi field.
(CASE_CONST_UNIQUE, CASE_CONST_ANY): Add CONST_POLY_INT.
(CONST_POLY_INT_P, CONST_POLY_INT_COEFFS): New macros.
(wi::rtx_to_poly_wide_ref): New typedef
(const_poly_int_value, wi::to_poly_wide, rtx_to_poly_int64)
(poly_int_rtx_p): New functions.
(trunc_int_for_mode): Declare a poly_int64 version.
(plus_constant): Take a poly_int64 instead of a HOST_WIDE_INT.
(immed_wide_int_const): Take a poly_wide_int_ref rather than
a wide_int_ref.
(strip_offset): Declare.
(strip_offset_and_add): New function.
* rtl.def (CONST_POLY_INT): New rtx code.
* rtl.c (rtx_size): Handle CONST_POLY_INT.
(shared_const_p): Use poly_int_rtx_p.
* emit-rtl.h (gen_int_mode): Take a poly_int64 instead of a
HOST_WIDE_INT.
(gen_int_shift_amount): Likewise.
* emit-rtl.c (const_poly_int_hasher): New class.
(const_poly_int_htab): New variable.
(init_emit_once): Initialize it when NUM_POLY_INT_COEFFS > 1.
(const_poly_int_hasher::hash): New function.
(const_poly_int_hasher::equal): Likewise.
(gen_int_mode): Take a poly_int64 instead of a HOST_WIDE_INT.
(immed_wide_int_const): Rename to...
(immed_wide_int_const_1): ...this and make static.
(immed_wide_int_const): New function, taking a poly_wide_int_ref
instead of a wide_int_ref.
(gen_int_shift_amount): Take a poly_int64 instead of a HOST_WIDE_INT.
(gen_lowpart_common): Handle CONST_POLY_INT.
* cse.c (hash_rtx_cb, equiv_constant): Likewise.
* cselib.c (cselib_hash_rtx): Likewise.
* dwarf2out.c (const_ok_for_output_1): Likewise.
* expr.c (convert_modes): Likewise.
* print-rtl.c (rtx_writer::print_rtx, print_value): Likewise.
* rtlhash.c (add_rtx): Likewise.
* explow.c (trunc_int_for_mode): Add a poly_int64 version.
(plus_constant): Take a poly_int64 instead of a HOST_WIDE_INT.
Handle existing CONST_POLY_INT rtxes.
* expmed.h (expand_shift): Take a poly_int64 instead of a
HOST_WIDE_INT.
* expmed.c (expand_shift): Likewise.
* rtlanal.c (strip_offset): New function.
(commutative_operand_precedence): Give CONST_POLY_INT the same
precedence as CONST_DOUBLE and put CONST_WIDE_INT between that
and CONST_INT.
* rtl-tests.c (const_poly_int_tests): New struct.
(rtl_tests_c_tests): Use it.
* simplify-rtx.c (simplify_const_unary_operation): Handle
CONST_POLY_INT.
(simplify_const_binary_operation): Likewise.
(simplify_binary_operation_1): Fold additions of symbolic constants
and CONST_POLY_INTs.
(simplify_subreg): Handle extensions and truncations of
CONST_POLY_INTs.
(simplify_const_poly_int_tests): New struct.
(simplify_rtx_c_tests): Use it.
* wide-int.h (storage_ref): Add default constructor.
(wide_int_ref_storage): Likewise.
(trailing_wide_ints): Use GTY((user)).
(trailing_wide_ints::operator[]): Add a const version.
(trailing_wide_ints::get_precision): New function.
(trailing_wide_ints::extra_size): Likewise.
Co-Authored-By: Alan Hayward <alan.hayward@arm.com>
Co-Authored-By: David Sherwood <david.sherwood@arm.com>
From-SVN: r255862
|
|
In PR83424 combine's move_deaths puts a REG_DEAD note in the wrong place
because dead_or_set_regno_p does not account for CLOBBER insns. This
fixes it.
PR rtl-optimization/83424
* rtlanal.c (dead_or_set_regno_p): Handle CLOBBER just like SET.
gcc/testsuite/
PR rtl-optimization/83424
* gcc.dg/pr83424.c: New testsuite.
From-SVN: r255787
|
|
highpart)
PR middle-end/80929
* rtlanal.c (seq_cost): For non-single_set insns try to use insn_cost.
From-SVN: r255228
|
|
This patch uses df_read_modify_subreg_p to check whether writing
to a subreg would preserve some of the existing contents.
This has the effect of putting more emphasis on the
REGMODE_NATURAL_SIZE-based definition of whether something can be
partially modified, instead of using UNITS_PER_WORD unconditionally.
This becomes important for SVE, where UNITS_PER_WORD has no
significance for subregs of multi-register LD2/ST2, LD3/ST3 and
LD4/ST4 tuples.
2017-10-26 Richard Sandiford <richard.sandiford@linaro.org>
Alan Hayward <alan.hayward@arm.com>
David Sherwood <david.sherwood@arm.com>
gcc/
* caller-save.c (mark_referenced_regs): Use read_modify_subreg_p.
* combine.c (find_single_use_1): Likewise.
(expand_field_assignment): Likewise.
(move_deaths): Likewise.
* lra-constraints.c (simplify_operand_subreg): Likewise.
(curr_insn_transform): Likewise.
* lra.c (collect_non_operand_hard_regs): Likewise.
(add_regs_to_insn_regno_info): Likewise.
* rtlanal.c (reg_referenced_p): Likewise.
(covers_regno_no_parallel_p): Likewise.
Co-Authored-By: Alan Hayward <alan.hayward@arm.com>
Co-Authored-By: David Sherwood <david.sherwood@arm.com>
From-SVN: r254110
|
|
I took the documentation of the FRAME_GROWS_DOWNWARD behaviour from the
version that was in most header files, since the one in the manual seemed
less clear.
The patch deliberately keeps FIRST_PARM_OFFSET(FNDECL) in
microblaze_starting_frame_offset; this seems to be a port-local
convention and takes advantage of the fact that FIRST_PARM_OFFSET
doesn't read FNDECL.
2017-10-23 Richard Sandiford <richard.sandiford@linaro.org>
gcc/
* target.def (starting_frame_offset): New hook.
* doc/tm.texi (STARTING_FRAME_OFFSET): Remove in favor of...
(TARGET_STARTING_FRAME_OFFSET): ...this new hook.
* doc/tm.texi.in: Regenerate.
* hooks.h (hook_hwi_void_0): Declare.
* hooks.c (hook_hwi_void_0): New function.
* doc/rtl.texi: Refer to TARGET_STARTING_FRAME_OFFSET instead of
STARTING_FRAME_OFFSET.
* builtins.c (expand_builtin_setjmp_receiver): Likewise.
* reload1.c (reload): Likewise.
* cfgexpand.c (expand_used_vars): Use targetm.starting_frame_offset
instead of STARTING_FRAME_OFFSET.
* function.c (try_fit_stack_local): Likewise.
(assign_stack_local_1): Likewise
(instantiate_virtual_regs): Likewise.
* rtlanal.c (rtx_addr_can_trap_p_1): Likewise.
* config/avr/avr.md (nonlocal_goto_receiver): Likewise.
* config/aarch64/aarch64.h (STARTING_FRAME_OFFSET): Delete.
* config/alpha/alpha.h (STARTING_FRAME_OFFSET): Likewise.
* config/arc/arc.h (STARTING_FRAME_OFFSET): Likewise.
* config/arm/arm.h (STARTING_FRAME_OFFSET): Likewise.
* config/bfin/bfin.h (STARTING_FRAME_OFFSET): Likewise.
* config/c6x/c6x.h (STARTING_FRAME_OFFSET): Likewise.
* config/cr16/cr16.h (STARTING_FRAME_OFFSET): Likewise.
* config/cris/cris.h (STARTING_FRAME_OFFSET): Likewise.
* config/fr30/fr30.h (STARTING_FRAME_OFFSET): Likewise.
* config/frv/frv.h (STARTING_FRAME_OFFSET): Likewise.
* config/ft32/ft32.h (STARTING_FRAME_OFFSET): Likewise.
* config/h8300/h8300.h (STARTING_FRAME_OFFSET): Likewise.
* config/i386/i386.h (STARTING_FRAME_OFFSET): Likewise.
* config/ia64/ia64.h (STARTING_FRAME_OFFSET): Likewise.
* config/m32c/m32c.h (STARTING_FRAME_OFFSET): Likewise.
* config/m68k/m68k.h (STARTING_FRAME_OFFSET): Likewise.
* config/mcore/mcore.h (STARTING_FRAME_OFFSET): Likewise.
* config/mn10300/mn10300.h (STARTING_FRAME_OFFSET): Likewise.
* config/moxie/moxie.h (STARTING_FRAME_OFFSET): Likewise.
* config/msp430/msp430.h (STARTING_FRAME_OFFSET): Likewise.
* config/nds32/nds32.h (STARTING_FRAME_OFFSET): Likewise.
* config/nios2/nios2.h (STARTING_FRAME_OFFSET): Likewise.
* config/nvptx/nvptx.h (STARTING_FRAME_OFFSET): Likewise.
* config/pdp11/pdp11.h (STARTING_FRAME_OFFSET): Likewise.
* config/riscv/riscv.h (STARTING_FRAME_OFFSET): Likewise.
* config/rl78/rl78.h (STARTING_FRAME_OFFSET): Likewise.
* config/rx/rx.h (STARTING_FRAME_OFFSET): Likewise.
* config/s390/s390.h (STARTING_FRAME_OFFSET): Likewise.
* config/sh/sh.h (STARTING_FRAME_OFFSET): Likewise.
* config/sparc/sparc.c (sparc_compute_frame_size): Likewise.
* config/sparc/sparc.h (STARTING_FRAME_OFFSET): Likewise.
* config/spu/spu.h (STARTING_FRAME_OFFSET): Likewise.
* config/stormy16/stormy16.h (STARTING_FRAME_OFFSET): Likewise.
* config/tilegx/tilegx.h (STARTING_FRAME_OFFSET): Likewise.
* config/tilepro/tilepro.h (STARTING_FRAME_OFFSET): Likewise.
* config/v850/v850.h (STARTING_FRAME_OFFSET): Likewise.
* config/visium/visium.h (STARTING_FRAME_OFFSET): Likewise.
* config/avr/avr.h (STARTING_FRAME_OFFSET): Likewise.
* config/avr/avr-protos.h (avr_starting_frame_offset): Likewise.
* config/avr/avr.c (avr_starting_frame_offset): Make static and
return a HOST_WIDE_INT.
(avr_builtin_setjmp_frame_value): Use it instead of
STARTING_FRAME_OFFSET.
(TARGET_STARTING_FRAME_OFFSET): Redefine.
* config/epiphany/epiphany.h (STARTING_FRAME_OFFSET): Delete.
* config/epiphany/epiphany.c (epiphany_starting_frame_offset):
New function.
(TARGET_STARTING_FRAME_OFFSET): Redefine.
* config/iq2000/iq2000.h (STARTING_FRAME_OFFSET): Delete.
* config/iq2000/iq2000.c (iq2000_starting_frame_offset): New function.
(TARGET_CONSTANT_ALIGNMENT): Redefine.
* config/lm32/lm32.h (STARTING_FRAME_OFFSET): Delete.
* config/lm32/lm32.c (lm32_starting_frame_offset): New function.
(TARGET_STARTING_FRAME_OFFSET): Redefine.
* config/m32r/m32r.h (STARTING_FRAME_OFFSET): Delete.
* config/m32r/m32r.c (m32r_starting_frame_offset): New function.
(TARGET_STARTING_FRAME_OFFSET): Redefine.
* config/microblaze/microblaze.h (STARTING_FRAME_OFFSET): Delete.
* config/microblaze/microblaze.c (microblaze_starting_frame_offset):
New function.
(TARGET_STARTING_FRAME_OFFSET): Redefine.
* config/mips/mips.h (STARTING_FRAME_OFFSET): Delete.
* config/mips/mips.c (mips_compute_frame_info): Refer to
TARGET_STARTING_FRAME_OFFSET instead of STARTING_FRAME_OFFSET.
(mips_starting_frame_offset): New function.
(TARGET_STARTING_FRAME_OFFSET): Redefine.
* config/mmix/mmix.h (STARTING_FRAME_OFFSET): Delete.
* config/mmix/mmix-protos.h (mmix_starting_frame_offset): Delete.
* config/mmix/mmix.c (mmix_starting_frame_offset): Make static
and return a HOST_WIDE_INT.
(TARGET_STARTING_FRAME_OFFSET): Redefine.
(mmix_initial_elimination_offset): Refer to
TARGET_STARTING_FRAME_OFFSET instead of STARTING_FRAME_OFFSET.
* config/pa/pa.h (STARTING_FRAME_OFFSET): Delete.
* config/pa/pa.c (pa_starting_frame_offset): New function.
(pa_compute_frame_size): Use it instead of STARTING_FRAME_OFFSET.
(pa_expand_prologue): Likewise.
(TARGET_STARTING_FRAME_OFFSET): Redefine.
* config/powerpcspe/aix.h (STARTING_FRAME_OFFSET): Split out
!FRAME_GROWS_DOWNWARD handling to...
(RS6000_STARTING_FRAME_OFFSET): ...this new macro.
* config/powerpcspe/darwin.h (STARTING_FRAME_OFFSET): Split out
!FRAME_GROWS_DOWNWARD handling to...
(RS6000_STARTING_FRAME_OFFSET): ...this new macro.
* config/powerpcspe/powerpcspe.h (STARTING_FRAME_OFFSET): Split out
!FRAME_GROWS_DOWNWARD handling to...
(RS6000_STARTING_FRAME_OFFSET): ...this new macro.
* config/powerpcspe/powerpcspe.c (TARGET_STARTING_FRAME_OFFSET):
Redefine.
(rs6000_starting_frame_offset): New function.
* config/rs6000/aix.h (STARTING_FRAME_OFFSET): Split out
!FRAME_GROWS_DOWNWARD handling to...
(RS6000_STARTING_FRAME_OFFSET): ...this new macro.
* config/rs6000/darwin.h (STARTING_FRAME_OFFSET): Split out
!FRAME_GROWS_DOWNWARD handling to...
(RS6000_STARTING_FRAME_OFFSET): ...this new macro.
* config/rs6000/rs6000.h (STARTING_FRAME_OFFSET): Split out
!FRAME_GROWS_DOWNWARD handling to...
(RS6000_STARTING_FRAME_OFFSET): ...this new macro.
* config/rs6000/rs6000.c (TARGET_STARTING_FRAME_OFFSET): Refine.
(rs6000_starting_frame_offset): New function.
* config/vax/elf.h (STARTING_FRAME_OFFSET): Delete.
* config/vax/vax.h (STARTING_FRAME_OFFSET): Delete.
* config/vax/vax.c (vax_starting_frame_offset): New function.
(vax_expand_prologue): Use it instead of STARTING_FRAME_OFFSET.
(TARGET_STARTING_FRAME_OFFSET): Redefine.
* config/xtensa/xtensa.h (STARTING_FRAME_OFFSET): Delete.
* config/xtensa/xtensa.c (xtensa_starting_frame_offset): New function.
(TARGET_STARTING_FRAME_OFFSET): Redefine.
* system.h (STARTING_FRAME_OFFSET): Poison.
From-SVN: r254003
|
|
This patch uses HWI_COMPUTABLE_MODE_P (X) instead of
GET_MODE_PRECISION (X) <= HOST_BITS_PER_WIDE_INT in cases
where X also needs to be a scalar integer.
2017-10-22 Richard Sandiford <richard.sandiford@linaro.org>
Alan Hayward <alan.hayward@arm.com>
David Sherwood <david.sherwood@arm.com>
gcc/
* combine.c (simplify_comparison): Use HWI_COMPUTABLE_MODE_P.
(record_promoted_value): Likewise.
* expr.c (expand_expr_real_2): Likewise.
* ree.c (update_reg_equal_equiv_notes): Likewise.
(combine_set_extension): Likewise.
* rtlanal.c (low_bitmask_len): Likewise.
* simplify-rtx.c (neg_const_int): Likewise.
(simplify_binary_operation_1): Likewise.
Co-Authored-By: Alan Hayward <alan.hayward@arm.com>
Co-Authored-By: David Sherwood <david.sherwood@arm.com>
From-SVN: r253990
|
|
This adds a new hook that the insn_cost function uses if a target has
implemented it (it uses the old pattern_cost nee insn_rtx_cost if not).
* target.def (insn_cost): New hook.
* doc/tm.texi.in (TARGET_INSN_COST): New hook.
* doc/tm.texi: Regenerate.
* rtlanal.c (insn_cost): Use the new hook.
From-SVN: r253562
|
|
This replaces insn_rtx_cost with insn_cost if an insn is readily
available, and with pattern_cost otherwise.
* cfgrtl.c (rtl_account_profile_record): Replace insn_rtx_cost with
insn_cost.
* combine.c (uid_insn_cost): Adjust comment.
(combine_validate_cost): Adjust comment. Use pattern_cost instead
of insn_rtx_cost
(combine_instructions): Use insn_cost instead of insn_rtx_cost.
* dse.c (find_shift_sequence): Ditto.
* ifcvt.c (cheap_bb_rtx_cost_p): Ditto.
(bb_valid_for_noce_process_p): Use pattern_cost.
* rtl.h (insn_rtx_cost): Delete.
(pattern_cost): New prototype.
(insn_cost): New prototype.
* rtlanal.c (insn_rtx_cost): Rename to...
(pattern_cost): ... this.
(insn_cost): New.
From-SVN: r253560
|
|
This also seemed like a good opportunity to reverse the sense of the
hook to "can", to avoid the awkward double negative in !CANNOT.
2017-09-15 Richard Sandiford <richard.sandiford@linaro.org>
Alan Hayard <alan.hayward@arm.com>
David Sherwood <david.sherwood@arm.com>
gcc/
* target.def (can_change_mode_class): New hook.
(mode_rep_extended): Refer to it instead of CANNOT_CHANGE_MODE_CLASS.
(hard_regno_nregs): Likewise.
* hooks.h (hook_bool_mode_mode_reg_class_t_true): Declare.
* hooks.c (hook_bool_mode_mode_reg_class_t_true): New function.
* doc/tm.texi.in (CANNOT_CHANGE_MODE_CLASS): Replace with...
(TARGET_CAN_CHANGE_MODE_CLASS): ...this.
(LOAD_EXTEND_OP): Update accordingly.
* doc/tm.texi: Regenerate.
* doc/rtl.texi: Refer to TARGET_CAN_CHANGE_MODE_CLASS instead of
CANNOT_CHANGE_MODE_CLASS.
* hard-reg-set.h (REG_CANNOT_CHANGE_MODE_P): Replace with...
(REG_CAN_CHANGE_MODE_P): ...this new macro.
* combine.c (simplify_set): Update accordingly.
* emit-rtl.c (validate_subreg): Likewise.
* recog.c (general_operand): Likewise.
* regcprop.c (mode_change_ok): Likewise.
* reload1.c (choose_reload_regs): Likewise.
(inherit_piecemeal_p): Likewise.
* rtlanal.c (simplify_subreg_regno): Likewise.
* postreload.c (reload_cse_simplify_set): Use REG_CAN_CHANGE_MODE_P
instead of CANNOT_CHANGE_MODE_CLASS.
(reload_cse_simplify_operands): Likewise.
* reload.c (push_reload): Use targetm.can_change_mode_class
instead of CANNOT_CHANGE_MODE_CLASS.
(push_reload): Likewise. Also use REG_CAN_CHANGE_MODE_P instead of
REG_CANNOT_CHANGE_MODE_P.
* config/alpha/alpha.h (CANNOT_CHANGE_MODE_CLASS): Delete.
* config/alpha/alpha.c (alpha_can_change_mode_class): New function.
(TARGET_CAN_CHANGE_MODE_CLASS): Redefine.
* config/arm/arm.h (CANNOT_CHANGE_MODE_CLASS): Delete.
* config/arm/arm.c (TARGET_CAN_CHANGE_MODE_CLASS): Redefine.
(arm_can_change_mode_class): New function.
* config/arm/neon.md: Refer to TARGET_CAN_CHANGE_MODE_CLASS rather
than CANNOT_CHANGE_MODE_CLASS in comments.
* config/i386/i386.h (CANNOT_CHANGE_MODE_CLASS): Delete.
* config/i386/i386-protos.h (ix86_cannot_change_mode_class): Delete.
* config/i386/i386.c (ix86_cannot_change_mode_class): Replace with...
(ix86_can_change_mode_class): ...this new function, inverting the
sense of the return value.
(TARGET_CAN_CHANGE_MODE_CLASS): Redefine.
* config/ia64/ia64.h (CANNOT_CHANGE_MODE_CLASS): Delete.
* config/ia64/ia64.c (TARGET_CAN_CHANGE_MODE_CLASS): Redefine.
(ia64_can_change_mode_class): New function.
* config/m32c/m32c.h (CANNOT_CHANGE_MODE_CLASS): Delete.
* config/m32c/m32c-protos.h (m32c_cannot_change_mode_class): Delete.
* config/m32c/m32c.c (m32c_cannot_change_mode_class): Replace with...
(m32c_can_change_mode_class): ...this new function, inverting the
sense of the return value.
(TARGET_CAN_CHANGE_MODE_CLASS): Redefine.
* config/mips/mips.h (CANNOT_CHANGE_MODE_CLASS): Delete.
* config/mips/mips-protos.h (mips_cannot_change_mode_class): Delete.
* config/mips/mips.c (mips_cannot_change_mode_class): Replace with...
(mips_can_change_mode_class): ...this new function, inverting the
sense of the return value.
(TARGET_CAN_CHANGE_MODE_CLASS): Redefine.
* config/msp430/msp430.h (CANNOT_CHANGE_MODE_CLASS): Delete.
* config/msp430/msp430.c (TARGET_CAN_CHANGE_MODE_CLASS): Redefine.
(msp430_can_change_mode_class): New function.
* config/nvptx/nvptx.h (CANNOT_CHANGE_MODE_CLASS): Delete.
* config/nvptx/nvptx.c (nvptx_can_change_mode_class): New function.
(TARGET_CAN_CHANGE_MODE_CLASS): Redefine.
* config/pa/pa32-regs.h (CANNOT_CHANGE_MODE_CLASS): Delete.
* config/pa/pa64-regs.h (CANNOT_CHANGE_MODE_CLASS): Delete.
* config/pa/pa-protos.h (pa_cannot_change_mode_class): Delete.
* config/pa/pa.c (TARGET_CAN_CHANGE_MODE_CLASS): Redefine.
(pa_cannot_change_mode_class): Replace with...
(pa_can_change_mode_class): ...this new function, inverting the
sense of the return value.
(pa_modes_tieable_p): Refer to TARGET_CAN_CHANGE_MODE_CLASS rather
than CANNOT_CHANGE_MODE_CLASS in comments.
* config/pdp11/pdp11.h (CANNOT_CHANGE_MODE_CLASS): Delete.
* config/pdp11/pdp11-protos.h (pdp11_cannot_change_mode_class): Delete.
* config/pdp11/pdp11.c (TARGET_CAN_CHANGE_MODE_CLASS): Redefine.
(pdp11_cannot_change_mode_class): Replace with...
(pdp11_can_change_mode_class): ...this new function, inverting the
sense of the return value.
* config/powerpcspe/powerpcspe.h (CANNOT_CHANGE_MODE_CLASS): Delete.
* config/powerpcspe/powerpcspe-protos.h
(rs6000_cannot_change_mode_class_ptr): Delete.
* config/powerpcspe/powerpcspe.c
(rs6000_cannot_change_mode_class_ptr): Delete.
(TARGET_CAN_CHANGE_MODE_CLASS): Redefine.
(rs6000_option_override_internal): Assign to
targetm.can_change_mode_class instead of
rs6000_cannot_change_mode_class_ptr.
(rs6000_cannot_change_mode_class): Replace with...
(rs6000_can_change_mode_class): ...this new function, inverting the
sense of the return value.
(rs6000_debug_cannot_change_mode_class): Replace with...
(rs6000_debug_can_change_mode_class): ...this new function.
* config/riscv/riscv.h (CANNOT_CHANGE_MODE_CLASS): Delete.
* config/riscv/riscv.c (riscv_can_change_mode_class): New function.
(TARGET_CAN_CHANGE_MODE_CLASS): Redefine.
* config/rs6000/rs6000.h (CANNOT_CHANGE_MODE_CLASS): Delete.
* config/rs6000/rs6000-protos.h (rs6000_cannot_change_mode_class_ptr):
Delete.
* config/rs6000/rs6000.c (rs6000_cannot_change_mode_class_ptr): Delete.
(TARGET_CAN_CHANGE_MODE_CLASS): Redefine.
(rs6000_option_override_internal): Assign to
targetm.can_change_mode_class instead of
rs6000_cannot_change_mode_class_ptr.
(rs6000_cannot_change_mode_class): Replace with...
(rs6000_can_change_mode_class): ...this new function, inverting the
sense of the return value.
(rs6000_debug_cannot_change_mode_class): Replace with...
(rs6000_debug_can_change_mode_class): ...this new function.
* config/s390/s390.h (CANNOT_CHANGE_MODE_CLASS): Delete.
* config/s390/s390-protos.h (s390_cannot_change_mode_class): Delete.
* config/s390/s390.c (s390_cannot_change_mode_class): Replace with...
(s390_can_change_mode_class): ...this new function, inverting the
sense of the return value.
(TARGET_CAN_CHANGE_MODE_CLASS): Redefine.
* config/sh/sh.h (CANNOT_CHANGE_MODE_CLASS): Delete.
* config/sh/sh-protos.h (sh_cannot_change_mode_class): Delete.
* config/sh/sh.c (TARGET_CAN_CHANGE_MODE_CLASS): Redefine.
(sh_cannot_change_mode_class): Replace with...
(sh_can_change_mode_class): ...this new function, inverting the
sense of the return value.
* config/sparc/sparc.h (CANNOT_CHANGE_MODE_CLASS): Delete.
* config/sparc/sparc.c (TARGET_CAN_CHANGE_MODE_CLASS): Redefine.
(sparc_can_change_mode_class): New function.
* config/spu/spu.h (CANNOT_CHANGE_MODE_CLASS): Delete.
* config/spu/spu.c (spu_can_change_mode_class): New function.
(TARGET_CAN_CHANGE_MODE_CLASS): Redefine.
* config/visium/visium.h (CANNOT_CHANGE_MODE_CLASS): Delete.
* config/visium/visium.c (TARGET_CAN_CHANGE_MODE_CLASS): Redefine.
(visium_can_change_mode_class): New function.
* system.h (CANNOT_CHANGE_MODE_CLASS): Poison.
Co-Authored-By: Alan Hayward <alan.hayward@arm.com>
Co-Authored-By: David Sherwood <david.sherwood@arm.com>
From-SVN: r252816
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|
This patch converts hard_regno_nregs into an inline function, which
in turn allows hard_regno_nregs to be used as the name of a targetm
field. This is just a mechanical change.
2017-09-12 Richard Sandiford <richard.sandiford@linaro.org>
gcc/
* regs.h (hard_regno_nregs): Turn into a function.
(end_hard_regno): Update accordingly.
* caller-save.c (setup_save_areas): Likewise.
(save_call_clobbered_regs): Likewise.
(replace_reg_with_saved_mem): Likewise.
(insert_restore): Likewise.
(insert_save): Likewise.
* combine.c (can_change_dest_mode): Likewise.
(move_deaths): Likewise.
(distribute_notes): Likewise.
* config/mips/mips.c (mips_hard_regno_call_part_clobbered): Likewise.
* config/powerpcspe/powerpcspe.c (rs6000_cannot_change_mode_class)
(rs6000_split_multireg_move): Likewise.
(rs6000_register_move_cost): Likewise.
(rs6000_memory_move_cost): Likewise.
* config/rs6000/rs6000.c (rs6000_cannot_change_mode_class): Likewise.
(rs6000_split_multireg_move): Likewise.
(rs6000_register_move_cost): Likewise.
(rs6000_memory_move_cost): Likewise.
* cselib.c (cselib_reset_table): Likewise.
(cselib_lookup_1): Likewise.
* emit-rtl.c (set_mode_and_regno): Likewise.
* function.c (aggregate_value_p): Likewise.
* ira-color.c (setup_profitable_hard_regs): Likewise.
(check_hard_reg_p): Likewise.
(calculate_saved_nregs): Likewise.
(assign_hard_reg): Likewise.
(improve_allocation): Likewise.
(calculate_spill_cost): Likewise.
* ira-emit.c (modify_move_list): Likewise.
* ira-int.h (ira_hard_reg_set_intersection_p): Likewise.
(ira_hard_reg_in_set_p): Likewise.
* ira.c (setup_reg_mode_hard_regset): Likewise.
(clarify_prohibited_class_mode_regs): Likewise.
(check_allocation): Likewise.
* lra-assigns.c (find_hard_regno_for_1): Likewise.
(lra_setup_reg_renumber): Likewise.
(setup_try_hard_regno_pseudos): Likewise.
(spill_for): Likewise.
(assign_hard_regno): Likewise.
(setup_live_pseudos_and_spill_after_risky_transforms): Likewise.
* lra-constraints.c (in_class_p): Likewise.
(lra_constraint_offset): Likewise.
(simplify_operand_subreg): Likewise.
(lra_constraints): Likewise.
(split_reg): Likewise.
(split_if_necessary): Likewise.
(invariant_p): Likewise.
(inherit_in_ebb): Likewise.
* lra-lives.c (process_bb_lives): Likewise.
* lra-remat.c (reg_overlap_for_remat_p): Likewise.
(get_hard_regs): Likewise.
(do_remat): Likewise.
* lra-spills.c (assign_spill_hard_regs): Likewise.
* mode-switching.c (create_pre_exit): Likewise.
* postreload.c (reload_combine_recognize_pattern): Likewise.
* recog.c (peep2_find_free_register): Likewise.
* regcprop.c (kill_value_regno): Likewise.
(set_value_regno): Likewise.
(copy_value): Likewise.
(maybe_mode_change): Likewise.
(find_oldest_value_reg): Likewise.
(copyprop_hardreg_forward_1): Likewise.
* regrename.c (check_new_reg_p): Likewise.
(regrename_do_replace): Likewise.
* reload.c (push_reload): Likewise.
(combine_reloads): Likewise.
(find_dummy_reload): Likewise.
(operands_match_p): Likewise.
(find_reloads): Likewise.
(find_equiv_reg): Likewise.
(reload_adjust_reg_for_mode): Likewise.
* reload1.c (count_pseudo): Likewise.
(count_spilled_pseudo): Likewise.
(find_reg): Likewise.
(clear_reload_reg_in_use): Likewise.
(free_for_value_p): Likewise.
(allocate_reload_reg): Likewise.
(choose_reload_regs): Likewise.
(reload_adjust_reg_for_temp): Likewise.
(emit_reload_insns): Likewise.
(delete_output_reload): Likewise.
* rtlanal.c (subreg_get_info): Likewise.
* sched-deps.c (sched_analyze_reg): Likewise.
* sel-sched.c (init_regs_for_mode): Likewise.
(mark_unavailable_hard_regs): Likewise.
(choose_best_reg_1): Likewise.
(verify_target_availability): Likewise.
* valtrack.c (dead_debug_insert_temp): Likewise.
* var-tracking.c (track_loc_p): Likewise.
(emit_note_insn_var_location): Likewise.
* varasm.c (make_decl_rtl): Likewise.
* reginfo.c (choose_hard_reg_mode): Likewise.
(init_reg_modes_target): Refer directly to
this_target_regs->x_hard_regno_nregs.
From-SVN: r252014
|
|
2017-09-04 Richard Sandiford <richard.sandiford@linaro.org>
Alan Hayward <alan.hayward@arm.com>
David Sherwood <david.sherwood@arm.com>
gcc/
* target.def (modes_tieable_p): New hook.
* doc/tm.texi (MODES_TIEABLE_P): Replace with...
(TARGET_MODES_TIEABLE_P): ...this.
* doc/tm.texi.in: Regenerate.
* hooks.h (hook_bool_mode_mode_true): Declare.
* hooks.c (hook_bool_mode_mode_true): New function.
* combine.c (subst): Use targetm.modes_tieable_p instead of
MODES_TIEABLE_P.
* dse.c (find_shift_sequence): Likewise.
* expmed.c (extract_low_bits): Likewise.
* lower-subreg.c: Include target.h.
(find_decomposable_subregs): Use targetm.modes_tieable_p instead of
MODES_TIEABLE_P.
* rtlanal.c (rtx_cost): Likewise.
* config/aarch64/aarch64.h (MODES_TIEABLE_P): Delete.
* config/aarch64/aarch64-protos.h (aarch64_modes_tieable_p): Delete.
* config/aarch64/aarch64.c (aarch64_modes_tieable_p): Make static.
(TARGET_MODES_TIEABLE_P): Redefine.
* config/alpha/alpha.h (MODES_TIEABLE_P): Delete.
* config/alpha/alpha.c (alpha_modes_tieable_p): New function.
(TARGET_MODES_TIEABLE_P): Redefine.
* config/arc/arc.h (MODES_TIEABLE_P): Delete.
* config/arc/arc.c (TARGET_MODES_TIEABLE_P): Redefine.
(arc_modes_tieable_p): New function.
* config/arm/arm.h (MODES_TIEABLE_P): Delete.
* config/arm/arm-protos.h (arm_modes_tieable_p): Delete.
* config/arm/arm.c (TARGET_MODES_TIEABLE_P): Redefine.
(arm_modes_tieable_p): Make static.
* config/avr/avr.h (MODES_TIEABLE_P): Delete.
* config/bfin/bfin.h (MODES_TIEABLE_P): Delete.
* config/bfin/bfin.c (bfin_modes_tieable_p): New function.
(TARGET_MODES_TIEABLE_P): Redefine.
* config/c6x/c6x.h (MODES_TIEABLE_P): Delete.
* config/c6x/c6x.c (c6x_modes_tieable_p): New function.
(TARGET_MODES_TIEABLE_P): Redefine.
* config/cr16/cr16.h (MODES_TIEABLE_P): Delete.
* config/cr16/cr16.c (TARGET_MODES_TIEABLE_P): Redefine.
(cr16_modes_tieable_p): New function.
* config/cris/cris.h (MODES_TIEABLE_P): Delete.
* config/epiphany/epiphany.h (MODES_TIEABLE_P): Delete.
* config/fr30/fr30.h (MODES_TIEABLE_P): Delete.
(TRULY_NOOP_TRUNCATION): Update comment.
* config/frv/frv.h (MODES_TIEABLE_P): Delete.
(TRULY_NOOP_TRUNCATION): Update comment.
* config/frv/frv.c (TARGET_MODES_TIEABLE_P): Redefine.
(frv_modes_tieable_p): New function.
* config/ft32/ft32.h (MODES_TIEABLE_P): Delete.
* config/h8300/h8300.h (MODES_TIEABLE_P): Delete.
* config/h8300/h8300.c (h8300_modes_tieable_p): New function.
(TARGET_MODES_TIEABLE_P): Redefine.
* config/i386/i386.h (MODES_TIEABLE_P): Delete.
* config/i386/i386-protos.h (ix86_modes_tieable_p): Delete.
* config/i386/i386.c (ix86_modes_tieable_p): Make static.
(TARGET_MODES_TIEABLE_P): Redefine.
* config/ia64/ia64.h (MODES_TIEABLE_P): Delete.
* config/ia64/ia64.c (TARGET_MODES_TIEABLE_P): Redefine.
(ia64_modes_tieable_p): New function.
* config/iq2000/iq2000.h (MODES_TIEABLE_P): Delete.
* config/iq2000/iq2000.c (TARGET_MODES_TIEABLE_P): Redefine.
(iq2000_modes_tieable_p): New function.
* config/lm32/lm32.h (MODES_TIEABLE_P): Delete.
* config/lm32/lm32.c (TARGET_MODES_TIEABLE_P): Redefine.
(lm32_modes_tieable_p): New function.
* config/m32c/m32c.h (MODES_TIEABLE_P): Delete.
* config/m32c/m32c-protos.h (m32c_modes_tieable_p): Delete.
* config/m32c/m32c.c (m32c_modes_tieable_p): Make static.
(TARGET_MODES_TIEABLE_P): Redefine.
* config/m32r/m32r.h (MODES_TIEABLE_P): Delete.
* config/m32r/m32r.c (TARGET_MODES_TIEABLE_P): Redefine.
(m32r_modes_tieable_p): New function.
* config/m68k/m68k.h (MODES_TIEABLE_P): Delete.
* config/m68k/m68k.c (TARGET_MODES_TIEABLE_P): Redefine.
(m68k_modes_tieable_p): New function.
* config/mcore/mcore.h (MODES_TIEABLE_P): Delete.
* config/mcore/mcore.c (TARGET_MODES_TIEABLE_P): Redefine.
(mcore_modes_tieable_p): New function.
* config/microblaze/microblaze.h (MODES_TIEABLE_P): Delete.
* config/microblaze/microblaze.c (microblaze_modes_tieable_p): New
function.
(TARGET_MODES_TIEABLE_P): Redefine.
* config/mips/mips.h (MODES_TIEABLE_P): Delete.
* config/mips/mips-protos.h (mips_modes_tieable_p): Delete.
* config/mips/mips.c (mips_modes_tieable_p): Make static.
(TARGET_MODES_TIEABLE_P): Redefine.
* config/mmix/mmix.h (MODES_TIEABLE_P): Delete.
* config/mn10300/mn10300.h (MODES_TIEABLE_P): Delete.
* config/mn10300/mn10300-protos.h (mn10300_modes_tieable): Delete.
* config/mn10300/mn10300.c (mn10300_modes_tieable): Rename to...
(mn10300_modes_tieable_p): ...this and make static.
(TARGET_MODES_TIEABLE_P): Redefine.
* config/moxie/moxie.h (MODES_TIEABLE_P): Delete.
* config/msp430/msp430.h (MODES_TIEABLE_P): Delete.
* config/msp430/msp430-protos.h (msp430_modes_tieable_p): Delete.
* config/msp430/msp430.c (TARGET_MODES_TIEABLE_P): Redefine.
(msp430_modes_tieable_p): Make static.
* config/nds32/nds32.h (MODES_TIEABLE_P): Delete.
* config/nds32/nds32.c (nds32_modes_tieable_p): New function.
(TARGET_MODES_TIEABLE_P): Redefine.
* config/nios2/nios2.h (MODES_TIEABLE_P): Delete.
* config/nvptx/nvptx.h (MODES_TIEABLE_P): Delete.
* config/nvptx/nvptx.c (nvptx_modes_tieable_p): New function.
(TARGET_MODES_TIEABLE_P): Redefine.
* config/pa/pa.h (MODES_TIEABLE_P): Delete.
* config/pa/pa-protos.h (pa_modes_tieable_p): Delete.
* config/pa/pa.c (pa_modes_tieable_p): Make static.
(TARGET_MODES_TIEABLE_P): Redefine.
* config/pdp11/pdp11.h (MODES_TIEABLE_P): Delete.
* config/pdp11/pdp11.c (TARGET_MODES_TIEABLE_P): Redefine.
(pdp11_modes_tieable_p): New function.
* config/powerpcspe/powerpcspe.h (MODES_TIEABLE_P): Delete.
* config/powerpcspe/powerpcspe.c (TARGET_MODES_TIEABLE_P): Redefine.
(rs6000_modes_tieable_p): New function.
(rs6000_debug_reg_global): Use it instead of MODES_TIEABLE_P.
* config/powerpcspe/powerpcspe.md: Update comment.
* config/riscv/riscv.h (MODES_TIEABLE_P): Delete.
* config/riscv/riscv.c (riscv_modes_tieable_p): New function.
(TARGET_MODES_TIEABLE_P): Redefine.
* config/rl78/rl78.h (MODES_TIEABLE_P): Delete.
* config/rl78/rl78.c (TARGET_MODES_TIEABLE_P): Redefine.
(rl78_modes_tieable_p): New function.
* config/rs6000/rs6000.h (MODES_TIEABLE_P): Delete.
* config/rs6000/rs6000.c (TARGET_MODES_TIEABLE_P): Redefine.
(rs6000_modes_tieable_p): New function.
(rs6000_debug_reg_global): Use it instead of MODES_TIEABLE_P.
* config/rs6000/rs6000.md: Update comment.
* config/rx/rx.h (MODES_TIEABLE_P): Delete.
* config/rx/rx.c (rx_modes_tieable_p): New function.
(TARGET_MODES_TIEABLE_P): Redefine.
* config/s390/s390.h (MODES_TIEABLE_P): Delete.
* config/s390/s390.c (s390_modes_tieable_p): New function.
(TARGET_MODES_TIEABLE_P): Redefine.
* config/sh/sh.h (MODES_TIEABLE_P): Delete.
* config/sh/sh.c (TARGET_MODES_TIEABLE_P): Redefine.
(sh_modes_tieable_p): New function.
* config/sparc/sparc.h (MODES_TIEABLE_P): Delete.
* config/sparc/sparc-protos.h (sparc_modes_tieable_p): Delete.
* config/sparc/sparc.c (TARGET_MODES_TIEABLE_P): Redefine.
(sparc_modes_tieable_p): Make static.
* config/spu/spu.h (MODES_TIEABLE_P): Delete.
* config/spu/spu.c (spu_modes_tieable_p): New function.
(TARGET_MODES_TIEABLE_P): Redefine.
* config/stormy16/stormy16.h (MODES_TIEABLE_P): Delete.
* config/stormy16/stormy16.c (xstormy16_modes_tieable_p): New function.
(TARGET_MODES_TIEABLE_P): Redefine.
* config/tilegx/tilegx.h (MODES_TIEABLE_P): Delete.
* config/tilepro/tilepro.h (MODES_TIEABLE_P): Delete.
* config/v850/v850.h (MODES_TIEABLE_P): Delete.
* config/v850/v850.c (v850_modes_tieable_p): New function.
(TARGET_MODES_TIEABLE_P): Redefine.
* config/vax/vax.h (MODES_TIEABLE_P): Delete.
* config/visium/visium.h (MODES_TIEABLE_P): Delete.
* config/visium/visium.c (TARGET_MODES_TIEABLE_P): Redefine.
(visium_modes_tieable_p): New function.
* config/xtensa/xtensa.h (MODES_TIEABLE_P): Delete.
* config/xtensa/xtensa.c (TARGET_MODES_TIEABLE_P): Redefine.
(xtensa_modes_tieable_p): New function.
* system.h (MODES_TIEABLE_P): Poison.
Co-Authored-By: Alan Hayward <alan.hayward@arm.com>
Co-Authored-By: David Sherwood <david.sherwood@arm.com>
From-SVN: r251647
|
|
2017-09-04 Richard Sandiford <richard.sandiford@linaro.org>
Alan Hayward <alan.hayward@arm.com>
David Sherwood <david.sherwood@arm.com>
gcc/
* target.def (hard_regno_mode_ok): New hook.
* doc/tm.texi (HARD_REGNO_MODE_OK): Replace with...
(TARGET_HARD_REGNO_MODE_OK): ...this.
* doc/tm.texi.in: Regenerate.
* hooks.h (hook_bool_uint_mode_true): Declare.
* hooks.c (hook_bool_uint_mode_true): New function.
* doc/md.texi: Refer to targetm.hard_regno_mode_ok instead of
HARD_REGNO_MODE_OK.
* genpreds.c (write_insn_preds_c): Add an include of target.h.
* alias.c (init_alias_target): Use targetm.hard_regno_mode_ok
instead of HARD_REGNO_MODE_OK.
* caller-save.c: Include target.h.
(reg_save_code): Use targetm.hard_regno_mode_ok instead of
HARD_REGNO_MODE_OK.
* combine.c (can_combine_p): Likewise.
(combinable_i3pat): Likewise.
(can_change_dest_mode): Likewise.
* expr.c (init_expr_target): Likewise.
(convert_move): Likewise.
(convert_modes): Likewise.
* ira.c (setup_prohibited_class_mode_regs): Likewise.
(setup_prohibited_mode_move_regs): Likewise.
* ira.h (target_ira): Likewise.
* lra-assigns.c (find_hard_regno_for_1): Likewise.
* lra-constraints.c (process_alt_operands): Likewise.
(split_reg): Likewise.
* recog.c (peep2_find_free_register): Likewise.
* ree.c (combine_reaching_defs): Likewise.
* regcprop.c (maybe_mode_change): Likewise.
* reginfo.c (init_reg_sets_1): Likewise.
(choose_hard_reg_mode): Likewise.
(simplifiable_subregs): Likewise.
* regrename.c (check_new_reg_p): Likewise.
* reload.c (find_valid_class): Likewise.
(find_valid_class_1): Likewise.
(reload_inner_reg_of_subreg): Likewise.
(push_reload): Likewise.
(combine_reloads): Likewise.
(find_dummy_reload): Likewise.
(find_reloads): Likewise.
* reload1.c (find_reg): Likewise.
(set_reload_reg): Likewise.
(allocate_reload_reg): Likewise.
(choose_reload_regs): Likewise.
(reload_adjust_reg_for_temp): Likewise.
* rtlanal.c (subreg_size_offset_from_lsb): Likewise.
(simplify_subreg_regno): Likewise.
* sel-sched.c (init_regs_for_mode): Likewise.
* varasm.c (make_decl_rtl): Likewise.
* config/aarch64/aarch64.h (HARD_REGNO_MODE_OK): Delete.
(MODES_TIEABLE_P): Use targetm.hard_regno_mode_ok instead of
HARD_REGNO_MODE_OK.
* config/aarch64/aarch64-protos.h (aarch64_hard_regno_mode_ok): Delete.
* config/aarch64/aarch64.c (aarch64_hard_regno_mode_ok): Make static.
(TARGET_HARD_REGNO_MODE_OK): Redefine.
* config/alpha/alpha.h (HARD_REGNO_MODE_OK): Delete.
* config/alpha/alpha.c (alpha_hard_regno_mode_ok): New function.
(TARGET_HARD_REGNO_MODE_OK): Redefine.
* config/arc/arc.h (arc_hard_regno_mode_ok): Delete.
(arc_mode_class): Delete.
(HARD_REGNO_MODE_OK): Delete.
* config/arc/arc.c (TARGET_HARD_REGNO_MODE_OK): Redefine.
(arc_hard_regno_mode_ok): Rename old array to...
(arc_hard_regno_mode_ok_modes): ...this.
(arc_conditional_register_usage): Update accordingly.
(arc_mode_class): Make static.
(arc_hard_regno_mode_ok): New function.
* config/arm/arm.h (HARD_REGNO_MODE_OK): Delete.
* config/arm/arm-protos.h (arm_hard_regno_mode_ok): Delete.
* config/arm/arm.c (TARGET_HARD_REGNO_MODE_OK): Redefine.
(arm_hard_regno_mode_ok): Make static.
* config/arm/arm.md (movdi): Use targetm.hard_regno_mode_ok instead of
HARD_REGNO_MODE_OK.
* config/avr/avr-protos.h (avr_hard_regno_mode_ok): Delete.
* config/avr/avr.h (HARD_REGNO_MODE_OK): Delete.
* config/avr/avr.c (avr_hard_regno_mode_ok): Make static and
return a bool.
(TARGET_HARD_REGNO_MODE_OK): Redefine.
* config/bfin/bfin-protos.h (hard_regno_mode_ok): Delete.
* config/bfin/bfin.h (HARD_REGNO_MODE_OK): Delete.
* config/bfin/bfin.c (hard_regno_mode_ok): Rename to...
(bfin_hard_regno_mode_ok): ...this. Make static and return a bool.
(TARGET_HARD_REGNO_MODE_OK): Redefine.
* config/bfin/predicates.md (valid_reg_operand): Use
targetm.hard_regno_mode_ok instead of HARD_REGNO_MODE_OK.
* config/c6x/c6x.h (HARD_REGNO_MODE_OK): Delete.
* config/c6x/c6x.c (c6x_hard_regno_mode_ok): New function.
(TARGET_HARD_REGNO_MODE_OK): Redefine.
* config/cr16/cr16.h (HARD_REGNO_MODE_OK): Delete.
* config/cr16/cr16-protos.h (cr16_hard_regno_mode_ok): Delete.
* config/cr16/cr16.c (TARGET_HARD_REGNO_MODE_OK): Redefine.
(cr16_hard_regno_mode_ok): Make static and return a bool.
* config/cris/cris.h (HARD_REGNO_MODE_OK): Delete.
* config/cris/cris.c (TARGET_HARD_REGNO_MODE_OK): Redefine.
(cris_hard_regno_mode_ok): New function.
* config/epiphany/epiphany.h (epiphany_hard_regno_mode_ok): Delete.
(epiphany_mode_class): Delete.
(HARD_REGNO_MODE_OK): Delete.
* config/epiphany/epiphany-protos.h (hard_regno_mode_ok): Delete.
* config/epiphany/epiphany.c (TARGET_HARD_REGNO_MODE_OK): Redefine.
(hard_regno_mode_ok): Rename to...
(epiphany_hard_regno_mode_ok): ...this. Make static and return a bool.
* config/fr30/fr30.h (HARD_REGNO_MODE_OK): Delete.
* config/fr30/fr30.md: Refer to targetm.hard_regno_mode_ok instead of
HARD_REGNO_MODE_OK.
* config/frv/frv.h (HARD_REGNO_MODE_OK): Delete.
* config/frv/frv-protos.h (frv_hard_regno_mode_ok): Delete.
* config/frv/frv.c (TARGET_HARD_REGNO_MODE_OK): Redefine.
(frv_hard_regno_mode_ok): Make static and return a bool.
* config/frv/frv.md: Refer to targetm.hard_regno_mode_ok instead of
HARD_REGNO_MODE_OK.
* config/ft32/ft32.h (HARD_REGNO_MODE_OK): Delete.
* config/h8300/h8300.h (HARD_REGNO_MODE_OK): Delete.
* config/h8300/h8300-protos.h (h8300_hard_regno_mode_ok): Delete.
* config/h8300/h8300.c (h8300_hard_regno_mode_ok): Make static
and return a bool.
(TARGET_HARD_REGNO_MODE_OK): Redefine.
* config/i386/i386.h (HARD_REGNO_MODE_OK): Delete.
* config/i386/i386-protos.h (ix86_hard_regno_mode_ok): Delete.
* config/i386/i386.c (ix86_hard_regno_mode_ok): Make static and
return a bool.
(TARGET_HARD_REGNO_MODE_OK): Redefine.
* config/ia64/ia64.h (HARD_REGNO_MODE_OK): Delete.
* config/ia64/ia64.c (TARGET_HARD_REGNO_MODE_OK): Redefine.
(ia64_hard_regno_mode_ok): New function.
* config/iq2000/iq2000.h (HARD_REGNO_MODE_OK): Delete.
* config/iq2000/iq2000.c (TARGET_HARD_REGNO_MODE_OK): Redefine.
(iq2000_hard_regno_mode_ok): New function.
* config/lm32/lm32.h (HARD_REGNO_MODE_OK): Delete.
* config/lm32/lm32.c (TARGET_HARD_REGNO_MODE_OK): Redefine.
(lm32_hard_regno_mode_ok): New function.
* config/m32c/m32c.h (HARD_REGNO_MODE_OK): Delete.
* config/m32c/m32c-protos.h (m32c_hard_regno_ok): Delete.
* config/m32c/m32c.c (class_can_hold_mode): Use m32c_hard_regno_mode_ok
instead of HARD_REGNO_MODE_OK.
(m32c_hard_regno_ok): Rename to...
(m32c_hard_regno_mode_ok): ...this. Make static and return a bool.
(m32c_cannot_change_mode_class): Update accordingly.
(TARGET_HARD_REGNO_MODE_OK): Redefine.
* config/m32r/m32r.h (m32r_hard_regno_mode_ok): Delete.
(m32r_mode_class): Delete.
(HARD_REGNO_MODE_OK): Delete.
* config/m32r/m32r.c (TARGET_HARD_REGNO_MODE_OK): Redefine.
(m32r_hard_regno_mode_ok): Rename to...
(m32r_hard_regno_modes): ...this.
(m32r_mode_class): Make static.
(m32r_hard_regno_mode_ok): New function.
* config/m68k/m68k.h (HARD_REGNO_MODE_OK): Delete.
* config/m68k/m68k-protos.h (m68k_regno_mode_ok): Delete.
* config/m68k/m68k.c (TARGET_HARD_REGNO_MODE_OK): Redefine.
(m68k_hard_regno_mode_ok): Make static.
* config/mcore/mcore.h (HARD_REGNO_MODE_OK): Delete.
* config/mcore/mcore.c (TARGET_HARD_REGNO_MODE_OK): Redefine.
(mcore_hard_regno_mode_ok): New function.
* config/microblaze/microblaze.h (microblaze_hard_regno_mode_ok)
(HARD_REGNO_MODE_OK): Delete.
* config/microblaze/microblaze.c (microblaze_hard_regno_mode_ok):
Rename to...
(microblaze_hard_regno_mode_ok_p): ...this and make static.
(microblaze_hard_regno_mode_ok): New function.
(TARGET_HARD_REGNO_MODE_OK): Redefine.
* config/mips/mips.h (HARD_REGNO_MODE_OK): Delete.
(mips_hard_regno_mode_ok): Delete.
* config/mips/mips.c (mips_hard_regno_mode_ok): Rename to...
(mips_hard_regno_mode_ok_p): ...this and make static.
(mips_hard_regno_mode_ok_p): Rename to...
(mips_hard_regno_mode_ok_uncached): ...this.
(mips_hard_regno_mode_ok): New function.
(mips_class_max_nregs): Use mips_hard_regno_mode_ok instead
of HARD_REGNO_MODE_OK.
(mips_option_override): Update after above name changes.
(TARGET_HARD_REGNO_MODE_OK): Redefine.
* config/mmix/mmix.h (HARD_REGNO_MODE_OK): Delete.
* config/mn10300/mn10300.h (HARD_REGNO_MODE_OK): Delete.
* config/mn10300/mn10300-protos.h (mn10300_hard_regno_mode_ok): Delete.
* config/mn10300/mn10300.c (mn10300_hard_regno_mode_ok): Make static.
(TARGET_HARD_REGNO_MODE_OK): Redefine.
* config/moxie/moxie.h (HARD_REGNO_MODE_OK): Delete.
* config/msp430/msp430.h (HARD_REGNO_MODE_OK): Delete.
* config/msp430/msp430-protos.h (msp430_hard_regno_mode_ok): Delete.
* config/msp430/msp430.c (TARGET_HARD_REGNO_MODE_OK): Redefine.
(msp430_hard_regno_mode_ok): Make static and return a bool.
* config/nds32/nds32.h (HARD_REGNO_MODE_OK): Delete.
* config/nds32/nds32-protos.h (nds32_hard_regno_mode_ok): Delete.
* config/nds32/nds32.c (nds32_hard_regno_mode_ok): Make static
and return a bool.
(TARGET_HARD_REGNO_MODE_OK): Redefine.
* config/nios2/nios2.h (HARD_REGNO_MODE_OK): Delete.
* config/nvptx/nvptx.h (HARD_REGNO_MODE_OK): Delete.
* config/pa/pa.h (MODES_TIEABLE_P): Update commentary.
* config/pa/pa32-regs.h (HARD_REGNO_MODE_OK): Rename to...
(PA_HARD_REGNO_MODE_OK): ...this
* config/pa/pa64-regs.h (HARD_REGNO_MODE_OK): Rename to...
(PA_HARD_REGNO_MODE_OK): ...this.
* config/pa/pa.c (TARGET_HARD_REGNO_MODE_OK): Redefine.
(pa_hard_regno_mode_ok): New function.
* config/pdp11/pdp11.h (HARD_REGNO_MODE_OK): Delete.
* config/pdp11/pdp11.c (TARGET_HARD_REGNO_MODE_OK): Redefine.
(pdp11_hard_regno_mode_ok): New function.
* config/powerpcspe/powerpcspe.h (HARD_REGNO_MODE_OK): Delete.
* config/powerpcspe/powerpcspe-protos.h (rs6000_hard_regno_mode_ok_p):
Delete.
* config/powerpcspe/powerpcspe.c (rs6000_hard_regno_mode_ok_p):
Make static.
(TARGET_HARD_REGNO_MODE_OK): Redefine.
(rs6000_hard_regno_mode_ok): Rename to...
(rs6000_hard_regno_mode_ok_uncached): ...this.
(rs6000_init_hard_regno_mode_ok): Update accordingly.
(rs6000_hard_regno_mode_ok): New function.
* config/riscv/riscv.h (HARD_REGNO_MODE_OK): Delete.
* config/riscv/riscv-protos.h (riscv_hard_regno_mode_ok_p): Delete.
* config/riscv/riscv.c (riscv_hard_regno_mode_ok_p): Rename to...
(riscv_hard_regno_mode_ok): ...this and make static.
(TARGET_HARD_REGNO_MODE_OK): Redefine.
* config/rl78/rl78.h (HARD_REGNO_MODE_OK): Delete.
* config/rl78/rl78-protos.h (rl78_hard_regno_mode_ok): Delete.
* config/rl78/rl78.c (TARGET_HARD_REGNO_MODE_OK): Redefine.
(rl78_hard_regno_mode_ok): Make static and return bool.
* config/rs6000/rs6000.h (HARD_REGNO_MODE_OK): Delete.
* config/rs6000/rs6000-protos.h (rs6000_hard_regno_mode_ok_p):
Delete.
* config/rs6000/rs6000.c (rs6000_hard_regno_mode_ok_p): Make static.
(TARGET_HARD_REGNO_MODE_OK): Redefine.
(rs6000_hard_regno_mode_ok): Rename to...
(rs6000_hard_regno_mode_ok_uncached): ...this.
(rs6000_init_hard_regno_mode_ok): Update accordingly.
(rs6000_hard_regno_mode_ok): New function.
* config/rx/rx.h (HARD_REGNO_MODE_OK): Delete.
* config/rx/rx.c (rx_hard_regno_mode_ok): New function.
(TARGET_HARD_REGNO_MODE_OK): Redefine.
* config/s390/s390.h (HARD_REGNO_MODE_OK): Delete.
* config/s390/s390-protos.h (s390_hard_regno_mode_ok): Delete.
* config/s390/s390.c (s390_hard_regno_mode_ok): Make static.
(TARGET_HARD_REGNO_MODE_OK): Redefine.
* config/sh/sh.h (HARD_REGNO_MODE_OK): Delete.
* config/sh/sh-protos.h (sh_hard_regno_mode_ok): Delete.
* config/sh/sh.c (TARGET_HARD_REGNO_MODE_OK): Redefine.
(sh_hard_regno_mode_ok): Make static.
* config/sparc/constraints.md: Refer to targetm.hard_regno_mode_ok
instead of HARD_REGNO_MODE_OK.
* config/sparc/sparc.h (hard_regno_mode_classes): Delete.
(sparc_mode_class): Delete.
(HARD_REGNO_MODE_OK): Delete.
* config/sparc/sparc.c (TARGET_HARD_REGNO_MODE_OK): Redefine.
(hard_regno_mode_classes): Make static.
(sparc_mode_class): Likewise.
(sparc_hard_regno_mode_ok): New function.
* config/spu/spu.h (HARD_REGNO_MODE_OK): Delete.
* config/stormy16/stormy16.h (HARD_REGNO_MODE_OK): Delete.
* config/stormy16/stormy16.c (xstormy16_hard_regno_mode_ok): New
function.
(TARGET_HARD_REGNO_MODE_OK): Redefine.
* config/tilegx/tilegx.h (HARD_REGNO_MODE_OK): Delete.
* config/tilepro/tilepro.h (HARD_REGNO_MODE_OK): Delete.
* config/v850/v850.h (HARD_REGNO_MODE_OK): Delete.
* config/v850/v850.c (v850_hard_regno_mode_ok): New function.
(TARGET_HARD_REGNO_MODE_OK): Redefine.
* config/vax/vax.h (HARD_REGNO_MODE_OK): Delete.
* config/visium/visium.h (HARD_REGNO_MODE_OK): Delete.
* config/visium/visium.c (TARGET_HARD_REGNO_MODE_OK): Redefine.
(visium_hard_regno_mode_ok): New function.
* config/visium/visium.md: Refer to targetm.hard_regno_mode_ok
instead of HARD_REGNO_MODE_OK.
* config/xtensa/xtensa.h (xtensa_hard_regno_mode_ok): Delete.
(HARD_REGNO_MODE_OK): Delete.
* config/xtensa/xtensa.c (xtensa_hard_regno_mode_ok): Rename to...
(xtensa_hard_regno_mode_ok_p): ...this and make static.
(xtensa_option_override): Update accordingly.
(TARGET_HARD_REGNO_MODE_OK): Redefine.
(xtensa_hard_regno_mode_ok): New function.
* system.h (HARD_REGNO_MODE_OK): Poison.
Co-Authored-By: Alan Hayward <alan.hayward@arm.com>
Co-Authored-By: David Sherwood <david.sherwood@arm.com>
From-SVN: r251646
|
|
...it's really a general RTL predicate, rather than something that depends
on the DF state. Thanks to Segher for the suggestion.
2017-08-30 Richard Sandiford <richard.sandiford@linaro.org>
gcc/
* df.h (df_read_modify_subreg_p): Remove in favor of...
* rtl.h (read_modify_subreg_p): ...this new function. Take a
const_rtx instead of an rtx.
* cprop.c (local_cprop_find_used_regs): Update accordingly.
* df-problems.c (df_word_lr_mark_ref): Likewise.
* ira-lives.c (mark_pseudo_reg_live): Likewise.
(mark_pseudo_reg_dead): Likewise.
(mark_ref_dead): Likewise.
* reginfo.c (init_subregs_of_mode): Likewise.
* sched-deps.c (sched_analyze_1): Likewise.
* df-scan.c (df_def_record_1): Likewise.
(df_uses_record): Likewise.
(df_read_modify_subreg_p): Remove in favor of...
* rtlanal.c (read_modify_subreg_p): ...this new function. Take a
const_rtx instead of an rtx.
From-SVN: r251537
|
|
This patch adds a scalar_mode class that can hold any scalar mode,
specifically:
- scalar integers
- scalar floating-point values
- scalar fractional modes
- scalar accumulator modes
- pointer bounds modes
To start with this patch uses this type for GET_MODE_INNER.
Later patches add more uses.
2017-08-30 Richard Sandiford <richard.sandiford@linaro.org>
Alan Hayward <alan.hayward@arm.com>
David Sherwood <david.sherwood@arm.com>
gcc/
* coretypes.h (scalar_mode): New class.
* machmode.h (scalar_mode): Likewise.
(scalar_mode::includes_p): New function.
(mode_to_inner): Return a scalar_mode rather than a machine_mode.
* gdbhooks.py (build_pretty_printers): Handle scalar_mode.
* genmodes.c (get_mode_class): Handle remaining scalar modes.
* cfgexpand.c (expand_debug_expr): Use scalar_mode.
* expmed.c (store_bit_field_1): Likewise.
(extract_bit_field_1): Likewise.
* expr.c (write_complex_part): Likewise.
(read_complex_part): Likewise.
(emit_move_complex_push): Likewise.
(expand_expr_real_2): Likewise.
* function.c (assign_parm_setup_reg): Likewise.
(assign_parms_unsplit_complex): Likewise.
* optabs.c (expand_binop): Likewise.
* rtlanal.c (subreg_get_info): Likewise.
* simplify-rtx.c (simplify_immed_subreg): Likewise.
* varasm.c (output_constant_pool_2): Likewise.
Co-Authored-By: Alan Hayward <alan.hayward@arm.com>
Co-Authored-By: David Sherwood <david.sherwood@arm.com>
From-SVN: r251515
|
|
This patch changes the types of various things from machine_mode
to scalar_int_mode, in cases where (after previous patches)
simply changing the type is enough on its own. The patch does
nothing other than that.
2017-08-30 Richard Sandiford <richard.sandiford@linaro.org>
Alan Hayward <alan.hayward@arm.com>
David Sherwood <david.sherwood@arm.com>
gcc/
* builtins.h (builtin_strncpy_read_str): Take a scalar_int_mode
instead of a machine_mode.
(builtin_memset_read_str): Likewise.
* builtins.c (c_readstr): Likewise.
(builtin_memcpy_read_str): Likewise.
(builtin_strncpy_read_str): Likewise.
(builtin_memset_read_str): Likewise.
(builtin_memset_gen_str): Likewise.
(expand_builtin_signbit): Use scalar_int_mode for local variables.
* cfgexpand.c (convert_debug_memory_address): Take a scalar_int_mode
instead of a machine_mode.
* combine.c (simplify_if_then_else): Use scalar_int_mode for local
variables.
(make_extraction): Likewise.
(try_widen_shift_mode): Take and return scalar_int_modes instead
of machine_modes.
* config/aarch64/aarch64.c (aarch64_libgcc_cmp_return_mode): Return
a scalar_int_mode instead of a machine_mode.
* config/avr/avr.c (avr_addr_space_address_mode): Likewise.
(avr_addr_space_pointer_mode): Likewise.
* config/cr16/cr16.c (cr16_unwind_word_mode): Likewise.
* config/msp430/msp430.c (msp430_addr_space_pointer_mode): Likewise.
(msp430_unwind_word_mode): Likewise.
* config/spu/spu.c (spu_unwind_word_mode): Likewise.
(spu_addr_space_pointer_mode): Likewise.
(spu_addr_space_address_mode): Likewise.
(spu_libgcc_cmp_return_mode): Likewise.
(spu_libgcc_shift_count_mode): Likewise.
* config/rl78/rl78.c (rl78_addr_space_address_mode): Likewise.
(rl78_addr_space_pointer_mode): Likewise.
(fl78_unwind_word_mode): Likewise.
(rl78_valid_pointer_mode): Take a scalar_int_mode instead of a
machine_mode.
* config/alpha/alpha.c (vms_valid_pointer_mode): Likewise.
* config/ia64/ia64.c (ia64_vms_valid_pointer_mode): Likewise.
* config/mips/mips.c (mips_mode_rep_extended): Likewise.
(mips_valid_pointer_mode): Likewise.
* config/tilegx/tilegx.c (tilegx_mode_rep_extended): Likewise.
* config/ft32/ft32.c (ft32_valid_pointer_mode): Likewise.
(ft32_addr_space_pointer_mode): Return a scalar_int_mode instead
of a machine_mode.
(ft32_addr_space_address_mode): Likewise.
* config/m32c/m32c.c (m32c_valid_pointer_mode): Take a
scalar_int_mode instead of a machine_mode.
(m32c_addr_space_pointer_mode): Return a scalar_int_mode instead
of a machine_mode.
(m32c_addr_space_address_mode): Likewise.
* config/powerpcspe/powerpcspe.c (rs6000_abi_word_mode): Likewise.
(rs6000_eh_return_filter_mode): Likewise.
* config/rs6000/rs6000.c (rs6000_abi_word_mode): Likewise.
(rs6000_eh_return_filter_mode): Likewise.
* config/s390/s390.c (s390_libgcc_cmp_return_mode): Likewise.
(s390_libgcc_shift_count_mode): Likewise.
(s390_unwind_word_mode): Likewise.
(s390_valid_pointer_mode): Take a scalar_int_mode rather than a
machine_mode.
* target.def (mode_rep_extended): Likewise.
(valid_pointer_mode): Likewise.
(addr_space.valid_pointer_mode): Likewise.
(eh_return_filter_mode): Return a scalar_int_mode rather than
a machine_mode.
(libgcc_cmp_return_mode): Likewise.
(libgcc_shift_count_mode): Likewise.
(unwind_word_mode): Likewise.
(addr_space.pointer_mode): Likewise.
(addr_space.address_mode): Likewise.
* doc/tm.texi: Regenerate.
* dojump.c (prefer_and_bit_test): Take a scalar_int_mode rather than
a machine_mode.
(do_jump): Use scalar_int_mode for local variables.
* dwarf2cfi.c (init_return_column_size): Take a scalar_int_mode
rather than a machine_mode.
* dwarf2out.c (convert_descriptor_to_mode): Likewise.
(scompare_loc_descriptor_wide): Likewise.
(scompare_loc_descriptor_narrow): Likewise.
* emit-rtl.c (adjust_address_1): Use scalar_int_mode for local
variables.
* except.c (sjlj_emit_dispatch_table): Likewise.
(expand_builtin_eh_copy_values): Likewise.
* explow.c (convert_memory_address_addr_space_1): Likewise.
Take a scalar_int_mode rather than a machine_mode.
(convert_memory_address_addr_space): Take a scalar_int_mode rather
than a machine_mode.
(memory_address_addr_space): Use scalar_int_mode for local variables.
* expmed.h (expand_mult_highpart_adjust): Take a scalar_int_mode
rather than a machine_mode.
* expmed.c (mask_rtx): Likewise.
(init_expmed_one_conv): Likewise.
(expand_mult_highpart_adjust): Likewise.
(extract_high_half): Likewise.
(expmed_mult_highpart_optab): Likewise.
(expmed_mult_highpart): Likewise.
(expand_smod_pow2): Likewise.
(expand_sdiv_pow2): Likewise.
(emit_store_flag_int): Likewise.
(adjust_bit_field_mem_for_reg): Use scalar_int_mode for local
variables.
(extract_low_bits): Likewise.
* expr.h (by_pieces_constfn): Take a scalar_int_mode rather than
a machine_mode.
* expr.c (pieces_addr::adjust): Likewise.
(can_store_by_pieces): Likewise.
(store_by_pieces): Likewise.
(clear_by_pieces_1): Likewise.
(expand_expr_addr_expr_1): Likewise.
(expand_expr_addr_expr): Use scalar_int_mode for local variables.
(expand_expr_real_1): Likewise.
(try_casesi): Likewise.
* final.c (shorten_branches): Likewise.
* fold-const.c (fold_convert_const_int_from_fixed): Change the
type of "mode" to machine_mode.
* internal-fn.c (expand_arith_overflow_result_store): Take a
scalar_int_mode rather than a machine_mode.
(expand_mul_overflow): Use scalar_int_mode for local variables.
* loop-doloop.c (doloop_modify): Likewise.
(doloop_optimize): Likewise.
* optabs.c (expand_subword_shift): Take a scalar_int_mode rather
than a machine_mode.
(expand_doubleword_shift_condmove): Likewise.
(expand_doubleword_shift): Likewise.
(expand_doubleword_clz): Likewise.
(expand_doubleword_popcount): Likewise.
(expand_doubleword_parity): Likewise.
(expand_absneg_bit): Use scalar_int_mode for local variables.
(prepare_float_lib_cmp): Likewise.
* rtl.h (convert_memory_address_addr_space_1): Take a scalar_int_mode
rather than a machine_mode.
(convert_memory_address_addr_space): Likewise.
(get_mode_bounds): Likewise.
(get_address_mode): Return a scalar_int_mode rather than a
machine_mode.
* rtlanal.c (get_address_mode): Likewise.
* stor-layout.c (get_mode_bounds): Take a scalar_int_mode rather
than a machine_mode.
* targhooks.c (default_mode_rep_extended): Likewise.
(default_valid_pointer_mode): Likewise.
(default_addr_space_valid_pointer_mode): Likewise.
(default_eh_return_filter_mode): Return a scalar_int_mode rather
than a machine_mode.
(default_libgcc_cmp_return_mode): Likewise.
(default_libgcc_shift_count_mode): Likewise.
(default_unwind_word_mode): Likewise.
(default_addr_space_pointer_mode): Likewise.
(default_addr_space_address_mode): Likewise.
* targhooks.h (default_eh_return_filter_mode): Likewise.
(default_libgcc_cmp_return_mode): Likewise.
(default_libgcc_shift_count_mode): Likewise.
(default_unwind_word_mode): Likewise.
(default_addr_space_pointer_mode): Likewise.
(default_addr_space_address_mode): Likewise.
(default_mode_rep_extended): Take a scalar_int_mode rather than
a machine_mode.
(default_valid_pointer_mode): Likewise.
(default_addr_space_valid_pointer_mode): Likewise.
* tree-ssa-address.c (addr_for_mem_ref): Use scalar_int_mode for
local variables.
* tree-ssa-loop-ivopts.c (get_shiftadd_cost): Take a scalar_int_mode
rather than a machine_mode.
* tree-switch-conversion.c (array_value_type): Use scalar_int_mode
for local variables.
* tree-vrp.c (simplify_float_conversion_using_ranges): Likewise.
* var-tracking.c (use_narrower_mode): Take a scalar_int_mode rather
than a machine_mode.
Co-Authored-By: Alan Hayward <alan.hayward@arm.com>
Co-Authored-By: David Sherwood <david.sherwood@arm.com>
From-SVN: r251513
|
|
This patch uses opt_scalar_int_mode rather than machine_mode
when iterating over scalar_int_modes, in cases where that helps
with future patches. (Using machine_mode is still OK in places
that don't really care about the mode being a scalar integer.)
2017-08-30 Richard Sandiford <richard.sandiford@linaro.org>
Alan Hayward <alan.hayward@arm.com>
David Sherwood <david.sherwood@arm.com>
gcc/
* cse.c (cse_insn): Use opt_scalar_int_mode for the mode iterator.
* explow.c (hard_function_value): Likewise.
* expmed.c (extract_fixed_bit_field_1): Likewise. Move the
convert_to_mode call outside the loop.
* expr.c (alignment_for_piecewise_move): Use opt_scalar_int_mode
for the mode iterator. Require the mode specified by max_pieces
to exist.
(emit_block_move_via_movmem): Use opt_scalar_int_mode for the
mode iterator.
(copy_blkmode_to_reg): Likewise.
(set_storage_via_setmem): Likewise.
* optabs.c (prepare_cmp_insn): Likewise.
* rtlanal.c (init_num_sign_bit_copies_in_rep): Likewise.
* stor-layout.c (finish_bitfield_representative): Likewise.
gcc/fortran/
* trans-types.c (gfc_init_kinds): Use opt_scalar_int_mode for
the mode iterator.
Co-Authored-By: Alan Hayward <alan.hayward@arm.com>
Co-Authored-By: David Sherwood <david.sherwood@arm.com>
From-SVN: r251503
|
|
The two implementations of the reg_nonzero_bits and reg_num_sign_bits
hooks ignored the "known_x", "known_mode" and "known_ret" arguments,
so this patch removes them. It adds a new scalar_int_mode parameter
that specifies the mode of "x". (This mode might be different from
"mode", which is the mode in which "x" is used.)
2017-08-30 Richard Sandiford <richard.sandiford@linaro.org>
Alan Hayward <alan.hayward@arm.com>
David Sherwood <david.sherwood@arm.com>
gcc/
* rtl.h (rtl_hooks::reg_nonzero_bits): Add a scalar_int_mode
parameter for the mode of "x". Remove the "known_x", "known_mode"
and "known_ret" arguments. Change the type of the mode argument
to scalar_int_mode.
(rtl_hooks:reg_num_sign_bit_copies): Likewise.
* combine.c (reg_nonzero_bits_for_combine): Update accordingly.
(reg_num_sign_bit_copies_for_combine): Likewise.
* rtlanal.c (nonzero_bits1): Likewise.
(num_sign_bit_copies1): Likewise.
* rtlhooks-def.h (reg_nonzero_bits_general): Likewise.
(reg_num_sign_bit_copies_general): Likewise.
* rtlhooks.c (reg_num_sign_bit_copies_general): Likewise.
(reg_nonzero_bits_general): Likewise.
Co-Authored-By: Alan Hayward <alan.hayward@arm.com>
Co-Authored-By: David Sherwood <david.sherwood@arm.com>
From-SVN: r251501
|
|
Similarly to the nonzero_bits patch, this one moves the mode
class check and VOIDmode handling from num_sign_bit_copies1
to num_sign_bit_copies itself, then changes the subroutines
to operate on scalar_int_modes.
2017-08-30 Richard Sandiford <richard.sandiford@linaro.org>
Alan Hayward <alan.hayward@arm.com>
David Sherwood <david.sherwood@arm.com>
gcc/
* rtlanal.c (num_sign_bit_copies): Handle VOIDmode here rather
than in subroutines. Return 1 for non-integer modes.
(cached_num_sign_bit_copies): Change the type of the mode parameter
to scalar_int_mode.
(num_sign_bit_copies1): Likewise. Remove early exit for other mode
classes. Handle CONST_INT_P first and then check whether X also
has a scalar integer mode. Check the same thing for inner registers
of a SUBREG and for values that are being extended or truncated.
Co-Authored-By: Alan Hayward <alan.hayward@arm.com>
Co-Authored-By: David Sherwood <david.sherwood@arm.com>
From-SVN: r251500
|
|
nonzero_bits1 assumed that all bits of a floating-point or vector mode
were needed. It seems likely that fixed-point modes should have been
handled in the same way. After excluding those, the only remaining
modes that are likely to be useful are scalar integer ones.
This patch moves the mode class check to nonzero_bits itself, along
with the handling of mode == VOIDmode. The subroutines of nonzero_bits
can then take scalar_int_modes.
2017-08-30 Richard Sandiford <richard.sandiford@linaro.org>
Alan Hayward <alan.hayward@arm.com>
David Sherwood <david.sherwood@arm.com>
gcc/
* rtlanal.c (nonzero_bits): Handle VOIDmode here rather than
in subroutines. Return the mode mask for non-integer modes.
(cached_nonzero_bits): Change the type of the mode parameter
to scalar_int_mode.
(nonzero_bits1): Likewise. Remove early exit for other mode
classes. Handle CONST_INT_P first and then check whether X
also has a scalar integer mode.
Co-Authored-By: Alan Hayward <alan.hayward@arm.com>
Co-Authored-By: David Sherwood <david.sherwood@arm.com>
From-SVN: r251499
|
|
This patch adds asserting as_a <scalar_int_mode> conversions
to contexts in which the input is known to be a scalar integer mode.
In expand_divmod, op1 is always a scalar_int_mode if
op1_is_constant (but might not be otherwise).
In expand_binop, the patch reverses a < comparison in order to
avoid splitting a long line.
gcc/
2017-08-30 Richard Sandiford <richard.sandiford@linaro.org>
Alan Hayward <alan.hayward@arm.com>
David Sherwood <david.sherwood@arm.com>
* cfgexpand.c (convert_debug_memory_address): Use
as_a <scalar_int_mode>.
* combine.c (expand_compound_operation): Likewise.
(make_extraction): Likewise.
(change_zero_ext): Likewise.
(simplify_comparison): Likewise.
* cse.c (cse_insn): Likewise.
* dwarf2out.c (minmax_loc_descriptor): Likewise.
(mem_loc_descriptor): Likewise.
(loc_descriptor): Likewise.
* expmed.c (init_expmed_one_mode): Likewise.
(synth_mult): Likewise.
(emit_store_flag_1): Likewise.
(expand_divmod): Likewise. Use HWI_COMPUTABLE_MODE_P instead
of a comparison with size.
* expr.c (expand_assignment): Use as_a <scalar_int_mode>.
(reduce_to_bit_field_precision): Likewise.
* function.c (expand_function_end): Likewise.
* internal-fn.c (expand_arith_overflow_result_store): Likewise.
* loop-doloop.c (doloop_modify): Likewise.
* optabs.c (expand_binop): Likewise.
(expand_unop): Likewise.
(expand_copysign_absneg): Likewise.
(prepare_cmp_insn): Likewise.
(maybe_legitimize_operand): Likewise.
* recog.c (const_scalar_int_operand): Likewise.
* rtlanal.c (get_address_mode): Likewise.
* simplify-rtx.c (simplify_unary_operation_1): Likewise.
(simplify_cond_clz_ctz): Likewise.
* tree-nested.c (get_nl_goto_field): Likewise.
* tree.c (build_vector_type_for_mode): Likewise.
* var-tracking.c (use_narrower_mode): Likewise.
gcc/c-family/
2017-08-30 Richard Sandiford <richard.sandiford@linaro.org>
Alan Hayward <alan.hayward@arm.com>
David Sherwood <david.sherwood@arm.com>
* c-common.c (c_common_type_for_mode): Use as_a <scalar_int_mode>.
gcc/lto/
2017-08-30 Richard Sandiford <richard.sandiford@linaro.org>
Alan Hayward <alan.hayward@arm.com>
David Sherwood <david.sherwood@arm.com>
* lto-lang.c (lto_type_for_mode): Use as_a <scalar_int_mode>.
From-SVN: r251487
|
|
This patch replaces some checks against VOIDmode with checks
of is_a <scalar_int_mode>, in cases where scalar integer modes
were the only useful alternatives left.
gcc/
2017-08-30 Richard Sandiford <richard.sandiford@linaro.org>
Alan Hayward <alan.hayward@arm.com>
David Sherwood <david.sherwood@arm.com>
* cfgexpand.c (expand_debug_expr): Use is_a <scalar_int_mode>
instead of != VOIDmode.
* combine.c (if_then_else_cond): Likewise.
(change_zero_ext): Likewise.
* dwarf2out.c (mem_loc_descriptor): Likewise.
(loc_descriptor): Likewise.
* rtlanal.c (canonicalize_condition): Likewise.
* simplify-rtx.c (simplify_relational_operation_1): Likewise.
From-SVN: r251475
|
|
GET_MODE_WIDER previously returned VOIDmode if no wider mode existed.
That would cause problems with stricter mode classes, since VOIDmode
isn't for example a valid scalar integer or floating-point mode.
This patch instead makes it return a new opt_mode<T> class, which
holds either a T or nothing.
2017-08-30 Richard Sandiford <richard.sandiford@linaro.org>
Alan Hayward <alan.hayward@arm.com>
David Sherwood <david.sherwood@arm.com>
gcc/
* coretypes.h (opt_mode): New class.
* machmode.h (opt_mode): Likewise.
(opt_mode::else_void): New function.
(opt_mode::require): Likewise.
(opt_mode::exists): Likewise.
(GET_MODE_WIDER_MODE): Turn into a function and return an opt_mode.
(GET_MODE_2XWIDER_MODE): Likewise.
(mode_iterator::get_wider): Update accordingly.
(mode_iterator::get_2xwider): Likewise.
(mode_iterator::get_known_wider): Likewise, turning into a template.
* combine.c (make_extraction): Update use of GET_MODE_WIDER_MODE,
forcing a wider mode to exist.
* config/cr16/cr16.h (LONG_REG_P): Likewise.
* rtlanal.c (init_num_sign_bit_copies_in_rep): Likewise.
* config/c6x/c6x.c (c6x_rtx_costs): Update use of
GET_MODE_2XWIDER_MODE, forcing a wider mode to exist.
* lower-subreg.c (init_lower_subreg): Likewise.
* optabs-libfuncs.c (init_sync_libfuncs_1): Likewise, but not
on the final iteration.
* config/i386/i386.c (ix86_expand_set_or_movmem): Check whether
a wider mode exists before asking for a move pattern.
(get_mode_wider_vector): Update use of GET_MODE_WIDER_MODE,
forcing a wider mode to exist.
(expand_vselect_vconcat): Update use of GET_MODE_2XWIDER_MODE,
returning false if no such mode exists.
* config/ia64/ia64.c (expand_vselect_vconcat): Likewise.
* config/mips/mips.c (mips_expand_vselect_vconcat): Likewise.
* expmed.c (init_expmed_one_mode): Update use of GET_MODE_WIDER_MODE.
Avoid checking for a MODE_INT if we already know the mode is not a
SCALAR_INT_MODE_P.
(extract_high_half): Update use of GET_MODE_WIDER_MODE,
forcing a wider mode to exist.
(expmed_mult_highpart_optab): Likewise.
(expmed_mult_highpart): Likewise.
* expr.c (expand_expr_real_2): Update use of GET_MODE_WIDER_MODE,
using else_void.
* lto-streamer-in.c (lto_input_mode_table): Likewise.
* optabs-query.c (find_widening_optab_handler_and_mode): Likewise.
* stor-layout.c (bit_field_mode_iterator::next_mode): Likewise.
* internal-fn.c (expand_mul_overflow): Update use of
GET_MODE_2XWIDER_MODE.
* omp-low.c (omp_clause_aligned_alignment): Likewise.
* tree-ssa-math-opts.c (convert_mult_to_widen): Update use of
GET_MODE_WIDER_MODE.
(convert_plusminus_to_widen): Likewise.
* tree-switch-conversion.c (array_value_type): Likewise.
* var-tracking.c (emit_note_insn_var_location): Likewise.
* tree-vrp.c (simplify_float_conversion_using_ranges): Likewise.
Return false inside rather than outside the loop if no wider mode
exists
* optabs.c (expand_binop): Update use of GET_MODE_WIDER_MODE
and GET_MODE_2XWIDER_MODE
(can_compare_p): Use else_void.
* gdbhooks.py (OptMachineModePrinter): New class.
(build_pretty_printer): Use it for opt_mode.
gcc/ada/
* gcc-interface/decl.c (validate_size): Update use of
GET_MODE_WIDER_MODE, forcing a wider mode to exist.
Co-Authored-By: Alan Hayward <alan.hayward@arm.com>
Co-Authored-By: David Sherwood <david.sherwood@arm.com>
From-SVN: r251457
|
|
The new iterators are:
- FOR_EACH_MODE_IN_CLASS: iterate over all the modes in a mode class.
- FOR_EACH_MODE_FROM: iterate over all the modes in a class,
starting at a given mode.
- FOR_EACH_WIDER_MODE: iterate over all the modes in a class,
starting at the next widest mode after a given mode.
- FOR_EACH_2XWIDER_MODE: same, but considering only modes that
are two times wider than the previous mode.
- FOR_EACH_MODE_UNTIL: iterate over all the modes in a class until
a given mode is reached.
- FOR_EACH_MODE: iterate over all the modes in a class between
two given modes, inclusive of the first but not the second.
These help with the stronger type checking added by later patches,
since every new mode will be in the same class as the previous one.
2017-08-30 Richard Sandiford <richard.sandiford@linaro.org>
Alan Hayward <alan.hayward@arm.com>
David Sherwood <david.sherwood@arm.com>
gcc/
* machmode.h (mode_traits): New structure.
(get_narrowest_mode): New function.
(mode_iterator::start): Likewise.
(mode_iterator::iterate_p): Likewise.
(mode_iterator::get_wider): Likewise.
(mode_iterator::get_known_wider): Likewise.
(mode_iterator::get_2xwider): Likewise.
(FOR_EACH_MODE_IN_CLASS): New mode iterator.
(FOR_EACH_MODE): Likewise.
(FOR_EACH_MODE_FROM): Likewise.
(FOR_EACH_MODE_UNTIL): Likewise.
(FOR_EACH_WIDER_MODE): Likewise.
(FOR_EACH_2XWIDER_MODE): Likewise.
* builtins.c (expand_builtin_strlen): Use new mode iterators.
* combine.c (simplify_comparison): Likewise
* config/i386/i386.c (type_natural_mode): Likewise.
* cse.c (cse_insn): Likewise.
* dse.c (find_shift_sequence): Likewise.
* emit-rtl.c (init_derived_machine_modes): Likewise.
(init_emit_once): Likewise.
* explow.c (hard_function_value): Likewise.
* expmed.c (extract_fixed_bit_field_1): Likewise.
(extract_bit_field_1): Likewise.
(expand_divmod): Likewise.
(emit_store_flag_1): Likewise.
* expr.c (init_expr_target): Likewise.
(convert_move): Likewise.
(alignment_for_piecewise_move): Likewise.
(widest_int_mode_for_size): Likewise.
(emit_block_move_via_movmem): Likewise.
(copy_blkmode_to_reg): Likewise.
(set_storage_via_setmem): Likewise.
(compress_float_constant): Likewise.
* omp-low.c (omp_clause_aligned_alignment): Likewise.
* optabs-query.c (get_best_extraction_insn): Likewise.
* optabs.c (expand_binop): Likewise.
(expand_twoval_unop): Likewise.
(expand_twoval_binop): Likewise.
(widen_leading): Likewise.
(widen_bswap): Likewise.
(expand_parity): Likewise.
(expand_unop): Likewise.
(prepare_cmp_insn): Likewise.
(prepare_float_lib_cmp): Likewise.
(expand_float): Likewise.
(expand_fix): Likewise.
(expand_sfix_optab): Likewise.
* postreload.c (move2add_use_add2_insn): Likewise.
* reg-stack.c (reg_to_stack): Likewise.
* reginfo.c (choose_hard_reg_mode): Likewise.
* rtlanal.c (init_num_sign_bit_copies_in_rep): Likewise.
* stor-layout.c (mode_for_size): Likewise.
(smallest_mode_for_size): Likewise.
(mode_for_vector): Likewise.
(finish_bitfield_representative): Likewise.
* tree-ssa-math-opts.c (target_supports_divmod_p): Likewise.
* tree-vect-generic.c (type_for_widest_vector_mode): Likewise.
* tree-vect-stmts.c (vectorizable_conversion): Likewise.
* var-tracking.c (prepare_call_arguments): Likewise.
gcc/ada/
* gcc-interface/misc.c (fp_prec_to_size): Use new mode iterators.
(fp_size_to_prec): Likewise.
gcc/c-family/
* c-common.c (c_common_fixed_point_type_for_size): Use new mode
iterators.
* c-cppbuiltin.c (c_cpp_builtins): Likewise.
Co-Authored-By: Alan Hayward <alan.hayward@arm.com>
Co-Authored-By: David Sherwood <david.sherwood@arm.com>
From-SVN: r251455
|
|
This patch makes more use of the existing paradoxical_subreg_p
predicate and also adds a version that operates on outer and
inner modes.
Some of the affected tests were based on GET_MODE_SIZE rather than
GET_MODE_PRECISION and so the patch could change the result for modes
that have the same size but different precisions. I think in each
case the change should be a no-op or more correct, since a mode with
precision N bits can't be expected to hold all of a mode with precision
M>N bits.
The patch changes the branch taken in simplify_subreg for modes with
equal precision, but the new form matches the commentary more closely.
Both branches should be equally good in that situation.
2017-08-22 Richard Sandiford <richard.sandiford@linaro.org>
Alan Hayward <alan.hayward@arm.com>
David Sherwood <david.sherwood@arm.com>
gcc/
* rtl.h (paradoxical_subreg_p): Define inline, and add a version
that takes the outer and inner modes.
* doc/rtl.texi: Use paradoxical_subreg_p instead of a GET_MODE_SIZE
comparison as the canonical test for a paradoxical subreg.
* combine.c (simplify_set): Use paradoxical_subreg_p.
(make_extraction): Likewise.
(force_to_mode): Likewise.
(rtx_equal_for_field_assignment_p): Likewise.
(gen_lowpart_for_combine): Likewise.
(simplify_comparison): Likewise.
* cse.c (equiv_constant): Likewise.
* expmed.c (store_bit_field_1): Likewise.
* final.c (alter_subreg): Likewise.
* fwprop.c (propagate_rtx): Likewise.
(forward_propagate_subreg): Likewise.
* ira-conflicts.c (ira_build_conflicts): Likewise.
* lower-subreg.c (simplify_gen_subreg_concatn): Likewise.
* lra-constraints.c (curr_insn_transform): Likewise.
(split_reg): Likewise.
* lra-eliminations.c (move_plus_up): Likewise.
(lra_eliminate_regs_1): Likewise.
* recog.c (general_operand): Likewise.
* ree.c (combine_reaching_defs): Likewise.
* reload.c (push_reload): Likewise.
(find_reloads): Likewise.
* reload1.c (elimination_effects): Likewise.
(compute_reload_subreg_offset): Likewise.
(choose_reload_regs): Likewise.
* rtlanal.c (subreg_lsb_1): Likewise.
* simplify-rtx.c (simplify_unary_operation_1): Likewise.
(simplify_subreg): Likewise.
* var-tracking.c (track_loc_p): Likewise.
* emit-rtl.c (byte_lowpart_offset): Likewise.
(paradoxical_subreg_p): Delete out-of-line definition.
Co-Authored-By: Alan Hayward <alan.hayward@arm.com>
Co-Authored-By: David Sherwood <david.sherwood@arm.com>
From-SVN: r251282
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operations.
Many parallel set insns are of the form of a single set that also sets
the condition code flags. In this case the cost of such an insn is
normally the cost of the part that doesn't set the flags, since
updating the condition flags is simply a side effect.
At present all such insns are treated as having unknown cost (ie 0)
and combine assumes that such insns are infinitely more expensive than
any other insn sequence with a non-zero cost.
This patch addresses this problem by allowing insn_rtx_cost to ignore
the condition setting part of a PARALLEL iff there is exactly one
comparison set and one non-comparison set. If the only set operation
is a comparison we still use that as the basis of the insn cost.
* rtlanal.c (insn_rtx_cost): If a parallel contains exactly one
comparison set and one other set, use the cost of the non-comparison
set.
Bootstrapped on aarch64-none-linuxgnu
From-SVN: r249850
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2017-06-23 Bernd Edlinger <bernd.edlinger@hotmail.de>
rtl-optimizatoin/79286
* ira.c (update_equiv_regs): Revert to using may_trap_or_fault_p again.
* rtlanal.c (rtx_addr_can_trap_p_1): SYMBOL_REF_FUNCTION_P can never
trap. PIC register plus a const unspec without offset can never trap.
From-SVN: r249588
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From-SVN: r247881
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Revert r247509
2017-05-02 Bin Cheng <bin.cheng@arm.com>
* rtlanal.c (rtx_cost): Handle TRUNCATE between tieable modes.
From-SVN: r247541
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From-SVN: r247509
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PR target/79430
* rtlanal.c (reg_set_p): If reg is a stack_pointer_rtx, also
check for stack push/pop autoinc.
* config/i386/i386.c (ix86_agi_dependent): Return false
if the only reason why modified_in_p returned true is that
addr is SP based and set_insn is a push or pop.
From-SVN: r247429
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load across function call)
PR tree-optimizatin/78812
* rtl.h (contains_mem_rtx_p): Prototype.
* ifcvt.c (containts_mem_rtx_p): Move from here to...
* rtlanal.c (contains_mem_rtx_p): Here and remvoe static linkage.
* gcse.c (prune_expressions): Use contains_mem_rtx_p to discover
and prune MEMs that are not at the toplevel of a SET_SRC rtx. Look
through ZERO_EXTEND and SIGN_EXTEND when trying to avoid pruning
MEMs.
PR tree-optimization/78812
* g++.dg/torture/pr78812.C: New test.
From-SVN: r244093
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From-SVN: r243994
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too large for 64-bit type
Building gcc with -fsanitize=undefined shows:
rtlanal.c:5210:38: runtime error: shift exponent 4294967295 is too large for 64-bit type 'long unsigned int'
This happens because if_then_else_cond() in combine.c calls
num_sign_bit_copies() in rtlanal.c with mode==BLKmode.
5205 bitwidth = GET_MODE_PRECISION (mode);
5206 if (bitwidth > HOST_BITS_PER_WIDE_INT)
5207 return 1;
5208
5209 nonzero = nonzero_bits (x, mode);
5210 return nonzero & (HOST_WIDE_INT_1U << (bitwidth - 1))
5211 ? 1 : bitwidth - floor_log2 (nonzero) - 1;
This causes (bitwidth - 1) to wrap around.
PR rtl-optimization/78588
* combine.c (if_then_else_cond): Also guard against BLKmode.
* rtlanal.c (num_sign_bit_copies1): Add assert.
From-SVN: r242997
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-march=core2)
PR middle-end/78540
* rtl.h (remove_reg_equal_equiv_notes): Return bool instead of void.
* rtlanal.c (remove_reg_equal_equiv_notes): Return true if any
note has been removed.
* postreload.c (reload_combine_recognize_pattern): If
remove_reg_equal_equiv_notes returns true, call df_notes_rescan.
* gcc.dg/pr78540.c: New test.
From-SVN: r242937
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PR rtl-optimization/78120
* rtlanal.c (insn_rtx_cost): Revert previous change.
From-SVN: r242908
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PR rtl-optimization/78120
* rtlanal.c (insn_rtx_cost): Use set_rtx_cost.
From-SVN: r242833
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