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Noticed while working on something else that the insn_change_watermark
destructor could call cancel_changes for changes that no longer exist.
The loop in cancel_changes is a nop in that case, but:
num_changes = num;
can mess things up.
I think this would only affect nested uses of insn_change_watermark.
gcc/
* recog.h (insn_change_watermark::~insn_change_watermark): Avoid
calling cancel_changes for changes that no longer exist.
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When using validate_change to make a group of changes, you have
to remember to cancel them if something goes wrong. This patch
adds an RAII class to make that easier. See the comments in the
patch for details and examples.
gcc/
* recog.h (insn_change_watermark): New class.
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This patch adds yet another way of propagating into an instruction and
simplifying the result. (The net effect of the series is to keep the
total number of propagation approaches the same though, since a later
patch removes the fwprop.c routines.)
One of the drawbacks of the validate_replace_* routines is that
they only do simple simplifications, mostly canonicalisations:
/* Do changes needed to keep rtx consistent. Don't do any other
simplifications, as it is not our job. */
if (simplify)
simplify_while_replacing (loc, to, object, op0_mode);
But substituting can often lead to real simplification opportunities.
simplify-rtx.c:simplify_replace_rtx does fully simplify the result,
but it only operates on specific rvalues rather than full instruction
patterns. It is also nondestructive, which means that it returns a
new rtx whenever a substitution or simplification was possible.
This can create quite a bit of garbage rtl in the context of a
speculative recog, where changing the contents of a pointer is
often enough.
The new routines are therefore supposed to provide simplify_replace_rtx-
style substitution in recog. They go to some effort to prevent garbage
rtl from being created.
At the moment, the new routines fail if the pattern would still refer
to the old "from" value in some way. That might be unnecessary in
some contexts; if so, it could be put behind a configuration parameter.
gcc/
* recog.h (insn_propagation): New class.
* recog.c (insn_propagation::apply_to_mem_1): New function.
(insn_propagation::apply_to_rvalue_1): Likewise.
(insn_propagation::apply_to_lvalue_1): Likewise.
(insn_propagation::apply_to_pattern_1): Likewise.
(insn_propagation::apply_to_pattern): Likewise.
(insn_propagation::apply_to_rvalue): Likewise.
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In some cases, it can be convenient to roll back the changes that
have been made by validate_change to see how things looked before,
then reroll the changes. For example, this makes it possible
to defer calculating the cost of an instruction until we know that
the result is actually needed. It can also make dumps easier to read.
This patch adds a couple of helper functions for doing that.
gcc/
* recog.h (temporarily_undo_changes, redo_changes): Declare.
* recog.c (temporarily_undone_changes): New variable.
(validate_change_1, confirm_change_group): Check that it's zero.
(cancel_changes): Likewise.
(swap_change, temporarily_undo_changes): New functions.
(redo_changes): Likewise.
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A later patch wants to be able to use the validate_change machinery
to reduce the XVECLEN of a PARALLEL. This should be more efficient
than allocating a separate PARALLEL at a possibly distant memory
location, especially since the new PARALLEL would be garbage rtl if
the new pattern turns out not to match. Combine already pulls this
trick with SUBST_INT.
This patch adds a general helper for doing that.
gcc/
* recog.h (validate_change_xveclen): Declare.
* recog.c (change_t::old_len): New field.
(validate_change_1): Add a new_len parameter. Conditionally
replace the XVECLEN of an rtx, avoiding single-element PARALLELs.
(validate_change_xveclen): New function.
(cancel_changes): Undo changes made by validate_change_xveclen.
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This new feature causes the compiler to zero a subset of all call-used
registers at function return. This is used to increase program security
by either mitigating Return-Oriented Programming (ROP) attacks or
preventing information leakage through registers.
gcc/ChangeLog:
2020-10-30 Qing Zhao <qing.zhao@oracle.com>
H.J.Lu <hjl.tools@gmail.com>
* common.opt: Add new option -fzero-call-used-regs
* config/i386/i386.c (zero_call_used_regno_p): New function.
(zero_call_used_regno_mode): Likewise.
(zero_all_vector_registers): Likewise.
(zero_all_st_registers): Likewise.
(zero_all_mm_registers): Likewise.
(ix86_zero_call_used_regs): Likewise.
(TARGET_ZERO_CALL_USED_REGS): Define.
* df-scan.c (df_epilogue_uses_p): New function.
(df_get_exit_block_use_set): Replace EPILOGUE_USES with
df_epilogue_uses_p.
* df.h (df_epilogue_uses_p): Declare.
* doc/extend.texi: Document the new zero_call_used_regs attribute.
* doc/invoke.texi: Document the new -fzero-call-used-regs option.
* doc/tm.texi: Regenerate.
* doc/tm.texi.in (TARGET_ZERO_CALL_USED_REGS): New hook.
* emit-rtl.h (struct rtl_data): New field must_be_zero_on_return.
* flag-types.h (namespace zero_regs_flags): New namespace.
* function.c (gen_call_used_regs_seq): New function.
(class pass_zero_call_used_regs): New class.
(pass_zero_call_used_regs::execute): New function.
(make_pass_zero_call_used_regs): New function.
* optabs.c (expand_asm_reg_clobber_mem_blockage): New function.
* optabs.h (expand_asm_reg_clobber_mem_blockage): Declare.
* opts.c (zero_call_used_regs_opts): New structure array
initialization.
(parse_zero_call_used_regs_options): New function.
(common_handle_option): Handle -fzero-call-used-regs.
* opts.h (zero_call_used_regs_opts): New structure array.
* passes.def: Add new pass pass_zero_call_used_regs.
* recog.c (valid_insn_p): New function.
* recog.h (valid_insn_p): Declare.
* resource.c (init_resource_info): Replace EPILOGUE_USES with
df_epilogue_uses_p.
* target.def (zero_call_used_regs): New hook.
* targhooks.c (default_zero_call_used_regs): New function.
* targhooks.h (default_zero_call_used_regs): Declare.
* tree-pass.h (make_pass_zero_call_used_regs): Declare.
gcc/c-family/ChangeLog:
2020-10-30 Qing Zhao <qing.zhao@oracle.com>
H.J.Lu <hjl.tools@gmail.com>
* c-attribs.c (c_common_attribute_table): Add new attribute
zero_call_used_regs.
(handle_zero_call_used_regs_attribute): New function.
gcc/testsuite/ChangeLog:
2020-10-30 Qing Zhao <qing.zhao@oracle.com>
H.J.Lu <hjl.tools@gmail.com>
* c-c++-common/zero-scratch-regs-1.c: New test.
* c-c++-common/zero-scratch-regs-10.c: New test.
* c-c++-common/zero-scratch-regs-11.c: New test.
* c-c++-common/zero-scratch-regs-2.c: New test.
* c-c++-common/zero-scratch-regs-3.c: New test.
* c-c++-common/zero-scratch-regs-4.c: New test.
* c-c++-common/zero-scratch-regs-5.c: New test.
* c-c++-common/zero-scratch-regs-6.c: New test.
* c-c++-common/zero-scratch-regs-7.c: New test.
* c-c++-common/zero-scratch-regs-8.c: New test.
* c-c++-common/zero-scratch-regs-9.c: New test.
* c-c++-common/zero-scratch-regs-attr-usages.c: New test.
* gcc.target/i386/zero-scratch-regs-1.c: New test.
* gcc.target/i386/zero-scratch-regs-10.c: New test.
* gcc.target/i386/zero-scratch-regs-11.c: New test.
* gcc.target/i386/zero-scratch-regs-12.c: New test.
* gcc.target/i386/zero-scratch-regs-13.c: New test.
* gcc.target/i386/zero-scratch-regs-14.c: New test.
* gcc.target/i386/zero-scratch-regs-15.c: New test.
* gcc.target/i386/zero-scratch-regs-16.c: New test.
* gcc.target/i386/zero-scratch-regs-17.c: New test.
* gcc.target/i386/zero-scratch-regs-18.c: New test.
* gcc.target/i386/zero-scratch-regs-19.c: New test.
* gcc.target/i386/zero-scratch-regs-2.c: New test.
* gcc.target/i386/zero-scratch-regs-20.c: New test.
* gcc.target/i386/zero-scratch-regs-21.c: New test.
* gcc.target/i386/zero-scratch-regs-22.c: New test.
* gcc.target/i386/zero-scratch-regs-23.c: New test.
* gcc.target/i386/zero-scratch-regs-24.c: New test.
* gcc.target/i386/zero-scratch-regs-25.c: New test.
* gcc.target/i386/zero-scratch-regs-26.c: New test.
* gcc.target/i386/zero-scratch-regs-27.c: New test.
* gcc.target/i386/zero-scratch-regs-28.c: New test.
* gcc.target/i386/zero-scratch-regs-29.c: New test.
* gcc.target/i386/zero-scratch-regs-30.c: New test.
* gcc.target/i386/zero-scratch-regs-31.c: New test.
* gcc.target/i386/zero-scratch-regs-3.c: New test.
* gcc.target/i386/zero-scratch-regs-4.c: New test.
* gcc.target/i386/zero-scratch-regs-5.c: New test.
* gcc.target/i386/zero-scratch-regs-6.c: New test.
* gcc.target/i386/zero-scratch-regs-7.c: New test.
* gcc.target/i386/zero-scratch-regs-8.c: New test.
* gcc.target/i386/zero-scratch-regs-9.c: New test.
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Instead of rejecting RTX_FRAME_RELATED_P insns, allow try_split to split
such insns, provided the split is after reload, and the result of the split
is a single insn.
recog.c:peep2_attempt already splits an RTX_FRAME_RELATED_P insn splitting
to a single insn. This patch refactors existing code copying frame related
info to a separate function (copy_frame_info_to_split_insn) and calls it
from both peep2_attempt and try_split.
2020-08-21 Senthil Kumar Selvaraj <saaadhu@gcc.gnu.org>
gcc/ChangeLog:
* emit-rtl.c (try_split): Call copy_frame_info_to_split_insn
to split certain RTX_FRAME_RELATED_P insns.
* recog.c (copy_frame_info_to_split_insn): New function.
(peep2_attempt): Split copying of frame related info of
RTX_FRAME_RELATED_P insns into above function and call it.
* recog.h (copy_frame_info_to_split_insn): Declare it.
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Using parameter packs with function typedefs tripped a Clang bug
in which the packs were not being expanded correctly:
https://bugs.llvm.org/show_bug.cgi?id=46377
Work around that by going back to the decltype approach, but adding
a cast to void to suppress a warning about unused values.
2020-06-22 Richard Sandiford <richard.sandiford@arm.com>
gcc/
* coretypes.h (first_type): Delete.
* recog.h (insn_gen_fn::operator()): Go back to using a decltype.
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Fixes a “left operand of comma has no effect” warning that some were
seeing. Also fixes a spurious ellipsis that Jonathan Wakely pointed
out.
2020-06-17 Richard Sandiford <richard.sandiford@arm.com>
gcc/
* coretypes.h (first_type): New alias template.
* recog.h (insn_gen_fn::operator()): Use it instead of a decltype.
Remove spurious “...” and split the function type out into a typedef.
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This patch uses parameter packs to define insn_gen_fn::operator().
I guess in some ways it's C++-ification for its own sake, but it does
make things simpler and removes the current artificial limit of 16
arguments.
Note that the call is still strongly typed: all arguments have to have
implicit conversions to rtx. Error messages for bad arguments look
reasonable.
I'm sure there are more elegant ways of getting the function type,
but this version at least fits on one line, so I didn't try too
hard to find an alternative.
2020-06-12 Richard Sandiford <richard.sandiford@arm.com>
gcc/
* recog.h (insn_gen_fn::f0, insn_gen_fn::f1, insn_gen_fn::f2)
(insn_gen_fn::f3, insn_gen_fn::f4, insn_gen_fn::f5, insn_gen_fn::f6)
(insn_gen_fn::f7, insn_gen_fn::f8, insn_gen_fn::f9, insn_gen_fn::f10)
(insn_gen_fn::f11, insn_gen_fn::f12, insn_gen_fn::f13)
(insn_gen_fn::f14, insn_gen_fn::f15, insn_gen_fn::f16): Delete.
(insn_gen_fn::operator()): Replace overloaded definitions with
a parameter-pack version.
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From-SVN: r279813
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* config/m68k/m68k.c (output_move_himode, output_move_qimode):
Replace code for non-CONST_INT constants with gcc_unreachable.
* config/m68k/m68k.md (cbranchdi): Don't generate individual
compare and test.
(CMPMODE): New mode_iterator.
(cbranchsi4, cbranchqi4, cbranchhi4): Replace expanders with
cbranch<mode>4.
(cstoresi4, cstoreqi4, cstorehi4): Replace expanders with
cstore<mode>4.
(cmp<mode>_68881): Remove 'F' constraint from first comparison
operand.
(bit test insns patterns): Use nonimmediate_operand, not
register_operand, for source operands that allow memory in
their constraints.
(divmodsi4, udivmodsi4, divmodhi4 and related unnamed patterns):
Use register_operand, not nonimmediate_operand, for the
destinations.
(DBCC): New mode_iterator.
(dbcc peepholes): Use it to reduce duplication.
(trap): Use const_true_rtx, not const1_rtx.
* config/m68k/predicates.md (m68k_comparison_operand): Renamed
from m68k_subword_comparison_operand and changed to handle
SImode.
PR target/91851
* config/m68k/m68k-protos.h (output-dbcc_and_branch): Adjust
declaration.
(m68k_init_cc): New declaration.
(m68k_output_compare_di, m68k_output_compare_si)
(m68k_output_compare_hi, m68k_output_compare_qi)
(m68k_output_compare_fp, m68k_output_btst, m68k_output_bftst)
(m68k_find_flags_value, m68k_output_scc, m68k_output_scc_float)
(m68k_output_branch_integer, m68k_output_branch_integer_rev.
m68k_output_branch_float, m68k_output_branch_float_rev):
Likewise.
(valid_dbcc_comparison_p_2, flags_in_68881)
(output_btst): Remove declaration.
* config/m68k/m68k.c (INCLDUE_STRING): Define.
(TARGET_ASM_FINAL_POSTSCAN_INSN): Define.
(valid_dbcc_comparison_p_2, flags_in_68881): Delete functions.
(flags_compare_op0, flags_compare_op1, flags_operand1,
flags_operand2, flags_valid): New static variables.
(m68k_find_flags_value, m68k_init_cc): New functions.
(handle_flags_for_move, m68k_asm_final_postscan_insn,
remember_compare_flags): New static functions.
(output_dbcc_and_branch): New argument CODE. Use it, and add
PLUS and MINUS to the possible codes. All callers changed.
(m68k_output_btst): Renamed from output_btst. Remove OPERANDS
and INSN arguments, add CODE arg. Return the comparison code
to use. All callers changed. Use CODE instead of
next_insn_tests_no_inequality, and replace cc_status management
with changing the return code.
(m68k_rtx_costs): Instead of testing for COMPARE, test for
RTX_COMPARE or RTX_COMM_COMPARE.
(output_move_simode, output_move_qimode): Call
handle_flags_for_move.
(notice_update_cc): Delete function.
(m68k_output_bftst, m68k_output_compare_di, m68k_output_compare_si,
m68k_output_compare_hi, m68k_output_compare_qi,
m68k_output_compare_fp, m68k_output_branch_integer,
m68k_output_branch_integer_rev, m68k_output_scc,
m68k_output_branch_float, m68k_output_branch_float_rev,
m68k_output_scc_float): New functions.
(output_andsi3, output_iorsi3, output_xorsi3): Call CC_STATUS_INIT
once at the start, and set flags_valid and flags_operand1 if the
flags are usable.
* config/m68k/m68k.h (CC_IN_68881, NOTICE_UPDATE_CC,
CC_OVERFLOW_UNUSABLE, CC_NO_CARRY, OUTPUT_JUMP): Remove
definitions.
(CC_STATUS_INIT): Define.
* config/m68k/m68k.md (flags_valid): New define_attr.
(tstdi, tstsi_internal_68020_cf, tstsi_internal, tsthi_internal,
tstqi_internal, tst<mode>_68881, tst<mode>_cf, cmpdi_internal,
cmpdi, unnamed cmpsi/cmphi/cmpqi patterns, cmpsi_cf,
cmp<mode>_68881, cmp<mode>_cf, unnamed btst patterns,
tst_bftst_reg, tst_bftst_reg, unnamed scc patterns, scc,
sls, sordered_1, sunordered_1, suneq_1, sunge_1, sungt_1,
sunle_1, sunlt_1, sltgt_1, fsogt_1, fsoge_1, fsolt_1, fsole_1,
bge0_di, blt0_di, beq, bne, bgt, bgtu, blt, bltu, bge, bgeu,
ble, bleu, bordered, bunordered, buneq, bunge, bungt, bunle,
bunlt, bltgt, beq_rev, bne_rev, bgt_rev, bgtu_rev,
blt_rev, bltu_rev, bge_rev, bgeu_rev, ble_rev, bleu_rev,
bordered_rev, bunordered_rev, buneq_rev, bunge_rv, bungt_rev,
bunle_rev, bunlt_rev, bltgt_rev, ctrapdi4, ctrapsi4, ctraphi4,
ctrapqi4, conditional_trap): Delete patterns.
(cbranchdi4_insn): New pattern.
(cbranchdi4): Don't generate cc0 patterns. When testing LT or GE,
test high part only. When testing EQ or NE, generate beq0_di
and bne0_di patterns directly.
(cstoredi4): When testing LT or GE, test high part only.
(both sets of cbranch<mode>4, cstore<mode>4): Don't generate cc0
patterns.
(scc0_constraints, cmp1_constraints, cmp2_constraints,
scc0_cf_constraints, cmp1_cf_constraints, cmp2_cf_constraints,
cmp2_cf_predicate): New define_mode_attrs.
(cbranch<mode>4_insn, cbranch<mode>4_insn_rev,
cbranch<mode>4_insn_cf, cbranch<mode>4_insn_cf_rev,
cstore<mode>4_insn, cstore<mode>4_insn_cf for integer modes)
New patterns.
(cbranch<mode>4_insn_68881, cbranch<mode>4_insn_rev_68881):
(cbranch<mode>4_insn_cf, cbranch<mode>4_insn_rev_cf,
cstore<mode>4_insn_68881, cstore<mode>4_insn_cf for FP):
New patterns.
(cbranchsi4_btst_mem_insn, cbranchsi4_btst_reg_insn,
cbranchsi4_btst_mem_insn_1, cbranchsi4_btst_reg_insn_1):
Likewise.
(BTST): New define_mode_iterator.
(btst_predicate, btst_constraint, btst_range): New
define_mode_attrs.
(cbranch_bftst<mode>_insn, cstore_bftst<mode>_insn): New
patterns.
(movsi_m68k_movsi_m68k2, movsi_cf, unnamed movstrict patterns,
unnamed movhi and movqi patterns, unnamed movsf, movdf and movxf
patterns): Set attr "flags_valid".
(truncsiqi2, trunchiqi2, truncsihi2): Remove manual CC_STATUS
management. Set attr "flags_valid".
(extendsidi2, extendplussidi, unnamed float_extendsfdf pattern,
extendsfdf2_cf, fix_truncdfsi2, fix_truncdfhi2, fix_truncdfqi2,
addi_sexthishl32, adddi_dilshr32, adddi_dilshr32_cf,
addi_dishl32, subdi_sexthishl32, subdi_dishl32, subdi3): Remove
manual CC_STATUS management.
(addsi3_internal, addhi3, addqi3, subsi3, subhi3, subqi3,
unnamed strict_lowpart subhi and subqi patterns): Set attr
"flags_valid".
(unnamed strict_lowpart addhi3 and addqi3 patterns): Likewise.
Remove code to operate on address regs and assert the case
does not occur.
(unnamed mulsidi patterns, divmodhi4, udivmodhi4): Remove
manual CC_STATUS_INIT.
(andsi3_internal, andhi3, andqi3, iorsi3_internal, iorhi3, iorqi3,
xorsi3_internal, xorhi3, xorqi3, negsi2_internal,
negsi2_5200, neghi2, negqi2, one_cmplsi2_internal, one_cmplhi2,
one_cmplqi2, unnamed strict_lowpart patterns
for andhi, andqi, iorhi, iorqi, xorhi, xorqi, neghi, negqi,
one_cmplhi and one_cmplqi): Set attr "flags_valid".
(iorsi_zext_ashl16, iorsi_zext): Remove manual CC_STATUS_INIT.
(ashldi_sexthi, ashlsi_16, ashlsi_17_24): Remove manual
CC_STATUS_INIT.
(ashlsi3, ashlhi3, ashlqi3, ashrsi3, ashrhi3, ashrqi3, lshrsi3,
lshrhi3, shrqi3, rotlsi3, rotlhi3, rotlhi3_lowpart, rotlqi3,
rotlqi3_lowpart, rotrsi3, rotrhi3, rotrhi_lowpart, rotrqi3,
unnamed strict_low_part patterns for HI and
QI versions): Set attr "flags_valid".
(bsetmemqi, bsetmemqi_ext, bsetdreg, bchgdreg, bclrdreg,
bclrmemqi, extzv_8_16_reg, extzv_bfextu_mem, insv_bfchg_mem,
insv_bfclr_mem, insv_bfset_mem, extv_bfextu_reg,
insv_bfclr_reg, insv_bfset_reg, dbne_hi, dbne_si, dbge_hi,
dbge_si, extendsfxf2, extenddfxf2, ): Remove manual cc_status management.
(various unnamed peepholes): Adjust compare/branch sequences
for new cbranch patterns.
(dbcc peepholes): Likewise, and output the comparison here
as well.
* config/m68k/predicates.md (valid_dbcc_comparison_p): Delete.
(fp_src_operand): Allow constant zero.
(address_reg_operand): New predicate.
* rtl.h (inequality_comparisons_p): Remove declaration.
* recog.h (next_insn_tests_no_inequality): Likewise.
* rtlanal.c (inequality_comparisons_p): Delete function.
* recog.c (next_insn_tests_no_inequality): Likewise.
From-SVN: r278681
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We have two styles of HARD_REG_SET: a single integer based on
HOST_WIDEST_FAST_INT (used when FIRST_PSEUDO_REGISTER is small enough)
or an array of integers. One of the nice properties of this arrangement
is that:
void foo (const HARD_REG_SET);
is passed by value as an integer when the set is small enough and
by reference otherwise.
(This is in constrast to "const HARD_REG_SET &", which would always
be passed by reference, and in contrast to passing a structure wrapper
like "struct s { T elts[1]; }" by value, where the structure might be
passed like a T or by reference, depending on the ABI.)
However, one of the disadvantages of using an array is that simple
assignment doesn't work. We need to use COPY_HARD_REG_SET instead.
This patch uses a structure wrapper around the array, and preserves
the above "nice property" using a new const_hard_reg_set typedef.
The patch also removes the manual unrolling for small array sizes;
I think these days we can rely on the compiler to do that for us.
This meant fixing two port-specific quirks:
- epiphany passed NULL as a HARD_REG_SET whose value doesn't matter.
The patch passes the NO_REGS set instead.
- ia64 reused TEST_HARD_REG_BIT and SET_HARD_REG_BIT for arrays that
are bigger than HARD_REG_SET. The patch just open-codes them.
The patch is probably being too conservative. Very few places actually
take advantage of the "nice property" above, and we could have a
cleaner interface if we used a structure wrapper for all cases.
2019-09-09 Richard Sandiford <richard.sandiford@arm.com>
gcc/
* hard-reg-set.h (HARD_REG_SET): Define using a typedef rather
than a #define. Use a structure rather than an array as the
fallback definition. Remove special cases for low array sizes.
(const_hard_reg_set): New typedef.
(hard_reg_set_subset_p): Use it instead of "const HARD_REG_SET".
(hard_reg_set_equal_p, hard_reg_set_intersect_p): Likewise.
(hard_reg_set_empty_p): Likewise.
(SET_HARD_REG_BIT): Use a function rather than a macro to
handle the case in which HARD_REG_SET is a structure.
(CLEAR_HARD_REG_BIT, TEST_HARD_REG_BIT, CLEAR_HARD_REG_SET)
(SET_HARD_REG_SET, COPY_HARD_REG_SET, COMPL_HARD_REG_SET)
(AND_HARD_REG_SET, AND_COMPL_HARD_REG_SET, IOR_HARD_REG_SET)
(IOR_COMPL_HARD_REG_SET): Likewise.
(hard_reg_set_iterator::pset): Constify the pointer target.
(hard_reg_set_iter_init): Take a const_hard_reg_set instead
of a "const HARD_REG_SET". Update the handling of non-integer
HARD_REG_SETs.
* recog.h: Test HARD_CONST instead of CLEAR_HARD_REG_SET.
* reload.h: Likewise.
* rtl.h (choose_hard_reg_mode): Remove unnecessary line break.
* regs.h (in_hard_reg_set_p): Take a const_hard_reg_set instead
of a "const HARD_REG_SET".
(overlaps_hard_reg_set_p, range_overlaps_hard_reg_set_p): Likewise.
(range_in_hard_reg_set_p): Likewise.
* ira-costs.c (restrict_cost_classes): Likewise.
* shrink-wrap.c (move_insn_for_shrink_wrap): Likewise.
* config/epiphany/resolve-sw-modes.c (pass_resolve_sw_modes::execute):
Pass a NO_REGS HARD_REG_SET rather than NULL to emit_set_fp_mode.
* config/ia64/ia64.c (rws_insn): In the CHECKING_P version,
use unsigned HOST_WIDEST_FAST_INT rather than HARD_REG_ELT_TYPE.
(rws_insn_set, rws_insn_test): In the CHECKING_P version,
take an unsigned int and open-code the HARD_REG_SET operations.
From-SVN: r275526
|
|
2019-07-15 Prathamesh Kulkarni <prathamesh.kulkarni@linaro.org>
PR target/90723
* recog.h (temporary_volatile_ok): New class.
* config/aarch64/aarch64.c (aarch64_emit_sve_pred_move): Set
volatile_ok temporarily to true using temporary_volatile_ok.
* expr.c (emit_block_move_via_cpymem): Likewise.
* optabs.c (maybe_legitimize_operand): Likewise.
From-SVN: r273466
|
|
From-SVN: r267494
|
|
On S/390 there is a need to support more than 32 instruction
alternatives per define_insn. Currently this is not explicitly
prohibited or unsupported: MAX_RECOG_ALTERNATIVES is equal 35, and,
futhermore, the related code uses uint64_t for bitmaps in most places.
However, genattrtab contains the logic to convert (eq_attr "attribute"
"value") RTXs to (eq_attr_alt bitmap) RTXs, where bitmap contains
alternatives, whose "attribute" has the corresponding "value".
Unfortunately, bitmap is only 32 bits.
When adding the 33rd alternative, this led to (eq_attr "type" "larl")
becoming (eq_attr_alt -1050625 1), where -1050625 == 0xffeff7ff. The
cleared bits 12, 21 and 32 correspond to two existing and one newly
added insn of type "larl". compute_alternative_mask sign extended this
to 0xffffffffffeff7ff, which contained non-existent alternatives, and
this made simplify_test_exp fail with "invalid alternative specified".
I'm not sure why it didn't fail the same way before, since the top bit,
which led to sign extension, should have been set even with 32
alternatives. Maybe simplify_test_exp was not called for "type"
attribute for some reason?
This patch widens EQ_ATTR_ALT bitmap to 64 bits, making it possible to
gracefully handle up to 64 alternatives. It eliminates the problem with
the 33rd alternative on S/390.
gcc/ChangeLog:
2018-09-24 Ilya Leoshkevich <iii@linux.ibm.com>
* genattrtab.c (mk_attr_alt): Use alternative_mask.
(attr_rtx_1): Adjust caching to match the new EQ_ATTR_ALT field
types.
(check_attr_test): Use alternative_mask.
(get_attr_value): Likewise.
(compute_alternative_mask): Use alternative_mask and XWINT.
(make_alternative_compare): Use alternative_mask.
(attr_alt_subset_p): Use XWINT.
(attr_alt_subset_of_compl_p): Likewise.
(attr_alt_intersection): Use alternative_mask and XWINT.
(attr_alt_union): Likewise.
(attr_alt_complement): Use HOST_WIDE_INT and XWINT.
(mk_attr_alt): Use alternative_mask and HOST_WIDE_INT.
(simplify_test_exp): Use alternative_mask and XWINT.
(write_test_expr): Use alternative_mask and XWINT, adjust bit
number calculation to support 64 bits. Generate code that
checks 64-bit masks.
(main): Use alternative_mask.
* rtl.def (EQ_ATTR_ALT): Change field types from ii to ww.
From-SVN: r264537
|
|
(process_address_1))
PR rtl-optimization/84682
* lra-constraints.c (process_address_1): Check is_address flag
for address constraints.
(process_alt_operands): Likewise.
* lra.c (lra_set_insn_recog_data): Pass asm operand locs to
preprocess_constraints.
* recog.h (preprocess_constraints): Add oploc parameter.
Adjust callers.
PR rtl-optimization/84682
* gcc.dg/torture/pr84682-1.c: New.
* gcc.dg/torture/pr84682-2.c: New.
* gcc.dg/torture/pr84682-3.c: New.
From-SVN: r258393
|
|
From-SVN: r256169
|
|
gcc:
2017-12-14 Bernd Edlinger <bernd.edlinger@hotmail.de>
* doc/invoke.texi: Document -Wcast-function-type.
* recog.h (stored_funcptr): Change signature.
* tree-dump.c (dump_node): Avoid warning.
* typed-splay-tree.h (typed_splay_tree): Avoid warning.
libcpp:
2017-12-14 Bernd Edlinger <bernd.edlinger@hotmail.de>
* internal.h (maybe_print_line): Change signature.
c-family:
2017-12-14 Bernd Edlinger <bernd.edlinger@hotmail.de>
* c.opt (Wcast-function-type): New warning option.
* c-lex.c (get_fileinfo): Avoid warning.
* c-ppoutput.c (scan_translation_unit_directives_only): Remove cast.
c:
2017-12-14 Bernd Edlinger <bernd.edlinger@hotmail.de>
* c-typeck.c (c_safe_arg_type_equiv_p,
c_safe_function_type_cast_p): New function.
(build_c_cast): Implement -Wcast-function-type.
cp:
2017-12-14 Bernd Edlinger <bernd.edlinger@hotmail.de>
* decl2.c (start_static_storage_duration_function): Avoid warning.
* typeck.c (cxx_safe_arg_type_equiv_p,
cxx_safe_function_type_cast_p): New function.
(build_reinterpret_cast_1): Implement -Wcast-function-type.
testsuite:
2017-12-14 Bernd Edlinger <bernd.edlinger@hotmail.de>
* c-c++-common/Wcast-function-type.c: New test.
* g++.dg/Wcast-function-type.C: New test.
From-SVN: r255661
|
|
From-SVN: r243994
|
|
gcc/ChangeLog:
2016-11-21 Trevor Saunders <tbsaunde+gcc@tbsaunde.org>
* config/v850/v850.c (expand_prologue): Adjust.
(expand_epilogue): Likewise.
* expr.c (init_expr_target): Likewise.
* genrecog.c (print_subroutine): Always make the argument type
rtx_insn *.
* recog.h: Adjust prototype.
From-SVN: r242651
|
|
From-SVN: r232055
|
|
than the current one.
gcc/
* gencodes.c (gencodes): Print the comma for the preceding
enum value rather than the current one. Use aliased enum values
rather than #defines for compiled-out patterns.
(main): Update accordingly. Replace LAST_INSN_CODE with
NUM_INSN_CODES.
* lra.c (insn_code_data): Update accordingly.
(finish_insn_code_data_once, get_static_insn_data): Likewise.
* recog.h (target_recog): Likewise.
(preprocess_insn_constraints): Change parameter to unsigned int.
* recog.c (preprocess_insn_constraints): Likewise.
(recog_init): Replace LAST_INSN_CODE with NUM_INSN_CODES.
* tree-vect-stmts.c (vectorizable_operation): Simplify.
From-SVN: r227076
|
|
* combine.c (combine_split_insns): Remove cast.
* config/bfin/bfin.c (hwloop_fail): Add cast in try_split call.
* config/sh/sh.c (sh_try_split_insn_simple): Remove cast.
* config/sh/sh_treg_combine.cc (sh_treg_combine::execute): Add cast.
* emit-rtl.c (try_split): Promote type of trial argument to rtx_insn.
* genemit.c (gen_split): Change return type of generated functions to
rtx_insn.
* genrecog.c (get_failure_return): Use NULL instead of NULL_RTX.
(print_subroutine_start): Promote rtx to rtx_insn in gen_split_* and
gen_peephole2_* functions.
(print_subroutine, main): Likewise.
* recog.c (peephole2_optimize): Remove cast.
(peep2_next_insn): Promote return type to rtx_insn.
* recog.h (peep2_next_insn): Fix prototype.
* rtl.h (try_split, split_insns): Likewise.
From-SVN: r224183
|
|
* bb-reorder.c (set_edge_can_fallthru_flag): Use rtx_jump_insn where
feasible.
(fix_up_fall_thru_edges): Likewise.
(fix_crossing_conditional_branches): Likewise. Promote jump targets
from to rtx_insn to rtx_code_label where feasible.
* bt-load.c (move_btr_def): Remove as-a cast of the value returned by
gen_move_insn (returned type changed to rtx_insn).
* builtins.c (expand_errno_check): Fix arguments of
do_compare_rtx_and_jump (now expects rtx_code_label).
(expand_builtin_acc_on_device): Likewise.
* cfgcleanup.c (try_simplify_condjump): Add cast when calling
invert_jump (now exprects rtx_jump_insn).
* cfgexpand.c (label_rtx_for_bb): Promote return type to rtx_code_label.
(construct_init_block): Use rtx_code_label.
* cfgrtl.c (block_label): Promote return type to rtx_code_label.
(try_redirect_by_replacing_jump): Use cast to rtx_jump_insn when
calling redirect_jump.
(patch_jump_insn): Likewise.
(redirect_branch_edge): Likewise.
(force_nonfallthru_and_redirect): Likewise.
(fixup_reorder_chain): Explicitly use rtx_jump_insn instead of rtx_insn
when suitable.
(rtl_lv_add_condition_to_bb): Update call of do_compare_rtx_and_jump.
* cfgrtl.h: Promote return type of block_label to rtx_code_label.
* config/bfin/bfin.c (hwloop_optimize): Fix call of emit_label_before.
* config/i386/i386.c (ix86_emit_cmove): Explicitly use rtx_code_label
to store the value retured by gen_label_rtx.
* config/mips/mips.c (mips16_split_long_branches): Promote rtx_insn to
rtx_jump_insn.
* config/sh/sh.c (gen_far_branch): Likewise. Fix call of invert_jump.
(split_branches): Fix calls of redirect_jump.
* dojump.c (jumpifnot): Promote argument type from rtx to rtx_code_label.
(jumpifnot_1): Likewise.
(jumpif): Likewise.
(jumpif_1): Likewise.
(do_jump_1): Likewise.
(do_jump): Likewise. Use rtx_code_label when feasible.
(do_jump_by_parts_greater_rtx): Likewise.
(do_jump_by_parts_zero_rtx): Likewise.
(do_jump_by_parts_equality_rtx): Likewise.
(do_compare_rtx_and_jump): Likewise.
* dojump.h: Update function prototypes.
* dse.c (emit_inc_dec_insn_before): Remove case (gen_move_insn now
returns rtx_insn).
* emit-rtl.c (emit_jump_insn_before_noloc): Promote return type to
rtx_jump_insn.
(emit_label_before): Likewise.
(emit_jump_insn_after_noloc): Likewise.
(emit_jump_insn_after_setloc): Likewise.
(emit_jump_insn_after): Likewise
(emit_jump_insn_before_setloc): Likewise.
(emit_jump_insn_before): Likewise.
(emit_label_before): Promote return type to rtx_code_label.
(emit_label): Likewise.
* except.c (sjlj_emit_dispatch_table): Use jump_target_rtx.
* explow.c (emit_stack_save): Use gen_move_insn_uncast instead of
gen_move_insn.
(emit_stack_restore): Likewise.
* expmed.c (emit_store_flag_force): Fix calls of do_compare_rtx_and_jump.
(do_cmp_and_jump): Likewise.
* expr.c (expand_expr_real_2): Likewise. Promote some local variables
from rtx to rtx_code_label.
(gen_move_insn_uncast): New function.
* expr.h: Update return type of gen_move_insn (promote to rtx_insn).
* function.c (convert_jumps_to_returns): Fix call of redirect_jump.
* gcse.c (pre_insert_copy_insn): Use rtx_insn instead of rtx.
* ifcvt.c (dead_or_predicable): Use rtx_jump_insn when calling
invert_jump_1 and redirect_jump_1.
* internal-fn.c (expand_arith_overflow_result_store): Fix call of
do_compare_rtx_and_jump.
(expand_addsub_overflow): Likewise.
(expand_neg_overflow): Likewise.
(expand_mul_overflow): Likewise.
* ira.c (split_live_ranges_for_shrink_wrap): Use rtx_insn for
return value of gen_move_insn.
* jump.c (redirect_jump): Promote argument from rtx to rtx_jump_insn.
* loop-doloop.c (add_test): Use rtx_code_label.
(doloop_modify): Likewise.
(doloop_optimize): Likewise.
* loop-unroll.c (compare_and_jump_seq): Promote rtx to rtx_code_label.
* lra-constraints.c (emit_spill_move): Remove cast of value returned
by gen_move_insn.
(inherit_reload_reg): Add cast when calling dump_insn_slim.
(split_reg): Likewise.
* modulo-sched.c (schedule_reg_moves): Remove cast of value returned by
gen_move_insn.
* optabs.c (expand_binop_directly): Remove casts of values returned by
maybe_gen_insn.
(expand_unop_direct): Likewise.
(expand_abs): Likewise.
(maybe_emit_unop_insn): Likewise.
(maybe_gen_insn): Promote return type to rtx_insn.
* optabs.h: Update prototype of maybe_gen_insn.
* postreload-gcse.c (eliminate_partially_redundant_load): Remove
redundant cast.
* recog.c (struct peep2_insn_data): Promote type of insn field to
rtx_insn.
(peep2_reinit_state): Use NULL instead of NULL_RTX.
(peep2_attempt): Remove casts of insn in peep2_insn_data.
(peep2_fill_buffer): Promote argument from rtx to rtx_insn
* recog.h (struct insn_gen_fn): Promote return types of function
pointers and operator ().from rtx to rtx_insn.
* reorg.c (fill_simple_delay_slots): Promote rtx_insn to rtx_jump_insn.
(fill_eager_delay_slots): Likewise.
(relax_delay_slots): Likewise.
(make_return_insns): Likewise.
(dbr_schedule): Likewise.
(optimize_skips): Likewise.
(reorg_redirect_jump): Likewise.
(fill_slots_from_thread): Likewise.
* reorg.h: Update prototypes.
* resource.c (find_dead_or_set_registers): Use dyn_cast to
rtx_jump_insn instead of check. Use it's jump_target method.
* rtl.h (rtx_jump_insn::jump_label): Define new method.
(rtx_jump_insn::jump_target): Define new method.
(rtx_jump_insn::set_jump_target): Define new method.
* rtlanal.c (tablejump_p): Promote type of one local variable.
* sched-deps.c (sched_analyze_2): Promote rtx to rtx_insn_list.
(sched_analyze_insn): Likewise.
* sched-vis.c (print_insn_with_notes): Promote rtx to rtx_insn.
(print_insn): Likewise.
* stmt.c (label_rtx): Promote return type to rtx_insn.
(force_label_rtx): Likewise.
(jump_target_rtx): Define new function.
(expand_label): Use it, get rid of one cast.
(expand_naked_return): Promote rtx to rtx_code_label.
(do_jump_if_equal): Fix do_compare_rtx_and_jump call.
(expand_case): Use rtx_code_label instread of rtx where feasible.
(expand_sjlj_dispatch_table): Likewise.
(emit_case_nodes): Likewise.
* stmt.h: Declare jump_target_rtx. Update prototypes. Fix comments.
* store-motion.c (insert_store): Make use of new return type of
gen_move_insn and remove a cast.
(replace_store_insn): Likewise.
From-SVN: r223454
|
|
With the vector facility support z13 mov patterns have more than 30
alternatives.
gcc/
* recog.h: Increase MAX_RECOG_ALTERNATIVES.
Change type of alternative_mask to uint64_t.
From-SVN: r223367
|
|
gcc/ChangeLog:
2015-05-08 Trevor Saunders <tbsaunde+gcc@tbsaunde.org>
* ira.c (decrease_live_ranges_number): Changetype of local
variable to rtx_insn *.
* recog.c: Change argument types to rtx_insn *.
* recog.h: Adjust.
From-SVN: r222952
|
|
gcc/ChangeLog:
2015-05-02 Trevor Saunders <tbsaunde+gcc@tbsaunde.org>
* recog.c (struct validate_replace_src_data): Change type of
insn field to rtx_insn *.
(validate_replace_src_group): Change type of argument to rtx_insn *.
* recog.h (validate_replace_src_group): Adjust.
From-SVN: r222738
|
|
gcc/ChangeLog:
2015-05-02 Trevor Saunders <tbsaunde+gcc@tbsaunde.org>
* genrecog.c (print_subroutine): Adjust.
* recog.c (get_bool_attr_mask_uncached): Likewise.
* recog.h (struct recog_data_d): Change the type of insn to
rtx_insn *.
From-SVN: r222733
|
|
gcc/ChangeLog:
2015-04-21 Trevor Saunders <tbsaunde+gcc@tbsaunde.org>
* conditions.h: Define macros even if HAVE_cc0 is undefined.
* emit-rtl.c: Define functions even if HAVE_cc0 is undefined.
* final.c: Likewise.
* jump.c: Likewise.
* recog.c: Likewise.
* recog.h: Declare functions even when HAVE_cc0 is undefined.
* sched-deps.c (sched_analyze_2): Always compile case for cc0.
From-SVN: r222294
|
|
From-SVN: r219188
|
|
gcc/ada/
* gcc-interface/decl.c, gcc-interface/gigi.h, gcc-interface/misc.c,
gcc-interface/trans.c, gcc-interface/utils.c, gcc-interface/utils2.c:
Remove redundant enum from machine_mode.
gcc/c-family/
* c-common.c, c-common.h, c-cppbuiltin.c, c-lex.c: Remove redundant
enum from machine_mode.
gcc/c/
* c-decl.c, c-tree.h, c-typeck.c: Remove redundant enum from
machine_mode.
gcc/cp/
* constexpr.c: Remove redundant enum from machine_mode.
gcc/fortran/
* trans-types.c, trans-types.h: Remove redundant enum from
machine_mode.
gcc/go/
* go-lang.c: Remove redundant enum from machine_mode.
gcc/java/
* builtins.c, java-tree.h, typeck.c: Remove redundant enum from
machine_mode.
gcc/lto/
* lto-lang.c: Remove redundant enum from machine_mode.
gcc/
* addresses.h, alias.c, asan.c, auto-inc-dec.c, bt-load.c, builtins.c,
builtins.h, caller-save.c, calls.c, calls.h, cfgexpand.c, cfgloop.h,
cfgrtl.c, combine.c, compare-elim.c, config/aarch64/aarch64-builtins.c,
config/aarch64/aarch64-protos.h, config/aarch64/aarch64-simd.md,
config/aarch64/aarch64.c, config/aarch64/aarch64.h,
config/aarch64/aarch64.md, config/alpha/alpha-protos.h,
config/alpha/alpha.c, config/arc/arc-protos.h, config/arc/arc.c,
config/arc/arc.h, config/arc/predicates.md,
config/arm/aarch-common-protos.h, config/arm/aarch-common.c,
config/arm/arm-protos.h, config/arm/arm.c, config/arm/arm.h,
config/arm/arm.md, config/arm/neon.md, config/arm/thumb2.md,
config/avr/avr-log.c, config/avr/avr-protos.h, config/avr/avr.c,
config/avr/avr.md, config/bfin/bfin-protos.h, config/bfin/bfin.c,
config/c6x/c6x-protos.h, config/c6x/c6x.c, config/c6x/c6x.md,
config/cr16/cr16-protos.h, config/cr16/cr16.c,
config/cris/cris-protos.h, config/cris/cris.c, config/cris/cris.md,
config/darwin-protos.h, config/darwin.c,
config/epiphany/epiphany-protos.h, config/epiphany/epiphany.c,
config/epiphany/epiphany.md, config/fr30/fr30.c,
config/frv/frv-protos.h, config/frv/frv.c, config/frv/predicates.md,
config/h8300/h8300-protos.h, config/h8300/h8300.c,
config/i386/i386-builtin-types.awk, config/i386/i386-protos.h,
config/i386/i386.c, config/i386/i386.md, config/i386/predicates.md,
config/i386/sse.md, config/i386/sync.md, config/ia64/ia64-protos.h,
config/ia64/ia64.c, config/iq2000/iq2000-protos.h,
config/iq2000/iq2000.c, config/iq2000/iq2000.md,
config/lm32/lm32-protos.h, config/lm32/lm32.c,
config/m32c/m32c-protos.h, config/m32c/m32c.c,
config/m32r/m32r-protos.h, config/m32r/m32r.c,
config/m68k/m68k-protos.h, config/m68k/m68k.c,
config/mcore/mcore-protos.h, config/mcore/mcore.c,
config/mcore/mcore.md, config/mep/mep-protos.h, config/mep/mep.c,
config/microblaze/microblaze-protos.h, config/microblaze/microblaze.c,
config/mips/mips-protos.h, config/mips/mips.c,
config/mmix/mmix-protos.h, config/mmix/mmix.c,
config/mn10300/mn10300-protos.h, config/mn10300/mn10300.c,
config/moxie/moxie.c, config/msp430/msp430-protos.h,
config/msp430/msp430.c, config/nds32/nds32-cost.c,
config/nds32/nds32-intrinsic.c, config/nds32/nds32-md-auxiliary.c,
config/nds32/nds32-protos.h, config/nds32/nds32.c,
config/nios2/nios2-protos.h, config/nios2/nios2.c,
config/pa/pa-protos.h, config/pa/pa.c, config/pdp11/pdp11-protos.h,
config/pdp11/pdp11.c, config/rl78/rl78-protos.h, config/rl78/rl78.c,
config/rs6000/altivec.md, config/rs6000/rs6000-c.c,
config/rs6000/rs6000-protos.h, config/rs6000/rs6000.c,
config/rs6000/rs6000.h, config/rx/rx-protos.h, config/rx/rx.c,
config/s390/predicates.md, config/s390/s390-protos.h,
config/s390/s390.c, config/s390/s390.h, config/s390/s390.md,
config/sh/predicates.md, config/sh/sh-protos.h, config/sh/sh.c,
config/sh/sh.md, config/sparc/predicates.md,
config/sparc/sparc-protos.h, config/sparc/sparc.c,
config/sparc/sparc.md, config/spu/spu-protos.h, config/spu/spu.c,
config/stormy16/stormy16-protos.h, config/stormy16/stormy16.c,
config/tilegx/tilegx-protos.h, config/tilegx/tilegx.c,
config/tilegx/tilegx.md, config/tilepro/tilepro-protos.h,
config/tilepro/tilepro.c, config/v850/v850-protos.h,
config/v850/v850.c, config/v850/v850.md, config/vax/vax-protos.h,
config/vax/vax.c, config/vms/vms-c.c, config/xtensa/xtensa-protos.h,
config/xtensa/xtensa.c, coverage.c, cprop.c, cse.c, cselib.c, cselib.h,
dbxout.c, ddg.c, df-problems.c, dfp.c, dfp.h, doc/md.texi,
doc/rtl.texi, doc/tm.texi, doc/tm.texi.in, dojump.c, dse.c,
dwarf2cfi.c, dwarf2out.c, dwarf2out.h, emit-rtl.c, emit-rtl.h,
except.c, explow.c, expmed.c, expmed.h, expr.c, expr.h, final.c,
fixed-value.c, fixed-value.h, fold-const.c, function.c, function.h,
fwprop.c, gcse.c, gengenrtl.c, genmodes.c, genopinit.c, genoutput.c,
genpreds.c, genrecog.c, gensupport.c, gimple-ssa-strength-reduction.c,
graphite-clast-to-gimple.c, haifa-sched.c, hooks.c, hooks.h, ifcvt.c,
internal-fn.c, ira-build.c, ira-color.c, ira-conflicts.c, ira-costs.c,
ira-emit.c, ira-int.h, ira-lives.c, ira.c, ira.h, jump.c, langhooks.h,
libfuncs.h, lists.c, loop-doloop.c, loop-invariant.c, loop-iv.c,
loop-unroll.c, lower-subreg.c, lower-subreg.h, lra-assigns.c,
lra-constraints.c, lra-eliminations.c, lra-int.h, lra-lives.c,
lra-spills.c, lra.c, lra.h, machmode.h, omp-low.c, optabs.c, optabs.h,
output.h, postreload.c, print-tree.c, read-rtl.c, real.c, real.h,
recog.c, recog.h, ree.c, reg-stack.c, regcprop.c, reginfo.c,
regrename.c, regs.h, reload.c, reload.h, reload1.c, rtl.c, rtl.h,
rtlanal.c, rtlhash.c, rtlhooks-def.h, rtlhooks.c, sched-deps.c,
sel-sched-dump.c, sel-sched-ir.c, sel-sched-ir.h, sel-sched.c,
simplify-rtx.c, stmt.c, stor-layout.c, stor-layout.h, target.def,
targhooks.c, targhooks.h, tree-affine.c, tree-call-cdce.c,
tree-complex.c, tree-data-ref.c, tree-dfa.c, tree-if-conv.c,
tree-inline.c, tree-outof-ssa.c, tree-scalar-evolution.c,
tree-ssa-address.c, tree-ssa-ccp.c, tree-ssa-loop-ivopts.c,
tree-ssa-loop-ivopts.h, tree-ssa-loop-manip.c,
tree-ssa-loop-prefetch.c, tree-ssa-math-opts.c, tree-ssa-reassoc.c,
tree-ssa-sccvn.c, tree-streamer-in.c, tree-switch-conversion.c,
tree-vect-data-refs.c, tree-vect-generic.c, tree-vect-loop.c,
tree-vect-patterns.c, tree-vect-slp.c, tree-vect-stmts.c,
tree-vrp.c, tree.c, tree.h, tsan.c, ubsan.c, valtrack.c,
var-tracking.c, varasm.c: Remove redundant enum from
machine_mode.
gcc/
* gengtype.c (main): Treat machine_mode as a scalar typedef.
* genmodes.c (emit_insn_modes_h): Hide inline functions if
USED_FOR_TARGET.
From-SVN: r216834
|
|
gcc/
* recog.h (recog_data_d): Remove enabled_alternatives.
* recog.c (extract_insn): Don't set it.
* reload.c (find_reloads): Call get_enabled_alternatives.
From-SVN: r216556
|
|
gcc/
* recog.h (constrain_operands): Add an alternative_mask parameter.
(constrain_operands_cached): Likewise.
(get_preferred_alternatives): Declare new form.
* recog.c (get_preferred_alternatives): New bb-taking instance.
(constrain_operands): Take the set of available alternatives as
a parameter.
(check_asm_operands, insn_invalid_p, extract_constrain_insn)
(extract_constrain_insn_cached): Update calls to constrain_operands.
* caller-save.c (reg_save_code): Likewise.
* ira.c (setup_prohibited_mode_move_regs): Likewise.
* postreload-gcse.c (eliminate_partially_redundant_load): Likewise.
* ree.c (combine_reaching_defs): Likewise.
* reload.c (can_reload_into): Likewise.
* reload1.c (reload, reload_as_needed, inc_for_reload): Likewise.
(gen_reload_chain_without_interm_reg_p, emit_input_reload_insns)
(emit_insn_if_valid_for_reload): Likewise.
* reorg.c (fill_slots_from_thread): Likewise.
* config/i386/i386.c (ix86_attr_length_address_default): Likewise.
* config/pa/pa.c (pa_can_combine_p): Likewise.
* config/rl78/rl78.c (insn_ok_now): Likewise.
* config/sh/sh.md (define_peephole2): Likewise.
* final.c (final_scan_insn): Update call to constrain_operands_cached.
From-SVN: r216555
|
|
gcc/
* doc/md.texi: Document "preferred_for_size" and "preferred_for_speed"
attributes.
* genattr.c (main): Handle "preferred_for_size" and
"preferred_for_speed" in the same way as "enabled".
* recog.h (bool_attr): New enum.
(target_recog): Replace x_enabled_alternatives with x_bool_attr_masks.
(get_preferred_alternatives, check_bool_attrs): Declare.
* recog.c (have_bool_attr, get_bool_attr, get_bool_attr_mask_uncached)
(get_bool_attr_mask, get_preferred_alternatives, check_bool_attrs):
New functions.
(get_enabled_alternatives): Use get_bool_attr_mask.
* ira-costs.c (record_reg_classes): Use get_preferred_alternatives
instead of recog_data.enabled_alternatives.
* ira.c (ira_setup_alts): Likewise.
* postreload.c (reload_cse_simplify_operands): Likewise.
* config/i386/i386.c (ix86_legitimate_combined_insn): Likewise.
* ira-lives.c (preferred_alternatives): New variable.
(process_bb_node_lives): Set it.
(check_and_make_def_conflict, make_early_clobber_and_input_conflicts)
(single_reg_class, ira_implicitly_set_insn_hard_regs): Use it instead
of recog_data.enabled_alternatives.
* lra-int.h (lra_insn_recog_data): Replace enabled_alternatives
to preferred_alternatives.
* lra-constraints.c (process_alt_operands): Update accordingly.
* lra.c (lra_set_insn_recog_data): Likewise.
(lra_update_insn_recog_data): Assert check_bool_attrs.
From-SVN: r216554
|
|
gcc/
* recog.h (extract_constrain_insn): Declare.
* recog.c (extract_constrain_insn): New function.
* lra.c (check_rtl): Use it.
* postreload.c (reload_cse_simplify_operands): Likewise.
* reg-stack.c (check_asm_stack_operands): Likewise.
(subst_asm_stack_regs): Likewise.
* regcprop.c (copyprop_hardreg_forward_1): Likewise.
* regrename.c (build_def_use): Likewise.
* sel-sched.c (get_reg_class): Likewise.
* config/arm/arm.c (note_invalid_constants): Likewise.
* config/s390/predicates.md (execute_operation): Likewise.
From-SVN: r216553
|
|
gcc/ChangeLog:
* config/arc/arc-protos.h (arc_attr_type): Strengthen param from
rtx to rtx_insn *.
(arc_sets_cc_p): Likewise.
* config/arc/arc.c (arc_print_operand): Use methods of
"final_sequence" for clarity, and to enable strengthening of
locals "jump" and "delay" from rtx to rtx_insn *.
(arc_adjust_insn_length): Strengthen local "prev" from rtx to
rtx_insn *; use method of rtx_sequence for typesafety.
(arc_get_insn_variants): Use insn method of rtx_sequence for
typesafety.
(arc_pad_return): Likewise.
(arc_attr_type): Strengthen param from rtx to rtx_insn *.
(arc_sets_cc_p): Likewise. Also, convert a GET_CODE check to a
dyn_cast to rtx_sequence *, using insn method for typesafety.
* config/arc/arc.h (ADJUST_INSN_LENGTH): Add checked casts to
rtx_sequence * and use insn method when invoking get_attr_length.
* config/bfin/bfin.c (type_for_anomaly): Strengthen param from rtx
to rtx_insn *. Replace a GET_CODE check with a dyn_cast to
rtx_sequence *, introducing a local "seq", using its insn method
from typesafety and clarity.
(add_sched_insns_for_speculation): Strengthen local "next" from
rtx to rtx_insn *.
* config/c6x/c6x.c (get_insn_side): Likewise for param "insn".
(predicate_insn): Likewise.
* config/cris/cris-protos.h (cris_notice_update_cc): Likewise for
second param.
* config/cris/cris.c (cris_notice_update_cc): Likewise.
* config/epiphany/epiphany-protos.h
(extern void epiphany_insert_mode_switch_use): Likewise for param
"insn".
(get_attr_sched_use_fpu): Likewise for param.
* config/epiphany/epiphany.c (epiphany_insert_mode_switch_use):
Likewise for param "insn".
* config/epiphany/mode-switch-use.c (insert_uses): Likewise for
param "insn" of "target_insert_mode_switch_use" callback.
* config/frv/frv.c (frv_insn_unit): Likewise for param "insn".
(frv_issues_to_branch_unit_p): Likewise.
(frv_pack_insn_p): Likewise.
(frv_compare_insns): Strengthen locals "insn1" and "insn2" from
const rtx * (i.e. mutable rtx_def * const *) to
rtx_insn * const *.
* config/i386/i386-protos.h (standard_sse_constant_opcode):
Strengthen first param from rtx to rtx_insn *.
(output_fix_trunc): Likewise.
* config/i386/i386.c (standard_sse_constant_opcode): Likewise.
(output_fix_trunc): Likewise.
(core2i7_first_cycle_multipass_filter_ready_try): Likewise for
local "insn".
(min_insn_size): Likewise for param "insn".
(get_mem_group): Likewise.
(is_cmp): Likewise.
(get_insn_path): Likewise.
(get_insn_group): Likewise.
(count_num_restricted): Likewise.
(fits_dispatch_window): Likewise.
(add_insn_window): Likewise.
(add_to_dispatch_window): Likewise.
(debug_insn_dispatch_info_file): Likewise.
* config/m32c/m32c-protos.h (m32c_output_compare): Likewise for
first param.
* config/m32c/m32c.c (m32c_compare_redundant): Likewise for param
"cmp" and local "prev".
(m32c_output_compare): Likewise for param "insn".
* config/m32r/predicates.md (define_predicate "small_insn_p"): Add
a checked cast to rtx_insn * on "op" after we know it's an INSN_P.
(define_predicate "large_insn_p"): Likewise.
* config/m68k/m68k-protos.h (m68k_sched_attr_size): Strengthen
param from rtx to rtx_insn *.
(attr_op_mem m68k_sched_attr_op_mem): Likewise.
* config/m68k/m68k.c (sched_get_attr_size_int): Likewise.
(m68k_sched_attr_size): Likewise.
(sched_get_opxy_mem_type): Likewise for param "insn".
(m68k_sched_attr_op_mem): Likewise.
(sched_mem_operand_p): Likewise.
* config/mep/mep-protos.h (mep_multi_slot): Likewise for param.
* config/mep/mep.c (mep_multi_slot): Likewise.
* config/mips/mips-protos.h (mips_output_sync_loop): Likewise for
first param.
(mips_sync_loop_insns): Likewise.
* config/mips/mips.c (mips_print_operand_punctuation): Use insn
method of "final_sequence" for typesafety.
(mips_process_sync_loop): Strengthen param "insn" from rtx to
rtx_insn *.
(mips_output_sync_loop): Likewise.
(mips_sync_loop_insns): Likewise.
(mips_74k_agen_init): Likewise.
(mips_sched_init): Use NULL rather than NULL_RTX when working with
insns.
* config/nds32/nds32-fp-as-gp.c (nds32_symbol_load_store_p):
Strengthen param "insn" from rtx to rtx_insn *.
* config/nds32/nds32.c (nds32_target_alignment): Likewise for
local "insn".
* config/pa/pa-protos.h (pa_insn_refs_are_delayed): Likewise for
param.
* config/pa/pa.c (pa_output_function_epilogue): Likewise for local
"insn". Use method of rtx_sequence for typesafety.
(branch_to_delay_slot_p): Strengthen param "insn" from rtx to
rtx_insn *.
(branch_needs_nop_p): Likewise.
(use_skip_p): Likewise.
(pa_insn_refs_are_delayed): Likewise.
* config/rl78/rl78.c (rl78_propogate_register_origins): Likewise
for locals "insn", "ninsn".
* config/rs6000/rs6000.c (is_microcoded_insn): Likewise for param
"insn".
(is_cracked_insn): Likewise.
(is_branch_slot_insn): Likewise.
(is_nonpipeline_insn): Likewise.
(insn_terminates_group_p): Likewise.
(insn_must_be_first_in_group): Likewise.
(insn_must_be_last_in_group): Likewise.
(force_new_group): Likewise for param "next_insn".
* config/s390/s390.c (s390_get_sched_attrmask): Likewise for param
"insn".
(s390_sched_score): Likewise.
* config/sh/sh-protos.h (output_branch): Likewise for param 2.
(rtx sfunc_uses_reg): Likewise for sole param.
* config/sh/sh.c (sh_print_operand): Use insn method of
final_sequence for typesafety.
(output_branch): Strengthen param "insn" from rtx to rtx_insn *.
Use insn method of final_sequence for typesafety.
(sfunc_uses_reg): Strengthen param "insn" from rtx to rtx_insn *.
* config/sparc/sparc-protos.h (eligible_for_call_delay): Likewise
for param.
(eligible_for_return_delay): Likewise.
(eligible_for_sibcall_delay): Likewise.
* config/sparc/sparc.c (eligible_for_call_delay): Likewise.
(eligible_for_return_delay): Likewise.
(eligible_for_sibcall_delay): Likewise.
* config/stormy16/stormy16-protos.h
(xstormy16_output_cbranch_hi): Likewise for final param.
(xstormy16_output_cbranch_si): Likewise.
* config/stormy16/stormy16.c (xstormy16_output_cbranch_hi): LIkewise.
(xstormy16_output_cbranch_si): Likewise.
* config/v850/v850-protos.h (notice_update_cc): Likewise.
* config/v850/v850.c (notice_update_cc): Likewise.
* final.c (get_attr_length_1): Strengthen param "insn" and param
of "fallback_fn" from rtx to rtx_insn *, eliminating a checked cast.
(get_attr_length): Strengthen param "insn" from rtx to rtx_insn *.
(get_attr_min_length): Likewise.
(shorten_branches): Likewise for signature of locals "length_fun"
and "inner_length_fun". Introduce local rtx_sequence * "seqn"
from a checked cast and use its methods for clarity and to enable
strengthening local "inner_insn" from rtx to rtx_insn *.
* genattr.c (gen_attr): When writing out the prototypes of the
various generated "get_attr_" functions, strengthen the params of
the non-const functions from rtx to rtx_insn *.
Similarly, strengthen the params of insn_default_length,
insn_min_length, insn_variable_length_p, insn_current_length.
(main): Similarly, strengthen the param of num_delay_slots,
internal_dfa_insn_code, insn_default_latency, bypass_p,
insn_latency, min_issue_delay, print_reservation,
insn_has_dfa_reservation_p and of the "internal_dfa_insn_code" and
"insn_default_latency" callbacks. Rename hook_int_rtx_unreachable
to hook_int_rtx_insn_unreachable.
* genattrtab.c (write_attr_get): When writing out the generated
"get_attr_" functions, strengthen the param "insn" from rtx to
rtx_insn *, eliminating a checked cast.
(make_automaton_attrs): When writing out prototypes of
"internal_dfa_insn_code_", "insn_default_latency_" functions
and the "internal_dfa_insn_code" and "insn_default_latency"
callbacks, strengthen their params from rtx to rtx_insn *
* genautomata.c (output_internal_insn_code_evaluation): When
writing out code, add a checked cast from rtx to rtx_insn * when
invoking DFA_INSN_CODE_FUNC_NAME aka dfa_insn_code.
(output_dfa_insn_code_func): Strengthen param of generated
function "dfa_insn_code_enlarge" from rtx to rtx_insn *.
(output_trans_func): Likewise for generated function
"state_transition".
(output_internal_insn_latency_func): When writing out generated
function "internal_insn_latency", rename params from "insn" and
"insn2" to "insn_or_const0" and "insn2_or_const0". Reintroduce
locals "insn" and "insn2" as rtx_insn * with checked casts once
we've proven that we're not dealing with const0_rtx.
(output_insn_latency_func): Strengthen param of generated
function "insn_latency" from rtx to rtx_insn *.
(output_print_reservation_func): Likewise for generated function
"print_reservation".
(output_insn_has_dfa_reservation_p): Likewise for generated
function "insn_has_dfa_reservation_p".
* hooks.c (hook_int_rtx_unreachable): Rename to...
(hook_int_rtx_insn_unreachable): ...this, and strengthen param
from rtx to rtx_insn *.
* hooks.h (hook_int_rtx_unreachable): Likewise.
(extern int hook_int_rtx_insn_unreachable): Likewise.
* output.h (get_attr_length): Strengthen param from rtx to rtx_insn *.
(get_attr_min_length): Likewise.
* recog.c (get_enabled_alternatives): Likewise.
* recog.h (alternative_mask get_enabled_alternatives): Likewise.
* reorg.c (find_end_label): Introduce local rtx "pat" and
strengthen local "insn" from rtx to rtx_insn *.
(redundant_insn): Use insn method of "seq" rather than element for
typesafety; strengthen local "control" from rtx to rtx_insn *.
* resource.c (mark_referenced_resources): Add checked cast to
rtx_insn * within INSN/JUMP_INSN case.
(mark_set_resources): Likewise.
* sel-sched.c (estimate_insn_cost): Strengthen param "insn" from
rtx to rtx_insn *.
From-SVN: r215271
|
|
gcc/ChangeLog:
2014-09-10 David Malcolm <dmalcolm@redhat.com>
* genextract.c (print_header): When writing out insn_extract to
insn-extract.c, strengthen the param "insn" from rtx to rtx_insn *.
* recog.h (insn_extract): Strengthen the param from rtx to
rtx_insn *.
From-SVN: r215132
|
|
gcc/ChangeLog:
2014-09-09 David Malcolm <dmalcolm@redhat.com>
* rtl.h (single_set_2): Strengthen first param from const_rtx to
const rtx_insn *, and move prototype to above...
(single_set): ...this. Convert this from a macro to an inline
function, enforcing the requirement that the param is a const
rtx_insn *.
(find_args_size_adjust): Strengthen param from rtx to rtx_insn *.
* config/arm/aarch-common-protos.h (aarch_crypto_can_dual_issue):
Strengthen both params from rtx to rtx_insn *.
* config/arm/aarch-common.c (aarch_crypto_can_dual_issue):
Likewise; introduce locals "producer_set", "consumer_set", using
them in place of "producer" and "consumer" when dealing with SET
rather than insn.
* config/avr/avr.c (avr_out_plus): Add checked cast to rtx_insn *
when invoking single_set in region guarded by INSN_P.
(avr_out_bitop): Likewise.
(_reg_unused_after): Introduce local rtx_sequence * "seq" in
region guarded by GET_CODE check, using methods to strengthen
local "this_insn" from rtx to rtx_insn *, and for clarity.
* config/avr/avr.md (define_insn_and_split "xload8<mode>_A"):
Strengthen local "insn" from rtx to rtx_insn *.
(define_insn_and_split "xload<mode>_A"): Likewise.
* config/bfin/bfin.c (trapping_loads_p): Likewise for param
"insn".
(find_load): Likewise for return type.
(workaround_speculation): Likewise for both locals named
"load_insn".
* config/cris/cris.c (cris_cc0_user_requires_cmp): Likewise for
local "cc0_user".
* config/cris/cris.md (define_peephole2 ; moversideqi): Likewise
for local "prev".
* config/h8300/h8300-protos.h (notice_update_cc): Likewise for
param 2.
* config/h8300/h8300.c (notice_update_cc): Likewise.
* config/i386/i386.c (ix86_flags_dependent): Likewise for params
"insn" and "dep_insn".
(exact_store_load_dependency): Likewise for both params.
(ix86_macro_fusion_pair_p): Eliminate local named "single_set"
since this now clashes with inline function. Instead, delay
calling single_set until the point where its needed, and then
assign the result to "compare_set" and rework the conditional that
follows.
* config/ia64/ia64.md (define_expand "tablejump"): Strengthen
local "last" from rtx to rtx_insn *.
* config/mips/mips-protos.h (mips_load_store_insns): Likewise for
second param.
(mips_store_data_bypass_p): Likewise for both params.
* config/mips/mips.c (mips_load_store_insns): Likewise for second
param.
(mips_store_data_bypass_p): Likewise for both params.
(mips_orphaned_high_part_p): Likewise for param "insn".
* config/mn10300/mn10300.c (extract_bundle): Likewise.
(mn10300_bundle_liw): Likewise for locals "r", "insn1", "insn2".
Introduce local rtx "insn2_pat".
* config/rl78/rl78.c (move_elim_pass): Likewise for locals "insn",
"ninsn".
(rl78_remove_unused_sets): Likewise for locals "insn", "ninsn".
Introduce local rtx "set", using it in place of "insn" for the
result of single_set. This appears to fix a bug, since the call
to find_regno_note on a SET does nothing.
* config/rs6000/rs6000.c (set_to_load_agen): Strengthen both
params from rtx to rtx_insn *.
(set_to_load_agen): Likewise.
* config/s390/s390.c (s390_label_align): Likewise for local
"prev_insn". Introduce new rtx locals "set" and "src", using
them in place of "prev_insn" for the results of single_set
and SET_SRC respectively.
(s390_swap_cmp): Strengthen local "jump" from rtx to rtx_insn *.
Introduce new rtx local "set" using in place of "jump" for the
result of single_set. Use SET_SRC (set) rather than plain
XEXP (set, 1).
* config/sh/sh.c (noncall_uses_reg): Strengthen param 2from
rtx to rtx_insn *.
(noncall_uses_reg): Likewise.
(reg_unused_after): Introduce local rtx_sequence * "seq" in region
guarded by GET_CODE check, using its methods for clarity, and to
enable strengthening local "this_insn" from rtx to rtx_insn *.
* config/sh/sh.md (define_expand "mulhisi3"): Strengthen local
"insn" from rtx to rtx_insn *.
(define_expand "umulhisi3"): Likewise.
(define_expand "smulsi3_highpart"): Likewise.
(define_expand "umulsi3_highpart"): Likewise.
* config/sparc/sparc.c (sparc_do_work_around_errata): Likewise for
local "after". Replace GET_CODE check with a dyn_cast,
introducing new local rtx_sequence * "seq", using insn method for
typesafety.
* dwarf2cfi.c (dwarf2out_frame_debug): Strengthen param "insn"
from rtx to rtx_insn *. Introduce local rtx "pat", using it in
place of "insn" once we're dealing with patterns rather than the
input insn.
(scan_insn_after): Strengthen param "insn" from rtx to rtx_insn *.
(scan_trace): Likewise for local "elt", updating lookups within
sequence to use insn method rather than element method.
* expr.c (find_args_size_adjust): Strengthen param "insn" from rtx
to rtx_insn *.
* gcse.c (gcse_emit_move_after): Likewise for local "new_rtx".
* ifcvt.c (noce_try_abs): Likewise for local "insn".
* ira.c (fix_reg_equiv_init): Add checked cast to rtx_insn * when
invoking single_set.
* lra-constraints.c (insn_rhs_dead_pseudo_p): Strengthen param
"insn" from rtx to rtx_insn *.
(skip_usage_debug_insns): Likewise for return type, adding a
checked cast.
(check_secondary_memory_needed_p): Likewise for local "insn".
(inherit_reload_reg): Likewise.
* modulo-sched.c (sms_schedule): Likewise for local "count_init".
* recog.c (peep2_attempt): Likewise for local "old_insn", adding
checked casts.
(store_data_bypass_p): Likewise for both params.
(if_test_bypass_p): Likewise.
* recog.h (store_data_bypass_p): Likewise for both params.
(if_test_bypass_p): Likewise.
* reload.c (find_equiv_reg): Likewise for local "where".
* reorg.c (delete_jump): Likewise for param "insn".
* rtlanal.c (single_set_2): Strenghen param "insn" from const_rtx
to const rtx_insn *.
* store-motion.c (replace_store_insn): Likewise for param "del".
(delete_store): Strengthen local "i" from rtx to rtx_insn_list *,
and use its methods for clarity, and to strengthen local "del"
from rtx to rtx_insn *.
(build_store_vectors): Use insn method of "st" when calling
replace_store_insn for typesafety and clarity.
From-SVN: r215089
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gcc/ChangeLog:
2014-09-09 David Malcolm <dmalcolm@redhat.com>
* caller-save.c (rtx saveinsn): Strengthen this variable from rtx
to rtx_insn *.
(restinsn): Likewise.
* config/aarch64/aarch64-protos.h (aarch64_simd_attr_length_move):
Likewise for param.
* config/aarch64/aarch64.c (aarch64_simd_attr_length_move):
Likewise.
* config/arc/arc-protos.h (arc_adjust_insn_length): Likewise for
first param.
(arc_hazard): Likewise for both params.
* config/arc/arc.c (arc600_corereg_hazard): Likewise, adding
checked casts to rtx_sequence * and uses of the insn method for
type-safety.
(arc_hazard): Strengthen both params from rtx to rtx_insn *.
(arc_adjust_insn_length): Likewise for param "insn".
(struct insn_length_parameters_s): Likewise for first param of
"get_variants" callback field.
(arc_get_insn_variants): Likewise for first param and local
"inner". Replace a check of GET_CODE with a dyn_cast to
rtx_sequence *, using methods for type-safety and clarity.
* config/arc/arc.h (ADJUST_INSN_LENGTH): Use casts to
rtx_sequence * and uses of the insn method for type-safety when
invoking arc_adjust_insn_length.
* config/arm/arm-protos.h (arm_attr_length_move_neon): Likewise
for param.
(arm_address_offset_is_imm): Likewise.
(struct tune_params): Likewise for params 1 and 3 of the
"sched_adjust_cost" callback field.
* config/arm/arm.c (cortex_a9_sched_adjust_cost): Likewise for
params 1 and 3 ("insn" and "dep").
(xscale_sched_adjust_cost): Likewise.
(fa726te_sched_adjust_cost): Likewise.
(cortexa7_older_only): Likewise for param "insn".
(cortexa7_younger): Likewise.
(arm_attr_length_move_neon): Likewise.
(arm_address_offset_is_imm): Likewise.
* config/avr/avr-protos.h (avr_notice_update_cc): Likewise.
* config/avr/avr.c (avr_notice_update_cc): Likewise.
* config/bfin/bfin.c (hwloop_pattern_reg): Likewise.
(workaround_speculation): Likewise for local "last_condjump".
* config/c6x/c6x.c (shadow_p): Likewise for param "insn".
(shadow_or_blockage_p): Likewise.
(get_unit_reqs): Likewise.
(get_unit_operand_masks): Likewise.
(c6x_registers_update): Likewise.
(returning_call_p): Likewise.
(can_use_callp): Likewise.
(convert_to_callp): Likewise.
(find_last_same_clock): Likwise for local "t".
(reorg_split_calls): Likewise for local "shadow".
(hwloop_pattern_reg): Likewise for param "insn".
* config/frv/frv-protos.h (frv_final_prescan_insn): Likewise.
* config/frv/frv.c (frv_final_prescan_insn): Likewise.
(frv_extract_membar): Likewise.
(frv_optimize_membar_local): Strengthen param "last_membar" from
rtx * to rtx_insn **.
(frv_optimize_membar_global): Strengthen param "membar" from rtx
to rtx_insn *.
(frv_optimize_membar): Strengthen local "last_membar" from rtx *
to rtx_insn **.
* config/ia64/ia64-protos.h (ia64_st_address_bypass_p): Strengthen
both params from rtx to rtx_insn *.
(ia64_ld_address_bypass_p): Likewise.
* config/ia64/ia64.c (ia64_safe_itanium_class): Likewise for param
"insn".
(ia64_safe_type): Likewise.
(group_barrier_needed): Likewise.
(safe_group_barrier_needed): Likewise.
(ia64_single_set): Likewise.
(is_load_p): Likewise.
(record_memory_reference): Likewise.
(get_mode_no_for_insn): Likewise.
(important_for_bundling_p): Likewise.
(unknown_for_bundling_p): Likewise.
(ia64_st_address_bypass_p): Likewise for both params.
(ia64_ld_address_bypass_p): Likewise.
(expand_vselect): Introduce new local rtx_insn * "insn", using it
in place of rtx "x" after the emit_insn call.
* config/i386/i386-protos.h (x86_extended_QIreg_mentioned_p):
Strengthen param from rtx to rtx_insn *.
(ix86_agi_dependent): Likewise for both params.
(ix86_attr_length_immediate_default): Likewise for param 1.
(ix86_attr_length_address_default): Likewise for param.
(ix86_attr_length_vex_default): Likewise for param 1.
* config/i386/i386.c (ix86_attr_length_immediate_default):
Likewise for param "insn".
(ix86_attr_length_address_default): Likewise.
(ix86_attr_length_vex_default): Likewise.
(ix86_agi_dependent): Likewise for both params.
(x86_extended_QIreg_mentioned_p): Likewise for param "insn".
(vselect_insn): Likewise for this variable.
* config/m68k/m68k-protos.h (m68k_sched_attr_opx_type): Likewise
for param 1.
(m68k_sched_attr_opy_type): Likewise.
* config/m68k/m68k.c (sched_get_operand): Likewise.
(sched_attr_op_type): Likewise.
(m68k_sched_attr_opx_type): Likewise.
(m68k_sched_attr_opy_type): Likewise.
(sched_get_reg_operand): Likewise.
(sched_get_mem_operand): Likewise.
(m68k_sched_address_bypass_p): Likewise for both params.
(sched_get_indexed_address_scale): Likewise.
(m68k_sched_indexed_address_bypass_p): Likewise.
* config/m68k/m68k.h (m68k_sched_address_bypass_p): Likewise.
(m68k_sched_indexed_address_bypass_p): Likewise.
* config/mep/mep.c (mep_jmp_return_reorg): Strengthen locals
"label", "ret" from rtx to rtx_insn *, adding a checked cast and
removing another.
* config/mips/mips-protos.h (mips_linked_madd_p): Strengthen both
params from rtx to rtx_insn *.
(mips_fmadd_bypass): Likewise.
* config/mips/mips.c (mips_fmadd_bypass): Likewise.
(mips_linked_madd_p): Likewise.
(mips_macc_chains_last_hilo): Likewise for this variable.
(mips_macc_chains_record): Likewise for param.
(vr4130_last_insn): Likewise for this variable.
(vr4130_swap_insns_p): Likewise for both params.
(mips_ls2_variable_issue): Likewise for param.
(mips_need_noat_wrapper_p): Likewise for param "insn".
(mips_expand_vselect): Add a new local rtx_insn * "insn", using it
in place of "x" after the emit_insn.
* config/pa/pa-protos.h (pa_fpstore_bypass_p): Strengthen both
params from rtx to rtx_insn *.
* config/pa/pa.c (pa_fpstore_bypass_p): Likewise.
(pa_combine_instructions): Introduce local "par" for result of
gen_rtx_PARALLEL, moving decl and usage of new_rtx for after call
to make_insn_raw.
(pa_can_combine_p): Strengthen param "new_rtx" from rtx to rtx_insn *.
* config/rl78/rl78.c (insn_ok_now): Likewise for param "insn".
(rl78_alloc_physical_registers_op1): Likewise.
(rl78_alloc_physical_registers_op2): Likewise.
(rl78_alloc_physical_registers_ro1): Likewise.
(rl78_alloc_physical_registers_cmp): Likewise.
(rl78_alloc_physical_registers_umul): Likewise.
(rl78_alloc_address_registers_macax): Likewise.
(rl78_alloc_physical_registers): Likewise for locals "insn", "curr".
* config/s390/predicates.md (execute_operation): Likewise for
local "insn".
* config/s390/s390-protos.h (s390_agen_dep_p): Likewise for both
params.
* config/s390/s390.c (s390_safe_attr_type): Likewise for param.
(addr_generation_dependency_p): Likewise for param "insn".
(s390_agen_dep_p): Likewise for both params.
(s390_fpload_toreg): Likewise for param "insn".
* config/sh/sh-protos.h (sh_loop_align): Likewise for param.
* config/sh/sh.c (sh_loop_align): Likewise for param and local
"next".
* config/sh/sh.md (define_peephole2): Likewise for local "insn2".
* config/sh/sh_treg_combine.cc
(sh_treg_combine::make_inv_ccreg_insn): Likewise for return type
and local "i".
(sh_treg_combine::try_eliminate_cstores): Likewise for local "i".
* config/stormy16/stormy16.c (combine_bnp): Likewise for locals
"and_insn", "load", "shift".
* config/tilegx/tilegx.c (match_pcrel_step2): Likewise for param
"insn".
* final.c (final_scan_insn): Introduce local rtx_insn * "other"
for XEXP (note, 0) of the REG_CC_SETTER note.
(cleanup_subreg_operands): Strengthen param "insn" from rtx to
rtx_insn *, eliminating a checked cast made redundant by this.
* gcse.c (process_insert_insn): Strengthen local "insn" from rtx
to rtx_insn *.
* genattr.c (main): When writing out the prototype to
const_num_delay_slots, strengthen the param from rtx to
rtx_insn *.
* genattrtab.c (write_const_num_delay_slots): Likewise when
writing out the implementation of const_num_delay_slots.
* hw-doloop.h (struct hw_doloop_hooks): Strengthen the param
"insn" of callback field "end_pattern_reg" from rtx to rtx_insn *.
* ifcvt.c (noce_emit_store_flag): Eliminate local rtx "tmp" in
favor of new rtx locals "src" and "set" and new local rtx_insn *
"insn" and "seq".
(noce_emit_move_insn): Strengthen locals "seq" and "insn" from rtx
to rtx_insn *.
(noce_emit_cmove): Eliminate local rtx "tmp" in favor of new rtx
locals "cond", "if_then_else", "set" and new rtx_insn * locals
"insn" and "seq".
(noce_try_cmove_arith): Strengthen locals "insn_a" and "insn_b",
"last" from rtx to rtx_insn *. Likewise for a local "tmp",
renaming to "tmp_insn". Eliminate the other local rtx "tmp" from
the top-level scope, replacing with new more tightly-scoped rtx
locals "reg", "pat", "mem" and rtx_insn * "insn", "copy_of_a",
"new_insn", "copy_of_insn_b", and make local rtx "set" more
tightly-scoped.
* ira-int.h (ira_setup_alts): Strengthen param "insn" from rtx to
rtx_insn *.
* ira.c (setup_prohibited_mode_move_regs): Likewise for local
"move_insn".
(ira_setup_alts): Likewise for param "insn".
* lra-constraints.c (emit_inc): Likewise for local "add_insn".
* lra.c (emit_add3_insn): Split local rtx "insn" in two, an rtx
and an rtx_insn *.
(lra_emit_add): Eliminate top-level local rtx "insn" in favor of
new more-tightly scoped rtx locals "add3_insn", "insn",
"add2_insn" and rtx_insn * "move_insn".
* postreload-gcse.c (eliminate_partially_redundant_load): Add
checked cast on result of gen_move_insn when invoking
extract_insn.
* recog.c (insn_invalid_p): Strengthen param "insn" from rtx to
rtx_insn *.
(verify_changes): Add a checked cast on "object" when invoking
insn_invalid_p.
(extract_insn_cached): Strengthen param "insn" from rtx to
rtx_insn *.
(extract_constrain_insn_cached): Likewise.
(extract_insn): Likewise.
* recog.h (insn_invalid_p): Likewise for param 1.
(recog_memoized): Likewise for param.
(extract_insn): Likewise.
(extract_constrain_insn_cached): Likewise.
(extract_insn_cached): Likewise.
* reload.c (can_reload_into): Likewise for local "test_insn".
* reload.h (cleanup_subreg_operands): Likewise for param.
* reload1.c (emit_insn_if_valid_for_reload): Rename param from
"insn" to "pat", reintroducing "insn" as an rtx_insn * on the
result of emit_insn. Remove a checked cast made redundant by this
change.
* sel-sched-ir.c (sel_insn_rtx_cost): Strengthen param "insn" from
rtx to rtx_insn *.
* sel-sched.c (get_reg_class): Likewise.
From-SVN: r215087
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2014-08-21 David Malcolm <dmalcolm@redhat.com>
* recog.h (insn_output_fn): Update this function typedef to match
the changes below to the generated output functions, strengthening
the 2nd param from rtx to rtx_insn *.
* final.c (get_insn_template): Add a checked cast to rtx_insn * on
insn when invoking an output function, to match the new signature
of insn_output_fn with a stronger second param.
* genconditions.c (write_header): In the generated code for
gencondmd.c, strengthen the global "insn" from rtx to rtx_insn *
to match the other changes in this patch.
* genemit.c (gen_split): Strengthen the 1st param "curr_insn" of
the generated "gen_" functions from rtx to rtx_insn * within their
implementations.
* genrecog.c (write_subroutine): Strengthen the 2nd param "insn" of
the subfunctions within the generated "recog_", "split", "peephole2"
function trees from rtx to rtx_insn *. For now, the top-level
generated functions ("recog", "split", "peephole2") continue to
take a plain rtx for "insn", to avoid introducing dependencies on
other patches. Rename this 2nd param from "insn" to
"uncast_insn", and reintroduce "insn" as a local variable of type
rtx_insn *, initialized at the top of the generated function with
a checked cast on "uncast_insn".
(make_insn_sequence): Strengthen the 1st param "curr_insn" of
the generated "gen_" functions from rtx to rtx_insn * within their
prototypes.
* genoutput.c (process_template): Strengthen the 2nd param within
the generated "output_" functions "insn" from rtx to rtx_insn *.
From-SVN: r214257
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incmem_ok.
gcc/
* recog.h (operand_alternative): Remove offmem_ok, nonffmem_ok,
decmem_ok and incmem_ok. Reformat other bitfields for consistency.
* recog.c (preprocess_constraints): Update accordingly.
From-SVN: r211472
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matches into bitfields.
gcc/
* recog.h (operand_alternative): Convert reg_class, reject,
matched and matches into bitfields.
(preprocess_constraints): New overload.
(preprocess_insn_constraints): New function.
(preprocess_constraints): Take the insn as parameter.
(recog_op_alt): Change into a pointer.
(target_recog): Add x_op_alt.
* recog.c (asm_op_alt): New variable.
(recog_op_alt): Change into a pointer.
(preprocess_constraints): New overload, replacing the old function
definition with one that doesn't use global state.
(preprocess_insn_constraints): New function.
(preprocess_constraints): Use them. Take the insn as parameter.
Use asm_op_alt for asms.
(recog_init): Free existing x_op_alt entries.
* ira-lives.c (check_and_make_def_conflict): Make operand_alternative
pointer const.
(make_early_clobber_and_input_conflicts): Likewise.
(process_bb_node_lives): Pass the insn to process_constraints.
* reg-stack.c (check_asm_stack_operands): Likewise.
(subst_asm_stack_regs): Likewise.
* regcprop.c (copyprop_hardreg_forward_1): Likewise.
* regrename.c (build_def_use): Likewise.
* sched-deps.c (sched_analyze_insn): Likewise.
* sel-sched.c (get_reg_class, implicit_clobber_conflict_p): Likewise.
* config/arm/arm.c (xscale_sched_adjust_cost): Likewise.
(note_invalid_constants): Likewise.
* config/i386/i386.c (ix86_legitimate_combined_insn): Likewise.
(ix86_legitimate_combined_insn): Make operand_alternative pointer
const.
From-SVN: r211240
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gcc/
* recog.h (alternative_class): New function.
(which_op_alt): Return a const recog_op_alt.
* reg-stack.c (check_asm_stack_operands): Update type accordingly.
(subst_asm_stack_regs): Likewise.
* config/arm/arm.c (note_invalid_constants): Likewise.
* regcprop.c (copyprop_hardreg_forward_1): Likewise. Don't modify
the operand_alternative; use alternative class instead.
* sel-sched.c (get_reg_class): Likewise.
* regrename.c (build_def_use): Likewise.
(hide_operands, restore_operands, record_out_operands): Update type
accordingly.
From-SVN: r211238
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|
gcc/
* recog.h (recog_op_alt): Convert to a flat array.
(which_op_alt): New function.
* recog.c (recog_op_alt): Convert to a flat array.
(preprocess_constraints): Update accordingly, grouping all
operands of the same alternative together, rather than the
other way around.
* ira-lives.c (check_and_make_def_conflict): Likewise.
(make_early_clobber_and_input_conflicts): Likewise.
* config/i386/i386.c (ix86_legitimate_combined_insn): Likewise.
* reg-stack.c (check_asm_stack_operands): Use which_op_alt.
(subst_asm_stack_regs): Likewise.
* regcprop.c (copyprop_hardreg_forward_1): Likewise.
* regrename.c (hide_operands, record_out_operands): Likewise.
(build_def_use): Likewise.
* sel-sched.c (get_reg_class): Likewise.
* config/arm/arm.c (note_invalid_constants): Likewise.
From-SVN: r211237
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|
gcc/
* system.h (TEST_BIT): New macro.
* recog.h (alternative_mask): New type.
(ALL_ALTERNATIVES, ALTERNATIVE_BIT): New macros.
(recog_data_d): Replace alternative_enabled_p array with
enabled_alternatives.
(target_recog): New structure.
(default_target_recog, this_target_recog): Declare.
(get_enabled_alternatives, recog_init): Likewise.
* recog.c (default_target_recog, this_target_recog): New variables.
(get_enabled_alternatives): New function.
(extract_insn): Use it.
(recog_init): New function.
(preprocess_constraints, constrain_operands): Adjust for change to
recog_data.
* postreload.c (reload_cse_simplify_operands): Likewise.
* reload.c (find_reloads): Likewise.
* ira-costs.c (record_reg_classes): Likewise.
* ira-lives.c (single_reg_class): Likewise. Fix bug in which
all alternatives after a disabled one would be skipped.
(ira_implicitly_set_insn_hard_regs): Likewise.
* ira.c (ira_setup_alts): Adjust for change to recog_data.
* lra-int.h (lra_insn_recog_data): Replace alternative_enabled_p
with enabled_alternatives.
* lra.c (free_insn_recog_data): Update accordingly.
(lra_update_insn_recog_data): Likewise.
(lra_set_insn_recog_data): Likewise. Use get_enabled_alternatives.
* lra-constraints.c (process_alt_operands): Likewise. Handle
only_alternative as part of the enabled mask.
* target-globals.h (this_target_recog): Declare.
(target_globals): Add a recog field.
(restore_target_globals): Restore this_target_recog.
* target-globals.c: Include recog.h.
(default_target_globals): Initialize recog field.
(save_target_globals): Likewise.
* reginfo.c (reinit_regs): Call recog_init.
* toplev.c (backend_init_target): Likewise.
From-SVN: r210964
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From-SVN: r206289
|
|
PR other/12081
* recog.h (rtx (*insn_gen_fn) (rtx, ...)): Replace typedef with new
class insn_gen_fn.
* expr.c (move_by_pieces_1, store_by_pieces_2): Replace argument
rtx (*) (rtx, ...) with insn_gen_fn.
* genoutput.c (output_insn_data): Cast gen_? function pointers to
insn_gen_fn::stored_funcptr. Add initializer braces.
From-SVN: r201513
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gcc/
* recog.h (Recog_data): Rename to...
(recog_data_d): ...this.
(recog_data): Update accordingly.
* recog.c (recog_data): Likewise.
* reload.c (save_recog_data): Likewise.
* config/picochip/picochip.c (picochip_saved_recog_data): Likewise.
(picochip_save_recog_data, picochip_restore_recog_data): Likewise.
From-SVN: r199050
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