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After discussion with Richard Sandiford on IRC, he suggested adding a
new mode class MODE_OPAQUE to deal with the problems (PR 96791) we had
been having with POImode/PXImode in powerpc target. This patch is the
accumulation of changes I needed to make to add this and make it useable
for the purposes of what power10 MMA needed.
MODE_OPAQUE modes allow you to have modes for which you can just
define loads and stores. By design, optimization does not expect to
know how to do arithmetic or subregs on these modes. This allows us to
have modes for multi-register vector operations where we don't want to
open Pandora's Box and define general arithmetic operations.
This patch will be followed by a target specific patch to change the
powerpc power10 MMA builtins to use opaque modes, and will also let use
use the vector pair loads/stores defined with that in the inline expansion
of memcpy/memmove, allowing me to fix PR 96791.
gcc/ChangeLog
PR target/96791
* mode-classes.def: Add MODE_OPAQUE.
* machmode.def: Add OPAQUE_MODE.
* tree.def: Add OPAQUE_TYPE for types that will use
MODE_OPAQUE.
* doc/generic.texi: Document OPAQUE_TYPE.
* doc/rtl.texi: Document MODE_OPAQUE.
* machmode.h: Add OPAQUE_MODE_P().
* genmodes.c (complete_mode): Add MODE_OPAQUE.
(opaque_mode): New function.
* tree.c (tree_code_size): Add OPAQUE_TYPE.
* tree.h: Add OPAQUE_TYPE_P().
* stor-layout.c (int_mode_for_mode): Treat MODE_OPAQUE modes
like BLKmode.
* ira.c (find_moveable_pseudos): Treat MODE_OPAQUE modes more
like integer/float modes here.
* dbxout.c (dbxout_type): Treat OPAQUE_TYPE like VOID_TYPE.
* tree-pretty-print.c (dump_generic_node): Treat OPAQUE_TYPE
like like other types.
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From-SVN: r279813
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After previous patches, it's now possible to make the vectoriser
support multiple vector sizes in the same vector region, using
related_vector_mode to pick the right vector mode for a given
element mode. No port yet takes advantage of this, but I have
a follow-on patch for AArch64.
This patch also seemed like a good opportunity to add some more dump
messages: one to make it clear which vector size/mode was being used
when analysis passed or failed, and another to say when we've decided
to skip a redundant vector size/mode.
2019-11-14 Richard Sandiford <richard.sandiford@arm.com>
gcc/
* machmode.h (opt_machine_mode::operator==): New function.
(opt_machine_mode::operator!=): Likewise.
* tree-vectorizer.h (vec_info::vector_mode): Update comment.
(get_related_vectype_for_scalar_type): Delete.
(get_vectype_for_scalar_type_and_size): Declare.
* tree-vect-slp.c (vect_slp_bb_region): Print dump messages to say
whether analysis passed or failed, and with what vector modes.
Use related_vector_mode to check whether trying a particular
vector mode would be redundant with the autodetected mode,
and print a dump message if we decide to skip it.
* tree-vect-loop.c (vect_analyze_loop): Likewise.
(vect_create_epilog_for_reduction): Use
get_related_vectype_for_scalar_type instead of
get_vectype_for_scalar_type_and_size.
* tree-vect-stmts.c (get_vectype_for_scalar_type_and_size): Replace
with...
(get_related_vectype_for_scalar_type): ...this new function.
Take a starting/"prevailing" vector mode rather than a vector size.
Take an optional nunits argument, with the same meaning as for
related_vector_mode. Use related_vector_mode when not
auto-detecting a mode, falling back to mode_for_vector if no
target mode exists.
(get_vectype_for_scalar_type): Update accordingly.
(get_same_sized_vectype): Likewise.
* tree-vectorizer.c (get_vec_alignment_for_array_type): Likewise.
From-SVN: r278240
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mode_for_int_vector, like mode_for_vector, can sometimes return
an integer mode or an unsupported vector mode. But no callers
are interested in that case, and only want supported vector modes.
This patch therefore replaces mode_for_int_vector with
related_int_vector_mode, which gives the target a chance to pick
its preferred vector mode for the given element mode and size.
2019-11-14 Richard Sandiford <richard.sandiford@arm.com>
gcc/
* machmode.h (mode_for_int_vector): Delete.
(related_int_vector_mode): Declare.
* stor-layout.c (mode_for_int_vector): Delete.
(related_int_vector_mode): New function.
* optabs.c (expand_vec_perm_1): Use related_int_vector_mode
instead of mode_for_int_vector.
(expand_vec_perm_const): Likewise.
* config/aarch64/aarch64.c (aarch64_emit_approx_sqrt): Likewise.
(aarch64_evpc_sve_tbl): Likewise.
* config/s390/s390.c (s390_expand_vec_compare_cc): Likewise.
(s390_expand_vcond): Likewise.
From-SVN: r278230
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This patch is the first of a series that tries to remove two
assumptions:
(1) that all vectors involved in vectorisation must be the same size
(2) that there is only one vector mode for a given element mode and
number of elements
Relaxing (1) helps with targets that support multiple vector sizes or
that require the number of elements to stay the same. E.g. if we're
vectorising code that operates on narrow and wide elements, and the
narrow elements use 64-bit vectors, then on AArch64 it would normally
be better to use 128-bit vectors rather than pairs of 64-bit vectors
for the wide elements.
Relaxing (2) makes it possible for -msve-vector-bits=128 to produce
fixed-length code for SVE. It also allows unpacked/half-size SVE
vectors to work with -msve-vector-bits=256.
The patch adds a new hook that targets can use to control how we
move from one vector mode to another. The hook takes a starting vector
mode, a new element mode, and (optionally) a new number of elements.
The flexibility needed for (1) comes in when the number of elements
isn't specified.
All callers in this patch specify the number of elements, but a later
vectoriser patch doesn't.
2019-11-14 Richard Sandiford <richard.sandiford@arm.com>
gcc/
* target.def (related_mode): New hook.
* doc/tm.texi.in (TARGET_VECTORIZE_RELATED_MODE): New hook.
* doc/tm.texi: Regenerate.
* targhooks.h (default_vectorize_related_mode): Declare.
* targhooks.c (default_vectorize_related_mode): New function.
* machmode.h (related_vector_mode): Declare.
* stor-layout.c (related_vector_mode): New function.
* expmed.c (extract_bit_field_1): Use it instead of mode_for_vector.
* optabs-query.c (qimode_for_vec_perm): Likewise.
* tree-vect-stmts.c (get_group_load_store_type): Likewise.
(vectorizable_store, vectorizable_load): Likewise
From-SVN: r278229
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This patch adds CONSTEXPR to constructors and operators in machmode.h,
excluding the controversial constexpr-resistant "() {}" constructors,
which would become "= default" if we required C++11.
Some of the other routines could potentially be constexpr too,
but that can be done on an as-needed basis.
2019-10-07 Richard Sandiford <richard.sandiford@arm.com>
gcc/
* machmode.h (opt_mode): Mark constructors with CONSTEXPR.
(pod_mode): Mark operators likewise.
(scalar_int_mode): Mark non-default constructors and
operators with CONSTEXPR.
(scalar_float_mode, scalar_mode, complex_mode): Likewise.
(fixed_size_mode): Likewise.
From-SVN: r276649
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If there's no SVE instruction to load a given constant directly, this
patch instead tries to use an Advanced SIMD constant move and then
duplicates the constant to fill an SVE vector. The main use of this
is to support constants in which each byte is in { 0, 0xff }.
Also, the patch prefers a simple integer move followed by a duplicate
over a load from memory, like we already do for Advanced SIMD. This is
a useful option to have and would be easy to turn off via a tuning
parameter if necessary.
The patch also extends the handling of wide LD1Rs to big endian,
whereas previously we punted to a full LD1RQ.
2019-08-13 Richard Sandiford <richard.sandiford@arm.com>
gcc/
* machmode.h (opt_mode::else_mode): New function.
(opt_mode::else_blk): Use it.
* config/aarch64/aarch64-protos.h (aarch64_vq_mode): Declare.
(aarch64_full_sve_mode, aarch64_sve_ld1rq_operand_p): Likewise.
(aarch64_gen_stepped_int_parallel): Likewise.
(aarch64_stepped_int_parallel_p): Likewise.
(aarch64_expand_mov_immediate): Remove the optional gen_vec_duplicate
argument.
* config/aarch64/aarch64.c
(aarch64_expand_sve_widened_duplicate): Delete.
(aarch64_expand_sve_dupq, aarch64_expand_sve_ld1rq): New functions.
(aarch64_expand_sve_const_vector): Rewrite to handle more cases.
(aarch64_expand_mov_immediate): Remove the optional gen_vec_duplicate
argument. Use early returns in the !CONST_INT_P handling.
Pass all SVE data vectors to aarch64_expand_sve_const_vector rather
than handling some inline.
(aarch64_full_sve_mode, aarch64_vq_mode): New functions, split out
from...
(aarch64_simd_container_mode): ...here.
(aarch64_gen_stepped_int_parallel, aarch64_stepped_int_parallel_p)
(aarch64_sve_ld1rq_operand_p): New functions.
* config/aarch64/predicates.md (descending_int_parallel)
(aarch64_sve_ld1rq_operand): New predicates.
* config/aarch64/constraints.md (UtQ): New constraint.
* config/aarch64/aarch64.md (UNSPEC_REINTERPRET): New unspec.
* config/aarch64/aarch64-sve.md (mov<SVE_ALL:mode>): Remove the
gen_vec_duplicate from call to aarch64_expand_mov_immediate.
(@aarch64_sve_reinterpret<mode>): New expander.
(*aarch64_sve_reinterpret<mode>): New pattern.
(@aarch64_vec_duplicate_vq<mode>_le): New pattern.
(@aarch64_vec_duplicate_vq<mode>_be): Likewise.
(*sve_ld1rq<Vesize>): Replace with...
(@aarch64_sve_ld1rq<mode>): ...this new pattern.
gcc/testsuite/
* gcc.target/aarch64/sve/init_2.c: Expect ld1rd to be used
instead of a full vector load.
* gcc.target/aarch64/sve/init_4.c: Likewise.
* gcc.target/aarch64/sve/ld1r_2.c: Remove constants that no longer
need to be loaded from memory.
* gcc.target/aarch64/sve/slp_2.c: Expect the same output for
big and little endian.
* gcc.target/aarch64/sve/slp_3.c: Likewise. Expect 3 of the
doubles to be moved via integer registers rather than loaded
from memory.
* gcc.target/aarch64/sve/slp_4.c: Likewise but for 4 doubles.
* gcc.target/aarch64/sve/spill_4.c: Expect 16-bit constants to be
loaded via an integer register rather than from memory.
* gcc.target/aarch64/sve/const_1.c: New test.
* gcc.target/aarch64/sve/const_2.c: Likewise.
* gcc.target/aarch64/sve/const_3.c: Likewise.
From-SVN: r274375
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From-SVN: r267494
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* emit-rtl.c (init_emit_once): Do not emit MODE_POINTER_BOUNDS RTXes.
* emit-rtl.h (rtl_data): Remove return_bnd.
* explow.c (trunc_int_for_mode): Do not handle POINTER_BOUNDS_MODE_P.
* function.c (diddle_return_value): Do not handle crtl->return_bnd.
* genmodes.c (complete_mode): Do not handle MODE_POINTER_BOUNDS.
(POINTER_BOUNDS_MODE): Remove definition.
(make_pointer_bounds_mode): Remove.
(get_mode_class): Do not handle MODE_POINTER_BOUNDS.
* machmode.h (POINTER_BOUNDS_MODE_P): Remove definition.
(scalare_mode::includes_p): Do not handle MODE_POINTER_BOUNDS.
* mode-classes.def: Do not define MODE_POINTER_BOUNDS.
* stor-layout.c (int_mode_for_mode): Do not handle MODE_POINTER_BOUNDS.
* tree-core.h (enum tree_index): Remove TI_POINTER_BOUNDS_TYPE.
* varasm.c (output_constant_pool_2): Do not handle MODE_POINTER_BOUNDS.
* config/i386/i386-modes.def (BND32, BND64): Remove.
* config/i386/i386.c (dbx_register_map): Remove bound registers.
(dbx64_register_map): Ditto.
(svr4_dbx_register_map): Ditto.
(indirect_thunk_bnd_needed): Remove.
(indirect_thunks_bnd_used): Ditto.
(indirect_return_bnd_needed): Ditto.
(indirect_return_via_cx_bnd): Ditto.
(enum indirect_thunk_prefix): Remove indirect_thunk_prefix_bnd.
(indirect_thunk_name): Remove handling of indirect_thunk_prefix_bnd.
(output_indirect_thunk): Ditto. Remove need_prefix argument.
(output_indirect_thunk_function): Remove handling of
indirect_return_bnd_needed, indirect_return_via_cx_bnd,
indirect_thunk_bnd_needed and indirect_thunks_bnd_used variables.
(ix86_save_reg): Remove handling of crtl->return_bnd.
(ix86_legitimate_constant_p): Remove handling of POINTER_BOUNDS_MODE_P.
(ix86_print_operand_address_as): Remove handling of UNSPEC_BNDMK_ADDR
and UNSPEC_BNDLX_ADDR.
(ix86_output_indirect_branch_via_reg): Remove handling of
indirect_thunk_prefix_bnd.
(ix86_output_indirect_branch_via_push): Ditto.
(ix86_output_function_return): Ditto.
(ix86_output_indirect_function_return): Ditto.
(avoid_func_arg_motion): Do not handle UNSPEC_BNDSTX.
* config/i386/i386.h (FIXED_REGISTERS): Remove bound registers.
(CALL_USED_REGISTERS): Ditto.
(REG_ALLOC_ORDER): Update for removal of bound registers.
(HI_REGISTER_NAMES): Ditto.
* config/i386/i386.md (UNSPEC_BNDMK, UNSPEC_BNDMK_ADDR, UNSPEC_BNDSTX)
(UNSPEC_BNDLDX, UNSPEC_BNDLDX_ADDR, UNSPEC_BNDCL, UNSPEC_BNDCU)
(UNSPEC_BNDCN, UNSPEC_MPX_FENCE): Remove.
(BND0_REG, BND1_REG, BND2_REG, BND3_REG): Remove
(FIRST_PSEUDO_REG): Update.
(BND): Remove mode iterator.
* config/i386/predicates.md (bnd_mem_operator): Remove.
From-SVN: r263835
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We already allow the target to change the size and alignment of a mode.
This patch does the same thing for the number of units, which is needed
to give command-line control of the SVE vector length.
2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
Alan Hayward <alan.hayward@arm.com>
David Sherwood <david.sherwood@arm.com>
gcc/
* machmode.h (mode_precision): Prefix with CONST_MODE_PRECISION.
(mode_nunits): Likewise CONST_MODE_NUNITS.
* machmode.def (ADJUST_NUNITS): Document.
* genmodes.c (mode_data::need_nunits_adj): New field.
(blank_mode): Update accordingly.
(adj_nunits): New variable.
(print_maybe_const_decl): Replace CATEGORY with a NEEDS_ADJ
parameter.
(emit_mode_size_inline): Set need_bytesize_adj for all modes
listed in adj_nunits.
(emit_mode_nunits_inline): Set need_nunits_adj for all modes
listed in adj_nunits. Don't emit case statements for such modes.
(emit_insn_modes_h): Emit definitions of CONST_MODE_NUNITS
and CONST_MODE_PRECISION. Make CONST_MODE_SIZE expand to
nothing if adj_nunits is nonnull.
(emit_mode_precision, emit_mode_nunits): Use print_maybe_const_decl.
(emit_mode_unit_size, emit_mode_base_align, emit_mode_ibit)
(emit_mode_fbit): Update use of print_maybe_const_decl.
(emit_move_size): Likewise. Treat the array as non-const
if adj_nunits.
(emit_mode_adjustments): Handle adj_nunits.
Co-Authored-By: Alan Hayward <alan.hayward@arm.com>
Co-Authored-By: David Sherwood <david.sherwood@arm.com>
From-SVN: r256204
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This patch adds a new mode class to represent vectors of booleans.
GET_MODE_BITSIZE (m) / GET_MODE_NUNITS (m) determines the number
of bits that are used to represent each boolean; this can be 1
for a fully-packed representation or greater than 1 for an unpacked
representation. In the latter case, the value of bits other than
the lowest is not significant.
These are used by the SVE port to represent predicates.
2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
Alan Hayward <alan.hayward@arm.com>
David Sherwood <david.sherwood@arm.com>
gcc/
* mode-classes.def (MODE_VECTOR_BOOL): New mode class.
* machmode.h (INTEGRAL_MODE_P, VECTOR_MODE_P): Return true
for MODE_VECTOR_BOOL.
* machmode.def (VECTOR_BOOL_MODE): Document.
* genmodes.c (VECTOR_BOOL_MODE): New macro.
(make_vector_bool_mode): New function.
(complete_mode, emit_mode_wider, emit_mode_adjustments): Handle
MODE_VECTOR_BOOL.
* lto-streamer-in.c (lto_input_mode_table): Likewise.
* rtx-vector-builder.c (rtx_vector_builder::find_cached_value):
Likewise.
* stor-layout.c (int_mode_for_mode): Likewise.
* tree.c (build_vector_type_for_mode): Likewise.
* varasm.c (output_constant_pool_2): Likewise.
* emit-rtl.c (init_emit_once): Make sure that CONST1_RTX (BImode) and
CONSTM1_RTX (BImode) are the same thing. Initialize const_tiny_rtx
for MODE_VECTOR_BOOL.
* expr.c (expand_expr_real_1): Use VECTOR_MODE_P instead of a list
of mode class checks.
* tree-vect-generic.c (expand_vector_operation): Use VECTOR_MODE_P
instead of a list of mode class checks.
(expand_vector_scalar_condition): Likewise.
(type_for_widest_vector_mode): Handle BImode as an inner mode.
gcc/c-family/
* c-common.c (c_common_type_for_mode): Handle MODE_VECTOR_BOOL.
gcc/fortran/
* trans-types.c (gfc_type_for_mode): Handle MODE_VECTOR_BOOL.
gcc/go/
* go-lang.c (go_langhook_type_for_mode): Handle MODE_VECTOR_BOOL.
gcc/lto/
* lto-lang.c (lto_type_for_mode): Handle MODE_VECTOR_BOOL.
Co-Authored-By: Alan Hayward <alan.hayward@arm.com>
Co-Authored-By: David Sherwood <david.sherwood@arm.com>
From-SVN: r256202
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This patch changes GET_MODE_SIZE from unsigned short to poly_uint16.
The non-mechanical parts were handled by previous patches.
2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
Alan Hayward <alan.hayward@arm.com>
David Sherwood <david.sherwood@arm.com>
gcc/
* machmode.h (mode_size): Change from unsigned short to
poly_uint16_pod.
(mode_to_bytes): Return a poly_uint16 rather than an unsigned short.
(GET_MODE_SIZE): Return a constant if ONLY_FIXED_SIZE_MODES,
or if measurement_type is not polynomial.
(fixed_size_mode::includes_p): Check for constant-sized modes.
* genmodes.c (emit_mode_size_inline): Make mode_size_inline
return a poly_uint16 rather than an unsigned short.
(emit_mode_size): Change the type of mode_size from unsigned short
to poly_uint16_pod. Use ZERO_COEFFS for the initializer.
(emit_mode_adjustments): Cope with polynomial vector sizes.
* lto-streamer-in.c (lto_input_mode_table): Use bp_unpack_poly_value
for GET_MODE_SIZE.
* lto-streamer-out.c (lto_write_mode_table): Use bp_pack_poly_value
for GET_MODE_SIZE.
* auto-inc-dec.c (try_merge): Treat GET_MODE_SIZE as polynomial.
* builtins.c (expand_ifn_atomic_compare_exchange_into_call): Likewise.
* caller-save.c (setup_save_areas): Likewise.
(replace_reg_with_saved_mem): Likewise.
* calls.c (emit_library_call_value_1): Likewise.
* combine-stack-adj.c (combine_stack_adjustments_for_block): Likewise.
* combine.c (simplify_set, make_extraction, simplify_shift_const_1)
(gen_lowpart_for_combine): Likewise.
* convert.c (convert_to_integer_1): Likewise.
* cse.c (equiv_constant, cse_insn): Likewise.
* cselib.c (autoinc_split, cselib_hash_rtx): Likewise.
(cselib_subst_to_values): Likewise.
* dce.c (word_dce_process_block): Likewise.
* df-problems.c (df_word_lr_mark_ref): Likewise.
* dwarf2cfi.c (init_one_dwarf_reg_size): Likewise.
* dwarf2out.c (multiple_reg_loc_descriptor, mem_loc_descriptor)
(concat_loc_descriptor, concatn_loc_descriptor, loc_descriptor)
(rtl_for_decl_location): Likewise.
* emit-rtl.c (gen_highpart, widen_memory_access): Likewise.
* expmed.c (extract_bit_field_1, extract_integral_bit_field): Likewise.
* expr.c (emit_group_load_1, clear_storage_hints): Likewise.
(emit_move_complex, emit_move_multi_word, emit_push_insn): Likewise.
(expand_expr_real_1): Likewise.
* function.c (assign_parm_setup_block_p, assign_parm_setup_block)
(pad_below): Likewise.
* gimple-fold.c (optimize_atomic_compare_exchange_p): Likewise.
* gimple-ssa-store-merging.c (rhs_valid_for_store_merging_p): Likewise.
* ira.c (get_subreg_tracking_sizes): Likewise.
* ira-build.c (ira_create_allocno_objects): Likewise.
* ira-color.c (coalesced_pseudo_reg_slot_compare): Likewise.
(ira_sort_regnos_for_alter_reg): Likewise.
* ira-costs.c (record_operand_costs): Likewise.
* lower-subreg.c (interesting_mode_p, simplify_gen_subreg_concatn)
(resolve_simple_move): Likewise.
* lra-constraints.c (get_reload_reg, operands_match_p): Likewise.
(process_addr_reg, simplify_operand_subreg, curr_insn_transform)
(lra_constraints): Likewise.
(CONST_POOL_OK_P): Reject variable-sized modes.
* lra-spills.c (slot, assign_mem_slot, pseudo_reg_slot_compare)
(add_pseudo_to_slot, lra_spill): Likewise.
* omp-low.c (omp_clause_aligned_alignment): Likewise.
* optabs-query.c (get_best_extraction_insn): Likewise.
* optabs-tree.c (expand_vec_cond_expr_p): Likewise.
* optabs.c (expand_vec_perm_var, expand_vec_cond_expr): Likewise.
(expand_mult_highpart, valid_multiword_target_p): Likewise.
* recog.c (offsettable_address_addr_space_p): Likewise.
* regcprop.c (maybe_mode_change): Likewise.
* reginfo.c (choose_hard_reg_mode, record_subregs_of_mode): Likewise.
* regrename.c (build_def_use): Likewise.
* regstat.c (dump_reg_info): Likewise.
* reload.c (complex_word_subreg_p, push_reload, find_dummy_reload)
(find_reloads, find_reloads_subreg_address): Likewise.
* reload1.c (eliminate_regs_1): Likewise.
* rtlanal.c (for_each_inc_dec_find_inc_dec, rtx_cost): Likewise.
* simplify-rtx.c (avoid_constant_pool_reference): Likewise.
(simplify_binary_operation_1, simplify_subreg): Likewise.
* targhooks.c (default_function_arg_padding): Likewise.
(default_hard_regno_nregs, default_class_max_nregs): Likewise.
* tree-cfg.c (verify_gimple_assign_binary): Likewise.
(verify_gimple_assign_ternary): Likewise.
* tree-inline.c (estimate_move_cost): Likewise.
* tree-ssa-forwprop.c (simplify_vector_constructor): Likewise.
* tree-ssa-loop-ivopts.c (add_autoinc_candidates): Likewise.
(get_address_cost_ainc): Likewise.
* tree-vect-data-refs.c (vect_enhance_data_refs_alignment): Likewise.
(vect_supportable_dr_alignment): Likewise.
* tree-vect-loop.c (vect_determine_vectorization_factor): Likewise.
(vectorizable_reduction): Likewise.
* tree-vect-stmts.c (vectorizable_assignment, vectorizable_shift)
(vectorizable_operation, vectorizable_load): Likewise.
* tree.c (build_same_sized_truth_vector_type): Likewise.
* valtrack.c (cleanup_auto_inc_dec): Likewise.
* var-tracking.c (emit_note_insn_var_location): Likewise.
* config/arc/arc.h (ASM_OUTPUT_CASE_END): Use as_a <scalar_int_mode>.
(ADDR_VEC_ALIGN): Likewise.
Co-Authored-By: Alan Hayward <alan.hayward@arm.com>
Co-Authored-By: David Sherwood <david.sherwood@arm.com>
From-SVN: r256201
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This patch changes GET_MODE_BITSIZE from an unsigned short
to a poly_uint16.
2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
Alan Hayward <alan.hayward@arm.com>
David Sherwood <david.sherwood@arm.com>
gcc/
* machmode.h (mode_to_bits): Return a poly_uint16 rather than an
unsigned short.
(GET_MODE_BITSIZE): Return a constant if ONLY_FIXED_SIZE_MODES,
or if measurement_type is polynomial.
* calls.c (shift_return_value): Treat GET_MODE_BITSIZE as polynomial.
* combine.c (make_extraction): Likewise.
* dse.c (find_shift_sequence): Likewise.
* dwarf2out.c (mem_loc_descriptor): Likewise.
* expmed.c (store_integral_bit_field, extract_bit_field_1): Likewise.
(extract_bit_field, extract_low_bits): Likewise.
* expr.c (convert_move, convert_modes, emit_move_insn_1): Likewise.
(optimize_bitfield_assignment_op, expand_assignment): Likewise.
(store_expr_with_bounds, store_field, expand_expr_real_1): Likewise.
* fold-const.c (optimize_bit_field_compare, merge_ranges): Likewise.
* gimple-fold.c (optimize_atomic_compare_exchange_p): Likewise.
* reload.c (find_reloads): Likewise.
* reload1.c (alter_reg): Likewise.
* stor-layout.c (bitwise_mode_for_mode, compute_record_mode): Likewise.
* targhooks.c (default_secondary_memory_needed_mode): Likewise.
* tree-if-conv.c (predicate_mem_writes): Likewise.
* tree-ssa-strlen.c (handle_builtin_memcmp): Likewise.
* tree-vect-patterns.c (adjust_bool_pattern): Likewise.
* tree-vect-stmts.c (vectorizable_simd_clone_call): Likewise.
* valtrack.c (dead_debug_insert_temp): Likewise.
* varasm.c (mergeable_constant_section): Likewise.
* config/sh/sh.h (LOCAL_ALIGNMENT): Use as_a <fixed_size_mode>.
gcc/ada/
* gcc-interface/misc.c (enumerate_modes): Treat GET_MODE_BITSIZE
as polynomial.
gcc/c-family/
* c-ubsan.c (ubsan_instrument_shift): Treat GET_MODE_BITSIZE
as polynomial.
Co-Authored-By: Alan Hayward <alan.hayward@arm.com>
Co-Authored-By: David Sherwood <david.sherwood@arm.com>
From-SVN: r256200
|
|
This patch changes GET_MODE_PRECISION from an unsigned short
to a poly_uint16.
2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
Alan Hayward <alan.hayward@arm.com>
David Sherwood <david.sherwood@arm.com>
gcc/
* machmode.h (mode_precision): Change from unsigned short to
poly_uint16_pod.
(mode_to_precision): Return a poly_uint16 rather than an unsigned
short.
(GET_MODE_PRECISION): Return a constant if ONLY_FIXED_SIZE_MODES,
or if measurement_type is not polynomial.
(HWI_COMPUTABLE_MODE_P): Turn into a function. Optimize the case
in which the mode is already known to be a scalar_int_mode.
* genmodes.c (emit_mode_precision): Change the type of mode_precision
from unsigned short to poly_uint16_pod. Use ZERO_COEFFS for the
initializer.
* lto-streamer-in.c (lto_input_mode_table): Use bp_unpack_poly_value
for GET_MODE_PRECISION.
* lto-streamer-out.c (lto_write_mode_table): Use bp_pack_poly_value
for GET_MODE_PRECISION.
* combine.c (update_rsp_from_reg_equal): Treat GET_MODE_PRECISION
as polynomial.
(try_combine, find_split_point, combine_simplify_rtx): Likewise.
(expand_field_assignment, make_extraction): Likewise.
(make_compound_operation_int, record_dead_and_set_regs_1): Likewise.
(get_last_value): Likewise.
* convert.c (convert_to_integer_1): Likewise.
* cse.c (cse_insn): Likewise.
* expr.c (expand_expr_real_1): Likewise.
* lra-constraints.c (simplify_operand_subreg): Likewise.
* optabs-query.c (can_atomic_load_p): Likewise.
* optabs.c (expand_atomic_load): Likewise.
(expand_atomic_store): Likewise.
* ree.c (combine_reaching_defs): Likewise.
* rtl.h (partial_subreg_p, paradoxical_subreg_p): Likewise.
* rtlanal.c (nonzero_bits1, lsb_bitfield_op_p): Likewise.
* tree.h (type_has_mode_precision_p): Likewise.
* ubsan.c (instrument_si_overflow): Likewise.
gcc/ada/
* gcc-interface/misc.c (enumerate_modes): Treat GET_MODE_PRECISION
as polynomial.
Co-Authored-By: Alan Hayward <alan.hayward@arm.com>
Co-Authored-By: David Sherwood <david.sherwood@arm.com>
From-SVN: r256198
|
|
This patch changes GET_MODE_NUNITS from unsigned char
to poly_uint16, although it remains a macro when compiling
target code with NUM_POLY_INT_COEFFS == 1.
We can handle permuted loads and stores for variable nunits if
the number of statements is a power of 2, but not otherwise.
The to_constant call in make_vector_type goes away in a later patch.
2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
Alan Hayward <alan.hayward@arm.com>
David Sherwood <david.sherwood@arm.com>
gcc/
* machmode.h (mode_nunits): Change from unsigned char to
poly_uint16_pod.
(ONLY_FIXED_SIZE_MODES): New macro.
(pod_mode::measurement_type, scalar_int_mode::measurement_type)
(scalar_float_mode::measurement_type, scalar_mode::measurement_type)
(complex_mode::measurement_type, fixed_size_mode::measurement_type):
New typedefs.
(mode_to_nunits): Return a poly_uint16 rather than an unsigned short.
(GET_MODE_NUNITS): Return a constant if ONLY_FIXED_SIZE_MODES,
or if measurement_type is not polynomial.
* genmodes.c (ZERO_COEFFS): New macro.
(emit_mode_nunits_inline): Make mode_nunits_inline return a
poly_uint16.
(emit_mode_nunits): Change the type of mode_nunits to poly_uint16_pod.
Use ZERO_COEFFS when emitting initializers.
* data-streamer.h (bp_pack_poly_value): New function.
(bp_unpack_poly_value): Likewise.
* lto-streamer-in.c (lto_input_mode_table): Use bp_unpack_poly_value
for GET_MODE_NUNITS.
* lto-streamer-out.c (lto_write_mode_table): Use bp_pack_poly_value
for GET_MODE_NUNITS.
* tree.c (make_vector_type): Remove temporary shim and make
the real function take the number of units as a poly_uint64
rather than an int.
(build_vector_type_for_mode): Handle polynomial nunits.
* dwarf2out.c (loc_descriptor, add_const_value_attribute): Likewise.
* emit-rtl.c (const_vec_series_p_1): Likewise.
(gen_rtx_CONST_VECTOR): Likewise.
* fold-const.c (test_vec_duplicate_folding): Likewise.
* genrecog.c (validate_pattern): Likewise.
* optabs-query.c (can_vec_perm_var_p, can_mult_highpart_p): Likewise.
* optabs-tree.c (expand_vec_cond_expr_p): Likewise.
* optabs.c (expand_vector_broadcast, expand_binop_directly): Likewise.
(shift_amt_for_vec_perm_mask, expand_vec_perm_var): Likewise.
(expand_vec_cond_expr, expand_mult_highpart): Likewise.
* rtlanal.c (subreg_get_info): Likewise.
* tree-vect-data-refs.c (vect_grouped_store_supported): Likewise.
(vect_grouped_load_supported): Likewise.
* tree-vect-generic.c (type_for_widest_vector_mode): Likewise.
* tree-vect-loop.c (have_whole_vector_shift): Likewise.
* simplify-rtx.c (simplify_unary_operation_1): Likewise.
(simplify_const_unary_operation, simplify_binary_operation_1)
(simplify_const_binary_operation, simplify_ternary_operation)
(test_vector_ops_duplicate, test_vector_ops): Likewise.
(simplify_immed_subreg): Use GET_MODE_NUNITS on a fixed_size_mode
instead of CONST_VECTOR_NUNITS.
* varasm.c (output_constant_pool_2): Likewise.
* rtx-vector-builder.c (rtx_vector_builder::build): Only include the
explicit-encoded elements in the XVEC for variable-length vectors.
gcc/ada/
* gcc-interface/misc.c (enumerate_modes): Handle polynomial
GET_MODE_NUNITS.
Co-Authored-By: Alan Hayward <alan.hayward@arm.com>
Co-Authored-By: David Sherwood <david.sherwood@arm.com>
From-SVN: r256195
|
|
From-SVN: r256169
|
|
This patch changes C++ bitregion_start/end values from constants to
poly_ints. Although it's unlikely that the size needs to be polynomial
in practice, the offset could be with future language extensions.
2017-12-20 Richard Sandiford <richard.sandiford@linaro.org>
Alan Hayward <alan.hayward@arm.com>
David Sherwood <david.sherwood@arm.com>
gcc/
* expmed.h (store_bit_field): Change bitregion_start and
bitregion_end from unsigned HOST_WIDE_INT to poly_uint64.
* expmed.c (adjust_bit_field_mem_for_reg, strict_volatile_bitfield_p)
(store_bit_field_1, store_integral_bit_field, store_bit_field)
(store_fixed_bit_field, store_split_bit_field): Likewise.
* expr.c (store_constructor_field, store_field): Likewise.
(optimize_bitfield_assignment_op): Likewise. Make the same change
to bitsize and bitpos.
* machmode.h (bit_field_mode_iterator): Change m_bitregion_start
and m_bitregion_end from HOST_WIDE_INT to poly_int64. Make the
same change in the constructor arguments.
(get_best_mode): Change bitregion_start and bitregion_end from
unsigned HOST_WIDE_INT to poly_uint64.
* stor-layout.c (bit_field_mode_iterator::bit_field_mode_iterator):
Change bitregion_start and bitregion_end from HOST_WIDE_INT to
poly_int64.
(bit_field_mode_iterator::next_mode): Update for new types
of m_bitregion_start and m_bitregion_end.
(get_best_mode): Change bitregion_start and bitregion_end from
unsigned HOST_WIDE_INT to poly_uint64.
Co-Authored-By: Alan Hayward <alan.hayward@arm.com>
Co-Authored-By: David Sherwood <david.sherwood@arm.com>
From-SVN: r255879
|
|
This patch changes the bit size and vector count arguments to the
machmode.h functions from unsigned int to poly_uint64.
2017-12-16 Richard Sandiford <richard.sandiford@linaro.org>
Alan Hayward <alan.hayward@arm.com>
David Sherwood <david.sherwood@arm.com>
gcc/
* machmode.h (mode_for_size, int_mode_for_size, float_mode_for_size)
(smallest_mode_for_size, smallest_int_mode_for_size): Take the mode
size as a poly_uint64.
(mode_for_vector, mode_for_int_vector): Take the number of vector
elements as a poly_uint64.
* stor-layout.c (mode_for_size, smallest_mode_for_size): Take the mode
size as a poly_uint64.
(mode_for_vector, mode_for_int_vector): Take the number of vector
elements as a poly_uint64.
Co-Authored-By: Alan Hayward <alan.hayward@arm.com>
Co-Authored-By: David Sherwood <david.sherwood@arm.com>
From-SVN: r255747
|
|
This patch uses a MACRO_MODE wrapper for the target macro invocations
in targhooks.c and address.h, so that macros for non-AArch64 targets
can continue to treat modes as fixed-size.
It didn't seem worth converting the address macros to hooks since
(a) they're heavily used, (b) they should be probably be replaced
with a different interface rather than converted to hooks as-is,
and most importantly (c) addresses.h already localises the problem.
2017-12-16 Richard Sandiford <richard.sandiford@linaro.org>
Alan Hayward <alan.hayward@arm.com>
David Sherwood <david.sherwood@arm.com>
gcc/
* machmode.h (MACRO_MODE): New macro.
* addresses.h (base_reg_class, ok_for_base_p_1): Use it.
* targhooks.c (default_libcall_value, default_secondary_reload)
(default_memory_move_cost, default_register_move_cost)
(default_class_max_nregs): Likewise.
Co-Authored-By: Alan Hayward <alan.hayward@arm.com>
Co-Authored-By: David Sherwood <david.sherwood@arm.com>
From-SVN: r255744
|
|
This patch adds a function for testing whether an arbitrary mode X
is an integer mode that is narrower than integer mode Y. This is
useful for code like expand_float and expand_fix that could in
principle handle vectors as well as scalars.
2017-11-01 Richard Sandiford <richard.sandiford@linaro.org>
Alan Hayward <alan.hayward@arm.com>
David Sherwood <david.sherwood@arm.com>
gcc/
* machmode.h (is_narrower_int_mode): New function
* optabs.c (expand_float, expand_fix): Use it.
* dwarf2out.c (rotate_loc_descriptor): Likewise.
Co-Authored-By: Alan Hayward <alan.hayward@arm.com>
Co-Authored-By: David Sherwood <david.sherwood@arm.com>
From-SVN: r254305
|
|
This patch adds a fixed_size_mode machine_mode wrapper
for modes that are known to have a fixed size. That applies
to all current modes, but future patches will add support for
variable-sized modes.
The use of this class should be pretty restricted. One important
use case is to hold the mode of static data, which can never be
variable-sized with current file formats. Another is to hold
the modes of registers involved in __builtin_apply and
__builtin_result, since those interfaces don't cope well with
variable-sized data.
The class can also be useful when reinterpreting the contents of
a fixed-length bit string as a different kind of value.
2017-11-01 Richard Sandiford <richard.sandiford@linaro.org>
Alan Hayward <alan.hayward@arm.com>
David Sherwood <david.sherwood@arm.com>
gcc/
* machmode.h (fixed_size_mode): New class.
* rtl.h (get_pool_mode): Return fixed_size_mode.
* gengtype.c (main): Add fixed_size_mode.
* target.def (get_raw_result_mode): Return a fixed_size_mode.
(get_raw_arg_mode): Likewise.
* doc/tm.texi: Regenerate.
* targhooks.h (default_get_reg_raw_mode): Return a fixed_size_mode.
* targhooks.c (default_get_reg_raw_mode): Likewise.
* config/ia64/ia64.c (ia64_get_reg_raw_mode): Likewise.
* config/mips/mips.c (mips_get_reg_raw_mode): Likewise.
* config/msp430/msp430.c (msp430_get_raw_arg_mode): Likewise.
(msp430_get_raw_result_mode): Likewise.
* config/avr/avr-protos.h (regmask): Use as_a <fixed_side_mode>
* dbxout.c (dbxout_parms): Require fixed-size modes.
* expr.c (copy_blkmode_from_reg, copy_blkmode_to_reg): Likewise.
* gimple-ssa-store-merging.c (encode_tree_to_bitpos): Likewise.
* omp-low.c (lower_oacc_reductions): Likewise.
* simplify-rtx.c (simplify_immed_subreg): Take fixed_size_modes.
(simplify_subreg): Update accordingly.
* varasm.c (constant_descriptor_rtx::mode): Change to fixed_size_mode.
(force_const_mem): Update accordingly. Return NULL_RTX for modes
that aren't fixed-size.
(get_pool_mode): Return a fixed_size_mode.
(output_constant_pool_2): Take a fixed_size_mode.
Co-Authored-By: Alan Hayward <alan.hayward@arm.com>
Co-Authored-By: David Sherwood <david.sherwood@arm.com>
From-SVN: r254300
|
|
I'm not sure the documentation is correct that outprec is always less
than inprec, and each non-default implementation tested for the case
in which it wasn't, but the patch leaves it as-is.
The SH port had a couple of TRULY_NOOP_TRUNCATION tests that were left
over from the old shmedia port.
2017-09-13 Richard Sandiford <richard.sandiford@linaro.org>
Alan Hayard <alan.hayward@arm.com>
David Sherwood <david.sherwood@arm.com>
gcc/
* target.def (truly_noop_truncation): New hook.
(mode_rep_extended): Refer to TARGET_TRULY_NOOP_TRUNCATION rather
than TRULY_NOOP_TRUNCATION.
* hooks.h (hook_bool_uint_uint_true): Declare.
* hooks.c (hook_bool_uint_uint_true): New function.
* doc/tm.texi.in (TRULY_NOOP_TRUNCATION): Replace with...
(TARGET_TRULY_NOOP_TRUNCATION): ...this.
* doc/tm.texi: Regenerate.
* combine.c (make_extraction): Refer to TARGET_TRULY_NOOP_TRUNCATION
rather than TRULY_NOOP_TRUNCATION in comments.
(simplify_comparison): Likewise.
(record_truncated_value): Likewise.
* expmed.c (extract_bit_field_1): Likewise.
(extract_split_bit_field): Likewise.
* convert.c (convert_to_integer_1): Use targetm.truly_noop_truncation
instead of TRULY_NOOP_TRUNCATION.
* function.c (assign_parm_setup_block): Likewise.
* machmode.h (TRULY_NOOP_TRUNCATION_MODES_P): Likewise.
* rtlhooks.c: Include target.h.
* config/aarch64/aarch64.h (TRULY_NOOP_TRUNCATION): Delete.
* config/alpha/alpha.h (TRULY_NOOP_TRUNCATION): Delete.
* config/arc/arc.h (TRULY_NOOP_TRUNCATION): Delete.
* config/arm/arm.h (TRULY_NOOP_TRUNCATION): Delete.
* config/avr/avr.h (TRULY_NOOP_TRUNCATION): Delete.
* config/bfin/bfin.h (TRULY_NOOP_TRUNCATION): Delete.
* config/c6x/c6x.h (TRULY_NOOP_TRUNCATION): Delete.
* config/cr16/cr16.h (TRULY_NOOP_TRUNCATION): Delete.
* config/cris/cris.h (TRULY_NOOP_TRUNCATION): Delete.
* config/epiphany/epiphany.h (TRULY_NOOP_TRUNCATION): Delete.
* config/fr30/fr30.h (TRULY_NOOP_TRUNCATION): Delete.
* config/frv/frv.h (TRULY_NOOP_TRUNCATION): Delete.
* config/ft32/ft32.h (TRULY_NOOP_TRUNCATION): Delete.
* config/h8300/h8300.h (TRULY_NOOP_TRUNCATION): Delete.
* config/i386/i386.h (TRULY_NOOP_TRUNCATION): Delete.
* config/ia64/ia64.h (TRULY_NOOP_TRUNCATION): Delete.
* config/iq2000/iq2000.h (TRULY_NOOP_TRUNCATION): Delete.
* config/lm32/lm32.h (TRULY_NOOP_TRUNCATION): Delete.
* config/m32c/m32c.h (TRULY_NOOP_TRUNCATION): Delete.
* config/m32r/m32r.h (TRULY_NOOP_TRUNCATION): Delete.
* config/m68k/m68k.h (TRULY_NOOP_TRUNCATION): Delete.
* config/mcore/mcore.h (TRULY_NOOP_TRUNCATION): Delete.
* config/microblaze/microblaze.h (TRULY_NOOP_TRUNCATION): Delete.
* config/mips/mips.h (TRULY_NOOP_TRUNCATION): Delete.
* config/mips/mips.c (mips_truly_noop_truncation): New function.
(TARGET_TRULY_NOOP_TRUNCATION): Redefine.
* config/mips/mips.md: Refer to TARGET_TRULY_NOOP_TRUNCATION
rather than TRULY_NOOP_TRUNCATION in comments.
* config/mmix/mmix.h (TRULY_NOOP_TRUNCATION): Delete.
* config/mn10300/mn10300.h (TRULY_NOOP_TRUNCATION): Delete.
* config/moxie/moxie.h (TRULY_NOOP_TRUNCATION): Delete.
* config/msp430/msp430.h (TRULY_NOOP_TRUNCATION): Delete.
* config/nds32/nds32.h (TRULY_NOOP_TRUNCATION): Delete.
* config/nios2/nios2.h (TRULY_NOOP_TRUNCATION): Delete.
* config/nvptx/nvptx.h (TRULY_NOOP_TRUNCATION): Delete.
* config/pa/pa.h (TRULY_NOOP_TRUNCATION): Delete.
* config/pdp11/pdp11.h (TRULY_NOOP_TRUNCATION): Delete.
* config/powerpcspe/powerpcspe.h (TRULY_NOOP_TRUNCATION): Delete.
* config/riscv/riscv.h (TRULY_NOOP_TRUNCATION): Delete.
* config/riscv/riscv.md: Refer to TARGET_TRULY_NOOP_TRUNCATION
rather than TRULY_NOOP_TRUNCATION in comments.
* config/rl78/rl78.h (TRULY_NOOP_TRUNCATION): Delete.
* config/rs6000/rs6000.h (TRULY_NOOP_TRUNCATION): Delete.
* config/rx/rx.h (TRULY_NOOP_TRUNCATION): Delete.
* config/s390/s390.h (TRULY_NOOP_TRUNCATION): Delete.
* config/sh/sh.h (MAYBE_BASE_REGISTER_RTX_P): Remove
TRULY_NOOP_TRUNCATION condition.
(MAYBE_INDEX_REGISTER_RTX_P): Likewise.
(TRULY_NOOP_TRUNCATION): Delete.
* config/sparc/sparc.h (TRULY_NOOP_TRUNCATION): Delete.
* config/spu/spu.h (TRULY_NOOP_TRUNCATION): Delete.
* config/spu/spu.c (spu_truly_noop_truncation): New function.
(TARGET_TRULY_NOOP_TRUNCATION): Redefine.
* config/stormy16/stormy16.h (TRULY_NOOP_TRUNCATION): Delete.
* config/tilegx/tilegx.h (TRULY_NOOP_TRUNCATION): Delete.
* config/tilegx/tilegx.c (tilegx_truly_noop_truncation): New fuction.
(TARGET_TRULY_NOOP_TRUNCATION): Redefine.
* config/tilegx/tilegx.md: Refer to TARGET_TRULY_NOOP_TRUNCATION
rather than TRULY_NOOP_TRUNCATION in comments.
* config/tilepro/tilepro.h (TRULY_NOOP_TRUNCATION): Delete.
* config/v850/v850.h (TRULY_NOOP_TRUNCATION): Delete.
* config/vax/vax.h (TRULY_NOOP_TRUNCATION): Delete.
* config/visium/visium.h (TRULY_NOOP_TRUNCATION): Delete.
* config/xtensa/xtensa.h (TRULY_NOOP_TRUNCATION): Delete.
* system.h (TRULY_NOOP_TRUNCATION): Poison.
Co-Authored-By: Alan Hayward <alan.hayward@arm.com>
Co-Authored-By: David Sherwood <david.sherwood@arm.com>
From-SVN: r252818
|
|
2017-09-05 Richard Sandiford <richard.sandiford@linaro.org>
gcc/
* machmode.h (bitwise_mode_for_mode): Return opt_mode.
* stor-layout.c (bitwise_mode_for_mode): Likewise.
(bitwise_type_for_mode): Update accordingly.
From-SVN: r251733
|
|
...following on from the mode_for_size change. The patch also removes
machmode.h versions of the stor-layout.c comments, since the comments
in the .c file are more complete.
2017-09-05 Richard Sandiford <richard.sandiford@linaro.org>
gcc/
* machmode.h (mode_for_vector): Return an opt_mode.
* stor-layout.c (mode_for_vector): Likewise.
(mode_for_int_vector): Update accordingly.
(layout_type): Likewise.
* config/i386/i386.c (emit_memmov): Likewise.
(ix86_expand_set_or_movmem): Likewise.
(ix86_expand_vector_init): Likewise.
(ix86_get_mask_mode): Likewise.
* config/powerpcspe/powerpcspe.c (rs6000_expand_vec_perm_const_1):
Likewise.
* config/rs6000/rs6000.c (rs6000_expand_vec_perm_const_1): Likewise.
* expmed.c (extract_bit_field_1): Likewise.
* expr.c (expand_expr_real_2): Likewise.
* optabs-query.c (can_vec_perm_p): Likewise.
(can_vec_mask_load_store_p): Likewise.
* optabs.c (expand_vec_perm): Likewise.
* targhooks.c (default_get_mask_mode): Likewise.
* tree-vect-stmts.c (vectorizable_store): Likewise.
(vectorizable_load): Likewise.
(get_vectype_for_scalar_type_and_size): Likewise.
From-SVN: r251730
|
|
There are at least a few places that want to create an integer vector
with a specified element size and element count, or to create the
integer equivalent of an existing mode. This patch adds helpers
for doing that.
The require ()s are all used in functions that go on to emit
instructions that use the result as a vector mode.
2017-09-05 Richard Sandiford <richard.sandiford@linaro.org>
gcc/
* machmode.h (mode_for_int_vector): New function.
* stor-layout.c (mode_for_int_vector): Likewise.
* config/aarch64/aarch64.c (aarch64_emit_approx_sqrt): Use it.
* config/powerpcspe/powerpcspe.c (rs6000_do_expand_vec_perm): Likewise.
* config/rs6000/rs6000.c (rs6000_do_expand_vec_perm): Likewise.
* config/s390/s390.c (s390_expand_vec_compare_cc): Likewise.
(s390_expand_vcond): Likewise.
From-SVN: r251729
|
|
...to make it consistent with int_mode_for_size etc.
require () seems like the right choice in replace_reg_with_saved_mem
because we use the chosen mode for saving and restoring registers,
which cannot be done in BLKmode. Similarly require () seems like
the right choice in calls related to secondary memory reloads (the ones
in config/, and in get_secondary_mem) because the reload must always
have a defined mode, which e.g. determines the size of the slot.
We can use require () in simplify_subreg_concatn and assemble_integer
because it isn't meaningful to create a subreg with BLKmode (for one
thing, we couldn't tell then whether it was partial, paradoxical, etc.).
make_fract_type and make_accum_type must find a mode because that's
what distinguishes accumulator FIXED_POINT_TYPEs from fractional
FIXED_POINT_TYPEs.
2017-09-05 Richard Sandiford <richard.sandiford@linaro.org>
gcc/
* machmode.h (opt_machine_mode): New type.
(opt_mode<T>): Allow construction from anything that can be
converted to a T.
(is_a, as_a, dyn_cast): Add overloads for opt_mode.
(mode_for_size): Return an opt_machine_mode.
* stor-layout.c (mode_for_size): Likewise.
(mode_for_size_tree): Update call accordingly.
(bitwise_mode_for_mode): Likewise.
(make_fract_type): Likewise.
(make_accum_type): Likewise.
* caller-save.c (replace_reg_with_saved_mem): Update call
accordingly.
* config/alpha/alpha.h (SECONDARY_MEMORY_NEEDED_MODE): Likewise.
* config/i386/i386.h (SECONDARY_MEMORY_NEEDED_MODE): Likewise.
* config/s390/s390.h (SECONDARY_MEMORY_NEEDED_MODE): Likewise.
* config/sparc/sparc.h (SECONDARY_MEMORY_NEEDED_MODE): Likewise.
* expmed.c (extract_bit_field_1): Likewise.
* reload.c (get_secondary_mem): Likewise.
* varasm.c (assemble_integer): Likewise.
* lower-subreg.c (simplify_subreg_concatn): Likewise. Move
early-out.
From-SVN: r251728
|
|
This patch makes the binary float macros in real.h use
float_mode_for_size and adds a corresponding decimal_float_mode_for_size
for the decimal macros.
2017-09-05 Richard Sandiford <richard.sandiford@linaro.org>
gcc/
* machmode.h (decimal_float_mode_for_size): New function.
* real.h (REAL_VALUE_TO_TARGET_LONG_DOUBLE): Use float_mode_for_size.
(REAL_VALUE_TO_TARGET_DOUBLE): Likewise.
(REAL_VALUE_TO_TARGET_SINGLE): Likewise.
(REAL_VALUE_TO_TARGET_DECIMAL128): Use decimal_float_mode_for_size.
(REAL_VALUE_TO_TARGET_DECIMAL64): Likewise.
(REAL_VALUE_TO_TARGET_DECIMAL32): Likewise.
From-SVN: r251727
|
|
This patch adds another machine_mode wrapper for modes that are
known to be COMPLEX_MODE_P. There aren't yet many places that make
use of it, but that might change in future.
2017-08-30 Richard Sandiford <richard.sandiford@linaro.org>
Alan Hayward <alan.hayward@arm.com>
David Sherwood <david.sherwood@arm.com>
gcc/
* coretypes.h (complex_mode): New type.
* gdbhooks.py (build_pretty_printer): Handle it.
* machmode.h (complex_mode): New class.
(complex_mode::includes_p): New function.
(is_complex_int_mode): Likewise.
(is_complex_float_mode): Likewise.
* genmodes.c (get_mode_class): Handle complex mode classes.
* function.c (expand_function_end): Use is_complex_int_mode.
gcc/go/
* go-lang.c (go_langhook_type_for_mode): Use is_complex_float_mode.
Co-Authored-By: Alan Hayward <alan.hayward@arm.com>
Co-Authored-By: David Sherwood <david.sherwood@arm.com>
From-SVN: r251527
|
|
This patch adds a scalar_mode_pod class and uses it to
replace the machine_mode in fixed_value.
2017-08-30 Richard Sandiford <richard.sandiford@linaro.org>
Alan Hayward <alan.hayward@arm.com>
David Sherwood <david.sherwood@arm.com>
gcc/
* coretypes.h (scalar_mode_pod): New typedef.
* gdbhooks.py (build_pretty_printer): Handle it.
* machmode.h (gt_ggc_mx, gt_pch_nx): New functions.
* fixed-value.h (fixed_value::mode): Change type to scalar_mode_pod.
* fold-const.c (fold_convert_const_int_from_fixed): Use scalar_mode.
* tree-streamer-in.c (unpack_ts_fixed_cst_value_fields): Use
as_a <scalar_mode>.
Co-Authored-By: Alan Hayward <alan.hayward@arm.com>
Co-Authored-By: David Sherwood <david.sherwood@arm.com>
From-SVN: r251526
|
|
This patch uses scalar_mode in a few miscellaneous places:
- Previous patches mean mode_to_vector can take a scalar_mode without
further changes.
- Implicit promotion is limited to scalar types (affects promote_mode
and sdbout_parms)
2017-08-30 Richard Sandiford <richard.sandiford@linaro.org>
Alan Hayward <alan.hayward@arm.com>
David Sherwood <david.sherwood@arm.com>
gcc/
* machmode.h (mode_for_vector): Take a scalar_mode instead
of a machine_mode.
* stor-layout.c (mode_for_vector): Likewise.
* explow.c (promote_mode): Use as_a <scalar_mode>.
* sdbout.c (sdbout_parms): Use is_a <scalar_mode>.
Co-Authored-By: Alan Hayward <alan.hayward@arm.com>
Co-Authored-By: David Sherwood <david.sherwood@arm.com>
From-SVN: r251525
|
|
This patch uses opt_scalar_mode when iterating over scalar modes.
2017-08-30 Richard Sandiford <richard.sandiford@linaro.org>
Alan Hayward <alan.hayward@arm.com>
David Sherwood <david.sherwood@arm.com>
gcc/
* coretypes.h (opt_scalar_mode): New typedef.
* gdbhooks.py (build_pretty_printers): Handle it.
* machmode.h (mode_iterator::get_2xwider): Add overload for
opt_mode<T>.
* emit-rtl.c (init_emit_once): Use opt_scalar_mode when iterating
over scalar modes.
* expr.c (convert_mode_scalar): Likewise.
* omp-low.c (omp_clause_aligned_alignment): Likewise.
* optabs.c (expand_float): Likewise.
(expand_fix): Likewise.
* tree-vect-stmts.c (vectorizable_conversion): Likewise.
gcc/c-family/
* c-common.c (c_common_fixed_point_type_for_size): Use opt_scalar_mode
for the mode iterator.
Co-Authored-By: Alan Hayward <alan.hayward@arm.com>
Co-Authored-By: David Sherwood <david.sherwood@arm.com>
From-SVN: r251522
|
|
This patch adds a scalar_mode class that can hold any scalar mode,
specifically:
- scalar integers
- scalar floating-point values
- scalar fractional modes
- scalar accumulator modes
- pointer bounds modes
To start with this patch uses this type for GET_MODE_INNER.
Later patches add more uses.
2017-08-30 Richard Sandiford <richard.sandiford@linaro.org>
Alan Hayward <alan.hayward@arm.com>
David Sherwood <david.sherwood@arm.com>
gcc/
* coretypes.h (scalar_mode): New class.
* machmode.h (scalar_mode): Likewise.
(scalar_mode::includes_p): New function.
(mode_to_inner): Return a scalar_mode rather than a machine_mode.
* gdbhooks.py (build_pretty_printers): Handle scalar_mode.
* genmodes.c (get_mode_class): Handle remaining scalar modes.
* cfgexpand.c (expand_debug_expr): Use scalar_mode.
* expmed.c (store_bit_field_1): Likewise.
(extract_bit_field_1): Likewise.
* expr.c (write_complex_part): Likewise.
(read_complex_part): Likewise.
(emit_move_complex_push): Likewise.
(expand_expr_real_2): Likewise.
* function.c (assign_parm_setup_reg): Likewise.
(assign_parms_unsplit_complex): Likewise.
* optabs.c (expand_binop): Likewise.
* rtlanal.c (subreg_get_info): Likewise.
* simplify-rtx.c (simplify_immed_subreg): Likewise.
* varasm.c (output_constant_pool_2): Likewise.
Co-Authored-By: Alan Hayward <alan.hayward@arm.com>
Co-Authored-By: David Sherwood <david.sherwood@arm.com>
From-SVN: r251515
|
|
get_best_mode always returns a scalar_int_mode on success,
so this patch makes that explicit in the type system. Also,
the "largest_mode" argument is used simply to provide a maximum
size, and in practice that size is always a compile-time constant,
even when the concept of variable-sized modes is added later.
The patch therefore passes the size directly.
2017-08-30 Richard Sandiford <richard.sandiford@linaro.org>
Alan Hayward <alan.hayward@arm.com>
David Sherwood <david.sherwood@arm.com>
gcc/
* machmode.h (bit_field_mode_iterator::next_mode): Take a pointer
to a scalar_int_mode instead of a machine_mode.
(bit_field_mode_iterator::m_mode): Change type to opt_scalar_int_mode.
(get_best_mode): Return a boolean and use a pointer argument to store
the selected mode. Replace the limit mode parameter with a bit limit.
* expmed.c (adjust_bit_field_mem_for_reg): Use scalar_int_mode
for the values returned by bit_field_mode_iterator::next_mode.
(store_bit_field): Update call to get_best_mode.
(store_fixed_bit_field): Likewise.
(extract_fixed_bit_field): Likewise.
* expr.c (optimize_bitfield_assignment_op): Likewise.
* fold-const.c (optimize_bit_field_compare): Likewise.
(fold_truth_andor_1): Likewise.
* stor-layout.c (bit_field_mode_iterator::next_mode): As above.
Update for new type of m_mode.
(get_best_mode): As above.
Co-Authored-By: Alan Hayward <alan.hayward@arm.com>
Co-Authored-By: David Sherwood <david.sherwood@arm.com>
From-SVN: r251491
|
|
This patch replaces uses of GET_CLASS_NARROWEST_MODE (MODE_INT) with a
new NARROWEST_INT_MODE macro, which has type scalar_int_mode.
2017-08-30 Richard Sandiford <richard.sandiford@linaro.org>
Alan Hayward <alan.hayward@arm.com>
David Sherwood <david.sherwood@arm.com>
gcc/
* machmode.h (NARROWEST_INT_MODE): New macro.
* expr.c (alignment_for_piecewise_move): Use it instead of
GET_CLASS_NARROWEST_MODE (MODE_INT).
(push_block): Likewise.
* stor-layout.c (bit_field_mode_iterator::bit_field_mode_iterator):
Likewise.
* tree-vrp.c (simplify_float_conversion_using_ranges): Likewise.
gcc/ada/
* gcc-interface/decl.c (validate_size): Use NARROWEST_INT_MODE
instead of GET_CLASS_NARROWEST_MODE (MODE_INT).
Co-Authored-By: Alan Hayward <alan.hayward@arm.com>
Co-Authored-By: David Sherwood <david.sherwood@arm.com>
From-SVN: r251485
|
|
Replace checks of "GET_MODE_CLASS (...) == MODE_INT" with
"is_int_mode (..., &var)", in cases where it becomes useful
to refer to the mode as a scalar_int_mode.
2017-08-30 Richard Sandiford <richard.sandiford@linaro.org>
Alan Hayward <alan.hayward@arm.com>
David Sherwood <david.sherwood@arm.com>
gcc/
* machmode.h (is_int_mode): New fuction.
* combine.c (find_split_point): Use it.
(combine_simplify_rtx): Likewise.
(simplify_if_then_else): Likewise.
(simplify_set): Likewise.
(simplify_shift_const_1): Likewise.
(simplify_comparison): Likewise.
* config/aarch64/aarch64.c (aarch64_rtx_costs): Likewise.
* cse.c (notreg_cost): Likewise.
(cse_insn): Likewise.
* cselib.c (cselib_lookup_1): Likewise.
* dojump.c (do_jump_1): Likewise.
(do_compare_rtx_and_jump): Likewise.
* dse.c (get_call_args): Likewise.
* dwarf2out.c (rtl_for_decl_init): Likewise.
(native_encode_initializer): Likewise.
* expmed.c (emit_store_flag_1): Likewise.
(emit_store_flag): Likewise.
* expr.c (convert_modes): Likewise.
(store_field): Likewise.
(expand_expr_real_1): Likewise.
* fold-const.c (fold_read_from_constant_string): Likewise.
* gimple-ssa-sprintf.c (get_format_string): Likewise.
* optabs-libfuncs.c (gen_int_libfunc): Likewise.
* optabs.c (expand_binop): Likewise.
(expand_unop): Likewise.
(expand_abs_nojump): Likewise.
(expand_one_cmpl_abs_nojump): Likewise.
* simplify-rtx.c (mode_signbit_p): Likewise.
(val_signbit_p): Likewise.
(val_signbit_known_set_p): Likewise.
(val_signbit_known_clear_p): Likewise.
(simplify_relational_operation_1): Likewise.
* tree.c (vector_type_mode): Likewise.
gcc/go/
* go-lang.c (go_langhook_type_for_mode): Use is_int_mode.
Co-Authored-By: Alan Hayward <alan.hayward@arm.com>
Co-Authored-By: David Sherwood <david.sherwood@arm.com>
From-SVN: r251472
|
|
This patch adds a wrapper around smallest_mode_for_size
for cases in which the mode class is MODE_INT. Unlike
(int_)mode_for_size, smallest_mode_for_size always returns
a mode of the specified class, asserting if no such mode exists.
smallest_int_mode_for_size therefore returns a scalar_int_mode
rather than an opt_scalar_int_mode.
2017-08-30 Richard Sandiford <richard.sandiford@linaro.org>
Alan Hayward <alan.hayward@arm.com>
David Sherwood <david.sherwood@arm.com>
gcc/
* machmode.h (smallest_mode_for_size): Fix formatting.
(smallest_int_mode_for_size): New function.
* cfgexpand.c (expand_debug_expr): Use smallest_int_mode_for_size
instead of smallest_mode_for_size.
* combine.c (make_extraction): Likewise.
* config/arc/arc.c (arc_expand_movmem): Likewise.
* config/arm/arm.c (arm_expand_divmod_libfunc): Likewise.
* config/i386/i386.c (ix86_get_mask_mode): Likewise.
* config/s390/s390.c (s390_expand_insv): Likewise.
* config/sparc/sparc.c (assign_int_registers): Likewise.
* config/spu/spu.c (spu_function_value): Likewise.
(spu_function_arg): Likewise.
* coverage.c (get_gcov_type): Likewise.
(get_gcov_unsigned_t): Likewise.
* dse.c (find_shift_sequence): Likewise.
* expmed.c (store_bit_field_1): Likewise.
* expr.c (convert_move): Likewise.
(store_field): Likewise.
* internal-fn.c (expand_arith_overflow): Likewise.
* optabs-query.c (get_best_extraction_insn): Likewise.
* optabs.c (expand_twoval_binop_libfunc): Likewise.
* stor-layout.c (layout_type): Likewise.
(initialize_sizetypes): Likewise.
* targhooks.c (default_get_mask_mode): Likewise.
* tree-ssa-loop-manip.c (canonicalize_loop_ivs): Likewise.
Co-Authored-By: Alan Hayward <alan.hayward@arm.com>
Co-Authored-By: David Sherwood <david.sherwood@arm.com>
From-SVN: r251471
|
|
Also use int_mode_for_mode instead of (int_)mode_for_size
in cases where the requested size was the bitsize of an
existing mode.
2017-08-30 Richard Sandiford <richard.sandiford@linaro.org>
Alan Hayward <alan.hayward@arm.com>
David Sherwood <david.sherwood@arm.com>
gcc/
* machmode.h (opt_mode::else_blk): New function.
(int_mode_for_mode): Declare.
* stor-layout.c (int_mode_for_mode): Return an opt_scalar_int_mode.
* builtins.c (expand_builtin_signbit): Adjust for new int_mode_for_mode
return type.
* cfgexpand.c (expand_debug_expr): Likewise.
* combine.c (gen_lowpart_or_truncate): Likewise.
(gen_lowpart_for_combine): Likewise.
* config/aarch64/aarch64.c (aarch64_emit_approx_sqrt): Likewise.
* config/avr/avr.c (avr_to_int_mode): Likewise.
(avr_out_plus_1): Likewise.
(avr_out_plus): Likewise.
(avr_out_round): Likewise.
* config/i386/i386.c (ix86_split_to_parts): Likewise.
* config/s390/s390.c (s390_expand_vec_compare_cc): Likewise.
(s390_expand_vcond): Likewise.
* config/spu/spu.c (spu_split_immediate): Likewise.
(spu_expand_mov): Likewise.
* dse.c (get_stored_val): Likewise.
* expmed.c (store_bit_field_1): Likewise.
(convert_extracted_bit_field): Use int_mode_for_mode instead of
int_mode_for_size.
(extract_bit_field_1): Adjust for new int_mode_for_mode return type.
(extract_low_bits): Likewise.
* expr.c (emit_group_load_1): Likewise. Separate out the BLKmode
handling rather than repeating the check.
(emit_group_store): Likewise.
(emit_move_via_integer): Adjust for new int_mode_for_mode return type.
* optabs.c (expand_absneg_bit): Likewise.
(expand_copysign_absneg): Likewise.
(expand_copysign_bit): Likewise.
* tree-if-conv.c (ifcvt_can_use_mask_load_store): Likewise.
* tree-vect-slp.c (vect_transform_slp_perm_load): Likewise.
* tree-vect-stmts.c (vect_gen_perm_mask_any): Likewise.
* var-tracking.c (prepare_call_arguments): Likewise.
* config/powerpcspe/powerpcspe.c (rs6000_do_expand_vec_perm): Use
int_mode_for_mode instead of mode_for_size.
* config/rs6000/rs6000.c (rs6000_do_expand_vec_perm): Likewise.
Co-Authored-By: Alan Hayward <alan.hayward@arm.com>
Co-Authored-By: David Sherwood <david.sherwood@arm.com>
From-SVN: r251470
|
|
This patch adds a wrapper around mode_for_size for cases in which
the mode class is MODE_INT (the commonest case). The return type
can then be an opt_scalar_int_mode instead of a machine_mode.
2017-08-30 Richard Sandiford <richard.sandiford@linaro.org>
Alan Hayward <alan.hayward@arm.com>
David Sherwood <david.sherwood@arm.com>
gcc/
* machmode.h (int_mode_for_size): New function.
* builtins.c (set_builtin_user_assembler_name): Use int_mode_for_size
instead of mode_for_size.
* calls.c (save_fixed_argument_area): Likewise. Make use of BLKmode
explicit.
* combine.c (expand_field_assignment): Use int_mode_for_size
instead of mode_for_size.
(make_extraction): Likewise.
(simplify_shift_const_1): Likewise.
(simplify_comparison): Likewise.
* dojump.c (do_jump): Likewise.
* dwarf2out.c (mem_loc_descriptor): Likewise.
* emit-rtl.c (init_derived_machine_modes): Likewise.
* expmed.c (flip_storage_order): Likewise.
(convert_extracted_bit_field): Likewise.
* expr.c (copy_blkmode_from_reg): Likewise.
* graphite-isl-ast-to-gimple.c (max_mode_int_precision): Likewise.
* internal-fn.c (expand_mul_overflow): Likewise.
* lower-subreg.c (simple_move): Likewise.
* optabs-libfuncs.c (init_optabs): Likewise.
* simplify-rtx.c (simplify_unary_operation_1): Likewise.
* tree.c (vector_type_mode): Likewise.
* tree-ssa-strlen.c (handle_builtin_memcmp): Likewise.
* tree-vect-data-refs.c (vect_lanes_optab_supported_p): Likewise.
* tree-vect-generic.c (expand_vector_parallel): Likewise.
* tree-vect-stmts.c (vectorizable_load): Likewise.
(vectorizable_store): Likewise.
gcc/ada/
* gcc-interface/decl.c (gnat_to_gnu_entity): Use int_mode_for_size
instead of mode_for_size.
(gnat_to_gnu_subprog_type): Likewise.
* gcc-interface/utils.c (make_type_from_size): Likewise.
Co-Authored-By: Alan Hayward <alan.hayward@arm.com>
Co-Authored-By: David Sherwood <david.sherwood@arm.com>
From-SVN: r251469
|
|
This patch adds a POD class for scalar integers, as an instance
of a new pod_mode template. Later patches will use pod_mode in
situations that really do need to be POD; this patch is simply
using PODs to remove load-time initialisation.
2017-08-30 Richard Sandiford <richard.sandiford@linaro.org>
Alan Hayward <alan.hayward@arm.com>
David Sherwood <david.sherwood@arm.com>
gcc/
* coretypes.h (pod_mode): New type.
(scalar_int_mode_pod): New typedef.
* machmode.h (pod_mode): New class.
(int_n_data_t::m): Change type to scalar_int_mode_pod.
* genmodes.c (emit_mode_int_n): Update accordingly.
* lower-subreg.h (target_lower_subreg): Change type to
scalar_int_mode_pod.
* gdbhooks.py (build_pretty_printer): Handle pod_mode and
scalar_int_mode_pod.
Co-Authored-By: Alan Hayward <alan.hayward@arm.com>
Co-Authored-By: David Sherwood <david.sherwood@arm.com>
From-SVN: r251468
|
|
Similar to the previous scalar_float_mode patch, but for modes that
satisfy SCALAR_INT_MODE_P. There are very many uses of scalar integers,
so this patch only makes a token change to the types of byte_mode,
word_mode, ptr_mode and rs6000_pmode. The next patches in the series
gradually replace more uses.
The patch also removes and adds casts to some target-specific code
due to the new types of SImode, DImode and Pmode.
The as_a <scalar_int_mode> goes away in a later patch.
2017-08-30 Richard Sandiford <richard.sandiford@linaro.org>
Alan Hayward <alan.hayward@arm.com>
David Sherwood <david.sherwood@arm.com>
gcc/
* config/powerpcspe/powerpcspe.h (rs6000_pmode): Change type from
machine_mode to scalar_int_mode.
* config/powerpcspe/powerpcspe.c (rs6000_pmode): Likewise.
(rs6000_option_override_internal): Remove cast to int.
* config/rs6000/rs6000.h (rs6000_pmode): Change type from
machine_mode to scalar_int_mode.
* config/rs6000/rs6000.c (rs6000_pmode): Likewise.
(rs6000_option_override_internal): Remove cast to int.
* config/s390/s390.h (Pmode): Remove cast to machine_mode.
* config/epiphany/epiphany.h (RTX_OK_FOR_OFFSET_P): Add cast
to machine_mode.
* config/s390/s390.c (s390_expand_builtin): Likewise.
* coretypes.h (scalar_int_mode): New type.
(opt_scalar_int_mode): New typedef.
* machmode.h (scalar_int_mode): New class.
(scalar_int_mode::includes_p): New function.
(byte_mode): Change type to scalar_int_mode.
(word_mode): Likewise.
(ptr_mode): Likewise.
* emit-rtl.c (byte_mode): Likewise.
(word_mode): Likewise.
(ptr_mode): Likewise.
(init_derived_machine_modes): Update accordingly.
* genmodes.c (get_mode_class): Return scalar_int_mode for MODE_INT
and MODE_PARTIAL_INT.
* gdbhooks.py (build_pretty_printer): Handle scalar_int_mode and
opt_scalar_int_mode.
Co-Authored-By: Alan Hayward <alan.hayward@arm.com>
Co-Authored-By: David Sherwood <david.sherwood@arm.com>
From-SVN: r251467
|
|
This means that we know when accessing the modes that the size is
a compile-time constant, even for SVE. It also enables stricter
type safety in later patches.
2017-08-30 Richard Sandiford <richard.sandiford@linaro.org>
Alan Hayward <alan.hayward@arm.com>
David Sherwood <david.sherwood@arm.com>
gcc/
* machmode.h (mode_iterator::start): Provide overload for opt_modes.
(mode_iterator::iterate_p): Likewise.
(mode_iterator::get_wider): Likewise.
* expr.c (init_expr_target): Use opt_scalar_float_mode.
gcc/ada/
* gcc-interface/misc.c (fp_prec_to_size): Use opt_scalar_float_mode.
(fp_size_to_prec): Likewise.
gcc/c-family/
* c-cppbuiltin.c (c_cpp_builtins): Use opt_scalar_float_mode.
gcc/fortran/
* trans-types.c (gfc_init_kinds): Use opt_scalar_float_mode
and FOR_EACH_MODE_IN_CLASS.
Co-Authored-By: Alan Hayward <alan.hayward@arm.com>
Co-Authored-By: David Sherwood <david.sherwood@arm.com>
From-SVN: r251464
|
|
This provides a type-safe way to ask for a float mode and get it as a
scalar_float_mode.
2017-08-30 Richard Sandiford <richard.sandiford@linaro.org>
Alan Hayward <alan.hayward@arm.com>
David Sherwood <david.sherwood@arm.com>
gcc/
* coretypes.h (opt_scalar_float_mode): New typedef.
* machmode.h (float_mode_for_size): New function.
* emit-rtl.c (double_mode): Delete.
(init_emit_once): Use float_mode_for_size.
* stor-layout.c (layout_type): Likewise.
* gdbhooks.py (build_pretty_printer): Handle opt_scalar_float_mode.
Co-Authored-By: Alan Hayward <alan.hayward@arm.com>
Co-Authored-By: David Sherwood <david.sherwood@arm.com>
From-SVN: r251463
|
|
This patch adds a scalar_float_mode class, which wraps a mode enum
that is known to satisfy SCALAR_FLOAT_MODE_P. Things like "SFmode"
now give a scalar_float_mode object instead of a machine_mode.
This in turn needs a change to the real.h format_helper, so that
it can accept both machine_modes and scalar_float_modes.
2017-08-30 Richard Sandiford <richard.sandiford@linaro.org>
Alan Hayward <alan.hayward@arm.com>
David Sherwood <david.sherwood@arm.com>
gcc/
* coretypes.h (scalar_float_mode): New type.
* machmode.h (mode_traits::from_int): Use machine_mode if
USE_ENUM_MODES is defined.
(is_a): New function.
(as_a): Likewise.
(dyn_cast): Likewise.
(scalar_float_mode): New class.
(scalar_float_mode::includes_p): New function.
(is_float_mode): Likewise.
* gdbhooks.py (MachineModePrinter): New class.
(build_pretty_printer): Use it for scalar_float_mode.
* real.h (FLOAT_MODE_FORMAT): Use as_a <scalar_float_mode>.
(format_helper::format_helper): Turn into a template.
* genmodes.c (get_mode_class): New function.
(emit_insn_modes_h): Give modes the class returned by get_mode_class,
or machine_mode if none.
* config/aarch64/aarch64.c (aarch64_simd_valid_immediate): Use
as_a <scalar_float_mode>.
* dwarf2out.c (mem_loc_descriptor): Likewise.
(insert_float): Likewise.
(add_const_value_attribute): Likewise.
* simplify-rtx.c (simplify_immed_subreg): Likewise.
* optabs.c (expand_absneg_bit): Take a scalar_float_mode.
(expand_unop): Update accordingly.
(expand_abs_nojump): Likewise.
(expand_copysign_absneg): Take a scalar_float_mode.
(expand_copysign_bit): Likewise.
(expand_copysign): Update accordingly.
gcc/ada/
* gcc-interface/utils.c (gnat_type_for_mode): Use is_a
<scalar_float_mode> instead of SCALAR_FLOAT_MODE_P.
gcc/go/
* go-lang.c (go_langhook_type_for_mode): Use is_float_mode.
Co-Authored-By: Alan Hayward <alan.hayward@arm.com>
Co-Authored-By: David Sherwood <david.sherwood@arm.com>
From-SVN: r251458
|
|
GET_MODE_WIDER previously returned VOIDmode if no wider mode existed.
That would cause problems with stricter mode classes, since VOIDmode
isn't for example a valid scalar integer or floating-point mode.
This patch instead makes it return a new opt_mode<T> class, which
holds either a T or nothing.
2017-08-30 Richard Sandiford <richard.sandiford@linaro.org>
Alan Hayward <alan.hayward@arm.com>
David Sherwood <david.sherwood@arm.com>
gcc/
* coretypes.h (opt_mode): New class.
* machmode.h (opt_mode): Likewise.
(opt_mode::else_void): New function.
(opt_mode::require): Likewise.
(opt_mode::exists): Likewise.
(GET_MODE_WIDER_MODE): Turn into a function and return an opt_mode.
(GET_MODE_2XWIDER_MODE): Likewise.
(mode_iterator::get_wider): Update accordingly.
(mode_iterator::get_2xwider): Likewise.
(mode_iterator::get_known_wider): Likewise, turning into a template.
* combine.c (make_extraction): Update use of GET_MODE_WIDER_MODE,
forcing a wider mode to exist.
* config/cr16/cr16.h (LONG_REG_P): Likewise.
* rtlanal.c (init_num_sign_bit_copies_in_rep): Likewise.
* config/c6x/c6x.c (c6x_rtx_costs): Update use of
GET_MODE_2XWIDER_MODE, forcing a wider mode to exist.
* lower-subreg.c (init_lower_subreg): Likewise.
* optabs-libfuncs.c (init_sync_libfuncs_1): Likewise, but not
on the final iteration.
* config/i386/i386.c (ix86_expand_set_or_movmem): Check whether
a wider mode exists before asking for a move pattern.
(get_mode_wider_vector): Update use of GET_MODE_WIDER_MODE,
forcing a wider mode to exist.
(expand_vselect_vconcat): Update use of GET_MODE_2XWIDER_MODE,
returning false if no such mode exists.
* config/ia64/ia64.c (expand_vselect_vconcat): Likewise.
* config/mips/mips.c (mips_expand_vselect_vconcat): Likewise.
* expmed.c (init_expmed_one_mode): Update use of GET_MODE_WIDER_MODE.
Avoid checking for a MODE_INT if we already know the mode is not a
SCALAR_INT_MODE_P.
(extract_high_half): Update use of GET_MODE_WIDER_MODE,
forcing a wider mode to exist.
(expmed_mult_highpart_optab): Likewise.
(expmed_mult_highpart): Likewise.
* expr.c (expand_expr_real_2): Update use of GET_MODE_WIDER_MODE,
using else_void.
* lto-streamer-in.c (lto_input_mode_table): Likewise.
* optabs-query.c (find_widening_optab_handler_and_mode): Likewise.
* stor-layout.c (bit_field_mode_iterator::next_mode): Likewise.
* internal-fn.c (expand_mul_overflow): Update use of
GET_MODE_2XWIDER_MODE.
* omp-low.c (omp_clause_aligned_alignment): Likewise.
* tree-ssa-math-opts.c (convert_mult_to_widen): Update use of
GET_MODE_WIDER_MODE.
(convert_plusminus_to_widen): Likewise.
* tree-switch-conversion.c (array_value_type): Likewise.
* var-tracking.c (emit_note_insn_var_location): Likewise.
* tree-vrp.c (simplify_float_conversion_using_ranges): Likewise.
Return false inside rather than outside the loop if no wider mode
exists
* optabs.c (expand_binop): Update use of GET_MODE_WIDER_MODE
and GET_MODE_2XWIDER_MODE
(can_compare_p): Use else_void.
* gdbhooks.py (OptMachineModePrinter): New class.
(build_pretty_printer): Use it for opt_mode.
gcc/ada/
* gcc-interface/decl.c (validate_size): Update use of
GET_MODE_WIDER_MODE, forcing a wider mode to exist.
Co-Authored-By: Alan Hayward <alan.hayward@arm.com>
Co-Authored-By: David Sherwood <david.sherwood@arm.com>
From-SVN: r251457
|
|
The new iterators are:
- FOR_EACH_MODE_IN_CLASS: iterate over all the modes in a mode class.
- FOR_EACH_MODE_FROM: iterate over all the modes in a class,
starting at a given mode.
- FOR_EACH_WIDER_MODE: iterate over all the modes in a class,
starting at the next widest mode after a given mode.
- FOR_EACH_2XWIDER_MODE: same, but considering only modes that
are two times wider than the previous mode.
- FOR_EACH_MODE_UNTIL: iterate over all the modes in a class until
a given mode is reached.
- FOR_EACH_MODE: iterate over all the modes in a class between
two given modes, inclusive of the first but not the second.
These help with the stronger type checking added by later patches,
since every new mode will be in the same class as the previous one.
2017-08-30 Richard Sandiford <richard.sandiford@linaro.org>
Alan Hayward <alan.hayward@arm.com>
David Sherwood <david.sherwood@arm.com>
gcc/
* machmode.h (mode_traits): New structure.
(get_narrowest_mode): New function.
(mode_iterator::start): Likewise.
(mode_iterator::iterate_p): Likewise.
(mode_iterator::get_wider): Likewise.
(mode_iterator::get_known_wider): Likewise.
(mode_iterator::get_2xwider): Likewise.
(FOR_EACH_MODE_IN_CLASS): New mode iterator.
(FOR_EACH_MODE): Likewise.
(FOR_EACH_MODE_FROM): Likewise.
(FOR_EACH_MODE_UNTIL): Likewise.
(FOR_EACH_WIDER_MODE): Likewise.
(FOR_EACH_2XWIDER_MODE): Likewise.
* builtins.c (expand_builtin_strlen): Use new mode iterators.
* combine.c (simplify_comparison): Likewise
* config/i386/i386.c (type_natural_mode): Likewise.
* cse.c (cse_insn): Likewise.
* dse.c (find_shift_sequence): Likewise.
* emit-rtl.c (init_derived_machine_modes): Likewise.
(init_emit_once): Likewise.
* explow.c (hard_function_value): Likewise.
* expmed.c (extract_fixed_bit_field_1): Likewise.
(extract_bit_field_1): Likewise.
(expand_divmod): Likewise.
(emit_store_flag_1): Likewise.
* expr.c (init_expr_target): Likewise.
(convert_move): Likewise.
(alignment_for_piecewise_move): Likewise.
(widest_int_mode_for_size): Likewise.
(emit_block_move_via_movmem): Likewise.
(copy_blkmode_to_reg): Likewise.
(set_storage_via_setmem): Likewise.
(compress_float_constant): Likewise.
* omp-low.c (omp_clause_aligned_alignment): Likewise.
* optabs-query.c (get_best_extraction_insn): Likewise.
* optabs.c (expand_binop): Likewise.
(expand_twoval_unop): Likewise.
(expand_twoval_binop): Likewise.
(widen_leading): Likewise.
(widen_bswap): Likewise.
(expand_parity): Likewise.
(expand_unop): Likewise.
(prepare_cmp_insn): Likewise.
(prepare_float_lib_cmp): Likewise.
(expand_float): Likewise.
(expand_fix): Likewise.
(expand_sfix_optab): Likewise.
* postreload.c (move2add_use_add2_insn): Likewise.
* reg-stack.c (reg_to_stack): Likewise.
* reginfo.c (choose_hard_reg_mode): Likewise.
* rtlanal.c (init_num_sign_bit_copies_in_rep): Likewise.
* stor-layout.c (mode_for_size): Likewise.
(smallest_mode_for_size): Likewise.
(mode_for_vector): Likewise.
(finish_bitfield_representative): Likewise.
* tree-ssa-math-opts.c (target_supports_divmod_p): Likewise.
* tree-vect-generic.c (type_for_widest_vector_mode): Likewise.
* tree-vect-stmts.c (vectorizable_conversion): Likewise.
* var-tracking.c (prepare_call_arguments): Likewise.
gcc/ada/
* gcc-interface/misc.c (fp_prec_to_size): Use new mode iterators.
(fp_size_to_prec): Likewise.
gcc/c-family/
* c-common.c (c_common_fixed_point_type_for_size): Use new mode
iterators.
* c-cppbuiltin.c (c_cpp_builtins): Likewise.
Co-Authored-By: Alan Hayward <alan.hayward@arm.com>
Co-Authored-By: David Sherwood <david.sherwood@arm.com>
From-SVN: r251455
|
|
This patch makes various changes that allow modes like SImode to be
classes rather than enums.
Firstly, it adds inline functions for all mode size properties,
with the macros being simple wrappers around them. This is necessary
for the __builtin_constant_p trick to continue working effectively when
the mode arguments are slightly more complex (but still foldable at
compile time).
These inline functions are trivial and heavily used. There's not much
point keeping them out-of-line at -O0: if anything it would make
debugging harder rather than easier, and it would also slow things down.
The patch therefore marks them as "always_inline", if that's available.
Later patches use this approach too.
Using inline functions means that it's no longer possible to pass
an int to GET_MODE_PRECISION etc. The Fortran and powerpcspe-c.c
parts are needed to avoid instances of that.
The patch continues to use enums for gencondmd.c, so that more
mode comparisons are integer constant expressions when checking
for always-true or always-false conditions. This is the only
intended use of USE_ENUM_MODES.
The patch also enforces the previous replacement of case statements
by defining modes as:
#define FOOmode ((void) 0, E_FOOmode)
This adds no overhead but makes sure that new uses of "case FOOmode:"
don't accidentally creep in when FOOmode has no specific class associated
with it.
2017-08-30 Richard Sandiford <richard.sandiford@linaro.org>
Alan Hayward <alan.hayward@arm.com>
David Sherwood <david.sherwood@arm.com>
gcc/
* genconditions.c (write_header): Add a "#define USE_ENUM_MODES".
* genmodes.c (emit_insn_modes_h): Define FOOmode to E_FOOmode if
USE_ENUM_MODES is defined and to ((void) 0, E_FOOmode) otherwise.
* machmode.h (mode_size): Move earlier in file.
(mode_precision): Likewise.
(mode_inner): Likewise.
(mode_nunits): Likewise.
(mode_unit_size): Likewise.
(unit_unit_precision): Likewise.
(mode_wider): Likewise.
(mode_2xwider): Likewise.
(machine_mode): New class.
(mode_to_bytes): New function.
(mode_to_bits): Likewise.
(mode_to_precision): Likewise.
(mode_to_inner): Likewise.
(mode_to_unit_size): Likewise.
(mode_to_unit_precision): Likewise.
(mode_to_nunits): Likewise.
(GET_MODE_SIZE): Use mode_to_bytes.
(GET_MODE_BITSIZE): Use mode_to_bits.
(GET_MODE_PRECISION): Use mode_to_precision.
(GET_MODE_INNER): Use mode_to_inner.
(GET_MODE_UNIT_SIZE): Use mode_to_unit_size.
(GET_MODE_UNIT_PRECISION): Use mode_to_unit_precision.
(GET_MODE_NUNITS): Use mode_to_nunits.
* system.h (ALWAYS_INLINE): New macro.
* config/powerpcspe/powerpcspe-c.c
(altivec_resolve_overloaded_builtin): Use machine_mode instead of
int for arg1_mode and arg2_mode.
gcc/fortran/
* trans-types.c (gfc_init_kinds): Use machine_mode instead of int
for "mode".
Co-Authored-By: Alan Hayward <alan.hayward@arm.com>
Co-Authored-By: David Sherwood <david.sherwood@arm.com>
From-SVN: r251454
|
|
This patch splits the auto-generated inline functions out of
insn-modes.h and puts them in a new header file, insn-modes-inline.h.
It also makes coretypes.h include these files directly, rather than
indirectly via machmode.h. This in turn allows insn-modes-inline.h
and machmode.h to come later in the include list, after wide-int.h.
This is useful for later patches.
insn-modes.h itself still needs to come first, since it provides
configuration information like MAX_BITSIZE_MODE_ANY_INT, which is
used to control the size of a wide_int.
The patch also makes the generator files include machmode.h
via coretypes.h. Previously they did it by more indirect means.
Finally, the patch makes wide-int-print.h available via coretypes.h
too. There didn't seem to be any reason to force only the print
routines to be included directly, and it would be painful to extend
that approach to the SVE patches.
[Based on the code ARM contributed in branches/ARM/sve-branch@242100]
2017-07-02 Richard Sandiford <richard.sandiford@linaro.org>
Alan Hayward <alan.hayward@arm.com>
David Sherwood <david.sherwood@arm.com>
contrib/header-tools/
* graph-header-logs (ignore): Update coretypes.h header list.
gcc/
* Makefile.in (MACHMODE_H): Remove insn-modes.h
(CORETYPES_H): New define.
(MOSTLYCLEANFILES): Add insn-modes-inline.h.
(insn-modes-inline.h, s-modes-inline-h): New rules.
(generated_files): Add insn-modes-inline.h.
(RTL_BASE_H, TREE_CORE_H): Use CORETYPES_H instead of coretypes.h.
(build/gensupport.o, build/ggc-none.o, build/print-rtl.o): Likewise.
(build/read-md.o, build/read-rtl.o, build/rtl.o): Likewise.
(build/vec.o, build/hash-table.o, build/inchash.o): Likewise.
(build/gencondmd.o, build/genattr.o, build/genattr-common.o): Likewise.
(build/genattrtab.o, build/genautomata.o, build/gencheck.o): Likewise.
(build/gencodes.o, build/genconditions.o): Likewise.
(build/genconfig.o, build/genconstants.o, build/genemit.o): Likewise.
(build/genenums.o, build/genextract.o, build/genflags.o): Likewise.
(build/gentarget-def.o, build/genmddeps.o, build/genopinit.o)
(build/genoutput.o, build/genpeep.o, build/genpreds.o): Likewise.
(build/genrecog.o, build/genmddump.o, build/genmatch.o): Likewise.
(build/gencfn-macros.o, build/gcov-iov.o): Likewise.
* coretypes.h: Include everything up to real.h for generators.
Include insn-modes.h first. Include wide-int-print.h after
wide-int.h. Include insn-modes-inline.h and then machmode.h.
* machmode.h: Don't include insn-modes.h here.
* function-tests.c: Remove includes of signop.h, machmode.h,
double-int.h and wide-int.h.
* rtl.h: Likewise.
* gcc-rich-location.c: Remove includes of machmode.h, double-int.h
and wide-int.h.
* optc-save-gen.awk: Likewise.
* gencheck.c (BITS_PER_UNIT): Delete dummy definition.
* godump.c: Remove include of wide-int-print.h.
* pretty-print.h: Likewise.
* wide-int-print.cc: Likewise.
* wide-int.cc: Likewise.
* hash-map-tests.c: Remove include of signop.h.
* hash-set-tests.c: Likewise.
* rtl-tests.c: Likewise.
* mkconfig.sh: Remove include of machmode.h.
* genmodes.c (emit_insn_modes_h): Split emission of inline functions
into...
(emit_insn_modes_inline_h): ...this new function. Emit the code
into an insn-modes-inline.h header file, adding appropriate
include guards and end comments.
(emit_insn_modes_c_header): Remove include of machmode.h.
(emit_min_insn_modes_c_header): Include coretypes.h rather than
machmode.h.
(main): Handle -i flag and call emit_insn_modes_inline_h when
it is passed.
Co-Authored-By: Alan Hayward <alan.hayward@arm.com>
Co-Authored-By: David Sherwood <david.sherwood@arm.com>
From-SVN: r249881
|
|
From-SVN: r243994
|
|
This requires additional patch for register allocator from Vladimir
Makarov.
gcc/
2016-11-17 Kirill Yukhin <kirill.yukhin@gmail.com>
Andrew Senkevich <andrew.senkevich@intel.com>
* common/config/i386/i386-common.c
(OPTION_MASK_ISA_AVX5124FMAPS_SET,
OPTION_MASK_ISA_AVX5124FMAPS_UNSET,
OPTION_MASK_ISA_AVX5124VNNIW_SET,
OPTION_MASK_ISA_AVX5124VNNIW_UNSET): New.
(ix86_handle_option): Handle OPT_mavx5124fmaps,
OPT_mavx5124vnniw.
* config.gcc: Add avx5124fmapsintrin.h, avx5124vnniwintrin.h.
* config/i386/avx5124fmapsintrin.h: New file.
* config/i386/avx5124vnniwintrin.h: Ditto.
* config/i386/constraints.md (h): New constraint.
* config/i386/cpuid.h: (bit_AVX5124VNNIW,
bit_AVX5124FMAPS): New.
* config/i386/driver-i386.c (host_detect_local_cpu):
Detect avx5124fmaps, avx5124vnniw.
* config/i386/i386-builtin-types.def: Add types
V16SF_FTYPE_V16SF_V16SF_V16SF_V16SF_V16SF_PCV4SF_V16SF_UHI,
V16SF_FTYPE_V16SF_V16SF_V16SF_V16SF_V16SF_PCV4SF,
V4SF_FTYPE_V4SF_V4SF_V4SF_V4SF_V4SF_PCV4SF,
V4SF_FTYPE_V4SF_V4SF_V4SF_V4SF_V4SF_PCV4SF_V4SF_UQI,
V16SI_FTYPE_V16SI_V16SI_V16SI_V16SI_V16SI_PCV4SI,
V16SI_FTYPE_V16SI_V16SI_V16SI_V16SI_V16SI_PCV4SI_V16SI_UHI.
* config/i386/i386-builtin.def (__builtin_ia32_4fmaddps_mask,
__builtin_ia32_4fmaddps, __builtin_ia32_4fmaddss,
__builtin_ia32_4fmaddss_mask, __builtin_ia32_4fnmaddps_mask,
__builtin_ia32_4fnmaddps, __builtin_ia32_4fnmaddss,
__builtin_ia32_4fnmaddss_mask, __builtin_ia32_vp4dpwssd,
__builtin_ia32_vp4dpwssd_mask, __builtin_ia32_vp4dpwssds,
__builtin_ia32_vp4dpwssds_mask): New.
* config/i386/i386-c.c (ix86_target_macros_internal):
Define __AVX5124FMAPS__, __AVX5124VNNIW__.
* config/i386/i386-modes.def: Fixed comment typos, added new
modes (VECTOR_MODES (FLOAT, 256), VECTOR_MODE (INT, SI, 64)).
* config/i386/i386.c (ix86_target_string): Add -mavx5124fmaps,
-mavx5124vnniw.
(PTA_AVX5124FMAPS, PTA_AVX5124VNNIW): Define.
(ix86_option_override_internal): Handle new options.
(ix86_valid_target_attribute_inner_p): Add avx5124fmaps,
avx5124vnniw.
(ix86_expand_builtin): Handle new builtins.
(ix86_additional_allocno_class_p): New.
* config/i386/i386.h (TARGET_AVX5124FMAPS,
TARGET_AVX5124FMAPS_P,
TARGET_AVX5124VNNIW,
TARGET_AVX5124VNNIW_P): Define.
(reg_class): Add MOD4_SSE_REGS.
(MOD4_SSE_REG_P, MOD4_SSE_REGNO_P): New.
* config/i386/i386.opt: Add mavx5124fmaps, mavx5124vnniw.
* config/i386/immintrin.h: Include avx5124fmapsintrin.h,
avx5124vnniwintrin.h.
* config/i386/sse.md (unspec): Add UNSPEC_VP4FMADD,
UNSPEC_VP4FNMADD,
UNSPEC_VP4DPWSSD, UNSPEC_VP4DPWSSDS.
(define_mode_iterator IMOD4): New.
(define_mode_attr imod4_narrow): Ditto.
(define_insn "mov<mode>"): Ditto.
(define_insn "avx5124fmaddps_4fmaddps"): Ditto.
(define_insn "avx5124fmaddps_4fmaddps_mask"): Ditto.
(define_insn "avx5124fmaddps_4fmaddps_maskz"): Ditto.
(define_insn "avx5124fmaddps_4fmaddss"): Ditto.
(define_insn "avx5124fmaddps_4fmaddss_mask"): Ditto.
(define_insn "avx5124fmaddps_4fmaddss_maskz"): Ditto.
(define_insn "avx5124fmaddps_4fnmaddps"): Ditto.
(define_insn "avx5124fmaddps_4fnmaddps_mask"): Ditto.
(define_insn "avx5124fmaddps_4fnmaddps_maskz"): Ditto.
(define_insn "avx5124fmaddps_4fnmaddss"): Ditto.
(define_insn "avx5124fmaddps_4fnmaddss_mask"): Ditto.
(define_insn "avx5124fmaddps_4fnmaddss_maskz"): Ditto.
(define_insn "avx5124vnniw_vp4dpwssd"): Ditto.
(define_insn "avx5124vnniw_vp4dpwssd_mask"): Ditto.
(define_insn "avx5124vnniw_vp4dpwssd_maskz"): Ditto.
(define_insn "avx5124vnniw_vp4dpwssds"): Ditto.
(define_insn "avx5124vnniw_vp4dpwssds_mask"): Ditto.
(define_insn "avx5124vnniw_vp4dpwssds_maskz"): Ditto.
* init-regs.c (initialize_uninitialized_regs): Add emit_clobber call.
* genmodes.c (mode_size_inline): Extend return type.
* machmode.h (mode_size, mode_base_align): Extend type.
gcc/testsuite/
2016-11-17 Kirill Yukhin <kirill.yukhin@gmail.com>
Andrew Senkevich <andrew.senkevich@intel.com>
* gcc.target/i386/avx5124fmadd-v4fmaddps-1.c: New test.
* gcc.target/i386/avx5124fmadd-v4fmaddps-2.c: Ditto.
* gcc.target/i386/avx5124fmadd-v4fmaddss-1.c: Ditto.
* gcc.target/i386/avx5124fmadd-v4fnmaddps-1.c: Ditto.
* gcc.target/i386/avx5124fmadd-v4fnmaddps-2.c: Ditto.
* gcc.target/i386/avx5124fmadd-v4fnmaddss-1.c: Ditto.
* gcc.target/i386/avx5124fmaps-check.h: Ditto.
* gcc.target/i386/avx5124vnniw-check.h: Ditto.
* gcc.target/i386/avx5124vnniw-vp4dpwssd-1.c: Ditto.
* gcc.target/i386/avx5124vnniw-vp4dpwssd-2.c: Ditto.
* gcc.target/i386/avx5124vnniw-vp4dpwssds-1.c: Ditto.
* gcc.target/i386/avx5124vnniw-vp4dpwssds-2.c: Ditto.
* gcc.target/i386/avx512f-helper.h: Add avx5124fmaps-check.h,
avx5124vnniw-check.h.
* gcc.target/i386/i386.exp (check_effective_target_avx5124fmaps,
check_effective_target_avx5124vnniw): New.
* gcc.target/i386/m128-check.h (ESP_FLOAT, ESP_DOUBLE):
Set under ifndef.
* gcc.target/i386/sse-12.c: Add -mavx5124fmaps, -mavx5124vnniw.
* gcc.target/i386/sse-13.c: Ditto.
* g++.dg/other/i386-2.C: Ditto.
* g++.dg/other/i386-3.C: Ditto.
* gcc.target/i386/sse-22.c: Ditto.
* gcc.target/i386/sse-23.c: Ditto.
From-SVN: r242569
|
|
mode.
[gcc]
2016-05-02 Michael Meissner <meissner@linux.vnet.ibm.com>
* machmode.h (mode_complex): Add support to give the complex mode
for a given mode.
(GET_MODE_COMPLEX_MODE): Likewise.
* stor-layout.c (layout_type): For COMPLEX_TYPE, use the mode
stored by build_complex_type and gfc_build_complex_type instead of
trying to figure out the appropriate mode based on the size. Raise
an assertion error, if the type was not set.
* genmodes.c (struct mode_data): Add field for the complex type of
the given type.
(blank_mode): Likewise.
(make_complex_modes): Remember the complex mode created in the
base type.
(emit_mode_complex): Write out the mode_complex array to map a
type mode to the complex version.
(emit_insn_modes_c): Likewise.
* tree.c (build_complex_type): Set the complex type to use before
calling layout_type.
* config/rs6000/rs6000.c (rs6000_hard_regno_nregs_internal): Add
support for __float128 complex datatypes.
(rs6000_hard_regno_mode_ok): Likewise.
(rs6000_setup_reg_addr_masks): Likewise.
(rs6000_complex_function_value): Likewise.
* config/rs6000/rs6000.h (FLOAT128_IEEE_P): Likewise.
__float128 and __ibm128 complex.
(FLOAT128_IBM_P): Likewise.
(ALTIVEC_ARG_MAX_RETURN): Likewise.
* doc/extend.texi (Additional Floating Types): Document that
-mfloat128 must be used to enable __float128. Document complex
__float128 and __ibm128 support.
[gcc/fortran]
2016-05-02 Michael Meissner <meissner@linux.vnet.ibm.com>
* trans-types.c (gfc_build_complex_type):
[gcc/testsuite]
2016-05-02 Michael Meissner <meissner@linux.vnet.ibm.com>
* gcc.target/powerpc/float128-complex-1.c: New tests for complex
__float128.
* gcc.target/powerpc/float128-complex-2.c: Likewise.
From-SVN: r235794
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