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2017-10-31re PR rtl-optimization/81803 (miscompilation at -O1 on mips64el)Matthew Fortune1-3/+8
PR rtl-optimization/81803 * lra-constraints.c (curr_insn_transform): Also reload the whole register for a strict subreg no wider than a word if this is for a WORD_REGISTER_OPERATIONS target. Co-Authored-By: Eric Botcazou <ebotcazou@adacore.com> From-SVN: r254275
2017-10-26Add wider_subreg_mode helper functionsRichard Sandiford1-7/+3
This patch adds helper functions that say which of the two modes involved in a subreg is the larger, preferring the outer mode in the event of a tie. It also converts IRA and reload to track modes instead of byte sizes, since this is slightly more convenient when variable-sized modes are added later. 2017-10-26 Richard Sandiford <richard.sandiford@linaro.org> Alan Hayward <alan.hayward@arm.com> David Sherwood <david.sherwood@arm.com> gcc/ * rtl.h (wider_subreg_mode): New function. * ira.h (ira_sort_regnos_for_alter_reg): Take a machine_mode * rather than an unsigned int *. * ira-color.c (regno_max_ref_width): Replace with... (regno_max_ref_mode): ...this new variable. (coalesced_pseudo_reg_slot_compare): Update accordingly. Use wider_subreg_mode. (ira_sort_regnos_for_alter_reg): Likewise. Take a machine_mode * rather than an unsigned int *. * lra-constraints.c (uses_hard_regs_p): Use wider_subreg_mode. (process_alt_operands): Likewise. (invariant_p): Likewise. * lra-spills.c (assign_mem_slot): Likewise. (add_pseudo_to_slot): Likewise. * lra.c (collect_non_operand_hard_regs): Likewise. (add_regs_to_insn_regno_info): Likewise. * reload1.c (regno_max_ref_width): Replace with... (regno_max_ref_mode): ...this new variable. (reload): Update accordingly. Update call to ira_sort_regnos_for_alter_reg. (alter_reg): Update to use regno_max_ref_mode. Call wider_subreg_mode. (init_eliminable_invariants): Update to use regno_max_ref_mode. (scan_paradoxical_subregs): Likewise. Co-Authored-By: Alan Hayward <alan.hayward@arm.com> Co-Authored-By: David Sherwood <david.sherwood@arm.com> From-SVN: r254115
2017-10-26Make more use of df_read_modify_subreg_pRichard Sandiford1-4/+2
This patch uses df_read_modify_subreg_p to check whether writing to a subreg would preserve some of the existing contents. This has the effect of putting more emphasis on the REGMODE_NATURAL_SIZE-based definition of whether something can be partially modified, instead of using UNITS_PER_WORD unconditionally. This becomes important for SVE, where UNITS_PER_WORD has no significance for subregs of multi-register LD2/ST2, LD3/ST3 and LD4/ST4 tuples. 2017-10-26 Richard Sandiford <richard.sandiford@linaro.org> Alan Hayward <alan.hayward@arm.com> David Sherwood <david.sherwood@arm.com> gcc/ * caller-save.c (mark_referenced_regs): Use read_modify_subreg_p. * combine.c (find_single_use_1): Likewise. (expand_field_assignment): Likewise. (move_deaths): Likewise. * lra-constraints.c (simplify_operand_subreg): Likewise. (curr_insn_transform): Likewise. * lra.c (collect_non_operand_hard_regs): Likewise. (add_regs_to_insn_regno_info): Likewise. * rtlanal.c (reg_referenced_p): Likewise. (covers_regno_no_parallel_p): Likewise. Co-Authored-By: Alan Hayward <alan.hayward@arm.com> Co-Authored-By: David Sherwood <david.sherwood@arm.com> From-SVN: r254110
2017-10-18re PR middle-end/82556 (internal compiler error in curr_insn_transform, at ↵Vladimir Makarov1-3/+14
lra-constraints.c:4307) 2017-10-18 Vladimir Makarov <vmakarov@redhat.com> PR middle-end/82556 * lra-constraints.c (curr_insn_transform): Use non-input operand instead of output one for matched reload. 2017-10-18 Vladimir Makarov <vmakarov@redhat.com> PR middle-end/82556 * gcc.target/i386/pr82556.c: New. From-SVN: r253862
2017-09-29re PR rtl-optimization/82338 (valgrind error in inherit_in_ebb)Vladimir Makarov1-0/+1
2017-09-29 Vladimir Makarov <vmakarov@redhat.com> PR rtl-optimization/82338 * lra-constraints.c (inherit_in_ebb): Check usage_insns check. From-SVN: r253299
2017-09-13Turn SECONDARY_MEMORY_NEEDED into a hookRichard Sandiford1-28/+13
Since the patch is going through all the definitions anyway, it seemed like a good opportunity to put the mode argument first, to match the order for register_move_cost. 2017-09-13 Richard Sandiford <richard.sandiford@linaro.org> Alan Hayward <alan.hayward@arm.com> David Sherwood <david.sherwood@arm.com> gcc/ * target.def (secondary_memory_needed): New hook. (secondary_reload): Refer to TARGET_SECONDARY_MEMORY_NEEDED instead of SECONDARY_MEMORY_NEEDED. (secondary_memory_needed_mode): Likewise. * hooks.h (hook_bool_mode_reg_class_t_reg_class_t_false): Declare. * hooks.c (hook_bool_mode_reg_class_t_reg_class_t_false): New function. * doc/tm.texi.in (SECONDARY_MEMORY_NEEDED): Replace with... (TARGET_SECONDARY_MEMORY_NEEDED): ...this. (SECONDARY_MEMORY_NEEDED_RTX): Update reference accordingly. * doc/tm.texi: Regenerate. * config/alpha/alpha.h (SECONDARY_MEMORY_NEEDED): Delete. * config/alpha/alpha.c (alpha_secondary_memory_needed): New function. (TARGET_SECONDARY_MEMORY_NEEDED): Redefine. * config/i386/i386.h (SECONDARY_MEMORY_NEEDED): Delete. * config/i386/i386-protos.h (ix86_secondary_memory_needed): Delete. * config/i386/i386.c (inline_secondary_memory_needed): Put the mode argument first and change the reg_class arguments to reg_class_t. (ix86_secondary_memory_needed): Likewise. Remove the strict parameter. Make static. Update the call to inline_secondary_memory_needed. (ix86_register_move_cost): Update the call to inline_secondary_memory_needed. (TARGET_SECONDARY_MEMORY_NEEDED): Redefine. * config/ia64/ia64.h (SECONDARY_MEMORY_NEEDED): Delete commented-out definition. * config/ia64/ia64.c (spill_xfmode_rfmode_operand): Refer to TARGET_SECONDARY_MEMORY_NEEDED rather than SECONDARY_MEMORY_NEEDED in comment. * config/mips/mips.h (SECONDARY_MEMORY_NEEDED): Delete. * config/mips/mips-protos.h (mips_secondary_memory_needed): Delete. * config/mips/mips.c (mips_secondary_memory_needed): Make static and match hook interface. Add comment from mips.h. (TARGET_SECONDARY_MEMORY_NEEDED): Redefine. * config/mmix/mmix.md (truncdfsf2): Refer to TARGET_SECONDARY_MEMORY_NEEDED rather than SECONDARY_MEMORY_NEEDED in comment. * config/pa/pa-64.h (SECONDARY_MEMORY_NEEDED): Rename to... (PA_SECONDARY_MEMORY_NEEDED): ...this, and put the mode argument first. * config/pa/pa.c (TARGET_SECONDARY_MEMORY_NEEDED): Redefine. (pa_secondary_memory_needed): New function. * config/pdp11/pdp11.h (SECONDARY_MEMORY_NEEDED): Delete. * config/pdp11/pdp11-protos.h (pdp11_secondary_memory_needed): Delete. * config/pdp11/pdp11.c (TARGET_SECONDARY_MEMORY_NEEDED): Redefine. (pdp11_secondary_memory_needed): Make static and match hook interface. * config/powerpcspe/powerpcspe.h (SECONDARY_MEMORY_NEEDED): Delete. * config/powerpcspe/powerpcspe-protos.h (rs6000_secondary_memory_needed_ptr): Delete. * config/powerpcspe/powerpcspe.c (rs6000_secondary_memory_needed_ptr): Delete. (TARGET_SECONDARY_MEMORY_NEEDED): Redefine. (rs6000_option_override_internal): Assign to targetm.secondary_memory_needed rather than rs6000_secondary_memory_needed_ptr. (rs6000_secondary_memory_needed): Match hook interface. (rs6000_debug_secondary_memory_needed): Likewise. * config/riscv/riscv.h (SECONDARY_MEMORY_NEEDED): Delete. * config/riscv/riscv.c (riscv_secondary_memory_needed): New function. (riscv_register_move_cost): Use it instead of SECONDARY_MEMORY_NEEDED. (TARGET_SECONDARY_MEMORY_NEEDED): Redefine. * config/rs6000/rs6000.h (SECONDARY_MEMORY_NEEDED): Delete. * config/rs6000/rs6000-protos.h (rs6000_secondary_memory_needed_ptr): Delete. * config/rs6000/rs6000.c (rs6000_secondary_memory_needed_ptr): Delete. (TARGET_SECONDARY_MEMORY_NEEDED): Redefine. (rs6000_option_override_internal): Assign to targetm.secondary_memory_needed rather than rs6000_secondary_memory_needed_ptr. (rs6000_secondary_memory_needed): Match hook interface. (rs6000_debug_secondary_memory_needed): Likewise. * config/s390/s390.h (SECONDARY_MEMORY_NEEDED): Delete. * config/s390/s390.c (s390_secondary_memory_needed): New function. (TARGET_SECONDARY_MEMORY_NEEDED): Redefine. * config/sparc/sparc.h (SECONDARY_MEMORY_NEEDED): Delete. * config/sparc/sparc.c (TARGET_SECONDARY_MEMORY_NEEDED): Redefine. (sparc_secondary_memory_needed): New function. * lra-constraints.c (check_and_process_move): Refer to TARGET_SECONDARY_MEMORY_NEEDED rather than SECONDARY_MEMORY_NEEDED in comment. (curr_insn_transform): Likewise. (process_alt_operands): Use targetm.secondary_memory_needed instead of TARGET_SECONDARY_MEMORY_NEEDED. (check_secondary_memory_needed_p): Likewise. (choose_split_class): Likewise. * reload.c: Unconditionally include code that was previously conditional on SECONDARY_MEMORY_NEEDED. (push_secondary_reload): Use targetm.secondary_memory_needed instead of TARGET_SECONDARY_MEMORY_NEEDED. (push_reload): Likewise. * reload1.c: Unconditionally include code that was previously conditional on SECONDARY_MEMORY_NEEDED. (choose_reload_regs): Use targetm.secondary_memory_needed instead of TARGET_SECONDARY_MEMORY_NEEDED. (gen_reload): Likewise. * system.h (SECONDARY_MEMORY_NEEDED): Poison. Co-Authored-By: Alan Hayward <alan.hayward@arm.com> Co-Authored-By: David Sherwood <david.sherwood@arm.com> From-SVN: r252461
2017-09-13Turn SECONDARY_MEMORY_NEEDED_MODE into a target hookRichard Sandiford1-9/+3
This includes a change to LRA. Previously the code was: if (sclass == NO_REGS && dclass == NO_REGS) return false; #ifdef SECONDARY_MEMORY_NEEDED if (SECONDARY_MEMORY_NEEDED (sclass, dclass, GET_MODE (src)) #ifdef SECONDARY_MEMORY_NEEDED_MODE && ((sclass != NO_REGS && dclass != NO_REGS) || GET_MODE (src) != SECONDARY_MEMORY_NEEDED_MODE (GET_MODE (src))) #endif ) { *sec_mem_p = true; return false; } #endif in which the positioning of the second ifdef meant that defining SECONDARY_MEMORY_NEEDED_MODE to its default value was not a no-op: without a definition, we would consider using secondary reloads for mem<-reg and reg<-mem reloads even if the secondary memory has the same mode as the original mem, while defining it would avoid this. The latter behaviour seems correct. The default is different for reload and LRA. For LRA the default is to use the original mode, while reload promotes smaller-than-word integral modes to word mode: if (GET_MODE_BITSIZE (mode) < BITS_PER_WORD && INTEGRAL_MODE_P (mode)) mode = mode_for_size (BITS_PER_WORD, GET_MODE_CLASS (mode), 0).require (); Some of the ports that have switched to LRA seemed to have SECONDARY_MEMORY_NEEDED_MDOEs based on the old reload definition, and still referred to the reload.c:get_secondary_mem function in the comments. The patch just keeps them as-is. 2017-09-13 Richard Sandiford <richard.sandiford@linaro.org> Alan Hayward <alan.hayward@arm.com> David Sherwood <david.sherwood@arm.com> gcc/ * target.def (secondary_memory_needed_mode): New hook: * targhooks.c (default_secondary_memory_needed_mode): Declare. * targhooks.h (default_secondary_memory_needed_mode): New function. * doc/tm.texi.in (SECONDARY_MEMORY_NEEDED_MODE): Replace with... (TARGET_SECONDARY_MEMORY_NEEDED_MODE): ...this. * doc/tm.texi: Regenerate. * lra-constraints.c (check_and_process_move): Use targetm.secondary_memory_needed_mode instead of TARGET_SECONDARY_MEMORY_NEEDED_MODE. (curr_insn_transform): Likewise. * reload.c (get_secondary_mem): Likewise. * config/alpha/alpha.h (SECONDARY_MEMORY_NEEDED_MODE): Delete. * config/alpha/alpha.c (alpha_secondary_memory_needed_mode): New function. (TARGET_SECONDARY_MEMORY_NEEDED_MODE): Redefine. * config/i386/i386.h (SECONDARY_MEMORY_NEEDED_MODE): Delete. * config/i386/i386.c (ix86_secondary_memory_needed_mode): New function. (TARGET_SECONDARY_MEMORY_NEEDED_MODE): Redefine. * config/powerpcspe/powerpcspe.h (SECONDARY_MEMORY_NEEDED_MODE): Delete. * config/powerpcspe/powerpcspe-protos.h (rs6000_secondary_memory_needed_mode): Delete. * config/powerpcspe/powerpcspe.c (TARGET_SECONDARY_MEMORY_NEEDED_MODE): Redefine. (rs6000_secondary_memory_needed_mode): Make static. * config/rs6000/rs6000.h (SECONDARY_MEMORY_NEEDED_MODE): Delete. * config/rs6000/rs6000-protos.h (rs6000_secondary_memory_needed_mode): Delete. * config/rs6000/rs6000.c (TARGET_SECONDARY_MEMORY_NEEDED_MODE): Redefine. (rs6000_secondary_memory_needed_mode): Make static. * config/s390/s390.h (SECONDARY_MEMORY_NEEDED_MODE): Delete. * config/s390/s390.c (s390_secondary_memory_needed_mode): New function. (TARGET_SECONDARY_MEMORY_NEEDED_MODE): Redefine. * config/sparc/sparc.h (SECONDARY_MEMORY_NEEDED_MODE): Delete. * config/sparc/sparc.c (TARGET_SECONDARY_MEMORY_NEEDED_MODE): Redefine. (sparc_secondary_memory_needed_mode): New function. * system.h (TARGET_SECONDARY_MEMORY_NEEDED_MODE): Poison. Co-Authored-By: Alan Hayward <alan.hayward@arm.com> Co-Authored-By: David Sherwood <david.sherwood@arm.com> From-SVN: r252455
2017-09-12Convert hard_regno_nregs to a functionRichard Sandiford1-13/+15
This patch converts hard_regno_nregs into an inline function, which in turn allows hard_regno_nregs to be used as the name of a targetm field. This is just a mechanical change. 2017-09-12 Richard Sandiford <richard.sandiford@linaro.org> gcc/ * regs.h (hard_regno_nregs): Turn into a function. (end_hard_regno): Update accordingly. * caller-save.c (setup_save_areas): Likewise. (save_call_clobbered_regs): Likewise. (replace_reg_with_saved_mem): Likewise. (insert_restore): Likewise. (insert_save): Likewise. * combine.c (can_change_dest_mode): Likewise. (move_deaths): Likewise. (distribute_notes): Likewise. * config/mips/mips.c (mips_hard_regno_call_part_clobbered): Likewise. * config/powerpcspe/powerpcspe.c (rs6000_cannot_change_mode_class) (rs6000_split_multireg_move): Likewise. (rs6000_register_move_cost): Likewise. (rs6000_memory_move_cost): Likewise. * config/rs6000/rs6000.c (rs6000_cannot_change_mode_class): Likewise. (rs6000_split_multireg_move): Likewise. (rs6000_register_move_cost): Likewise. (rs6000_memory_move_cost): Likewise. * cselib.c (cselib_reset_table): Likewise. (cselib_lookup_1): Likewise. * emit-rtl.c (set_mode_and_regno): Likewise. * function.c (aggregate_value_p): Likewise. * ira-color.c (setup_profitable_hard_regs): Likewise. (check_hard_reg_p): Likewise. (calculate_saved_nregs): Likewise. (assign_hard_reg): Likewise. (improve_allocation): Likewise. (calculate_spill_cost): Likewise. * ira-emit.c (modify_move_list): Likewise. * ira-int.h (ira_hard_reg_set_intersection_p): Likewise. (ira_hard_reg_in_set_p): Likewise. * ira.c (setup_reg_mode_hard_regset): Likewise. (clarify_prohibited_class_mode_regs): Likewise. (check_allocation): Likewise. * lra-assigns.c (find_hard_regno_for_1): Likewise. (lra_setup_reg_renumber): Likewise. (setup_try_hard_regno_pseudos): Likewise. (spill_for): Likewise. (assign_hard_regno): Likewise. (setup_live_pseudos_and_spill_after_risky_transforms): Likewise. * lra-constraints.c (in_class_p): Likewise. (lra_constraint_offset): Likewise. (simplify_operand_subreg): Likewise. (lra_constraints): Likewise. (split_reg): Likewise. (split_if_necessary): Likewise. (invariant_p): Likewise. (inherit_in_ebb): Likewise. * lra-lives.c (process_bb_lives): Likewise. * lra-remat.c (reg_overlap_for_remat_p): Likewise. (get_hard_regs): Likewise. (do_remat): Likewise. * lra-spills.c (assign_spill_hard_regs): Likewise. * mode-switching.c (create_pre_exit): Likewise. * postreload.c (reload_combine_recognize_pattern): Likewise. * recog.c (peep2_find_free_register): Likewise. * regcprop.c (kill_value_regno): Likewise. (set_value_regno): Likewise. (copy_value): Likewise. (maybe_mode_change): Likewise. (find_oldest_value_reg): Likewise. (copyprop_hardreg_forward_1): Likewise. * regrename.c (check_new_reg_p): Likewise. (regrename_do_replace): Likewise. * reload.c (push_reload): Likewise. (combine_reloads): Likewise. (find_dummy_reload): Likewise. (operands_match_p): Likewise. (find_reloads): Likewise. (find_equiv_reg): Likewise. (reload_adjust_reg_for_mode): Likewise. * reload1.c (count_pseudo): Likewise. (count_spilled_pseudo): Likewise. (find_reg): Likewise. (clear_reload_reg_in_use): Likewise. (free_for_value_p): Likewise. (allocate_reload_reg): Likewise. (choose_reload_regs): Likewise. (reload_adjust_reg_for_temp): Likewise. (emit_reload_insns): Likewise. (delete_output_reload): Likewise. * rtlanal.c (subreg_get_info): Likewise. * sched-deps.c (sched_analyze_reg): Likewise. * sel-sched.c (init_regs_for_mode): Likewise. (mark_unavailable_hard_regs): Likewise. (choose_best_reg_1): Likewise. (verify_target_availability): Likewise. * valtrack.c (dead_debug_insert_temp): Likewise. * var-tracking.c (track_loc_p): Likewise. (emit_note_insn_var_location): Likewise. * varasm.c (make_decl_rtl): Likewise. * reginfo.c (choose_hard_reg_mode): Likewise. (init_reg_modes_target): Refer directly to this_target_regs->x_hard_regno_nregs. From-SVN: r252014
2017-09-12Turn SLOW_UNALIGNED_ACCESS into a target hookRichard Sandiford1-2/+3
2017-09-12 Richard Sandiford <richard.sandiford@linaro.org> Alan Hayward <alan.hayward@arm.com> David Sherwood <david.sherwood@arm.com> gcc/ * defaults.h (SLOW_UNALIGNED_ACCESS): Delete. * target.def (slow_unaligned_access): New hook. * targhooks.h (default_slow_unaligned_access): Declare. * targhooks.c (default_slow_unaligned_access): New function. * doc/tm.texi.in (SLOW_UNALIGNED_ACCESS): Replace with... (TARGET_SLOW_UNALIGNED_ACCESS): ...this. * doc/tm.texi: Regenerate. * config/alpha/alpha.h (SLOW_UNALIGNED_ACCESS): Delete. * config/arm/arm.h (SLOW_UNALIGNED_ACCESS): Delete. * config/i386/i386.h (SLOW_UNALIGNED_ACCESS): Delete commented-out definition. * config/powerpcspe/powerpcspe.h (SLOW_UNALIGNED_ACCESS): Delete. * config/powerpcspe/powerpcspe.c (TARGET_SLOW_UNALIGNED_ACCESS): Redefine. (rs6000_slow_unaligned_access): New function. (rs6000_emit_move): Use it instead of SLOW_UNALIGNED_ACCESS. (expand_block_compare): Likewise. (expand_strn_compare): Likewise. (rs6000_rtx_costs): Likewise. * config/riscv/riscv.h (SLOW_UNALIGNED_ACCESS): Delete. (riscv_slow_unaligned_access): Likewise. * config/riscv/riscv.c (riscv_slow_unaligned_access): Rename to... (riscv_slow_unaligned_access_p): ...this and make static. (riscv_option_override): Update accordingly. (riscv_slow_unaligned_access): New function. (TARGET_SLOW_UNALIGNED_ACCESS): Redefine. * config/rs6000/rs6000.h (SLOW_UNALIGNED_ACCESS): Delete. * config/rs6000/rs6000.c (TARGET_SLOW_UNALIGNED_ACCESS): Redefine. (rs6000_slow_unaligned_access): New function. (rs6000_emit_move): Use it instead of SLOW_UNALIGNED_ACCESS. (rs6000_rtx_costs): Likewise. * config/rs6000/rs6000-string.c (expand_block_compare) (expand_strn_compare): Use targetm.slow_unaligned_access instead of SLOW_UNALIGNED_ACCESS. * config/tilegx/tilegx.h (SLOW_UNALIGNED_ACCESS): Delete. * config/tilepro/tilepro.h (SLOW_UNALIGNED_ACCESS): Delete. * calls.c (expand_call): Use targetm.slow_unaligned_access instead of SLOW_UNALIGNED_ACCESS. * expmed.c (simple_mem_bitfield_p): Likewise. * expr.c (alignment_for_piecewise_move): Likewise. (emit_group_load_1): Likewise. (emit_group_store): Likewise. (copy_blkmode_from_reg): Likewise. (emit_push_insn): Likewise. (expand_assignment): Likewise. (store_field): Likewise. (expand_expr_real_1): Likewise. * gimple-fold.c (gimple_fold_builtin_memory_op): Likewise. * lra-constraints.c (simplify_operand_subreg): Likewise. * stor-layout.c (bit_field_mode_iterator::next_mode): Likewise. * gimple-ssa-store-merging.c: Likewise in block comment at start of file. * tree-ssa-strlen.c: Include target.h. (handle_builtin_memcmp): Use targetm.slow_unaligned_access instead of SLOW_UNALIGNED_ACCESS. * system.h (SLOW_UNALIGNED_ACCESS): Poison. Co-Authored-By: Alan Hayward <alan.hayward@arm.com> Co-Authored-By: David Sherwood <david.sherwood@arm.com> From-SVN: r252009
2017-09-04Turn HARD_REGNO_MODE_OK into a target hookRichard Sandiford1-9/+8
2017-09-04 Richard Sandiford <richard.sandiford@linaro.org> Alan Hayward <alan.hayward@arm.com> David Sherwood <david.sherwood@arm.com> gcc/ * target.def (hard_regno_mode_ok): New hook. * doc/tm.texi (HARD_REGNO_MODE_OK): Replace with... (TARGET_HARD_REGNO_MODE_OK): ...this. * doc/tm.texi.in: Regenerate. * hooks.h (hook_bool_uint_mode_true): Declare. * hooks.c (hook_bool_uint_mode_true): New function. * doc/md.texi: Refer to targetm.hard_regno_mode_ok instead of HARD_REGNO_MODE_OK. * genpreds.c (write_insn_preds_c): Add an include of target.h. * alias.c (init_alias_target): Use targetm.hard_regno_mode_ok instead of HARD_REGNO_MODE_OK. * caller-save.c: Include target.h. (reg_save_code): Use targetm.hard_regno_mode_ok instead of HARD_REGNO_MODE_OK. * combine.c (can_combine_p): Likewise. (combinable_i3pat): Likewise. (can_change_dest_mode): Likewise. * expr.c (init_expr_target): Likewise. (convert_move): Likewise. (convert_modes): Likewise. * ira.c (setup_prohibited_class_mode_regs): Likewise. (setup_prohibited_mode_move_regs): Likewise. * ira.h (target_ira): Likewise. * lra-assigns.c (find_hard_regno_for_1): Likewise. * lra-constraints.c (process_alt_operands): Likewise. (split_reg): Likewise. * recog.c (peep2_find_free_register): Likewise. * ree.c (combine_reaching_defs): Likewise. * regcprop.c (maybe_mode_change): Likewise. * reginfo.c (init_reg_sets_1): Likewise. (choose_hard_reg_mode): Likewise. (simplifiable_subregs): Likewise. * regrename.c (check_new_reg_p): Likewise. * reload.c (find_valid_class): Likewise. (find_valid_class_1): Likewise. (reload_inner_reg_of_subreg): Likewise. (push_reload): Likewise. (combine_reloads): Likewise. (find_dummy_reload): Likewise. (find_reloads): Likewise. * reload1.c (find_reg): Likewise. (set_reload_reg): Likewise. (allocate_reload_reg): Likewise. (choose_reload_regs): Likewise. (reload_adjust_reg_for_temp): Likewise. * rtlanal.c (subreg_size_offset_from_lsb): Likewise. (simplify_subreg_regno): Likewise. * sel-sched.c (init_regs_for_mode): Likewise. * varasm.c (make_decl_rtl): Likewise. * config/aarch64/aarch64.h (HARD_REGNO_MODE_OK): Delete. (MODES_TIEABLE_P): Use targetm.hard_regno_mode_ok instead of HARD_REGNO_MODE_OK. * config/aarch64/aarch64-protos.h (aarch64_hard_regno_mode_ok): Delete. * config/aarch64/aarch64.c (aarch64_hard_regno_mode_ok): Make static. (TARGET_HARD_REGNO_MODE_OK): Redefine. * config/alpha/alpha.h (HARD_REGNO_MODE_OK): Delete. * config/alpha/alpha.c (alpha_hard_regno_mode_ok): New function. (TARGET_HARD_REGNO_MODE_OK): Redefine. * config/arc/arc.h (arc_hard_regno_mode_ok): Delete. (arc_mode_class): Delete. (HARD_REGNO_MODE_OK): Delete. * config/arc/arc.c (TARGET_HARD_REGNO_MODE_OK): Redefine. (arc_hard_regno_mode_ok): Rename old array to... (arc_hard_regno_mode_ok_modes): ...this. (arc_conditional_register_usage): Update accordingly. (arc_mode_class): Make static. (arc_hard_regno_mode_ok): New function. * config/arm/arm.h (HARD_REGNO_MODE_OK): Delete. * config/arm/arm-protos.h (arm_hard_regno_mode_ok): Delete. * config/arm/arm.c (TARGET_HARD_REGNO_MODE_OK): Redefine. (arm_hard_regno_mode_ok): Make static. * config/arm/arm.md (movdi): Use targetm.hard_regno_mode_ok instead of HARD_REGNO_MODE_OK. * config/avr/avr-protos.h (avr_hard_regno_mode_ok): Delete. * config/avr/avr.h (HARD_REGNO_MODE_OK): Delete. * config/avr/avr.c (avr_hard_regno_mode_ok): Make static and return a bool. (TARGET_HARD_REGNO_MODE_OK): Redefine. * config/bfin/bfin-protos.h (hard_regno_mode_ok): Delete. * config/bfin/bfin.h (HARD_REGNO_MODE_OK): Delete. * config/bfin/bfin.c (hard_regno_mode_ok): Rename to... (bfin_hard_regno_mode_ok): ...this. Make static and return a bool. (TARGET_HARD_REGNO_MODE_OK): Redefine. * config/bfin/predicates.md (valid_reg_operand): Use targetm.hard_regno_mode_ok instead of HARD_REGNO_MODE_OK. * config/c6x/c6x.h (HARD_REGNO_MODE_OK): Delete. * config/c6x/c6x.c (c6x_hard_regno_mode_ok): New function. (TARGET_HARD_REGNO_MODE_OK): Redefine. * config/cr16/cr16.h (HARD_REGNO_MODE_OK): Delete. * config/cr16/cr16-protos.h (cr16_hard_regno_mode_ok): Delete. * config/cr16/cr16.c (TARGET_HARD_REGNO_MODE_OK): Redefine. (cr16_hard_regno_mode_ok): Make static and return a bool. * config/cris/cris.h (HARD_REGNO_MODE_OK): Delete. * config/cris/cris.c (TARGET_HARD_REGNO_MODE_OK): Redefine. (cris_hard_regno_mode_ok): New function. * config/epiphany/epiphany.h (epiphany_hard_regno_mode_ok): Delete. (epiphany_mode_class): Delete. (HARD_REGNO_MODE_OK): Delete. * config/epiphany/epiphany-protos.h (hard_regno_mode_ok): Delete. * config/epiphany/epiphany.c (TARGET_HARD_REGNO_MODE_OK): Redefine. (hard_regno_mode_ok): Rename to... (epiphany_hard_regno_mode_ok): ...this. Make static and return a bool. * config/fr30/fr30.h (HARD_REGNO_MODE_OK): Delete. * config/fr30/fr30.md: Refer to targetm.hard_regno_mode_ok instead of HARD_REGNO_MODE_OK. * config/frv/frv.h (HARD_REGNO_MODE_OK): Delete. * config/frv/frv-protos.h (frv_hard_regno_mode_ok): Delete. * config/frv/frv.c (TARGET_HARD_REGNO_MODE_OK): Redefine. (frv_hard_regno_mode_ok): Make static and return a bool. * config/frv/frv.md: Refer to targetm.hard_regno_mode_ok instead of HARD_REGNO_MODE_OK. * config/ft32/ft32.h (HARD_REGNO_MODE_OK): Delete. * config/h8300/h8300.h (HARD_REGNO_MODE_OK): Delete. * config/h8300/h8300-protos.h (h8300_hard_regno_mode_ok): Delete. * config/h8300/h8300.c (h8300_hard_regno_mode_ok): Make static and return a bool. (TARGET_HARD_REGNO_MODE_OK): Redefine. * config/i386/i386.h (HARD_REGNO_MODE_OK): Delete. * config/i386/i386-protos.h (ix86_hard_regno_mode_ok): Delete. * config/i386/i386.c (ix86_hard_regno_mode_ok): Make static and return a bool. (TARGET_HARD_REGNO_MODE_OK): Redefine. * config/ia64/ia64.h (HARD_REGNO_MODE_OK): Delete. * config/ia64/ia64.c (TARGET_HARD_REGNO_MODE_OK): Redefine. (ia64_hard_regno_mode_ok): New function. * config/iq2000/iq2000.h (HARD_REGNO_MODE_OK): Delete. * config/iq2000/iq2000.c (TARGET_HARD_REGNO_MODE_OK): Redefine. (iq2000_hard_regno_mode_ok): New function. * config/lm32/lm32.h (HARD_REGNO_MODE_OK): Delete. * config/lm32/lm32.c (TARGET_HARD_REGNO_MODE_OK): Redefine. (lm32_hard_regno_mode_ok): New function. * config/m32c/m32c.h (HARD_REGNO_MODE_OK): Delete. * config/m32c/m32c-protos.h (m32c_hard_regno_ok): Delete. * config/m32c/m32c.c (class_can_hold_mode): Use m32c_hard_regno_mode_ok instead of HARD_REGNO_MODE_OK. (m32c_hard_regno_ok): Rename to... (m32c_hard_regno_mode_ok): ...this. Make static and return a bool. (m32c_cannot_change_mode_class): Update accordingly. (TARGET_HARD_REGNO_MODE_OK): Redefine. * config/m32r/m32r.h (m32r_hard_regno_mode_ok): Delete. (m32r_mode_class): Delete. (HARD_REGNO_MODE_OK): Delete. * config/m32r/m32r.c (TARGET_HARD_REGNO_MODE_OK): Redefine. (m32r_hard_regno_mode_ok): Rename to... (m32r_hard_regno_modes): ...this. (m32r_mode_class): Make static. (m32r_hard_regno_mode_ok): New function. * config/m68k/m68k.h (HARD_REGNO_MODE_OK): Delete. * config/m68k/m68k-protos.h (m68k_regno_mode_ok): Delete. * config/m68k/m68k.c (TARGET_HARD_REGNO_MODE_OK): Redefine. (m68k_hard_regno_mode_ok): Make static. * config/mcore/mcore.h (HARD_REGNO_MODE_OK): Delete. * config/mcore/mcore.c (TARGET_HARD_REGNO_MODE_OK): Redefine. (mcore_hard_regno_mode_ok): New function. * config/microblaze/microblaze.h (microblaze_hard_regno_mode_ok) (HARD_REGNO_MODE_OK): Delete. * config/microblaze/microblaze.c (microblaze_hard_regno_mode_ok): Rename to... (microblaze_hard_regno_mode_ok_p): ...this and make static. (microblaze_hard_regno_mode_ok): New function. (TARGET_HARD_REGNO_MODE_OK): Redefine. * config/mips/mips.h (HARD_REGNO_MODE_OK): Delete. (mips_hard_regno_mode_ok): Delete. * config/mips/mips.c (mips_hard_regno_mode_ok): Rename to... (mips_hard_regno_mode_ok_p): ...this and make static. (mips_hard_regno_mode_ok_p): Rename to... (mips_hard_regno_mode_ok_uncached): ...this. (mips_hard_regno_mode_ok): New function. (mips_class_max_nregs): Use mips_hard_regno_mode_ok instead of HARD_REGNO_MODE_OK. (mips_option_override): Update after above name changes. (TARGET_HARD_REGNO_MODE_OK): Redefine. * config/mmix/mmix.h (HARD_REGNO_MODE_OK): Delete. * config/mn10300/mn10300.h (HARD_REGNO_MODE_OK): Delete. * config/mn10300/mn10300-protos.h (mn10300_hard_regno_mode_ok): Delete. * config/mn10300/mn10300.c (mn10300_hard_regno_mode_ok): Make static. (TARGET_HARD_REGNO_MODE_OK): Redefine. * config/moxie/moxie.h (HARD_REGNO_MODE_OK): Delete. * config/msp430/msp430.h (HARD_REGNO_MODE_OK): Delete. * config/msp430/msp430-protos.h (msp430_hard_regno_mode_ok): Delete. * config/msp430/msp430.c (TARGET_HARD_REGNO_MODE_OK): Redefine. (msp430_hard_regno_mode_ok): Make static and return a bool. * config/nds32/nds32.h (HARD_REGNO_MODE_OK): Delete. * config/nds32/nds32-protos.h (nds32_hard_regno_mode_ok): Delete. * config/nds32/nds32.c (nds32_hard_regno_mode_ok): Make static and return a bool. (TARGET_HARD_REGNO_MODE_OK): Redefine. * config/nios2/nios2.h (HARD_REGNO_MODE_OK): Delete. * config/nvptx/nvptx.h (HARD_REGNO_MODE_OK): Delete. * config/pa/pa.h (MODES_TIEABLE_P): Update commentary. * config/pa/pa32-regs.h (HARD_REGNO_MODE_OK): Rename to... (PA_HARD_REGNO_MODE_OK): ...this * config/pa/pa64-regs.h (HARD_REGNO_MODE_OK): Rename to... (PA_HARD_REGNO_MODE_OK): ...this. * config/pa/pa.c (TARGET_HARD_REGNO_MODE_OK): Redefine. (pa_hard_regno_mode_ok): New function. * config/pdp11/pdp11.h (HARD_REGNO_MODE_OK): Delete. * config/pdp11/pdp11.c (TARGET_HARD_REGNO_MODE_OK): Redefine. (pdp11_hard_regno_mode_ok): New function. * config/powerpcspe/powerpcspe.h (HARD_REGNO_MODE_OK): Delete. * config/powerpcspe/powerpcspe-protos.h (rs6000_hard_regno_mode_ok_p): Delete. * config/powerpcspe/powerpcspe.c (rs6000_hard_regno_mode_ok_p): Make static. (TARGET_HARD_REGNO_MODE_OK): Redefine. (rs6000_hard_regno_mode_ok): Rename to... (rs6000_hard_regno_mode_ok_uncached): ...this. (rs6000_init_hard_regno_mode_ok): Update accordingly. (rs6000_hard_regno_mode_ok): New function. * config/riscv/riscv.h (HARD_REGNO_MODE_OK): Delete. * config/riscv/riscv-protos.h (riscv_hard_regno_mode_ok_p): Delete. * config/riscv/riscv.c (riscv_hard_regno_mode_ok_p): Rename to... (riscv_hard_regno_mode_ok): ...this and make static. (TARGET_HARD_REGNO_MODE_OK): Redefine. * config/rl78/rl78.h (HARD_REGNO_MODE_OK): Delete. * config/rl78/rl78-protos.h (rl78_hard_regno_mode_ok): Delete. * config/rl78/rl78.c (TARGET_HARD_REGNO_MODE_OK): Redefine. (rl78_hard_regno_mode_ok): Make static and return bool. * config/rs6000/rs6000.h (HARD_REGNO_MODE_OK): Delete. * config/rs6000/rs6000-protos.h (rs6000_hard_regno_mode_ok_p): Delete. * config/rs6000/rs6000.c (rs6000_hard_regno_mode_ok_p): Make static. (TARGET_HARD_REGNO_MODE_OK): Redefine. (rs6000_hard_regno_mode_ok): Rename to... (rs6000_hard_regno_mode_ok_uncached): ...this. (rs6000_init_hard_regno_mode_ok): Update accordingly. (rs6000_hard_regno_mode_ok): New function. * config/rx/rx.h (HARD_REGNO_MODE_OK): Delete. * config/rx/rx.c (rx_hard_regno_mode_ok): New function. (TARGET_HARD_REGNO_MODE_OK): Redefine. * config/s390/s390.h (HARD_REGNO_MODE_OK): Delete. * config/s390/s390-protos.h (s390_hard_regno_mode_ok): Delete. * config/s390/s390.c (s390_hard_regno_mode_ok): Make static. (TARGET_HARD_REGNO_MODE_OK): Redefine. * config/sh/sh.h (HARD_REGNO_MODE_OK): Delete. * config/sh/sh-protos.h (sh_hard_regno_mode_ok): Delete. * config/sh/sh.c (TARGET_HARD_REGNO_MODE_OK): Redefine. (sh_hard_regno_mode_ok): Make static. * config/sparc/constraints.md: Refer to targetm.hard_regno_mode_ok instead of HARD_REGNO_MODE_OK. * config/sparc/sparc.h (hard_regno_mode_classes): Delete. (sparc_mode_class): Delete. (HARD_REGNO_MODE_OK): Delete. * config/sparc/sparc.c (TARGET_HARD_REGNO_MODE_OK): Redefine. (hard_regno_mode_classes): Make static. (sparc_mode_class): Likewise. (sparc_hard_regno_mode_ok): New function. * config/spu/spu.h (HARD_REGNO_MODE_OK): Delete. * config/stormy16/stormy16.h (HARD_REGNO_MODE_OK): Delete. * config/stormy16/stormy16.c (xstormy16_hard_regno_mode_ok): New function. (TARGET_HARD_REGNO_MODE_OK): Redefine. * config/tilegx/tilegx.h (HARD_REGNO_MODE_OK): Delete. * config/tilepro/tilepro.h (HARD_REGNO_MODE_OK): Delete. * config/v850/v850.h (HARD_REGNO_MODE_OK): Delete. * config/v850/v850.c (v850_hard_regno_mode_ok): New function. (TARGET_HARD_REGNO_MODE_OK): Redefine. * config/vax/vax.h (HARD_REGNO_MODE_OK): Delete. * config/visium/visium.h (HARD_REGNO_MODE_OK): Delete. * config/visium/visium.c (TARGET_HARD_REGNO_MODE_OK): Redefine. (visium_hard_regno_mode_ok): New function. * config/visium/visium.md: Refer to targetm.hard_regno_mode_ok instead of HARD_REGNO_MODE_OK. * config/xtensa/xtensa.h (xtensa_hard_regno_mode_ok): Delete. (HARD_REGNO_MODE_OK): Delete. * config/xtensa/xtensa.c (xtensa_hard_regno_mode_ok): Rename to... (xtensa_hard_regno_mode_ok_p): ...this and make static. (xtensa_option_override): Update accordingly. (TARGET_HARD_REGNO_MODE_OK): Redefine. (xtensa_hard_regno_mode_ok): New function. * system.h (HARD_REGNO_MODE_OK): Poison. Co-Authored-By: Alan Hayward <alan.hayward@arm.com> Co-Authored-By: David Sherwood <david.sherwood@arm.com> From-SVN: r251646
2017-09-04Turn HARD_REGNO_CALL_PART_CLOBBERED into a target hookRichard Sandiford1-2/+2
The SVE patches change the size of a machine_mode from a compile-time constant to a runtime invariant. However, target-specific code can continue to treat the modes as constant-sized if the target only has constant-sized modes. The main snag with this approach is that target-independent code still uses macros from the target .h file. This patch is one of several that converts a target macro to a hook. 2017-09-04 Richard Sandiford <richard.sandiford@linaro.org> Alan Hayward <alan.hayward@arm.com> David Sherwood <david.sherwood@arm.com> gcc/ * target.def (hard_regno_call_part_clobbered): New hook. * doc/tm.texi.in (HARD_REGNO_CALL_PART_CLOBBERED): Replace with... (TARGET_HARD_REGNO_CALL_PART_CLOBBERED): ...this hook. * doc/tm.texi: Regenerate. * hooks.h (hook_bool_uint_mode_false): Declare. * hooks.c (hook_bool_uint_mode_false): New function. * regs.h (HARD_REGNO_CALL_PART_CLOBBERED): Delete. * cselib.c (cselib_process_insn): Use targetm.hard_regno_call_part_clobbered instead of HARD_REGNO_CALL_PART_CLOBBERED. * ira-conflicts.c (ira_build_conflicts): Likewise. * ira-costs.c (ira_tune_allocno_costs): Likewise. * lra-constraints.c (need_for_call_save_p): Likewise. * lra-lives.c: Include target.h. (check_pseudos_live_through_calls): Use targetm.hard_regno_call_part_clobbered instead of HARD_REGNO_CALL_PART_CLOBBERED. * regcprop.c: Include target.h. (copyprop_hardreg_forward_1): Use targetm.hard_regno_call_part_clobbered instead of HARD_REGNO_CALL_PART_CLOBBERED. * reginfo.c (choose_hard_reg_mode): Likewise. * regrename.c (check_new_reg_p): Likewise. * reload.c (find_equiv_reg): Likewise. * reload1.c (emit_reload_insns): Likewise. * sched-deps.c (deps_analyze_insn): Likewise. * sel-sched.c (init_regs_for_mode): Likewise. (mark_unavailable_hard_regs): Likewise. * targhooks.c (default_dwarf_frame_reg_mode): Likewise. * config/aarch64/aarch64.h (HARD_REGNO_CALL_PART_CLOBBERED): Delete. * config/aarch64/aarch64.c (aarch64_hard_regno_call_part_clobbered): New function. (TARGET_HARD_REGNO_CALL_PART_CLOBBERED): Redefine. * config/avr/avr.h (HARD_REGNO_CALL_PART_CLOBBERED): Delete. * config/avr/avr-protos.h (avr_hard_regno_call_part_clobbered): Delete. * config/avr/avr.c (avr_hard_regno_call_part_clobbered): Make static and return a bool. (TARGET_HARD_REGNO_CALL_PART_CLOBBERED): Redefine. * config/i386/i386.h (HARD_REGNO_CALL_PART_CLOBBERED): Delete. * config/i386/i386.c (ix86_hard_regno_call_part_clobbered): New function. (TARGET_HARD_REGNO_CALL_PART_CLOBBERED): Redefine. * config/mips/mips.h (HARD_REGNO_CALL_PART_CLOBBERED): Delete. * config/mips/mips.c (mips_hard_regno_call_part_clobbered): New function. (TARGET_HARD_REGNO_CALL_PART_CLOBBERED): Redefine. * config/powerpcspe/powerpcspe.h (HARD_REGNO_CALL_PART_CLOBBERED): Delete. * config/powerpcspe/powerpcspe.c (rs6000_hard_regno_call_part_clobbered): New function. (TARGET_HARD_REGNO_CALL_PART_CLOBBERED): Redefine. * config/rs6000/rs6000.h (HARD_REGNO_CALL_PART_CLOBBERED): Delete. * config/rs6000/rs6000.c (rs6000_hard_regno_call_part_clobbered): New function. (TARGET_HARD_REGNO_CALL_PART_CLOBBERED): Redefine. * config/s390/s390.h (HARD_REGNO_CALL_PART_CLOBBERED): Delete. * config/s390/s390.c (s390_hard_regno_call_part_clobbered): New function. (TARGET_HARD_REGNO_CALL_PART_CLOBBERED): Redefine. * config/sh/sh.h (HARD_REGNO_CALL_PART_CLOBBERED): Delete. * system.h (HARD_REGNO_CALL_PART_CLOBBERED): Poison. Co-Authored-By: Alan Hayward <alan.hayward@arm.com> Co-Authored-By: David Sherwood <david.sherwood@arm.com> From-SVN: r251645
2017-08-30Add a partial_subreg_p predicateRichard Sandiford1-6/+4
This patch adds a partial_subreg_p predicate to go alongside paradoxical_subreg_p. Like the paradoxical_subreg_p patch, this one replaces some tests that were based on GET_MODE_SIZE rather than GET_MODE_PRECISION. In each case the change should be a no-op or an improvement. The regcprop.c patch prevents some replacements of the 82-bit RFmode with the 80-bit XFmode on ia64. I don't understand the target details here particularly well, but from the way the modes are described in ia64-modes.def, it isn't valid to assume that an XFmode can carry an RFmode payload. A comparison of the testsuite assembly output for one target per CPU showed no other differences. Some of the places changed here are tracking the widest access mode found for a register. The series tries to standardise on: if (partial_subreg_p (widest_seen, new_mode)) widest_seen = new_mode; rather than: if (paradoxical_subreg_p (new_mode, widest_seen)) widest_seen = new_mode; Either would have been OK. 2017-08-30 Richard Sandiford <richard.sandiford@linaro.org> Alan Hayward <alan.hayward@arm.com> David Sherwood <david.sherwood@arm.com> gcc/ * rtl.h (partial_subreg_p): New function. * caller-save.c (save_call_clobbered_regs): Use it. * calls.c (expand_call): Likewise. * combine.c (combinable_i3pat): Likewise. (simplify_set): Likewise. (make_extraction): Likewise. (make_compound_operation_int): Likewise. (gen_lowpart_or_truncate): Likewise. (force_to_mode): Likewise. (make_field_assignment): Likewise. (reg_truncated_to_mode): Likewise. (record_truncated_value): Likewise. (move_deaths): Likewise. * cse.c (record_jump_cond): Likewise. (cse_insn): Likewise. * cselib.c (cselib_lookup_1): Likewise. * expmed.c (extract_bit_field_using_extv): Likewise. * function.c (assign_parm_setup_reg): Likewise. * ifcvt.c (noce_convert_multiple_sets): Likewise. * ira-build.c (create_insn_allocnos): Likewise. * lra-coalesce.c (merge_pseudos): Likewise. * lra-constraints.c (match_reload): Likewise. (simplify_operand_subreg): Likewise. (curr_insn_transform): Likewise. * lra-lives.c (process_bb_lives): Likewise. * lra.c (new_insn_reg): Likewise. (lra_substitute_pseudo): Likewise. * regcprop.c (mode_change_ok): Likewise. (maybe_mode_change): Likewise. (copyprop_hardreg_forward_1): Likewise. * reload.c (push_reload): Likewise. (find_reloads): Likewise. (find_reloads_subreg_address): Likewise. * reload1.c (alter_reg): Likewise. (eliminate_regs_1): Likewise. * simplify-rtx.c (simplify_unary_operation_1): Likewise. Co-Authored-By: Alan Hayward <alan.hayward@arm.com> Co-Authored-By: David Sherwood <david.sherwood@arm.com> From-SVN: r251536
2017-08-30[21/77] Replace SCALAR_INT_MODE_P checks with is_a <scalar_int_mode>Richard Sandiford1-2/+5
This patch replaces checks of "SCALAR_INT_MODE_P (...)" with "is_a <scalar_int_mode> (..., &var)" in cases where it becomes useful to refer to the mode as a scalar_int_mode. It also replaces some checks for the two constituent classes (MODE_INT and MODE_PARTIAL_INT). The patch also introduces is_a <scalar_int_mode> checks for some uses of HWI_COMPUTABLE_MODE_P, which is a subcondition of SCALAR_INT_MODE_P. 2017-08-30 Richard Sandiford <richard.sandiford@linaro.org> Alan Hayward <alan.hayward@arm.com> David Sherwood <david.sherwood@arm.com> gcc/ * wide-int.h (int_traits<unsigned char>) New class. (int_traits<unsigned short>) Likewise. * cfgexpand.c (expand_debug_expr): Use is_a <scalar_int_mode>. Use GET_MODE_UNIT_PRECISION and remove redundant test for SCALAR_INT_MODE_P. * combine.c (set_nonzero_bits_and_sign_copies): Use is_a <scalar_int_mode>. (find_split_point): Likewise. (combine_simplify_rtx): Likewise. (simplify_logical): Likewise. (expand_compound_operation): Likewise. (expand_field_assignment): Likewise. (make_compound_operation): Likewise. (extended_count): Likewise. (change_zero_ext): Likewise. (simplify_comparison): Likewise. * dwarf2out.c (scompare_loc_descriptor): Likewise. (ucompare_loc_descriptor): Likewise. (minmax_loc_descriptor): Likewise. (mem_loc_descriptor): Likewise. (loc_descriptor): Likewise. * expmed.c (init_expmed_one_mode): Likewise. * lra-constraints.c (lra_constraint_offset): Likewise. * optabs.c (prepare_libcall_arg): Likewise. * postreload.c (move2add_note_store): Likewise. * reload.c (operands_match_p): Likewise. * rtl.h (load_extend_op): Likewise. * rtlhooks.c (gen_lowpart_general): Likewise. * simplify-rtx.c (simplify_truncation): Likewise. (simplify_unary_operation_1): Likewise. (simplify_binary_operation_1): Likewise. (simplify_const_binary_operation): Likewise. (simplify_const_relational_operation): Likewise. (simplify_subreg): Likewise. * stor-layout.c (bitwise_mode_for_mode): Likewise. * var-tracking.c (adjust_mems): Likewise. (prepare_call_arguments): Likewise. gcc/ada/ * gcc-interface/decl.c (check_ok_for_atomic_type): Use is_a <scalar_int_mode>. * gcc-interface/trans.c (Pragma_to_gnu): Likewise. * gcc-interface/utils.c (gnat_type_for_mode): Likewise. gcc/fortran/ * trans-types.c (gfc_type_for_mode): Use is_a <scalar_int_mode>. Co-Authored-By: Alan Hayward <alan.hayward@arm.com> Co-Authored-By: David Sherwood <david.sherwood@arm.com> From-SVN: r251473
2017-08-22Make more use of paradoxical_subreg_pRichard Sandiford1-3/+2
This patch makes more use of the existing paradoxical_subreg_p predicate and also adds a version that operates on outer and inner modes. Some of the affected tests were based on GET_MODE_SIZE rather than GET_MODE_PRECISION and so the patch could change the result for modes that have the same size but different precisions. I think in each case the change should be a no-op or more correct, since a mode with precision N bits can't be expected to hold all of a mode with precision M>N bits. The patch changes the branch taken in simplify_subreg for modes with equal precision, but the new form matches the commentary more closely. Both branches should be equally good in that situation. 2017-08-22 Richard Sandiford <richard.sandiford@linaro.org> Alan Hayward <alan.hayward@arm.com> David Sherwood <david.sherwood@arm.com> gcc/ * rtl.h (paradoxical_subreg_p): Define inline, and add a version that takes the outer and inner modes. * doc/rtl.texi: Use paradoxical_subreg_p instead of a GET_MODE_SIZE comparison as the canonical test for a paradoxical subreg. * combine.c (simplify_set): Use paradoxical_subreg_p. (make_extraction): Likewise. (force_to_mode): Likewise. (rtx_equal_for_field_assignment_p): Likewise. (gen_lowpart_for_combine): Likewise. (simplify_comparison): Likewise. * cse.c (equiv_constant): Likewise. * expmed.c (store_bit_field_1): Likewise. * final.c (alter_subreg): Likewise. * fwprop.c (propagate_rtx): Likewise. (forward_propagate_subreg): Likewise. * ira-conflicts.c (ira_build_conflicts): Likewise. * lower-subreg.c (simplify_gen_subreg_concatn): Likewise. * lra-constraints.c (curr_insn_transform): Likewise. (split_reg): Likewise. * lra-eliminations.c (move_plus_up): Likewise. (lra_eliminate_regs_1): Likewise. * recog.c (general_operand): Likewise. * ree.c (combine_reaching_defs): Likewise. * reload.c (push_reload): Likewise. (find_reloads): Likewise. * reload1.c (elimination_effects): Likewise. (compute_reload_subreg_offset): Likewise. (choose_reload_regs): Likewise. * rtlanal.c (subreg_lsb_1): Likewise. * simplify-rtx.c (simplify_unary_operation_1): Likewise. (simplify_subreg): Likewise. * var-tracking.c (track_loc_p): Likewise. * emit-rtl.c (byte_lowpart_offset): Likewise. (paradoxical_subreg_p): Delete out-of-line definition. Co-Authored-By: Alan Hayward <alan.hayward@arm.com> Co-Authored-By: David Sherwood <david.sherwood@arm.com> From-SVN: r251282
2017-07-05Remove enum before machine_modeRichard Sandiford1-2/+2
r216834 did a mass removal of "enum" before "machine_mode". This patch removes some new uses that have been added since then. 2017-07-05 Richard Sandiford <richard.sandiford@linaro.org> Alan Hayward <alan.hayward@arm.com> David Sherwood <david.sherwood@arm.com> gcc/ * combine.c (simplify_if_then_else): Remove "enum" before "machine_mode". * compare-elim.c (can_eliminate_compare): Likewise. * config/aarch64/aarch64-builtins.c (aarch64_simd_builtin_std_type): Likewise. (aarch64_lookup_simd_builtin_type): Likewise. (aarch64_simd_builtin_type): Likewise. (aarch64_init_simd_builtin_types): Likewise. (aarch64_simd_expand_args): Likewise. * config/aarch64/aarch64-protos.h (aarch64_simd_attr_length_rglist): Likewise. (aarch64_reverse_mask): Likewise. (aarch64_simd_emit_reg_reg_move): Likewise. (aarch64_gen_adjusted_ldpstp): Likewise. (aarch64_ccmp_mode_to_code): Likewise. (aarch64_operands_ok_for_ldpstp): Likewise. (aarch64_operands_adjust_ok_for_ldpstp): Likewise. * config/aarch64/aarch64.c (aarch64_ira_change_pseudo_allocno_class): Likewise. (aarch64_min_divisions_for_recip_mul): Likewise. (aarch64_reassociation_width): Likewise. (aarch64_get_condition_code_1): Likewise. (aarch64_simd_emit_reg_reg_move): Likewise. (aarch64_simd_attr_length_rglist): Likewise. (aarch64_reverse_mask): Likewise. (aarch64_operands_ok_for_ldpstp): Likewise. (aarch64_operands_adjust_ok_for_ldpstp): Likewise. (aarch64_gen_adjusted_ldpstp): Likewise. * config/aarch64/cortex-a57-fma-steering.c (fma_node::rename): Likewise. * config/arc/arc.c (legitimate_offset_address_p): Likewise. * config/arm/arm-builtins.c (arm_simd_builtin_std_type): Likewise. (arm_lookup_simd_builtin_type): Likewise. (arm_simd_builtin_type): Likewise. (arm_init_simd_builtin_types): Likewise. (arm_expand_builtin_args): Likewise. * config/arm/arm-protos.h (arm_expand_builtin): Likewise. * config/ft32/ft32.c (ft32_libcall_value): Likewise. (ft32_setup_incoming_varargs): Likewise. (ft32_function_arg): Likewise. (ft32_function_arg_advance): Likewise. (ft32_pass_by_reference): Likewise. (ft32_arg_partial_bytes): Likewise. (ft32_valid_pointer_mode): Likewise. (ft32_addr_space_pointer_mode): Likewise. (ft32_addr_space_legitimate_address_p): Likewise. * config/i386/i386-protos.h (ix86_operands_ok_for_move_multiple): Likewise. * config/i386/i386.c (ix86_setup_incoming_vararg_bounds): Likewise. (ix86_emit_outlined_ms2sysv_restore): Likewise. (iamcu_alignment): Likewise. (canonicalize_vector_int_perm): Likewise. (ix86_noce_conversion_profitable_p): Likewise. (ix86_mpx_bound_mode): Likewise. (ix86_operands_ok_for_move_multiple): Likewise. * config/microblaze/microblaze-protos.h (microblaze_expand_conditional_branch_reg): Likewise. * config/microblaze/microblaze.c (microblaze_expand_conditional_branch_reg): Likewise. * config/powerpcspe/powerpcspe.c (rs6000_init_hard_regno_mode_ok): Likewise. (rs6000_reassociation_width): Likewise. (rs6000_invalid_binary_op): Likewise. (fusion_p9_p): Likewise. (emit_fusion_p9_load): Likewise. (emit_fusion_p9_store): Likewise. * config/riscv/riscv-protos.h (riscv_regno_mode_ok_for_base_p): Likewise. (riscv_hard_regno_mode_ok_p): Likewise. (riscv_address_insns): Likewise. (riscv_split_symbol): Likewise. (riscv_legitimize_move): Likewise. (riscv_function_value): Likewise. (riscv_hard_regno_nregs): Likewise. (riscv_expand_builtin): Likewise. * config/riscv/riscv.c (riscv_build_integer_1): Likewise. (riscv_build_integer): Likewise. (riscv_split_integer): Likewise. (riscv_legitimate_constant_p): Likewise. (riscv_cannot_force_const_mem): Likewise. (riscv_regno_mode_ok_for_base_p): Likewise. (riscv_valid_base_register_p): Likewise. (riscv_valid_offset_p): Likewise. (riscv_valid_lo_sum_p): Likewise. (riscv_classify_address): Likewise. (riscv_legitimate_address_p): Likewise. (riscv_address_insns): Likewise. (riscv_load_store_insns): Likewise. (riscv_force_binary): Likewise. (riscv_split_symbol): Likewise. (riscv_force_address): Likewise. (riscv_legitimize_address): Likewise. (riscv_move_integer): Likewise. (riscv_legitimize_const_move): Likewise. (riscv_legitimize_move): Likewise. (riscv_address_cost): Likewise. (riscv_subword): Likewise. (riscv_output_move): Likewise. (riscv_canonicalize_int_order_test): Likewise. (riscv_emit_int_order_test): Likewise. (riscv_function_arg_boundary): Likewise. (riscv_pass_mode_in_fpr_p): Likewise. (riscv_pass_fpr_single): Likewise. (riscv_pass_fpr_pair): Likewise. (riscv_get_arg_info): Likewise. (riscv_function_arg): Likewise. (riscv_function_arg_advance): Likewise. (riscv_arg_partial_bytes): Likewise. (riscv_function_value): Likewise. (riscv_pass_by_reference): Likewise. (riscv_setup_incoming_varargs): Likewise. (riscv_print_operand): Likewise. (riscv_elf_select_rtx_section): Likewise. (riscv_save_restore_reg): Likewise. (riscv_for_each_saved_reg): Likewise. (riscv_register_move_cost): Likewise. (riscv_hard_regno_mode_ok_p): Likewise. (riscv_hard_regno_nregs): Likewise. (riscv_class_max_nregs): Likewise. (riscv_memory_move_cost): Likewise. * config/rl78/rl78-protos.h (rl78_split_movsi): Likewise. * config/rl78/rl78.c (rl78_split_movsi): Likewise. (rl78_addr_space_address_mode): Likewise. * config/rs6000/rs6000-c.c (altivec_resolve_overloaded_builtin): Likewise. * config/rs6000/rs6000.c (rs6000_init_hard_regno_mode_ok): Likewise. (rs6000_reassociation_width): Likewise. (rs6000_invalid_binary_op): Likewise. (fusion_p9_p): Likewise. (emit_fusion_p9_load): Likewise. (emit_fusion_p9_store): Likewise. * config/visium/visium-protos.h (prepare_move_operands): Likewise. (ok_for_simple_move_operands): Likewise. (ok_for_simple_move_strict_operands): Likewise. (ok_for_simple_arith_logic_operands): Likewise. (visium_legitimize_reload_address): Likewise. (visium_select_cc_mode): Likewise. (output_cbranch): Likewise. (visium_split_double_move): Likewise. (visium_expand_copysign): Likewise. (visium_expand_int_cstore): Likewise. (visium_expand_fp_cstore): Likewise. * config/visium/visium.c (visium_pass_by_reference): Likewise. (visium_function_arg): Likewise. (visium_function_arg_advance): Likewise. (visium_libcall_value): Likewise. (visium_setup_incoming_varargs): Likewise. (visium_legitimate_constant_p): Likewise. (visium_legitimate_address_p): Likewise. (visium_legitimize_address): Likewise. (visium_secondary_reload): Likewise. (visium_register_move_cost): Likewise. (visium_memory_move_cost): Likewise. (prepare_move_operands): Likewise. (ok_for_simple_move_operands): Likewise. (ok_for_simple_move_strict_operands): Likewise. (ok_for_simple_arith_logic_operands): Likewise. (visium_function_value_1): Likewise. (rtx_ok_for_offset_p): Likewise. (visium_legitimize_reload_address): Likewise. (visium_split_double_move): Likewise. (visium_expand_copysign): Likewise. (visium_expand_int_cstore): Likewise. (visium_expand_fp_cstore): Likewise. (visium_split_cstore): Likewise. (visium_select_cc_mode): Likewise. (visium_split_cbranch): Likewise. (output_cbranch): Likewise. (visium_print_operand_address): Likewise. * expmed.c (flip_storage_order): Likewise. * expmed.h (emit_cstore): Likewise. (flip_storage_order): Likewise. * genrecog.c (validate_pattern): Likewise. * hsa-gen.c (gen_hsa_addr): Likewise. * internal-fn.c (expand_arith_overflow): Likewise. * ira-color.c (allocno_copy_cost_saving): Likewise. * lra-assigns.c (find_hard_regno_for_1): Likewise. * lra-constraints.c (prohibited_class_reg_set_mode_p): Likewise. (process_invariant_for_inheritance): Likewise. * lra-eliminations.c (move_plus_up): Likewise. * omp-low.c (lower_oacc_reductions): Likewise. * simplify-rtx.c (simplify_subreg): Likewise. * target.def (TARGET_SETUP_INCOMING_VARARG_BOUNDS): Likewise. (TARGET_CHKP_BOUND_MODE): Likewise.. * targhooks.c (default_chkp_bound_mode): Likewise. (default_setup_incoming_vararg_bounds): Likewise. * targhooks.h (default_chkp_bound_mode): Likewise. (default_setup_incoming_vararg_bounds): Likewise. * tree-ssa-math-opts.c (divmod_candidate_p): Likewise. * tree-vect-loop.c (calc_vec_perm_mask_for_shift): Likewise. (have_whole_vector_shift): Likewise. * tree-vect-stmts.c (vectorizable_load): Likewise. * doc/tm.texi: Regenerate. gcc/brig/ * brig-c.h (brig_type_for_mode): Remove "enum" before "machine_mode". * brig-lang.c (brig_langhook_type_for_mode): Likewise. gcc/jit/ * dummy-frontend.c (jit_langhook_type_for_mode): Remove "enum" before "machine_mode". Co-Authored-By: Alan Hayward <alan.hayward@arm.com> Co-Authored-By: David Sherwood <david.sherwood@arm.com> From-SVN: r250003
2017-06-29asan.c (asan_emit_stack_protection): Update.Jan Hubicka1-1/+2
* asan.c (asan_emit_stack_protection): Update. (create_cond_insert_point): Update. * auto-profile.c (afdo_propagate_circuit): Update. * basic-block.h (struct edge_def): Turn probability to profile_probability. (EDGE_FREQUENCY): Update. * bb-reorder.c (find_traces_1_round): Update. (better_edge_p): Update. (sanitize_hot_paths): Update. * cfg.c (unchecked_make_edge): Initialize probability to uninitialized. (make_single_succ_edge): Update. (check_bb_profile): Update. (dump_edge_info): Update. (update_bb_profile_for_threading): Update. * cfganal.c (connect_infinite_loops_to_exit): Initialize new edge probabilitycount to 0. * cfgbuild.c (compute_outgoing_frequencies): Update. * cfgcleanup.c (try_forward_edges): Update. (outgoing_edges_match): Update. (try_crossjump_to_edge): Update. * cfgexpand.c (expand_gimple_cond): Update make_single_succ_edge. (expand_gimple_tailcall): Update. (construct_init_block): Use make_single_succ_edge. (construct_exit_block): Use make_single_succ_edge. * cfghooks.c (verify_flow_info): Update. (redirect_edge_succ_nodup): Update. (split_edge): Update. (account_profile_record): Update. * cfgloopanal.c (single_likely_exit): Update. * cfgloopmanip.c (scale_loop_profile): Update. (set_zero_probability): Remove. (duplicate_loop_to_header_edge): Update. * cfgloopmanip.h (loop_version): Update prototype. * cfgrtl.c (try_redirect_by_replacing_jump): Update. (force_nonfallthru_and_redirect): Update. (update_br_prob_note): Update. (rtl_verify_edges): Update. (purge_dead_edges): Update. (rtl_lv_add_condition_to_bb): Update. * cgraph.c: (cgraph_edge::redirect_call_stmt_to_calle): Update. * cgraphunit.c (init_lowered_empty_function): Update. (cgraph_node::expand_thunk): Update. * cilk-common.c: Include profile-count.h * dojump.c (inv): Remove. (jumpifnot): Update. (jumpifnot_1): Update. (do_jump_1): Update. (do_jump): Update. (do_jump_by_parts_greater_rtx): Update. (do_compare_rtx_and_jump): Update. * dojump.h (jumpifnot, jumpifnot_1, jumpif_1, jumpif, do_jump, do_jump_1. do_compare_rtx_and_jump): Update prototype. * dwarf2cfi.c: Include profile-count.h * except.c (dw2_build_landing_pads): Use make_single_succ_edge. (sjlj_emit_dispatch_table): Likewise. * explow.c: Include profile-count.h * expmed.c (emit_store_flag_force): Update. (do_cmp_and_jump): Update. * expr.c (compare_by_pieces_d::generate): Update. (compare_by_pieces_d::finish_mode): Update. (emit_block_move_via_loop): Update. (store_expr_with_bounds): Update. (store_constructor): Update. (expand_expr_real_2): Update. (expand_expr_real_1): Update. * expr.h (try_casesi, try_tablejump): Update prototypes. * gimple-pretty-print.c (dump_probability): Update. (dump_profile): New. (dump_gimple_label): Update. (dump_gimple_bb_header): Update. * graph.c (draw_cfg_node_succ_edges): Update. * hsa-gen.c (convert_switch_statements): Update. * ifcvt.c (cheap_bb_rtx_cost_p): Update. (find_if_case_1): Update. (find_if_case_2): Update. * internal-fn.c (expand_arith_overflow_result_store): Update. (expand_addsub_overflow): Update. (expand_neg_overflow): Update. (expand_mul_overflow): Update. (expand_vector_ubsan_overflow): Update. * ipa-cp.c (good_cloning_opportunity_p): Update. * ipa-split.c (split_function): Use make_single_succ_edge. * ipa-utils.c (ipa_merge_profiles): Update. * loop-doloop.c (add_test): Update. (doloop_modify): Update. * loop-unroll.c (compare_and_jump_seq): Update. (unroll_loop_runtime_iterations): Update. * lra-constraints.c (lra_inheritance): Update. * lto-streamer-in.c (input_cfg): Update. * lto-streamer-out.c (output_cfg): Update. * mcf.c (adjust_cfg_counts): Update. * modulo-sched.c (sms_schedule): Update. * omp-expand.c (expand_omp_for_init_counts): Update. (extract_omp_for_update_vars): Update. (expand_omp_ordered_sink): Update. (expand_omp_for_ordered_loops): Update. (expand_omp_for_generic): Update. (expand_omp_for_static_nochunk): Update. (expand_omp_for_static_chunk): Update. (expand_cilk_for): Update. (expand_omp_simd): Update. (expand_omp_taskloop_for_outer): Update. (expand_omp_taskloop_for_inner): Update. * omp-simd-clone.c (simd_clone_adjust): Update. * optabs.c (expand_doubleword_shift): Update. (expand_abs): Update. (emit_cmp_and_jump_insn_1): Update. (expand_compare_and_swap_loop): Update. * optabs.h (emit_cmp_and_jump_insns): Update prototype. * predict.c (predictable_edge_p): Update. (edge_probability_reliable_p): Update. (set_even_probabilities): Update. (combine_predictions_for_insn): Update. (combine_predictions_for_bb): Update. (propagate_freq): Update. (estimate_bb_frequencies): Update. (force_edge_cold): Update. * profile-count.c (profile_count::dump): Add missing space into dump. (profile_count::debug): Add newline. (profile_count::differs_from_p): Explicitly convert to unsigned. (profile_count::stream_in): Update. (profile_probability::dump): New member function. (profile_probability::debug): New member function. (profile_probability::differs_from_p): New member function. (profile_probability::differs_lot_from_p): New member function. (profile_probability::stream_in): New member function. (profile_probability::stream_out): New member function. * profile-count.h (profile_count_quality): Rename to ... (profile_quality): ... this one. (profile_probability): New. (profile_count): Update. * profile.c (compute_branch_probabilities): Update. * recog.c (peep2_attempt): Update. * sched-ebb.c (schedule_ebbs): Update. * sched-rgn.c (find_single_block_region): Update. (compute_dom_prob_ps): Update. (schedule_region): Update. * sel-sched-ir.c (compute_succs_info): Update. * stmt.c (struct case_node): Update. (do_jump_if_equal): Update. (get_outgoing_edge_probs): Update. (conditional_probability): Update. (emit_case_dispatch_table): Update. (expand_case): Update. (expand_sjlj_dispatch_table): Update. (emit_case_nodes): Update. * targhooks.c: Update. * tracer.c (better_p): Update. (find_best_successor): Update. * trans-mem.c (expand_transaction): Update. * tree-call-cdce.c: Update. * tree-cfg.c (gimple_split_edge): Upate. (move_sese_region_to_fn): Upate. * tree-cfgcleanup.c (cleanup_control_expr_graph): Upate. * tree-eh.c (lower_resx): Upate. (cleanup_empty_eh_move_lp): Upate. * tree-if-conv.c (version_loop_for_if_conversion): Update. * tree-inline.c (copy_edges_for_bb): Update. (copy_cfg_body): Update. * tree-parloops.c (gen_parallel_loop): Update. * tree-profile.c (gimple_gen_ic_func_profiler): Update. (gimple_gen_time_profiler): Update. * tree-ssa-dce.c (remove_dead_stmt): Update. * tree-ssa-ifcombine.c (update_profile_after_ifcombine): Update. * tree-ssa-loop-im.c (execute_sm_if_changed): Update. * tree-ssa-loop-ivcanon.c (remove_exits_and_undefined_stmts): Update. (unloop_loops): Update. (try_peel_loop): Update. * tree-ssa-loop-manip.c (tree_transform_and_unroll_loop): Update. * tree-ssa-loop-split.c (connect_loops): Update. (split_loop): Update. * tree-ssa-loop-unswitch.c (tree_unswitch_loop): Update. (hoist_guard): Update. * tree-ssa-phionlycprop.c (propagate_rhs_into_lhs): Update. * tree-ssa-phiopt.c (replace_phi_edge_with_variable): Update. (value_replacement): Update. * tree-ssa-reassoc.c (branch_fixup): Update. * tree-ssa-tail-merge.c (replace_block_by): Update. * tree-ssa-threadupdate.c (remove_ctrl_stmt_and_useless_edges): Update. (create_edge_and_update_destination_phis): Update. (compute_path_counts): Update. (recompute_probabilities): Update. (update_joiner_offpath_counts): Update. (freqs_to_counts_path): Update. (duplicate_thread_path): Update. * tree-switch-conversion.c (hoist_edge_and_branch_if_true): Update. (struct switch_conv_info): Update. (gen_inbound_check): Update. * tree-vect-loop-manip.c (slpeel_add_loop_guard): Update. (vect_do_peeling): Update. (vect_loop_versioning): Update. * tree-vect-loop.c (scale_profile_for_vect_loop): Update. (optimize_mask_stores): Update. * ubsan.c (ubsan_expand_null_ifn): Update. * value-prof.c (gimple_divmod_fixed_value): Update. (gimple_divmod_fixed_value_transform): Update. (gimple_mod_pow2): Update. (gimple_mod_pow2_value_transform): Update. (gimple_mod_subtract): Update. (gimple_mod_subtract_transform): Update. (gimple_ic): Update. (gimple_stringop_fixed_value): Update. (gimple_stringops_transform): Update. * value-prof.h: Update. From-SVN: r249800
2017-05-14use auto_bitmap more with alternate obstacksTrevor Saunders1-24/+18
gcc/ChangeLog: 2017-05-13 Trevor Saunders <tbsaunde+gcc@tbsaunde.org> * df-core.c (df_set_blocks): Start using auto_bitmap. (df_compact_blocks): Likewise. * df-problems.c (df_rd_confluence_n): Likewise. * df-scan.c (df_insn_rescan_all): Likewise. (df_process_deferred_rescans): Likewise. (df_update_entry_block_defs): Likewise. (df_update_exit_block_uses): Likewise. (df_entry_block_bitmap_verify): Likewise. (df_exit_block_bitmap_verify): Likewise. (df_scan_verify): Likewise. * lra-constraints.c (lra_constraints): Likewise. (undo_optional_reloads): Likewise. (lra_undo_inheritance): Likewise. * lra-remat.c (calculate_gen_cands): Likewise. (do_remat): Likewise. * lra-spills.c (assign_spill_hard_regs): Likewise. (spill_pseudos): Likewise. * tree-ssa-pre.c (bitmap_set_and): Likewise. (bitmap_set_subtract_values): Likewise. From-SVN: r248023
2017-05-06Record equivalences for spill registersRichard Sandiford1-6/+36
If we decide to allocate a call-clobbered register R to a value that is live across a call, LRA will create a new spill register TMPR, insert: TMPR <- R before the call and R <- TMPR after it. But if we then failed to allocate a register to TMPR, we would always spill it to the stack, even if R was known to be equivalent to a constant or to some existing memory location. And on AArch64, we'd always fail to allocate such a register for 128-bit Advanced SIMD modes, since no registers of those modes are call-preserved. This patch avoids the problem by copying the equivalence information from the original pseudo to the spill register. It means that the code for the testcase is as good with -O2 as it is with -O, whereas previously the -O code was better. [Based on the code ARM contributed in branches/ARM/sve-branch@247248] 2017-05-06 Richard Sandiford <richard.sandiford@linaro.org> gcc/ * lra-constraints.c (lra_copy_reg_equiv): New function. (split_reg): Use it to copy equivalence information from the original register to the spill register. gcc/testsuite/ * gcc.target/aarch64/spill_1.c: New test. From-SVN: r247720
2017-04-11re PR rtl-optimization/70478 ([LRA] S/390: Performance regression - ↵Vladimir Makarov1-6/+8
superfluous stack frame) 2017-04-11 Vladimir Makarov <vmakarov@redhat.com> PR rtl-optimization/70478 * lra-constraints.c (process_alt_operands): Check memory for disfavoring memory insn operand. From-SVN: r246854
2017-04-10re PR rtl-optimization/70478 ([LRA] S/390: Performance regression - ↵Vladimir Makarov1-0/+60
superfluous stack frame) 2017-04-10 Vladimir Makarov <vmakarov@redhat.com> PR rtl-optimization/70478 * lra-constraints.c (curr_small_class_check): New. (update_and_check_small_class_inputs): New. (process_alt_operands): Update curr_small_class_check. Disfavor alternative insn memory operands. Check available regs for small class operands. From-SVN: r246808
2017-04-08re PR rtl-optimization/70478 ([LRA] S/390: Performance regression - ↵Vladimir Makarov1-15/+0
superfluous stack frame) 2017-04-08 Vladimir Makarov <vmakarov@redhat.com> PR rtl-optimization/70478 * lra-constraints.c: Reverse the last patch. From-SVN: r246789
2017-04-07re PR rtl-optimization/70478 ([LRA] S/390: Performance regression - ↵Vladimir Makarov1-0/+15
superfluous stack frame) 2017-04-07 Vladimir Makarov <vmakarov@redhat.com> PR rtl-optimization/70478 * lra-constraints.c (process_alt_operands): Disfavor alternative insn memory operands. 2017-04-07 Vladimir Makarov <vmakarov@redhat.com> PR rtl-optimization/70478 * gcc.target/s390/pr70478.c: New. From-SVN: r246764
2017-03-15re PR target/80017 (ICE: Max. number of generated reload insns per insn is ↵Vladimir Makarov1-0/+9
achieved (90)) 2017-03-15 Vladimir Makarov <vmakarov@redhat.com> PR target/80017 * lra-constraints.c (process_alt_operands): Increase reject for reloading an input/output operand. From-SVN: r246181
2017-03-09re PR rtl-optimization/79949 (ICE in Max. number of generated reload insns ↵Vladimir Makarov1-4/+9
per insn is achieved (90)) 2017-03-09 Vladimir Makarov <vmakarov@redhat.com> PR rtl-optimization/79949 * lra-constraints.c (process_alt_operands): Check memory when trying to predict a cycle. Print about the overall increase. From-SVN: r246003
2017-03-06re PR rtl-optimization/79571 (ICE in Max. number of generated reload insns ↵Vladimir Makarov1-3/+20
per insn is achieved (90)) 2017-03-06 Vladimir Makarov <vmakarov@redhat.com> PR rtl-optimization/79571 * lra-constraints.c (process_alt_operands): Claculate static reject and subtract it from overal when there will be only address reloads. 2017-03-06 Vladimir Makarov <vmakarov@redhat.com> PR rtl-optimization/79571 * gcc.target/i386/pr79571.c: New. From-SVN: r245928
2017-02-26PR79584, ICE in base_to_regAlan Modra1-4/+4
PR rtl-optimization/79584 * lra-constraints.c (base_to_reg): Reload ad->base, the entire base, not ad->base_term, the reg within base. Remove assertion that ad->base == ad->base_term. Replace gen_int_mode using bogus mode with const0_rtx. From-SVN: r245741
2017-02-22Support WORD_REGISTER_OPERATIONS requirements in simplify_operand_subregMatthew Fortune1-5/+16
gcc/ PR target/78660 * lra-constraints.c (simplify_operand_subreg): Handle WORD_REGISTER_OPERATIONS targets. From-SVN: r245655
2017-02-21Revert r245598Matthew Fortune1-9/+1
gcc/ PR target/78660 Revert: 2017-02-20 Matthew Fortune <matthew.fortune@imgtec.com> * lra-constraints.c (curr_insn_transform): Handle WORD_REGISTER_OPERATIONS requirements when reloading SUBREGs. From-SVN: r245626
2017-02-20Ensure the mode used to create split registers is suppportedMatthew Fortune1-0/+20
gcc/ PR target/78012 * lra-constraints.c (split_reg): Check requested split mode is supported by the register. From-SVN: r245601
2017-02-20Partial revert of r243782 to restore previous behaviorMatthew Fortune1-1/+2
gcc/ * lra-constraints.c (simplify_operand_subreg): Remove early return false. From-SVN: r245600
2017-02-20Tighten condition for converting SUBREG reloads from OP_OUT to OP_INOUTMatthew Fortune1-1/+11
gcc/ PR target/78660 * lra-constraints.c (curr_insn_transform): Tighten condition for converting SUBREG reloads from OP_OUT to OP_INOUT. From-SVN: r245599
2017-02-20Handle WORD_REGISTER_OPERATIONS when reloading (subreg (reg))Matthew Fortune1-1/+9
gcc/ PR target/78660 * lra-constraints.c (curr_insn_transform): Handle WORD_REGISTER_OPERATIONS requirements when reloading SUBREGs. From-SVN: r245598
2017-02-17re PR rtl-optimization/79541 (lra reads uninitialized memory (with invalid ↵Vladimir Makarov1-3/+3
input)) 2017-02-17 Vladimir Makarov <vmakarov@redhat.com> PR rtl-optimization/79541 * lra-constraints.c (curr_insn_transform): Remove wrong asm insn instead of transforming it into USE. From-SVN: r245536
2017-02-13cprop.c (cprop_jump): Add missing space in string literal.Jakub Jelinek1-1/+1
* cprop.c (cprop_jump): Add missing space in string literal. * tree-ssa-structalias.c (rewrite_constraints): Likewise. (get_constraint_for_component_ref): Likewise. * df-core.c (df_worklist_dataflow_doublequeue): Likewise. * tree-outof-ssa.c (insert_partition_copy_on_edge): Likewise. * lra-constraints.c (process_alt_operands): Likewise. * ipa-inline.c (inline_small_functions): Likewise. * tree-ssa-sccvn.c (visit_reference_op_store): Likewise. * cgraph.c (cgraph_edge::redirect_call_stmt_to_callee): Likewise. * trans-mem.c (diagnose_tm_1_op): Likewise. * omp-grid.c (grid_find_single_omp_among_assignments): Likewise. (grid_parallel_clauses_gridifiable): Likewise. c/ * c-parser.c (c_parser_oacc_declare): Add missing space in diagnostics. fortran/ * trans-expr.c (gfc_conv_substring): Add missing space in diagnostics. From-SVN: r245409
2017-01-27re PR rtl-optimization/71374 (ICE on valid code at -O1 and above on ↵Vladimir Makarov1-2/+32
x86_64-linux-gnu: in extract_constrain_insn, at recog.c:2190) 2017-01-27 Vladimir Makarov <vmakarov@redhat.com> PR tree-optimization/71374 * lra-constraints.c (check_conflict_input_operands): New. (match_reload): Use it. 2017-01-27 Vladimir Makarov <vmakarov@redhat.com> PR tree-optimization/71374 * testsuite/gcc.target/i386/pr71374.c: New. From-SVN: r244991
2017-01-26re PR target/79131 (ICE: in extract_constrain_insn, at recog.c:2213, ↵Vladimir Makarov1-1/+4
big-endian ARM) 2017-01-26 Vladimir Makarov <vmakarov@redhat.com> PR target/79131 * lra-assigns.c (setup_live_pseudos_and_spill_after_risky): Take endianess for subregs into account. * lra-constraints.c (lra_constraints): Do risky transformations always on the first iteration. * lra-lives.c (check_pseudos_live_through_calls): Add arg last_call_used_reg_set. (process_bb_lives): Define and use last_call_used_reg_set. * lra.c (lra): Always continue after lra_constraints on the first iteration. 2017-01-26 Vladimir Makarov <vmakarov@redhat.com> PR target/79131 * gcc.target/arm/pr79131.c: New. From-SVN: r244942
2017-01-11re PR rtl-optimization/79032 (unaligned memory access generated with LRA and ↵Eric Botcazou1-4/+4
optimization) PR rtl-optimization/79032 * lra-constraints.c (simplify_operand_subreg): In the MEM case, test the alignment of the adjusted memory reference against that of MODE, instead of the alignment of the original memory reference. From-SVN: r244311
2017-01-06Fix lto-bootstrap (PR bootstrap/79003).Martin Liska1-4/+5
2017-01-06 Martin Liska <mliska@suse.cz> PR bootstrap/79003 * lra-constraints.c: Rename invariant to lra_invariant. * predict.c (set_even_probabilities): Initialize e to NULL. 2017-01-06 Martin Liska <mliska@suse.cz> PR bootstrap/79003 * Makefile.in: Add -fno-lto to {C,CPP,LD}FLAGS. From-SVN: r244155
2017-01-01Update copyright years.Jakub Jelinek1-1/+1
From-SVN: r243994
2016-12-18lra-constraints.c (process_address): Add forward declaration.Eric Botcazou1-13/+23
* lra-constraints.c (process_address): Add forward declaration. (simplify_operand_subreg): In the MEM case, if the adjusted memory reference is not sufficient aligned and the address was invalid, reload the address before reloading the original memory reference. Fix long lines and add a final return for the sake of clarity. From-SVN: r243782
2016-12-14lra-constraints.c (process_address_1): Do not attempt to decompose addresses ↵Eric Botcazou1-1/+5
for MEMs that satisfy fixed-form constraints. * lra-constraints.c (process_address_1): Do not attempt to decompose addresses for MEMs that satisfy fixed-form constraints. From-SVN: r243632
2016-12-03lra-constraints.c (emit_spill_move): Use gen_lowpart_SUBREG in all cases to ↵Eric Botcazou1-3/+3
build a lowpart SUBREG. * lra-constraints.c (emit_spill_move): Use gen_lowpart_SUBREG in all cases to build a lowpart SUBREG. From-SVN: r243222
2016-11-30re PR tree-optimization/77856 (wrong code at -O2 on x86_64-linux-gnu in ↵Vladimir Makarov1-4/+10
32-bit mode) 2016-11-30 Vladimir Makarov <vmakarov@redhat.com> PR tree-optimization/77856 * lra-constraints.c (inherit_in_ebb): Check original regno for invalid invariant regs too. Set only clobbered hard regs for the invalid invariant regs. 2016-11-30 Vladimir Makarov <vmakarov@redhat.com> PR tree-optimization/77856 * gcc.target/i386.c (pr77856.c): New. From-SVN: r243038
2016-11-29lra-constraints.c (check_and_process_move): Constrain the range of DCLASS ↵Jeff Law1-0/+2
and SCLASS to avoid false positive out of bounds... * lra-constraints.c (check_and_process_move): Constrain the range of DCLASS and SCLASS to avoid false positive out of bounds array index warning. From-SVN: r242993
2016-11-24re PR rtl-optimization/77541 (wrong code with 512bit vectors of int128 @ -O1)Vladimir Makarov1-31/+54
2016-11-24 Vladimir Makarov <vmakarov@redhat.com> PR rtl-optimization/77541 * lra-constraints.c (struct input_reload): Add field match_p. (get_reload_reg): Check modes of input reloads to generate unique value reload pseudo. (match_reload): Add input reload pseudo for the current insn. 2016-11-24 Vladimir Makarov <vmakarov@redhat.com> PR rtl-optimization/77541 * gcc.target/i386/pr77541.c: New. From-SVN: r242848
2016-11-17re PR rtl-optimization/78355 (LRA generates unaligned accesses when ↵Pip Cet1-3/+4
SLOW_UNALIGNED_ACCESS is 1) PR rtl-optimization/78355 * doc/tm.texi.in (SLOW_UNALIGNED_ACCESS): Document that the macro only needs to deal with unaligned accesses. * doc/tm.texi: Regenerate. * lra-constraints.c (simplify_operand_subreg): Only invoke SLOW_UNALIGNED_ACCESS on innermode if the MEM is not aligned enough. Co-Authored-By: Eric Botcazou <ebotcazou@adacore.com> From-SVN: r242554
2016-10-21make LABEL_REF_LABEL a rtx_insn *Trevor Saunders1-1/+1
While changing LABEL_REF_LABEL it might as well become an inline function, so that its clearer what types are involved. Unfortunately because it is still possible to use XEXP and related macros on a LABEL_REF rtx you can still set the field to be a non insn rtx. The other unfortunate thing is that the generators actually create LABEL_REF rtx that refer to MATCH_x rtx, so there we actually need to use XEXP to bypass the checking this patch adds. gcc/ChangeLog: 2016-10-21 Trevor Saunders <tbsaunde+gcc@tbsaunde.org> * rtl.h (label_ref_label): New function. (set_label_ref_label): New function. (LABEL_REF_LABEL): Delete. * alias.c (rtx_equal_for_memref_p): Adjust. * cfgbuild.c (make_edges): Likewise. (purge_dead_tablejump_edges): Likewise. * cfgexpand.c (convert_debug_memory_address): Likewise. * cfgrtl.c (patch_jump_insn): Likewise. * combine.c (distribute_notes): Likewise. * cse.c (hash_rtx_cb): Likewise. (exp_equiv_p): Likewise. (fold_rtx): Likewise. (check_for_label_ref): Likewise. * cselib.c (rtx_equal_for_cselib_1): Likewise. (cselib_hash_rtx): Likewise. * emit-rtl.c (mark_label_nuses): Likewise. * explow.c (convert_memory_address_addr_space_1): Likewise. * final.c (output_asm_label): Likewise. (output_addr_const): Likewise. * gcse.c (add_label_notes): Likewise. * genconfig.c (walk_insn_part): Likewise. * genrecog.c (validate_pattern): Likewise. * ifcvt.c (cond_exec_get_condition): Likewise. (noce_emit_store_flag): Likewise. (noce_get_alt_condition): Likewise. (noce_get_condition): Likewise. * jump.c (maybe_propagate_label_ref): Likewise. (mark_jump_label_1): Likewise. (redirect_exp_1): Likewise. (rtx_renumbered_equal_p): Likewise. * lra-constraints.c (operands_match_p): Likewise. * print-rtl.c (print_value): Likewise. * reload.c (find_reloads): Likewise. * reload1.c (set_label_offsets): Likewise. * reorg.c (get_branch_condition): Likewise. * rtl-tests.c (test_uncond_jump): Likewise. * rtl.c (rtx_equal_p_cb): Likewise. (rtx_equal_p): Likewise. * rtlanal.c (reg_mentioned_p): Likewise. (rtx_referenced_p): Likewise. (get_condition): Likewise. * varasm.c (const_hash_1): Likewise. (compare_constant): Likewise. (const_rtx_hash_1): Likewise. (output_constant_pool_1): Likewise. From-SVN: r241401
2016-10-13Move MEMMODEL_* from coretypes.h to memmodel.hThomas Preud'homme1-0/+1
2016-10-13 Thomas Preud'homme <thomas.preudhomme@arm.com> gcc/ * coretypes.h: Move MEMMODEL_* macros and enum memmodel definition into ... * memmodel.h: This file. * alias.c, asan.c, auto-inc-dec.c, bb-reorder.c, bt-load.c, caller-save.c, calls.c, ccmp.c, cfgbuild.c, cfgcleanup.c, cfgexpand.c, cfgloopanal.c, cfgrtl.c, cilk-common.c, combine.c, combine-stack-adj.c, common/config/aarch64/aarch64-common.c, common/config/arm/arm-common.c, common/config/bfin/bfin-common.c, common/config/c6x/c6x-common.c, common/config/i386/i386-common.c, common/config/ia64/ia64-common.c, common/config/nvptx/nvptx-common.c, compare-elim.c, config/aarch64/aarch64-builtins.c, config/aarch64/aarch64-c.c, config/aarch64/cortex-a57-fma-steering.c, config/arc/arc.c, config/arc/arc-c.c, config/arm/arm-builtins.c, config/arm/arm-c.c, config/avr/avr.c, config/avr/avr-c.c, config/avr/avr-log.c, config/bfin/bfin.c, config/c6x/c6x.c, config/cr16/cr16.c, config/cris/cris.c, config/darwin-c.c, config/darwin.c, config/epiphany/epiphany.c, config/epiphany/mode-switch-use.c, config/epiphany/resolve-sw-modes.c, config/fr30/fr30.c, config/frv/frv.c, config/ft32/ft32.c, config/h8300/h8300.c, config/i386/i386-c.c, config/i386/winnt.c, config/iq2000/iq2000.c, config/lm32/lm32.c, config/m32c/m32c.c, config/m32r/m32r.c, config/m68k/m68k.c, config/mcore/mcore.c, config/microblaze/microblaze.c, config/mmix/mmix.c, config/mn10300/mn10300.c, config/moxie/moxie.c, config/msp430/msp430.c, config/nds32/nds32-cost.c, config/nds32/nds32-intrinsic.c, config/nds32/nds32-md-auxiliary.c, config/nds32/nds32-memory-manipulation.c, config/nds32/nds32-predicates.c, config/nds32/nds32.c, config/nios2/nios2.c, config/nvptx/nvptx.c, config/pa/pa.c, config/pdp11/pdp11.c, config/rl78/rl78.c, config/rs6000/rs6000-c.c, config/rx/rx.c, config/s390/s390-c.c, config/s390/s390.c, config/sh/sh.c, config/sh/sh-c.c, config/sh/sh-mem.cc, config/sh/sh_treg_combine.cc, config/sol2.c, config/spu/spu.c, config/stormy16/stormy16.c, config/tilegx/tilegx.c, config/tilepro/tilepro.c, config/v850/v850.c, config/vax/vax.c, config/visium/visium.c, config/vms/vms-c.c, config/xtensa/xtensa.c, coverage.c, cppbuiltin.c, cprop.c, cse.c, cselib.c, dbxout.c, dce.c, df-core.c, df-problems.c, df-scan.c, dojump.c, dse.c, dwarf2asm.c, dwarf2cfi.c, dwarf2out.c, emit-rtl.c, except.c, explow.c, expmed.c, expr.c, final.c, fold-const.c, function.c, fwprop.c, gcse.c, ggc-page.c, haifa-sched.c, hsa-brig.c, hsa-gen.c, hw-doloop.c, ifcvt.c, init-regs.c, internal-fn.c, ira-build.c, ira-color.c, ira-conflicts.c, ira-costs.c, ira-emit.c, ira-lives.c, ira.c, jump.c, loop-doloop.c, loop-invariant.c, loop-iv.c, loop-unroll.c, lower-subreg.c, lra.c, lra-assigns.c, lra-coalesce.c, lra-constraints.c, lra-eliminations.c, lra-lives.c, lra-remat.c, lra-spills.c, mode-switching.c, modulo-sched.c, omp-low.c, passes.c, postreload-gcse.c, postreload.c, predict.c, print-rtl-function.c, recog.c, ree.c, reg-stack.c, regcprop.c, reginfo.c, regrename.c, reload.c, reload1.c, reorg.c, resource.c, rtl-chkp.c, rtl-tests.c, rtlanal.c, rtlhooks.c, sched-deps.c, sched-rgn.c, sdbout.c, sel-sched-ir.c, sel-sched.c, shrink-wrap.c, simplify-rtx.c, stack-ptr-mod.c, stmt.c, stor-layout.c, target-globals.c, targhooks.c, toplev.c, tree-nested.c, tree-outof-ssa.c, tree-profile.c, tree-ssa-coalesce.c, tree-ssa-ifcombine.c, tree-ssa-loop-ivopts.c, tree-ssa-loop.c, tree-ssa-reassoc.c, tree-ssa-sccvn.c, tree-vect-data-refs.c, ubsan.c, valtrack.c, var-tracking.c, varasm.c: Include memmodel.h. * genattrtab.c (write_header): Include memmodel.h in generated file. * genautomata.c (main): Likewise. * gengtype.c (open_base_files): Likewise. * genopinit.c (main): Likewise. * genconditions.c (write_header): Include memmodel.h earlier in generated file. * genemit.c (main): Likewise. * genoutput.c (output_prologue): Likewise. * genpeep.c (main): Likewise. * genpreds.c (write_insn_preds_c): Likewise. * genrecog.c (write_header): Likewise. * Makefile.in (PLUGIN_HEADERS): Include memmodel.h gcc/ada/ * gcc-interface/utils2.c: Include memmodel.h. gcc/c-family/ * c-cppbuiltin.c: Include memmodel.h. * c-opts.c: Likewise. * c-pragma.c: Likewise. * c-warn.c: Likewise. gcc/c/ * c-typeck.c: Include memmodel.h. gcc/cp/ * decl2.c: Include memmodel.h. * rtti.c: Likewise. gcc/fortran/ * trans-intrinsic.c: Include memmodel.h. gcc/go/ * go-backend.c: Include memmodel.h. libgcc/ * libgcov-profiler.c: Replace MEMMODEL_* macros by their __ATOMIC_* equivalent. * config/tilepro/atomic.c: Likewise and stop casting model to enum memmodel. From-SVN: r241121
2016-09-13re PR rtl-optimization/77289 (ICE in extract_constrain_insn, at recog.c:2212 ↵Bernd Edlinger1-26/+15
on powerpc64) 2016-09-13 Bernd Edlinger <bernd.edlinger@hotmail.de> PR rtl-optimization/77289 * lra-constraints.c (get_final_hard_regno): Removed. (get_hard_regno): Add new parameter final_p. (get_reg_class): Directly call lra_get_elimination_hard_regno. (operands_match_p): Adjust call to get_hard_regno. (uses_hard_regs_p): Likewise. (process_alt_operands): Likewise. From-SVN: r240124
2016-09-09re PR rtl-optimization/77289 (ICE in extract_constrain_insn, at recog.c:2212 ↵Peter Bergner1-17/+18
on powerpc64) gcc/ PR rtl-optimization/77289 * lra-constraints.c (get_final_hard_regno): Add support for non hard register numbers. Remove support for subregs. (get_hard_regno): Use SUBREG_P. Don't call get_final_hard_regno(). (get_reg_class): Delete removed get_final_hard_regno() argument. (uses_hard_regs_p): Call get_final_hard_regno(). gcc/testsuite/ PR rtl-optimization/77289 * gcc.target/powerpc/pr77289.c: New test. From-SVN: r240065
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