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1999-05-07David Edelsohn <edelsohn@gnu.org>David Edelsohn2-0/+6
David Edelsohn <edelsohn@gnu.org> * ginclude/stdarg.h (__va_rounded_size): Use long type for rounding on AIX. * ginclude/varargs.h: Likewise. From-SVN: r26837
1999-04-30va-ppc.h (__va_start_common): Let __builtin_saveregs do the work.Richard Henderson1-28/+7
* va-ppc.h (__va_start_common): Let __builtin_saveregs do the work. * rs6000.c (expand_builtin_saveregs): For V4, initialize a private va_list struct, and return a pointer to it. (setup_incoming_varargs): V4 save area based off virtual_stack_vars instead of frame_pointer. From-SVN: r26710
1999-02-25sh.h (PASS_IN_REG_P): For TARGET_HITACHI, don't pass structures in registers.J"orn Rennecke1-6/+9
* sh.h (PASS_IN_REG_P): For TARGET_HITACHI, don't pass structures in registers. * expr.h (PRETEND_OUTGOING_VARARGS_NAMED): Provide default definition. * function.c (assign_parms): Honour PRETEND_OUTGOING_VARARGS_NAMED. * calls.c (expand_call): Likewise. * sh.c (sh_expand_prologue): For TARGET_HITACHI, don't push varargs / stdarg arguments. * sh.h (CPP_SPEC): Add -D__HITACHI__ for -mhitachi. (FUNCTION_ARG): For TARGET_HITACHI, don't pass unnamed arguments in registers. (PRETEND_OUTGOING_VARARGS_NAMED): Define. * va-sh.h (entire file): If __HITACHI__ is defined, use sh[123] flavour varargs. From-SVN: r25440
1998-12-16dummy import to prevent merge lossageJeff Law1-1/+1
From-SVN: r24349
1998-11-23Add SH4 support:J"orn Rennecke1-36/+63
* config/sh/lib1funcs.asm (___movstr_i4_even, ___movstr_i4_odd): Define. (___movstrSI12_i4, ___sdivsi3_i4, ___udivsi3_i4): Define. * sh.c (reg_class_from_letter, regno_reg_class): Add DF_REGS. (fp_reg_names, assembler_dialect): New variables. (print_operand_address): Handle SUBREGs. (print_operand): Added 'o' case. Don't use adj_offsettable_operand on PRE_DEC / POST_INC. Name of FP registers depends on mode. (expand_block_move): Emit different code for SH4 hardware. (prepare_scc_operands): Use emit_sf_insn / emit_df_insn as appropriate. (from_compare): Likewise. (add_constant): New argument last_value. Changed all callers. (find_barrier): Don't try HImode load for FPUL_REG. (machine_dependent_reorg): Likewise. (sfunc_uses_reg): A CLOBBER cannot be the address register use. (gen_far_branch): Emit a barrier after the new jump. (barrier_align): Don't trust instruction lengths before fixing up pcloads. (machine_dependent_reorg): Add support for FIRST_XD_REG .. LAST_XD_REG. Use auto-inc addressing for fp registers if doubles need to be loaded in two steps. Set sh_flag_remove_dead_before_cse. (push): Support for TARGET_FMOVD. Use gen_push_fpul for fpul. (pop): Support for TARGET_FMOVD. Use gen_pop_fpul for fpul. (calc_live_regs): Support for TARGET_FMOVD. Don't save FPSCR. Support for FIRST_XD_REG .. LAST_XD_REG. (sh_expand_prologue): Support for FIRST_XD_REG .. LAST_XD_REG. (sh_expand_epilogue): Likewise. (sh_builtin_saveregs): Use DFmode moves for fp regs on SH4. (initial_elimination_offset): Take TARGET_ALIGN_DOUBLE into account. (arith_reg_operand): FPUL_REG is OK for SH4. (fp_arith_reg_operand, fp_extended_operand) New functions. (tertiary_reload_operand, fpscr_operand): Likewise. (commutative_float_operator, noncommutative_float_operator): Likewise. (binary_float_operator, get_fpscr_rtx, emit_sf_insn): Likewise. (emit_df_insn, expand_sf_unop, expand_sf_binop): Likewise. (expand_df_unop, expand_df_binop, expand_fp_branch): Likewise. (emit_fpscr_use, mark_use, remove_dead_before_cse): Likewise. * sh.h (CPP_SPEC): Add support for -m4, m4-single, m4-single-only. (CONDITIONAL_REGISTER_USAGE): Likewise. (HARD_SH4_BIT, FPU_SINGLE_BIT, SH4_BIT, FMOVD_BIT): Define. (TARGET_CACHE32, TARGET_SUPERSCALAR, TARGET_HARWARD): Define. (TARGET_HARD_SH4, TARGET_FPU_SINGLE, TARGET_SH4, TARGET_FMOVD): Define. (target_flag): Add -m4, m4-single, m4-single-only, -mfmovd. (OPTIMIZATION_OPTIONS): If optimizing, set flag_omit_frame_pointer to -1 and sh_flag_remove_dead_before_cse to 1. (ASSEMBLER_DIALECT): Define to assembler_dialect. (assembler_dialect, fp_reg_names): Declare. (OVERRIDE_OPTIONS): Add code for TARGET_SH4. Hide names of registers that are not accessible. (CACHE_LOG): Take TARGET_CACHE32 into account. (LOOP_ALIGN): Take TARGET_HARWARD into account. (FIRST_XD_REG, LAST_XD_REG, FPSCR_REG): Define. (FIRST_PSEUDO_REGISTER: Now 49. (FIXED_REGISTERS, CALL_USED_REGISTERS): Include values for registers. (HARD_REGNO_NREGS): Special treatment of FIRST_XD_REG .. LAST_XD_REG. (HARD_REGNO_MODE_OK): Update. (enum reg_class): Add DF_REGS and FPSCR_REGS. (REG_CLASS_NAMES, REG_CLASS_CONTENTS, REG_ALLOC_ORDER): Likewise. (SECONDARY_OUTPUT_RELOAD_CLASS, SECONDARY_INPUT_RELOAD_CLASS): Update. (CLASS_CANNOT_CHANGE_SIZE, DEBUG_REGISTER_NAMES): Define. (NPARM_REGS): Eight floating point parameter registers on SH4. (BASE_RETURN_VALUE_REG): SH4 also passes double values in floating point registers. (GET_SH_ARG_CLASS) Likewise. Complex float types are also returned in float registers. (BASE_ARG_REG): Complex float types are also passes in float registers. (FUNCTION_VALUE): Change mode like PROMOTE_MODE does. (LIBCALL_VALUE): Remove trailing semicolon. (ROUND_REG): Round when double precision value is passed in floating point register(s). (FUNCTION_ARG_ADVANCE): No change wanted for SH4 when things are passed on the stack. (FUNCTION_ARG): Little endian adjustment for SH4 SFmode. (FUNCTION_ARG_PARTIAL_NREGS): Zero for SH4. (TRAMPOLINE_ALIGNMENT): Take TARGET_HARWARD into account. (INITIALIZE_TRAMPOLINE): Emit ic_invalidate_line for TARGET_HARWARD. (MODE_DISP_OK_8): Not for SH4 DFmode. (GO_IF_LEGITIMATE_ADDRESS): No base reg + index reg for SH4 DFmode. Allow indexed addressing for PSImode after reload. (LEGITIMIZE_ADDRESS): Not for SH4 DFmode. (LEGITIMIZE_RELOAD_ADDRESS): Handle SH3E SFmode. Don't change SH4 DFmode nor PSImode RELOAD_FOR_INPUT_ADDRESS. (DOUBLE_TYPE_SIZE): 64 for SH4. (RTX_COSTS): Add PLUS case. Increae cost of ASHIFT, ASHIFTRT, LSHIFTRT case. (REGISTER_MOVE_COST): Add handling of R0_REGS, FPUL_REGS, T_REGS, MAC_REGS, PR_REGS, DF_REGS. (REGISTER_NAMES): Use fp_reg_names. (enum processor_type): Add PROCESSOR_SH4. (sh_flag_remove_dead_before_cse): Declare. (rtx_equal_function_value_matters, fpscr_rtx, get_fpscr_rtx): Declare. (PREDICATE_CODES): Add binary_float_operator, commutative_float_operator, fp_arith_reg_operand, fp_extended_operand, fpscr_operand, noncommutative_float_operator. (ADJUST_COST): Use different scale for TARGET_SUPERSCALAR. (SH_DYNAMIC_SHIFT_COST): Cheaper for SH4. * sh.md (attribute cpu): Add value sh4. (attrbutes fmovd, issues): Define. (attribute type): Add values dfp_arith, dfp_cmp, dfp_conv, dfdiv. (function units memory, int, mpy, fp): Make dependent on issue rate. (function units issue, single_issue, load_si, load): Define. (function units load_store, fdiv, gp_fpul): Define. (attribute hit_stack): Provide proper default. (use_sfunc_addr+1, udivsi3): Predicated on ! TARGET_SH4. (udivsi3_i4, udivsi3_i4_single, divsi3_i4, divsi3_i4_single): New insns. (udivsi3, divsi3): Emit special patterns for SH4 hardware, (mulsi3_call): Now uses match_operand for function address. (mulsi3): Also emit code for SH1 case. Wrap result in REG_LIBCALL / REG_RETVAL notes. (push, pop, push_e, pop_e): Now define_expands. (push_fpul, push_4, pop_fpul, pop_4, ic_invalidate_line): New expanders. (movsi_ie): Added y/i alternative. (ic_invalidate_line_i, movdf_i4): New insns. (movdf_i4+[123], reload_outdf+[12345], movsi_y+[12]): New splitters. (reload_indf, reload_outdf, reload_outsf, reload_insi): New expanders. (movdf): Add special code for SH4. (movsf_ie, movsf_ie+1, reload_insf, calli): Make use of fpscr visible. (call_valuei, calli, call_value): Likewise. (movsf): Emit no-op move. (mov_nop, movsi_y): New insns. (blt, sge): generalize to handle DFmode. (return predicate): Call emit_fpscr_use and remove_dead_before_cse. (block_move_real, block_lump_real): Predicate on ! TARGET_HARD_SH4. (block_move_real_i4, block_lump_real_i4, fpu_switch): New insns. (fpu_switch0, fpu_switch1, movpsi): New expanders. (fpu_switch+[12], fix_truncsfsi2_i4_2+1): New splitters. (toggle_sz): New insn. (addsf3, subsf3, mulsf3, divsf3): Now define_expands. (addsf3_i, subsf3_i, mulsf3_i4, mulsf3_ie, divsf3_i): New insns. (macsf3): Make use of fpscr visible. Disable for SH4. (floatsisf2): Make use of fpscr visible. (floatsisf2_i4): New insn. (floatsisf2_ie, fixsfsi, cmpgtsf_t, cmpeqsf_t): Disable for SH4. (ieee_ccmpeqsf_t): Likewise. (fix_truncsfsi2): Emit different code for SH4. (fix_truncsfsi2_i4, fix_truncsfsi2_i4_2, cmpgtsf_t_i4): New insns. (cmpeqsf_t_i4, ieee_ccmpeqsf_t_4): New insns. (negsf2, sqrtsf2, abssf2): Now expanders. (adddf3, subdf3i, muldf2, divdf3, floatsidf2): New expanders. (negsf2_i, sqrtsf2_i, abssf2_i, adddf3_i, subdf3_i): New insns. (muldf3_i, divdf3_i, floatsidf2_i, fix_truncdfsi2_i): New insns. (fix_truncdfsi2, cmpdf, negdf2, sqrtdf2, absdf2): New expanders. (fix_truncdfsi2_i4, cmpgtdf_t, cmpeqdf_t, ieee_ccmpeqdf_t): New insns. (fix_truncdfsi2_i4_2+1): New splitters. (negdf2_i, sqrtdf2_i, absdf2_i, extendsfdf2_i4): New insns. (extendsfdf2, truncdfsf2): New expanders. (truncdfsf2_i4): New insn. * t-sh (LIB1ASMFUNCS): Add _movstr_i4, _sdivsi3_i4, _udivsi3_i4. (MULTILIB_OPTIONS): Add m4-single-only/m4-single/m4. * float-sh.h: When testing for __SH3E__, also test for __SH4_SINGLE_ONLY__ . * va-sh.h (__va_freg): Define to float. (__va_greg, __fa_freg, __gnuc_va_list, va_start): Define for __SH4_SINGLE_ONLY__ like for __SH3E__ . (__PASS_AS_FLOAT, __TARGET_SH4_P): Likewise. (__PASS_AS_FLOAT): Use different definition for __SH4__ and __SH4_SINGLE__. (TARGET_SH4_P): Define. (va_arg): Use it. * sh.md (movdf_k, movsf_i): Tweak the condition so that init_expr_once is satisfied about the existence of load / store insns. * sh.md (movsi_i, movsi_ie, movsi_i_lowpart, movsf_i, movsf_ie): change m constraint in source operand to mr / mf . * va-sh.h (__va_arg_sh1): Use __asm instead of asm. * (__VA_REEF): Define. (__va_arg_sh1): Use it. * va-sh.h (va_start, va_arg, va_copy): Add parenteses. From-SVN: r23777
1998-11-19i860.c (single_insn_src_p): Add missing parens.Jeffrey A Law1-1/+1
* i860.c (single_insn_src_p): Add missing parens. * ginclude/math-3300.h: Likewise. From-SVN: r23727
1998-09-19varargs.h: Add support for C4x target.Michael Hayes2-0/+8
* ginclude/varargs.h: Add support for C4x target. * ginclude/stdargs.h: Likewise. From-SVN: r22483
1998-09-18README.C4X: New file with information about the c4x ports.Michael Hayes1-0/+34
* README.C4X: New file with information about the c4x ports. * ginclude/va-c4x.h: New file for c4x varargs support. * config/c4x: New directory with c4x port files. From-SVN: r22475
1998-09-18toplev.c (rest_of_compilation): Set bct_p on second call to loop_optimize.David Edelsohn1-3/+0
* toplev.c (rest_of_compilation): Set bct_p on second call to loop_optimize. * loop.c (loop_optimize, scan_loop, strength_reduce): New argument bct_p. (strength_reduce): Only call analyze_loop_iterations and insert_bct if bct_p set. (check_dbra_loop): Fix typo. (insert_bct): Use word_mode instead of SImode. (instrument_loop_bct): Likewise. Do not delete iteration count condition code generation insn. Initialize iteration count before loop start. * rtl.h (loop_optimize): Update prototype. * ginclude/va-ppc.h (va_arg): longlong types in overflow area are not doubleword aligned. * rs6000.c (optimization_options): New function. (secondary_reload_class): Only call true_regnum for PSEUDO_REGs. * rs6000.h (OPTIMIZATION_OPTIONS): Define. (REG_ALLOC_ORDER): Allocate highest numbered condition regsiters first; cr1 can be used for FP record condition insns. From-SVN: r22471
1998-09-02va-alpha.h: Protect entire second portion of the file against double inclusion.Richard Henderson1-9/+7
* ginclude/va-alpha.h: Protect entire second portion of the file against double inclusion. From-SVN: r22200
1998-08-01va-alpha.h (va_list): Use a typedef, not a define.Richard Henderson2-3/+2
* ginclude/va-alpha.h (va_list): Use a typedef, not a define. * ginclude/va-clipper.h (va_list): Likewise. From-SVN: r21518
1998-05-30Makefile.in (USER_H): Add stdbool.h.Jeff Law1-0/+20
* Makefile.in (USER_H): Add stdbool.h. * ginclude/stdbool.h: New file. From-SVN: r20145
1998-04-28Patch from Shigeya Suzuki to fix BSD/OS 3.1 build failure.Jim Wilson1-2/+4
* ginclude/stddef.h: Add check for _MACHINE_ANSI_H_ for BSD/OS when undefining macros at the end. From-SVN: r19472
1998-04-02Patch from vmakarov to avoid warnings with -Wall.Vladimir N. Makarov1-1/+1
* ginclude/va-i960.h (va_end): Change void * to void. From-SVN: r18961
1998-03-01* ginclude/va-ppc.h (va_arg): Fix typo in long long support.Jeffrey A Law1-1/+1
From-SVN: r18346
1998-02-20Patch from Michael Tiemann to fix typo.Michael Tiemann1-1/+1
* ginclude/va-mips.h (va_arg): Remove trailing space after '\' continuation character (line 243). From-SVN: r18136
1998-02-16va-mips.h: Replace casts of pointers to int with casts of pointers to ↵Gavin Koch1-7/+8
__PTRDIFF_TYPE__. * ginclude/va-mips.h: Replace casts of pointers to int with casts of pointers to __PTRDIFF_TYPE__. From-SVN: r18025
1997-12-16stdarg.h: Undo BeOS changes, they break hpux.Jeffrey A Law2-13/+2
* ginclude/stdarg.h: Undo BeOS changes, they break hpux. * ginclude/varargs.h: Likewise. From-SVN: r17116
1997-12-11cvs commit ChangeLog config.sub configure configure.in toplev.cFred Fish3-2/+26
From-SVN: r17060
1997-12-08Delete bogus file from gcc-2.8 tarball.Jeff Law1-211/+0
From-SVN: r17011
1997-12-06Initial revisionJeff Law1-0/+211
From-SVN: r16981
1997-11-08Sync SH port with FSF; enable regmove for SH.J"orn Rennecke1-74/+50
From-SVN: r16371
1997-11-02Update mainline egcs to gcc2 snapshot 971021.Jeff Law3-5/+2
From-SVN: r16278
1997-10-17Rewrite v9 support.Doug Evans1-76/+35
From-SVN: r15986
1997-09-09Add port done awhile ago for the ARC cpu.Jeff Law3-0/+119
* arc/arc.h: New file. * arc/arc.c: New file. * arc/arc.md: New file. * arc/initfini.c: New file. * arc/lib1funcs.asm: New file. * arc/t-arc: New file. * arc/xm-arc.h: New file. * ginclude/va-arc.h: New file. * ginclude/stdarg.h: Include va-arc.h ifdef __arc__. * ginclude/varargs.h: Likewise. * Makefile.in (USER_H): Add va-arc.h. * configure.in (arc-*-elf*): Recognize. * longlong.h: Add ARC support. Mostly so I can test changes in snapshot scripts. * expr.c (clear_storage): Use CONST0_RTX instead of const0_rtx. when clearing non-BLKmode data. Fixes sparc problem. From-SVN: r15198
1997-09-05v850: New directory for v850 port.Jeffrey A Law3-0/+45
* v850: New directory for v850 port. * v850/lib1funcs.asm: New file. * t-v850, v850.c, v850.h, v850.md, xm-v850.h: New files. * ginclude/va-v850.h: New file. * varargs.h, stdarg.h: Include va-mn10200.h. * configure.in (mn10200-*-*): New target. * Makefile.in (USER_H): Add va-mn10200.h. From-SVN: r15104
1997-09-04Fix minor bugs found by riscos build attempt.Jim Wilson1-0/+3
* tlink.c: Include ctype.h. * ginclude/va-mips.h: Add _VA_MIPS_H_ENUM ifdef/define/endif. From-SVN: r15080
1997-06-23* varargs.h, stdarg.h: Include va-mn10200.h.Jeff Law2-0/+8
From-SVN: r14290
1997-06-23Initial revisionJeff Law1-0/+37
From-SVN: r14289
1997-06-22Protect va_list definition from SCO headers.Richard Kenner2-2/+8
From-SVN: r14286
1997-04-07Add m32r support.Doug Evans2-0/+8
From-SVN: r13844
1997-04-01Initial revisionJeff Law1-0/+35
From-SVN: r13828
1997-04-01stdarg.h: Include va-mn10300.h.Jeff Law2-2/+10
* ginclude/stdarg.h: Include va-mn10300.h. * ginclude/varargs.h: Likewise. * ginclude/va-mn10300.h: New file. * mn10300/mn10300.c (expand_prologue): If current_function_varargs is nonzero, then flush d0/d1 back into the stack. (mn10300_builtin_saveregs): New function. (function_arg, function_arg_partial_nregs): New functions. (initial_offset): Tweak now that the RP save area is allocated and deallocated around each call again. * mn10300/mn10300.h (FIRST_PARM_OFFSET): Now 4. (FRAME_POINTER_REQUIRED): Require a frame pointer for all non-leaf functions. (REG_PARM_STACK_SPACE): Now 8 bytes. (FUNCTION_ARG_REGNO_P): Update for new parameter passing conventions. (CUMULATIVE_ARGS, INIT_CUMULATIVE_ARGS): Likewise. (FUNCTION_ARG_ADVANCE, FUNCTION_ARG): Likewise. (FUNCTION_ARG_PARTIAL_NREGS): Likewise. (TRAMPOLINE_TEMPLATE): Don't clobber d0 anymore. (TRAMPOLINE_SIZE, INITIALIZE_TRAMPOLINE): Corresponding changes. (EXPAND_BUILTIN_SAVEREGS): Define. * mn10300/mn10300.md (call, call_value patterns): Allocate and deallocate a stack slot for the return pointer around each call. * mn10300/mn10300.h (RTX_COSTS): Refine. (CASE_VALUES_THRESHHOLD, NO_FUNCTION_CSE): Likewise. * mn10300/mn10300.c (output_tst): New function. * mn10300/mn10300.md (movdi, movdf): Improve code to load constants into registers. (tst insns): Use output_tst to optimize some cases. Add versions to encourage more zero extensions instead of sign extensions of HImode and QImode values. (divsi3, udivsi3): Remove patterns. Replaced by... (divmodsi4, udivmodsi4): New expanders/patterns. (andsi3): Optimize "and" operations with certain constants. From-SVN: r13827
1997-03-26(__va_copy): New definition.Richard Kenner1-0/+4
From-SVN: r13804
1997-03-24Initial revisionDoug Evans1-0/+86
From-SVN: r13761
1997-03-24(va_arg): For little endian, eabi, objectsGavin Romig-Koch1-3/+5
less than __va_reg_size are passed in registers. From-SVN: r13760
1997-03-03__mips_single_float should haveJim Wilson1-13/+13
the same effect on vararg lists as __mips_soft_float. From-SVN: r13688
1997-03-02Add definition of __va_copy.Richard Kenner13-0/+42
From-SVN: r13685
1997-01-16Add linux support.Doug Evans1-1/+1
From-SVN: r13500
1997-01-03Check for __VMS__, not VMS.Richard Kenner1-4/+4
From-SVN: r13352
1996-12-12Add @plt if -fpic; Fix double->int conversions if stack > 32k; Redo t-* ↵Michael Meissner1-0/+42
files; Fix trampolines on System V systems From-SVN: r13298
1996-12-12Add definitions for VMS; they differ from Unix.Richard Kenner1-0/+28
From-SVN: r13295
1996-12-11mn10300.c: New file for Matsushita MN10300 port.Jeff Law2-2/+2
* mn10300/mn10300.c: New file for Matsushita MN10300 port. * mn10300/{mn10300.h,mn10300.md,t-mn10300,xm-mn10300.h}: Likewise. * config.sub: Recognize mn10300 as a basic machine type. * configure: Similarly. * ginclude/stdarg.h: mn10300 is little endian. * ginclude/varargs.h: Likewise. From-SVN: r13281
1996-11-04Allow va-ppc.h to be reincludedMichael Meissner1-0/+3
From-SVN: r13094
1996-10-28Make sure file is processed if some of the known __need_* macros isRichard Kenner1-8/+7
defined. From-SVN: r13044
1996-10-22Fix MIPS EABI when using -mips1 or -msoft-floatIan Lance Taylor1-26/+83
From-SVN: r12998
1996-10-16Add support for MIPS EABIIan Lance Taylor1-4/+105
From-SVN: r12967
1996-10-03Use #include "", not #include <>.Doug Evans2-24/+24
From-SVN: r12893
1996-08-18stdarg.h: Change __WIN32__ to _WIN32.Doug Evans3-3/+3
* ginclude/stdarg.h: Change __WIN32__ to _WIN32. * ginclude/varargs.h: Likewise. * ginclude/va-ppc.h: Likewise. From-SVN: r12651
1996-08-14Fix varargs/stdarg on PowerPC Windows NTMichael Meissner3-3/+58
From-SVN: r12637
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