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store merging pass)
PR middle-end/83608
* expr.c (store_expr_with_bounds): Use simplify_gen_subreg instead of
convert_modes if target mode has the right side, but different mode
class.
* g++.dg/opt/pr83608.C: New test.
From-SVN: r256053
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PR middle-end/83609
* expr.c (expand_assignment): Fix up a typo in simplify_gen_subreg
last argument when extracting from CONCAT. If either from_real or
from_imag is NULL, use expansion through memory. If result is not
a CONCAT and simplify_gen_subreg fails, try to simplify_gen_subreg
the parts directly to inner mode, if even that fails, use expansion
through memory.
* gcc.dg/pr83609.c: New test.
* g++.dg/opt/pr83609.C: New test.
From-SVN: r256052
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This patch allows MEM_REF offsets to be polynomial, with mem_ref_offset
now returning a poly_offset_int instead of an offset_int. The
non-mechanical changes to callers of mem_ref_offset were handled by
previous patches.
2017-12-21 Richard Sandiford <richard.sandiford@linaro.org>
Alan Hayward <alan.hayward@arm.com>
David Sherwood <david.sherwood@arm.com>
gcc/
* fold-const.h (mem_ref_offset): Return a poly_offset_int rather
than an offset_int.
* tree.c (mem_ref_offset): Likewise.
(build_simple_mem_ref_loc): Treat MEM_REF offsets as poly_ints.
* builtins.c (get_object_alignment_2): Likewise.
* expr.c (get_inner_reference, expand_expr_real_1): Likewise.
* gimple-fold.c (get_base_constructor): Likewise.
* gimple-ssa-strength-reduction.c (restructure_reference): Likewise.
* gimple-ssa-warn-restrict.c (builtin_memref::builtin_memref):
Likewise.
* ipa-polymorphic-call.c
(ipa_polymorphic_call_context::ipa_polymorphic_call_context): Likewise.
* ipa-prop.c (compute_complex_assign_jump_func): Likewise.
(get_ancestor_addr_info): Likewise.
* ipa-param-manipulation.c (ipa_get_adjustment_candidate): Likewise.
* match.pd: Likewise.
* tree-data-ref.c (dr_analyze_innermost): Likewise.
* tree-dfa.c (get_addr_base_and_unit_offset_1): Likewise.
* tree-eh.c (tree_could_trap_p): Likewise.
* tree-object-size.c (addr_object_size): Likewise.
* tree-ssa-address.c (copy_ref_info): Likewise.
* tree-ssa-alias.c (indirect_ref_may_alias_decl_p): Likewise.
(indirect_refs_may_alias_p): Likewise.
* tree-ssa-sccvn.c (copy_reference_ops_from_ref): Likewise.
* tree-ssa.c (maybe_rewrite_mem_ref_base): Likewise.
(non_rewritable_mem_ref_base): Likewise.
* tree-vect-data-refs.c (vect_check_gather_scatter): Likewise.
* tree-vrp.c (vrp_prop::check_array_ref): Likewise.
* varasm.c (decode_addr_const): Likewise.
Co-Authored-By: Alan Hayward <alan.hayward@arm.com>
Co-Authored-By: David Sherwood <david.sherwood@arm.com>
From-SVN: r255930
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This patch changes the sizes passed to emit_group_load and
emit_group_store from int to poly_int64.
2017-12-21 Richard Sandiford <richard.sandiford@linaro.org>
Alan Hayward <alan.hayward@arm.com>
David Sherwood <david.sherwood@arm.com>
gcc/
* expr.h (emit_group_load, emit_group_load_into_temps)
(emit_group_store): Take the size as a poly_int64 rather than an int.
* expr.c (emit_group_load_1, emit_group_load): Likewise.
(emit_group_load_into_temp, emit_group_store): Likewise.
Co-Authored-By: Alan Hayward <alan.hayward@arm.com>
Co-Authored-By: David Sherwood <david.sherwood@arm.com>
From-SVN: r255925
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This patch adds new utility functions for manipulating REG_ARGS_SIZE
notes and allows the notes to carry polynomial as well as constant sizes.
The code was inconsistent about whether INT_MIN or HOST_WIDE_INT_MIN
should be used to represent an unknown size. The patch uses
HOST_WIDE_INT_MIN throughout.
2017-12-21 Richard Sandiford <richard.sandiford@linaro.org>
Alan Hayward <alan.hayward@arm.com>
David Sherwood <david.sherwood@arm.com>
gcc/
* rtl.h (get_args_size, add_args_size_note): New functions.
(find_args_size_adjust): Return a poly_int64 rather than a
HOST_WIDE_INT.
(fixup_args_size_notes): Likewise. Make the same change to the
end_args_size parameter.
* rtlanal.c (get_args_size, add_args_size_note): New functions.
* builtins.c (expand_builtin_trap): Use add_args_size_note.
* calls.c (emit_call_1): Likewise.
* explow.c (adjust_stack_1): Likewise.
* cfgcleanup.c (old_insns_match_p): Update use of
find_args_size_adjust.
* combine.c (distribute_notes): Track polynomial arg sizes.
* dwarf2cfi.c (dw_trace_info): Change beg_true_args_size,
end_true_args_size, beg_delay_args_size and end_delay_args_size
from HOST_WIDE_INT to poly_int64.
(add_cfi_args_size): Take the args_size as a poly_int64 rather
than a HOST_WIDE_INT.
(notice_args_size, notice_eh_throw, maybe_record_trace_start)
(maybe_record_trace_start_abnormal, scan_trace, connect_traces): Track
polynomial arg sizes.
* emit-rtl.c (try_split): Use get_args_size.
* recog.c (peep2_attempt): Likewise.
* reload1.c (reload_as_needed): Likewise.
* expr.c (find_args_size_adjust): Return the adjustment as a
poly_int64 rather than a HOST_WIDE_INT.
(fixup_args_size_notes): Change end_args_size from a HOST_WIDE_INT
to a poly_int64 and change the return type in the same way.
(emit_single_push_insn): Track polynomial arg sizes.
Co-Authored-By: Alan Hayward <alan.hayward@arm.com>
Co-Authored-By: David Sherwood <david.sherwood@arm.com>
From-SVN: r255919
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This patch changes the "extra" parameters to push_block and
emit_push_insn from int to poly_int64.
2017-12-21 Richard Sandiford <richard.sandiford@linaro.org>
Alan Hayward <alan.hayward@arm.com>
David Sherwood <david.sherwood@arm.com>
gcc/
* expr.h (push_block, emit_push_insn): Change the "extra" parameter
from HOST_WIDE_INT to poly_int64.
* expr.c (push_block, emit_push_insn): Likewise.
Co-Authored-By: Alan Hayward <alan.hayward@arm.com>
Co-Authored-By: David Sherwood <david.sherwood@arm.com>
From-SVN: r255918
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This patch makes get_inner_reference and ptr_difference_const return the
bit size and bit position as poly_int64s rather than HOST_WIDE_INTS.
The non-mechanical changes were handled by previous patches.
2017-12-21 Richard Sandiford <richard.sandiford@linaro.org>
Alan Hayward <alan.hayward@arm.com>
David Sherwood <david.sherwood@arm.com>
gcc/
* tree.h (get_inner_reference): Return the bitsize and bitpos
as poly_int64_pods rather than HOST_WIDE_INT.
* fold-const.h (ptr_difference_const): Return the pointer difference
as a poly_int64_pod rather than a HOST_WIDE_INT.
* expr.c (get_inner_reference): Return the bitsize and bitpos
as poly_int64_pods rather than HOST_WIDE_INT.
(expand_expr_addr_expr_1, expand_expr_real_1): Track polynomial
offsets and sizes.
* fold-const.c (make_bit_field_ref): Take the bitpos as a poly_int64
rather than a HOST_WIDE_INT. Update call to get_inner_reference.
(optimize_bit_field_compare): Update call to get_inner_reference.
(decode_field_reference): Likewise.
(fold_unary_loc): Track polynomial offsets and sizes.
(split_address_to_core_and_offset): Return the bitpos as a
poly_int64_pod rather than a HOST_WIDE_INT.
(ptr_difference_const): Likewise for the pointer difference.
* asan.c (instrument_derefs): Track polynomial offsets and sizes.
* config/mips/mips.c (r10k_safe_mem_expr_p): Likewise.
* dbxout.c (dbxout_expand_expr): Likewise.
* dwarf2out.c (loc_list_for_address_of_addr_expr_of_indirect_ref)
(loc_list_from_tree_1, fortran_common): Likewise.
* gimple-laddress.c (pass_laddress::execute): Likewise.
* gimple-ssa-store-merging.c (find_bswap_or_nop_load): Likewise.
* gimplify.c (gimplify_scan_omp_clauses): Likewise.
* simplify-rtx.c (delegitimize_mem_from_attrs): Likewise.
* tree-affine.c (tree_to_aff_combination): Likewise.
(get_inner_reference_aff): Likewise.
* tree-data-ref.c (split_constant_offset_1): Likewise.
(dr_analyze_innermost): Likewise.
* tree-scalar-evolution.c (interpret_rhs_expr): Likewise.
* tree-sra.c (ipa_sra_check_caller): Likewise.
* tree-vect-data-refs.c (vect_check_gather_scatter): Likewise.
* ubsan.c (maybe_instrument_pointer_overflow): Likewise.
(instrument_bool_enum_load, instrument_object_size): Likewise.
* gimple-ssa-strength-reduction.c (slsr_process_ref): Update call
to get_inner_reference.
* hsa-gen.c (gen_hsa_addr): Likewise.
* sanopt.c (maybe_optimize_ubsan_ptr_ifn): Likewise.
* tsan.c (instrument_expr): Likewise.
* match.pd: Update call to ptr_difference_const.
gcc/ada/
* gcc-interface/trans.c (Attribute_to_gnu): Track polynomial
offsets and sizes.
* gcc-interface/utils2.c (build_unary_op): Likewise.
gcc/cp/
* constexpr.c (check_automatic_or_tls): Track polynomial
offsets and sizes.
Co-Authored-By: Alan Hayward <alan.hayward@arm.com>
Co-Authored-By: David Sherwood <david.sherwood@arm.com>
From-SVN: r255914
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This patch makes get_bit_range return the range and position as poly_ints.
2017-12-21 Richard Sandiford <richard.sandiford@linaro.org>
Alan Hayward <alan.hayward@arm.com>
David Sherwood <david.sherwood@arm.com>
gcc/
* expr.h (get_bit_range): Return the bitstart and bitend as
poly_uint64s rather than unsigned HOST_WIDE_INTs. Return the bitpos
as a poly_int64 rather than a HOST_WIDE_INT.
* expr.c (get_bit_range): Likewise.
(expand_assignment): Update call accordingly.
* fold-const.c (optimize_bit_field_compare): Likewise.
Co-Authored-By: Alan Hayward <alan.hayward@arm.com>
Co-Authored-By: David Sherwood <david.sherwood@arm.com>
From-SVN: r255912
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This patch changes SUBREG_BYTE from an int to a poly_int.
Since valid SUBREG_BYTEs must be contained within the mode of the
SUBREG_REG, the required range is the same as for GET_MODE_SIZE,
i.e. unsigned short. The patch therefore uses poly_uint16(_pod)
for the SUBREG_BYTE.
Using poly_uint16_pod rtx fields requires a new field code ('p').
Since there are no other uses of 'p' besides SUBREG_BYTE, the patch
doesn't add an XPOLY or whatever; all uses should go via SUBREG_BYTE
instead.
The patch doesn't bother implementing 'p' support for legacy
define_peepholes, since none of the remaining ones have subregs
in their patterns.
As it happened, the rtl documentation used SUBREG as an example of a
code with mixed field types, accessed via XEXP (x, 0) and XINT (x, 1).
Since there's no direct replacement for XINT, and since people should
never use it even if there were, the patch changes the example to use
INT_LIST instead.
The patch also changes subreg-related helper functions so that they too
take and return polynomial offsets. This makes the patch quite big, but
it's mostly mechanical. The patch generally sticks to existing choices
wrt signedness.
2017-12-20 Richard Sandiford <richard.sandiford@linaro.org>
Alan Hayward <alan.hayward@arm.com>
David Sherwood <david.sherwood@arm.com>
gcc/
* doc/rtl.texi: Update documentation of SUBREG_BYTE. Document the
'p' format code. Use INT_LIST rather than SUBREG as the example of
a code with an XINT and an XEXP. Remove the implication that
accessing an rtx field using XINT is expected to work.
* rtl.def (SUBREG): Change format from "ei" to "ep".
* rtl.h (rtunion::rt_subreg): New field.
(XCSUBREG): New macro.
(SUBREG_BYTE): Use it.
(subreg_shape): Change offset from an unsigned int to a poly_uint16.
Update constructor accordingly.
(subreg_shape::operator ==): Update accordingly.
(subreg_shape::unique_id): Return an unsigned HOST_WIDE_INT rather
than an unsigned int.
(subreg_lsb, subreg_lowpart_offset, subreg_highpart_offset): Return
a poly_uint64 rather than an unsigned int.
(subreg_lsb_1): Likewise. Take the offset as a poly_uint64 rather
than an unsigned int.
(subreg_size_offset_from_lsb, subreg_size_lowpart_offset)
(subreg_size_highpart_offset): Return a poly_uint64 rather than
an unsigned int. Take the sizes as poly_uint64s.
(subreg_offset_from_lsb): Return a poly_uint64 rather than
an unsigned int. Take the shift as a poly_uint64 rather than
an unsigned int.
(subreg_regno_offset, subreg_offset_representable_p): Take the offset
as a poly_uint64 rather than an unsigned int.
(simplify_subreg_regno): Likewise.
(byte_lowpart_offset): Return the memory offset as a poly_int64
rather than an int.
(subreg_memory_offset): Likewise. Take the subreg offset as a
poly_uint64 rather than an unsigned int.
(simplify_subreg, simplify_gen_subreg, subreg_get_info)
(gen_rtx_SUBREG, validate_subreg): Take the subreg offset as a
poly_uint64 rather than an unsigned int.
* rtl.c (rtx_format): Describe 'p' in comment.
(copy_rtx, rtx_equal_p_cb, rtx_equal_p): Handle 'p'.
* emit-rtl.c (validate_subreg, gen_rtx_SUBREG): Take the subreg
offset as a poly_uint64 rather than an unsigned int.
(byte_lowpart_offset): Return the memory offset as a poly_int64
rather than an int.
(subreg_memory_offset): Likewise. Take the subreg offset as a
poly_uint64 rather than an unsigned int.
(subreg_size_lowpart_offset, subreg_size_highpart_offset): Take the
mode sizes as poly_uint64s rather than unsigned ints. Return a
poly_uint64 rather than an unsigned int.
(subreg_lowpart_p): Treat subreg offsets as poly_ints.
(copy_insn_1): Handle 'p'.
* rtlanal.c (set_noop_p): Treat subregs offsets as poly_uint64s.
(subreg_lsb_1): Take the subreg offset as a poly_uint64 rather than
an unsigned int. Return the shift in the same way.
(subreg_lsb): Return the shift as a poly_uint64 rather than an
unsigned int.
(subreg_size_offset_from_lsb): Take the sizes and shift as
poly_uint64s rather than unsigned ints. Return the offset as
a poly_uint64.
(subreg_get_info, subreg_regno_offset, subreg_offset_representable_p)
(simplify_subreg_regno): Take the offset as a poly_uint64 rather than
an unsigned int.
* rtlhash.c (add_rtx): Handle 'p'.
* genemit.c (gen_exp): Likewise.
* gengenrtl.c (type_from_format, gendef): Likewise.
* gensupport.c (subst_pattern_match, get_alternatives_number)
(collect_insn_data, alter_predicate_for_insn, alter_constraints)
(subst_dup): Likewise.
* gengtype.c (adjust_field_rtx_def): Likewise.
* genrecog.c (find_operand, find_matching_operand, validate_pattern)
(match_pattern_2): Likewise.
(rtx_test::SUBREG_FIELD): New rtx_test::kind_enum.
(rtx_test::subreg_field): New function.
(operator ==, safe_to_hoist_p, transition_parameter_type)
(print_nonbool_test, print_test): Handle SUBREG_FIELD.
* genattrtab.c (attr_rtx_1): Say that 'p' is deliberately not handled.
* genpeep.c (match_rtx): Likewise.
* print-rtl.c (print_poly_int): Include if GENERATOR_FILE too.
(rtx_writer::print_rtx_operand): Handle 'p'.
(print_value): Handle SUBREG.
* read-rtl.c (apply_int_iterator): Likewise.
(rtx_reader::read_rtx_operand): Handle 'p'.
* alias.c (rtx_equal_for_memref_p): Likewise.
* cselib.c (rtx_equal_for_cselib_1, cselib_hash_rtx): Likewise.
* caller-save.c (replace_reg_with_saved_mem): Treat subreg offsets
as poly_ints.
* calls.c (expand_call): Likewise.
* combine.c (combine_simplify_rtx, expand_field_assignment): Likewise.
(make_extraction, gen_lowpart_for_combine): Likewise.
* loop-invariant.c (hash_invariant_expr_1, invariant_expr_equal_p):
Likewise.
* cse.c (remove_invalid_subreg_refs): Take the offset as a poly_uint64
rather than an unsigned int. Treat subreg offsets as poly_ints.
(exp_equiv_p): Handle 'p'.
(hash_rtx_cb): Likewise. Treat subreg offsets as poly_ints.
(equiv_constant, cse_insn): Treat subreg offsets as poly_ints.
* dse.c (find_shift_sequence): Likewise.
* dwarf2out.c (rtl_for_decl_location): Likewise.
* expmed.c (extract_low_bits): Likewise.
* expr.c (emit_group_store, undefined_operand_subword_p): Likewise.
(expand_expr_real_2): Likewise.
* final.c (alter_subreg): Likewise.
(leaf_renumber_regs_insn): Handle 'p'.
* function.c (assign_parm_find_stack_rtl, assign_parm_setup_stack):
Treat subreg offsets as poly_ints.
* fwprop.c (forward_propagate_and_simplify): Likewise.
* ifcvt.c (noce_emit_move_insn, noce_emit_cmove): Likewise.
* ira.c (get_subreg_tracking_sizes): Likewise.
* ira-conflicts.c (go_through_subreg): Likewise.
* ira-lives.c (process_single_reg_class_operands): Likewise.
* jump.c (rtx_renumbered_equal_p): Likewise. Handle 'p'.
* lower-subreg.c (simplify_subreg_concatn): Take the subreg offset
as a poly_uint64 rather than an unsigned int.
(simplify_gen_subreg_concatn, resolve_simple_move): Treat
subreg offsets as poly_ints.
* lra-constraints.c (operands_match_p): Handle 'p'.
(match_reload, curr_insn_transform): Treat subreg offsets as poly_ints.
* lra-spills.c (assign_mem_slot): Likewise.
* postreload.c (move2add_valid_value_p): Likewise.
* recog.c (general_operand, indirect_operand): Likewise.
* regcprop.c (copy_value, maybe_mode_change): Likewise.
(copyprop_hardreg_forward_1): Likewise.
* reginfo.c (simplifiable_subregs_hasher::hash, simplifiable_subregs)
(record_subregs_of_mode): Likewise.
* rtlhooks.c (gen_lowpart_general, gen_lowpart_if_possible): Likewise.
* reload.c (operands_match_p): Handle 'p'.
(find_reloads_subreg_address): Treat subreg offsets as poly_ints.
* reload1.c (alter_reg, choose_reload_regs): Likewise.
(compute_reload_subreg_offset): Likewise, and return an poly_int64.
* simplify-rtx.c (simplify_truncation, simplify_binary_operation_1):
(test_vector_ops_duplicate): Treat subreg offsets as poly_ints.
(simplify_const_poly_int_tests<N>::run): Likewise.
(simplify_subreg, simplify_gen_subreg): Take the subreg offset as
a poly_uint64 rather than an unsigned int.
* valtrack.c (debug_lowpart_subreg): Likewise.
* var-tracking.c (var_lowpart): Likewise.
(loc_cmp): Handle 'p'.
Co-Authored-By: Alan Hayward <alan.hayward@arm.com>
Co-Authored-By: David Sherwood <david.sherwood@arm.com>
From-SVN: r255882
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This patch makes store_field and related routines use poly_ints
for bit positions and sizes. It keeps the existing choices
between signed and unsigned types (there are a mixture of both).
2017-12-20 Richard Sandiford <richard.sandiford@linaro.org>
Alan Hayward <alan.hayward@arm.com>
David Sherwood <david.sherwood@arm.com>
gcc/
* expr.c (store_constructor_field): Change bitsize from a
unsigned HOST_WIDE_INT to a poly_uint64 and bitpos from a
HOST_WIDE_INT to a poly_int64.
(store_constructor): Change size from a HOST_WIDE_INT to
a poly_int64.
(store_field): Likewise bitsize and bitpos.
Co-Authored-By: Alan Hayward <alan.hayward@arm.com>
Co-Authored-By: David Sherwood <david.sherwood@arm.com>
From-SVN: r255880
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This patch changes C++ bitregion_start/end values from constants to
poly_ints. Although it's unlikely that the size needs to be polynomial
in practice, the offset could be with future language extensions.
2017-12-20 Richard Sandiford <richard.sandiford@linaro.org>
Alan Hayward <alan.hayward@arm.com>
David Sherwood <david.sherwood@arm.com>
gcc/
* expmed.h (store_bit_field): Change bitregion_start and
bitregion_end from unsigned HOST_WIDE_INT to poly_uint64.
* expmed.c (adjust_bit_field_mem_for_reg, strict_volatile_bitfield_p)
(store_bit_field_1, store_integral_bit_field, store_bit_field)
(store_fixed_bit_field, store_split_bit_field): Likewise.
* expr.c (store_constructor_field, store_field): Likewise.
(optimize_bitfield_assignment_op): Likewise. Make the same change
to bitsize and bitpos.
* machmode.h (bit_field_mode_iterator): Change m_bitregion_start
and m_bitregion_end from HOST_WIDE_INT to poly_int64. Make the
same change in the constructor arguments.
(get_best_mode): Change bitregion_start and bitregion_end from
unsigned HOST_WIDE_INT to poly_uint64.
* stor-layout.c (bit_field_mode_iterator::bit_field_mode_iterator):
Change bitregion_start and bitregion_end from HOST_WIDE_INT to
poly_int64.
(bit_field_mode_iterator::next_mode): Update for new types
of m_bitregion_start and m_bitregion_end.
(get_best_mode): Change bitregion_start and bitregion_end from
unsigned HOST_WIDE_INT to poly_uint64.
Co-Authored-By: Alan Hayward <alan.hayward@arm.com>
Co-Authored-By: David Sherwood <david.sherwood@arm.com>
From-SVN: r255879
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This patch adds a tree representation for poly_ints. Unlike the
rtx version, the coefficients are INTEGER_CSTs rather than plain
integers, so that we can easily access them as poly_widest_ints
and poly_offset_ints.
The patch also adjusts some places that previously
relied on "constant" meaning "INTEGER_CST". It also makes
sure that the TYPE_SIZE agrees with the TYPE_SIZE_UNIT for
vector booleans, given the existing:
/* Several boolean vector elements may fit in a single unit. */
if (VECTOR_BOOLEAN_TYPE_P (type)
&& type->type_common.mode != BLKmode)
TYPE_SIZE_UNIT (type)
= size_int (GET_MODE_SIZE (type->type_common.mode));
else
TYPE_SIZE_UNIT (type) = int_const_binop (MULT_EXPR,
TYPE_SIZE_UNIT (innertype),
size_int (nunits));
2017-12-20 Richard Sandiford <richard.sandiford@linaro.org>
Alan Hayward <alan.hayward@arm.com>
David Sherwood <david.sherwood@arm.com>
gcc/
* doc/generic.texi (POLY_INT_CST): Document.
* tree.def (POLY_INT_CST): New tree code.
* treestruct.def (TS_POLY_INT_CST): New tree layout.
* tree-core.h (tree_poly_int_cst): New struct.
(tree_node): Add a poly_int_cst field.
* tree.h (POLY_INT_CST_P, POLY_INT_CST_COEFF): New macros.
(wide_int_to_tree, force_fit_type): Take a poly_wide_int_ref
instead of a wide_int_ref.
(build_int_cst, build_int_cst_type): Take a poly_int64 instead
of a HOST_WIDE_INT.
(build_int_cstu, build_array_type_nelts): Take a poly_uint64
instead of an unsigned HOST_WIDE_INT.
(build_poly_int_cst, tree_fits_poly_int64_p, tree_fits_poly_uint64_p)
(ptrdiff_tree_p): Declare.
(tree_to_poly_int64, tree_to_poly_uint64): Likewise. Provide
extern inline implementations if the target doesn't use POLY_INT_CST.
(poly_int_tree_p): New function.
(wi::unextended_tree): New class.
(wi::int_traits <unextended_tree>): New override.
(wi::extended_tree): Add a default constructor.
(wi::extended_tree::get_tree): New function.
(wi::widest_extended_tree, wi::offset_extended_tree): New typedefs.
(wi::tree_to_widest_ref, wi::tree_to_offset_ref): Use them.
(wi::tree_to_poly_widest_ref, wi::tree_to_poly_offset_ref)
(wi::tree_to_poly_wide_ref): New typedefs.
(wi::ints_for): Provide overloads for extended_tree and
unextended_tree.
(poly_int_cst_value, wi::to_poly_widest, wi::to_poly_offset)
(wi::to_wide): New functions.
(wi::fits_to_boolean_p, wi::fits_to_tree_p): Handle poly_ints.
* tree.c (poly_int_cst_hasher): New struct.
(poly_int_cst_hash_table): New variable.
(tree_node_structure_for_code, tree_code_size, simple_cst_equal)
(valid_constant_size_p, add_expr, drop_tree_overflow): Handle
POLY_INT_CST.
(initialize_tree_contains_struct): Handle TS_POLY_INT_CST.
(init_ttree): Initialize poly_int_cst_hash_table.
(build_int_cst, build_int_cst_type, build_invariant_address): Take
a poly_int64 instead of a HOST_WIDE_INT.
(build_int_cstu, build_array_type_nelts): Take a poly_uint64
instead of an unsigned HOST_WIDE_INT.
(wide_int_to_tree): Rename to...
(wide_int_to_tree_1): ...this.
(build_new_poly_int_cst, build_poly_int_cst): New functions.
(force_fit_type): Take a poly_wide_int_ref instead of a wide_int_ref.
(wide_int_to_tree): New function that takes a poly_wide_int_ref.
(ptrdiff_tree_p, tree_to_poly_int64, tree_to_poly_uint64)
(tree_fits_poly_int64_p, tree_fits_poly_uint64_p): New functions.
* lto-streamer-out.c (DFS::DFS_write_tree_body, hash_tree): Handle
TS_POLY_INT_CST.
* tree-streamer-in.c (lto_input_ts_poly_tree_pointers): Likewise.
(streamer_read_tree_body): Likewise.
* tree-streamer-out.c (write_ts_poly_tree_pointers): Likewise.
(streamer_write_tree_body): Likewise.
* tree-streamer.c (streamer_check_handled_ts_structures): Likewise.
* asan.c (asan_protect_global): Require the size to be an INTEGER_CST.
* cfgexpand.c (expand_debug_expr): Handle POLY_INT_CST.
* expr.c (expand_expr_real_1, const_vector_from_tree): Likewise.
* gimple-expr.h (is_gimple_constant): Likewise.
* gimplify.c (maybe_with_size_expr): Likewise.
* print-tree.c (print_node): Likewise.
* tree-data-ref.c (data_ref_compare_tree): Likewise.
* tree-pretty-print.c (dump_generic_node): Likewise.
* tree-ssa-address.c (addr_for_mem_ref): Likewise.
* tree-vect-data-refs.c (dr_group_sort_cmp): Likewise.
* tree-vrp.c (compare_values_warnv): Likewise.
* tree-ssa-loop-ivopts.c (determine_base_object, constant_multiple_of)
(get_loop_invariant_expr, add_candidate_1, get_computation_aff_1)
(force_expr_to_var_cost): Likewise.
* tree-ssa-loop.c (for_each_index): Likewise.
* fold-const.h (build_invariant_address, size_int_kind): Take a
poly_int64 instead of a HOST_WIDE_INT.
* fold-const.c (fold_negate_expr_1, const_binop, const_unop)
(fold_convert_const, multiple_of_p, fold_negate_const): Handle
POLY_INT_CST.
(size_binop_loc): Likewise. Allow int_const_binop_1 to fail.
(int_const_binop_2): New function, split out from...
(int_const_binop_1): ...here. Handle POLY_INT_CST.
(size_int_kind): Take a poly_int64 instead of a HOST_WIDE_INT.
* expmed.c (make_tree): Handle CONST_POLY_INT_P.
* gimple-ssa-strength-reduction.c (slsr_process_add)
(slsr_process_mul): Check for INTEGER_CSTs before using them
as candidates.
* stor-layout.c (bits_from_bytes): New function.
(bit_from_pos): Use it.
(layout_type): Likewise. For vectors, multiply the TYPE_SIZE_UNIT
by BITS_PER_UNIT to get the TYPE_SIZE.
* tree-cfg.c (verify_expr, verify_types_in_gimple_reference): Allow
MEM_REF and TARGET_MEM_REF offsets to be a POLY_INT_CST.
Co-Authored-By: Alan Hayward <alan.hayward@arm.com>
Co-Authored-By: David Sherwood <david.sherwood@arm.com>
From-SVN: r255863
|
|
This patch adds an rtl representation of poly_int values.
There were three possible ways of doing this:
(1) Add a new rtl code for the poly_ints themselves and store the
coefficients as trailing wide_ints. This would give constants like:
(const_poly_int [c0 c1 ... cn])
The runtime value would be:
c0 + c1 * x1 + ... + cn * xn
(2) Like (1), but use rtxes for the coefficients. This would give
constants like:
(const_poly_int [(const_int c0)
(const_int c1)
...
(const_int cn)])
although the coefficients could be const_wide_ints instead
of const_ints where appropriate.
(3) Add a new rtl code for the polynomial indeterminates,
then use them in const wrappers. A constant like c0 + c1 * x1
would then look like:
(const:M (plus:M (mult:M (const_param:M x1)
(const_int c1))
(const_int c0)))
There didn't seem to be that much to choose between them. The main
advantage of (1) is that it's a more efficient representation and
that we can refer to the cofficients directly as wide_int_storage.
2017-12-20 Richard Sandiford <richard.sandiford@linaro.org>
Alan Hayward <alan.hayward@arm.com>
David Sherwood <david.sherwood@arm.com>
gcc/
* doc/rtl.texi (const_poly_int): Document. Also document the
rtl sharing behavior.
* gengenrtl.c (excluded_rtx): Return true for CONST_POLY_INT.
* rtl.h (const_poly_int_def): New struct.
(rtx_def::u): Add a cpi field.
(CASE_CONST_UNIQUE, CASE_CONST_ANY): Add CONST_POLY_INT.
(CONST_POLY_INT_P, CONST_POLY_INT_COEFFS): New macros.
(wi::rtx_to_poly_wide_ref): New typedef
(const_poly_int_value, wi::to_poly_wide, rtx_to_poly_int64)
(poly_int_rtx_p): New functions.
(trunc_int_for_mode): Declare a poly_int64 version.
(plus_constant): Take a poly_int64 instead of a HOST_WIDE_INT.
(immed_wide_int_const): Take a poly_wide_int_ref rather than
a wide_int_ref.
(strip_offset): Declare.
(strip_offset_and_add): New function.
* rtl.def (CONST_POLY_INT): New rtx code.
* rtl.c (rtx_size): Handle CONST_POLY_INT.
(shared_const_p): Use poly_int_rtx_p.
* emit-rtl.h (gen_int_mode): Take a poly_int64 instead of a
HOST_WIDE_INT.
(gen_int_shift_amount): Likewise.
* emit-rtl.c (const_poly_int_hasher): New class.
(const_poly_int_htab): New variable.
(init_emit_once): Initialize it when NUM_POLY_INT_COEFFS > 1.
(const_poly_int_hasher::hash): New function.
(const_poly_int_hasher::equal): Likewise.
(gen_int_mode): Take a poly_int64 instead of a HOST_WIDE_INT.
(immed_wide_int_const): Rename to...
(immed_wide_int_const_1): ...this and make static.
(immed_wide_int_const): New function, taking a poly_wide_int_ref
instead of a wide_int_ref.
(gen_int_shift_amount): Take a poly_int64 instead of a HOST_WIDE_INT.
(gen_lowpart_common): Handle CONST_POLY_INT.
* cse.c (hash_rtx_cb, equiv_constant): Likewise.
* cselib.c (cselib_hash_rtx): Likewise.
* dwarf2out.c (const_ok_for_output_1): Likewise.
* expr.c (convert_modes): Likewise.
* print-rtl.c (rtx_writer::print_rtx, print_value): Likewise.
* rtlhash.c (add_rtx): Likewise.
* explow.c (trunc_int_for_mode): Add a poly_int64 version.
(plus_constant): Take a poly_int64 instead of a HOST_WIDE_INT.
Handle existing CONST_POLY_INT rtxes.
* expmed.h (expand_shift): Take a poly_int64 instead of a
HOST_WIDE_INT.
* expmed.c (expand_shift): Likewise.
* rtlanal.c (strip_offset): New function.
(commutative_operand_precedence): Give CONST_POLY_INT the same
precedence as CONST_DOUBLE and put CONST_WIDE_INT between that
and CONST_INT.
* rtl-tests.c (const_poly_int_tests): New struct.
(rtl_tests_c_tests): Use it.
* simplify-rtx.c (simplify_const_unary_operation): Handle
CONST_POLY_INT.
(simplify_const_binary_operation): Likewise.
(simplify_binary_operation_1): Fold additions of symbolic constants
and CONST_POLY_INTs.
(simplify_subreg): Handle extensions and truncations of
CONST_POLY_INTs.
(simplify_const_poly_int_tests): New struct.
(simplify_rtx_c_tests): Use it.
* wide-int.h (storage_ref): Add default constructor.
(wide_int_ref_storage): Likewise.
(trailing_wide_ints): Use GTY((user)).
(trailing_wide_ints::operator[]): Add a const version.
(trailing_wide_ints::get_precision): New function.
(trailing_wide_ints::extra_size): Likewise.
Co-Authored-By: Alan Hayward <alan.hayward@arm.com>
Co-Authored-By: David Sherwood <david.sherwood@arm.com>
From-SVN: r255862
|
|
conditions.
* read-rtl.c (parse_reg_note_name): Replace Yoda conditions with
typical order conditions.
* sel-sched.c (extract_new_fences_from): Likewise.
* config/visium/constraints.md (J, K, L): Likewise.
* config/visium/predicates.md (const_shift_operand): Likewise.
* config/visium/visium.c (visium_legitimize_address,
visium_legitimize_reload_address): Likewise.
* config/m68k/m68k.c (output_reg_adjust, emit_reg_adjust): Likewise.
* config/arm/arm.c (arm_block_move_unaligned_straight): Likewise.
* config/avr/constraints.md (Y01, Ym1, Y02, Ym2): Likewise.
* config/avr/avr-log.c (avr_vdump, avr_log_set_avr_log,
SET_DUMP_DETAIL): Likewise.
* config/avr/predicates.md (const_8_16_24_operand): Likewise.
* config/avr/avr.c (STR_PREFIX_P, avr_popcount_each_byte,
avr_is_casesi_sequence, avr_casei_sequence_check_operands,
avr_set_core_architecture, avr_set_current_function,
avr_legitimize_reload_address, avr_asm_len, avr_print_operand,
output_movqi, output_movsisf, avr_out_plus, avr_out_bitop,
avr_out_fract, avr_adjust_insn_length, avr_encode_section_info,
avr_2word_insn_p, output_reload_in_const, avr_has_nibble_0xf,
avr_map_decompose, avr_fold_builtin): Likewise.
* config/avr/driver-avr.c (avr_devicespecs_file): Likewise.
* config/avr/gen-avr-mmcu-specs.c (str_prefix_p, print_mcu): Likewise.
* config/i386/i386.c (ix86_parse_stringop_strategy_string): Likewise.
* config/m32c/m32c-pragma.c (m32c_pragma_memregs): Likewise.
* config/m32c/m32c.c (m32c_conditional_register_usage,
m32c_address_cost): Likewise.
* config/m32c/predicates.md (shiftcount_operand,
longshiftcount_operand): Likewise.
* config/iq2000/iq2000.c (iq2000_expand_prologue): Likewise.
* config/nios2/nios2.c (nios2_handle_custom_fpu_insn_option,
can_use_cdx_ldstw): Likewise.
* config/nios2/nios2.h (CDX_REG_P): Likewise.
* config/cr16/cr16.h (RETURN_ADDR_RTX, REGNO_MODE_OK_FOR_BASE_P):
Likewise.
* config/cr16/cr16.md (*mov<mode>_double): Likewise.
* config/cr16/cr16.c (cr16_create_dwarf_for_multi_push): Likewise.
* config/h8300/h8300.c (h8300_rtx_costs, get_shift_alg): Likewise.
* config/vax/constraints.md (U06, U08, U16, CN6, S08, S16): Likewise.
* config/vax/vax.c (adjacent_operands_p): Likewise.
* config/ft32/constraints.md (L, b, KA): Likewise.
* config/ft32/ft32.c (ft32_load_immediate, ft32_expand_prologue):
Likewise.
* cfgexpand.c (expand_stack_alignment): Likewise.
* gcse.c (insert_expr_in_table): Likewise.
* print-rtl.c (rtx_writer::print_rtx_operand_codes_E_and_V): Likewise.
* cgraphunit.c (cgraph_node::expand): Likewise.
* ira-build.c (setup_min_max_allocno_live_range_point): Likewise.
* emit-rtl.c (add_insn): Likewise.
* input.c (dump_location_info): Likewise.
* passes.c (NEXT_PASS): Likewise.
* read-rtl-function.c (parse_note_insn_name,
function_reader::read_rtx_operand_r, function_reader::parse_mem_expr):
Likewise.
* sched-rgn.c (sched_rgn_init): Likewise.
* diagnostic-show-locus.c (layout::show_ruler): Likewise.
* combine.c (find_split_point, simplify_if_then_else, force_to_mode,
if_then_else_cond, simplify_shift_const_1, simplify_comparison): Likewise.
* explow.c (eliminate_constant_term): Likewise.
* final.c (leaf_renumber_regs_insn): Likewise.
* cfgrtl.c (print_rtl_with_bb): Likewise.
* genhooks.c (emit_init_macros): Likewise.
* poly-int.h (maybe_ne, maybe_le, maybe_lt): Likewise.
* tree-data-ref.c (conflict_fn): Likewise.
* selftest.c (assert_streq): Likewise.
* expr.c (store_constructor_field, expand_expr_real_1): Likewise.
* fold-const.c (fold_range_test, extract_muldiv_1, fold_truth_andor,
fold_binary_loc, multiple_of_p): Likewise.
* reload.c (push_reload, find_equiv_reg): Likewise.
* et-forest.c (et_nca, et_below): Likewise.
* dbxout.c (dbxout_symbol_location): Likewise.
* reorg.c (relax_delay_slots): Likewise.
* dojump.c (do_compare_rtx_and_jump): Likewise.
* gengtype-parse.c (type): Likewise.
* simplify-rtx.c (simplify_gen_ternary, simplify_gen_relational,
simplify_const_relational_operation): Likewise.
* reload1.c (do_output_reload): Likewise.
* dumpfile.c (get_dump_file_info_by_switch): Likewise.
* gengtype.c (type_for_name): Likewise.
* gimple-ssa-sprintf.c (format_directive): Likewise.
ada/
* gcc-interface/trans.c (Loop_Statement_to_gnu): Replace Yoda
conditions with typical order conditions.
* gcc-interface/misc.c (gnat_get_array_descr_info,
default_pass_by_ref): Likewise.
* gcc-interface/decl.c (gnat_to_gnu_entity): Likewise.
* adaint.c (__gnat_tmp_name): Likewise.
c-family/
* known-headers.cc (get_stdlib_header_for_name): Replace Yoda
conditions with typical order conditions.
c/
* c-typeck.c (comptypes_internal, function_types_compatible_p,
perform_integral_promotions, digest_init): Replace Yoda conditions
with typical order conditions.
* c-decl.c (check_bitfield_type_and_width): Likewise.
cp/
* name-lookup.c (get_std_name_hint): Replace Yoda conditions with
typical order conditions.
* class.c (check_bitfield_decl): Likewise.
* pt.c (convert_template_argument): Likewise.
* decl.c (duplicate_decls): Likewise.
* typeck.c (commonparms): Likewise.
fortran/
* scanner.c (preprocessor_line): Replace Yoda conditions with typical
order conditions.
* dependency.c (check_section_vs_section): Likewise.
* trans-array.c (gfc_conv_expr_descriptor): Likewise.
jit/
* jit-playback.c (get_type, playback::compile_to_file::copy_file,
playback::context::acquire_mutex): Replace Yoda conditions with
typical order conditions.
* libgccjit.c (gcc_jit_context_new_struct_type,
gcc_jit_struct_set_fields, gcc_jit_context_new_union_type,
gcc_jit_context_new_function, gcc_jit_timer_pop): Likewise.
* jit-builtins.c (matches_builtin): Likewise.
* jit-recording.c (recording::compound_type::set_fields,
recording::fields::write_reproducer, recording::rvalue::set_scope,
recording::function::validate): Likewise.
* jit-logging.c (logger::decref): Likewise.
From-SVN: r255831
|
|
Similarly to the VEC_DUPLICATE_EXPR, this patch adds a tree code
equivalent of the VEC_SERIES rtx code: VEC_SERIES_EXPR.
2017-12-16 Richard Sandiford <richard.sandiford@linaro.org>
Alan Hayward <alan.hayward@arm.com>
David Sherwood <david.sherwood@arm.com>
gcc/
* doc/generic.texi (VEC_SERIES_EXPR): Document.
* doc/md.texi (vec_series@var{m}): Document.
* tree.def (VEC_SERIES_EXPR): New tree code.
* tree.h (build_vec_series): Declare.
* tree.c (build_vec_series): New function.
* cfgexpand.c (expand_debug_expr): Handle VEC_SERIES_EXPR.
* tree-pretty-print.c (dump_generic_node): Likewise.
* gimple-pretty-print.c (dump_binary_rhs): Likewise.
* tree-inline.c (estimate_operator_cost): Likewise.
* expr.c (expand_expr_real_2): Likewise.
* optabs-tree.c (optab_for_tree_code): Likewise.
* tree-cfg.c (verify_gimple_assign_binary): Likewise.
* fold-const.c (const_binop): Fold VEC_SERIES_EXPRs of constants.
* expmed.c (make_tree): Handle VEC_SERIES.
* optabs.def (vec_series_optab): New optab.
* optabs.h (expand_vec_series_expr): Declare.
* optabs.c (expand_vec_series_expr): New function.
* tree-vect-generic.c (expand_vector_operations_1): Check that
the operands also have vector type.
Co-Authored-By: Alan Hayward <alan.hayward@arm.com>
Co-Authored-By: David Sherwood <david.sherwood@arm.com>
From-SVN: r255741
|
|
SVE needs a way of broadcasting a scalar to a variable-length vector.
This patch adds VEC_DUPLICATE_EXPR for when CONSTRUCTOR would be used
for fixed-length vectors; this is the tree equivalent of the existing
rtl code VEC_DUPLICATE.
The patch also adds a vec_duplicate_optab to go with VEC_DUPLICATE_EXPR.
2017-12-16 Richard Sandiford <richard.sandiford@linaro.org>
Alan Hayward <alan.hawyard@arm.com>
David Sherwood <david.sherwood@arm.com>
gcc/
* doc/generic.texi (VEC_DUPLICATE_EXPR): Document.
(VEC_COND_EXPR): Add missing @tindex.
* doc/md.texi (vec_duplicate@var{m}): Document.
* tree.def (VEC_DUPLICATE_EXPR): New tree codes.
* tree.c (build_vector_from_val): Add stubbed-out handling of
variable-length vectors, using VEC_DUPLICATE_EXPR.
(uniform_vector_p): Handle VEC_DUPLICATE_EXPR.
* cfgexpand.c (expand_debug_expr): Likewise.
* tree-cfg.c (verify_gimple_assign_unary): Likewise.
* tree-inline.c (estimate_operator_cost): Likewise.
* tree-pretty-print.c (dump_generic_node): Likewise.
* tree-vect-generic.c (ssa_uniform_vector_p): Likewise.
* fold-const.c (const_unop): Fold VEC_DUPLICATE_EXPRs of a constant.
(test_vec_duplicate_folding): New function.
(fold_const_c_tests): Call it.
* optabs.def (vec_duplicate_optab): New optab.
* optabs-tree.c (optab_for_tree_code): Handle VEC_DUPLICATE_EXPR.
* optabs.h (expand_vector_broadcast): Declare.
* optabs.c (expand_vector_broadcast): Make non-static. Try using
vec_duplicate_optab.
* expr.c (store_constructor): Try using vec_duplicate_optab for
uniform vectors.
(expand_expr_real_2): Handle VEC_DUPLICATE_EXPR.
Co-Authored-By: Alan Hayward <alan.hayward@arm.com>
Co-Authored-By: David Sherwood <david.sherwood@arm.com>
From-SVN: r255740
|
|
PR target/78643
PR target/80583
* expr.c (get_inner_reference): If DECL_MODE of a non-bitfield
is BLKmode for vector field with vector raw mode, use TYPE_MODE
instead of DECL_MODE.
* gcc.target/i386/pr80583.c: New test.
From-SVN: r255353
|
|
bootstrap-ubsan shows:
gcc/expr.c:4103:17: runtime error: signed integer overflow: 0 - -9223372036854775808 cannot be represented in type 'long int'
Fix by handling the saw_unknown case earlier.
PR rtl-optimization/82488
* expr.c (fixup_args_size_notes): Avoid signed integer overflow.
diff --git a/gcc/expr.c b/gcc/expr.c
index ee07de5aaa44..e9d8555c9452 100644
--- a/gcc/expr.c
+++ b/gcc/expr.c
@@ -4100,10 +4100,13 @@ fixup_args_size_notes (rtx_insn *prev, rtx_insn *last, int end_args_size)
if (STACK_GROWS_DOWNWARD)
this_delta = -(unsigned HOST_WIDE_INT) this_delta;
- args_size -= this_delta;
+ if (saw_unknown)
+ args_size = INT_MIN;
+ else
+ args_size -= this_delta;
}
- return saw_unknown ? INT_MIN : args_size;
+ return args_size;
}
#ifdef PUSH_ROUNDING
--
Markus
From-SVN: r255159
|
|
PR middle-end/82253
* expr.c (expand_assignment): For CONCAT to_rtx, complex type from and
bitpos/bitsize covering the whole destination, use store_expr only if
the complex mode is the same. Otherwise, use expand_normal and if
it returns CONCAT, subreg each part separately instead of trying to
subreg the whole result.
* gfortran.dg/pr82253.f90: New test.
From-SVN: r255095
|
|
This patch replaces the REDUC_*_EXPR tree codes with internal functions.
This is needed so that the upcoming in-order reductions can also use
internal functions without too much complication.
2017-11-22 Richard Sandiford <richard.sandiford@linaro.org>
gcc/
* tree.def (REDUC_MAX_EXPR, REDUC_MIN_EXPR, REDUC_PLUS_EXPR): Delete.
* cfgexpand.c (expand_debug_expr): Remove handling for them.
* expr.c (expand_expr_real_2): Likewise.
* fold-const.c (const_unop): Likewise.
* optabs-tree.c (optab_for_tree_code): Likewise.
* tree-cfg.c (verify_gimple_assign_unary): Likewise.
* tree-inline.c (estimate_operator_cost): Likewise.
* tree-pretty-print.c (dump_generic_node): Likewise.
(op_code_prio): Likewise.
(op_symbol_code): Likewise.
* internal-fn.def (DEF_INTERNAL_SIGNED_OPTAB_FN): Define.
(IFN_REDUC_PLUS, IFN_REDUC_MAX, IFN_REDUC_MIN): New internal functions.
* internal-fn.c (direct_internal_fn_optab): New function.
(direct_internal_fn_array, direct_internal_fn_supported_p
(internal_fn_expanders): Handle DEF_INTERNAL_SIGNED_OPTAB_FN.
* fold-const-call.c (fold_const_reduction): New function.
(fold_const_call): Handle CFN_REDUC_PLUS, CFN_REDUC_MAX and
CFN_REDUC_MIN.
* tree-vect-loop.c: Include internal-fn.h.
(reduction_code_for_scalar_code): Rename to...
(reduction_fn_for_scalar_code): ...this and return an internal
function.
(vect_model_reduction_cost): Take an internal_fn rather than
a tree_code.
(vect_create_epilog_for_reduction): Likewise. Build calls rather
than assignments.
(vectorizable_reduction): Use internal functions rather than tree
codes for the reduction operation. Update calls to the functions
above.
* config/aarch64/aarch64-builtins.c (aarch64_gimple_fold_builtin):
Use calls to internal functions rather than REDUC tree codes.
* config/aarch64/aarch64-simd.md: Update comment accordingly.
From-SVN: r255073
|
|
PR c++/60336
PR middle-end/67239
PR target/68355
* c-decl.c (grokdeclarator): Set DECL_PADDING_P on unnamed bit-fields.
* class.c (layout_class_type): Set DECL_PADDING_P on padding.
* decl.c (cxx_init_decl_processing): Set TRANSLATION_UNIT_WARN_EMPTY_P.
(grokdeclarator): Set DECL_PADDING_P on unnamed bit-fields.
* lto.c (compare_tree_sccs_1): Compare TYPE_EMPTY_P and DECL_PADDING_P.
* calls.c (initialize_argument_information): Call
warn_parameter_passing_abi target hook.
(store_one_arg): Use 0 for empty record size. Don't push 0 size
argument onto stack.
(must_pass_in_stack_var_size_or_pad): Return false for empty types.
* common.opt: Update -fabi-version description.
* config/i386/i386.c (init_cumulative_args): Set cum->warn_empty.
(ix86_gimplify_va_arg): Call arg_int_size_in_bytes instead of
int_size_in_bytes.
(ix86_is_empty_record): New function.
(ix86_warn_parameter_passing_abi): New function.
(TARGET_EMPTY_RECORD_P): Redefine.
(TARGET_WARN_PARAMETER_PASSING_ABI): Redefine.
* config/i386/i386.h (CUMULATIVE_ARGS): Add warn_empty.
* doc/tm.texi: Regenerated.
* doc/tm.texi.in (TARGET_EMPTY_RECORD_P,
TARGET_WARN_PARAMETER_PASSING_ABI): Add.
* dwarf2out.c (get_ultimate_context): Move to tree.c.
* explow.c (hard_function_value): Call arg_int_size_in_bytes
instead of int_size_in_bytes.
* expr.c (copy_blkmode_to_reg): Likewise.
* function.c (aggregate_value_p): Return 0 for empty types.
(assign_parm_find_entry_rtl): Call warn_parameter_passing_abi target hook.
(locate_and_pad_parm): Call arg size_in_bytes instead
size_in_bytes.
* lto-streamer-out.c (hash_tree): Hash TYPE_EMPTY_P and DECL_PADDING_P.
* stor-layout.c (finalize_type_size): Set TYPE_EMPTY_P.
* target.def (empty_record_p, warn_parameter_passing_abi): New target
hooks.
* targhooks.c (hook_void_CUMULATIVE_ARGS_tree): New hook.
(std_gimplify_va_arg_expr): Skip empty records. Call
arg_size_in_bytes instead size_in_bytes.
* targhooks.h (hook_void_CUMULATIVE_ARGS_tree): Declare.
* tree-core.h (tree_type_common): Add empty_flag.
(tree_decl_common): Update comments.
* tree-streamer-in.c (unpack_ts_decl_common_value_fields): Stream
DECL_PADDING_P.
(unpack_ts_type_common_value_fields): Stream TYPE_EMPTY_P.
* tree-streamer-out.c (pack_ts_decl_common_value_fields): Stream
DECL_PADDING_P.
(pack_ts_type_common_value_fields): Stream TYPE_EMPTY_P.
* tree.c (default_is_empty_type): New function.
(default_is_empty_record): New function.
(arg_int_size_in_bytes): New function.
(arg_size_in_bytes): New function.
(get_ultimate_context): New function.
* tree.h: Define TYPE_EMPTY_P, DECL_PADDING_P and
TRANSLATION_UNIT_WARN_EMPTY_P.
(default_is_empty_record, arg_int_size_in_bytes,
arg_size_in_bytes, get_ultimate_context): Declare.
* g++.dg/abi/empty12.C: New test.
* g++.dg/abi/empty12.h: New test.
* g++.dg/abi/empty12a.c: New test.
* g++.dg/abi/empty13.C: New test.
* g++.dg/abi/empty13.h: New test.
* g++.dg/abi/empty13a.c: New test.
* g++.dg/abi/empty14.C: New test.
* g++.dg/abi/empty14.h: New test.
* g++.dg/abi/empty14a.c: New test.
* g++.dg/abi/empty15.C: New test.
* g++.dg/abi/empty15.h: New test.
* g++.dg/abi/empty15a.c: New test.
* g++.dg/abi/empty16.C: New test.
* g++.dg/abi/empty16.h: New test.
* g++.dg/abi/empty16a.c: New test.
* g++.dg/abi/empty17.C: New test.
* g++.dg/abi/empty17.h: New test.
* g++.dg/abi/empty17a.c: New test.
* g++.dg/abi/empty18.C: New test.
* g++.dg/abi/empty18.h: New test.
* g++.dg/abi/empty18a.c: New test.
* g++.dg/abi/empty19.C: New test.
* g++.dg/abi/empty19.h: New test.
* g++.dg/abi/empty19a.c: New test.
* g++.dg/abi/empty20.C: New test.
* g++.dg/abi/empty21.C: New test.
* g++.dg/abi/empty22.C: New test.
* g++.dg/abi/empty22.h: New test.
* g++.dg/abi/empty22a.c: New test.
* g++.dg/abi/empty23.C: New test.
* g++.dg/abi/empty24.C: New test.
* g++.dg/abi/empty25.C: New test.
* g++.dg/abi/empty25.h: New test.
* g++.dg/abi/empty25a.c: New test.
* g++.dg/abi/empty26.C: New test.
* g++.dg/abi/empty26.h: New test.
* g++.dg/abi/empty26a.c: New test.
* g++.dg/abi/empty27.C: New test.
* g++.dg/abi/empty28.C: New test.
* g++.dg/abi/pr60336-1.C: New test.
* g++.dg/abi/pr60336-10.C: New test.
* g++.dg/abi/pr60336-11.C: New test.
* g++.dg/abi/pr60336-12.C: New test.
* g++.dg/abi/pr60336-2.C: New test.
* g++.dg/abi/pr60336-3.C: New test.
* g++.dg/abi/pr60336-4.C: New test.
* g++.dg/abi/pr60336-5.C: New test.
* g++.dg/abi/pr60336-6.C: New test.
* g++.dg/abi/pr60336-7.C: New test.
* g++.dg/abi/pr60336-8.C: New test.
* g++.dg/abi/pr60336-9.C: New test.
* g++.dg/abi/pr68355.C: New test.
* g++.dg/lto/pr60336_0.C: New test.
Co-Authored-By: H.J. Lu <hongjiu.lu@intel.com>
Co-Authored-By: Jason Merrill <jason@redhat.com>
From-SVN: r255066
|
|
2017-11-21 Marc Glisse <marc.glisse@inria.fr>
gcc/c/
* c-fold.c (c_fully_fold_internal): Handle POINTER_DIFF_EXPR.
* c-typeck.c (pointer_diff): Use POINTER_DIFF_EXPR.
gcc/c-family/
* c-pretty-print.c (pp_c_additive_expression,
c_pretty_printer::expression): Handle POINTER_DIFF_EXPR.
gcc/cp/
* constexpr.c (cxx_eval_constant_expression,
potential_constant_expression_1): Handle POINTER_DIFF_EXPR.
* cp-gimplify.c (cp_fold): Likewise.
* error.c (dump_expr): Likewise.
* typeck.c (pointer_diff): Use POINTER_DIFF_EXPR.
gcc/
* doc/generic.texi: Document POINTER_DIFF_EXPR, update
POINTER_PLUS_EXPR.
* cfgexpand.c (expand_debug_expr): Handle POINTER_DIFF_EXPR.
* expr.c (expand_expr_real_2): Likewise.
* fold-const.c (const_binop, fold_addr_of_array_ref_difference,
fold_binary_loc): Likewise.
* match.pd (X-X, P+(Q-P), &D-P, (P+N)-P, P-(P+N), (P+M)-(P+N),
P-Q==0, -(A-B), X-Z<Y-Z, (X-Z)-(Y-Z), Z-X<Z-Y, (Z-X)-(Z-Y),
(A-B)+(C-A)): New transformations for POINTER_DIFF_EXPR, based on
MINUS_EXPR transformations.
* optabs-tree.c (optab_for_tree_code): Handle POINTER_DIFF_EXPR.
* tree-cfg.c (verify_expr, verify_gimple_assign_binary): Likewise.
* tree-inline.c (estimate_operator_cost): Likewise.
* tree-pretty-print.c (dump_generic_node, op_code_prio,
op_symbol_code): Likewise.
* tree-vect-stmts.c (vectorizable_operation): Likewise.
* vr-values.c (extract_range_from_binary_expr): Likewise.
* varasm.c (initializer_constant_valid_p_1): Likewise.
* tree.def: New tree code POINTER_DIFF_EXPR.
From-SVN: r255021
|
|
access.
2017-11-17 Tamar Christina <tamar.christina@arm.com>
* expr.c (copy_blkmode_to_reg): Fix bitsize for targets
with fast unaligned access.
* doc/sourcebuild.texi (word_mode_no_slow_unalign): New.
gcc/testsuite/
2017-11-17 Tamar Christina <tamar.christina@arm.com>
* gcc.dg/struct-simple.c: New.
* lib/target-supports.exp
(check_effective_target_word_mode_no_slow_unalign): New.
From-SVN: r254862
|
|
Originally subregs operated at the word level and subreg offsets
were measured in words. The offset units were later changed from
words to bytes (SUBREG_WORD became SUBREG_BYTE), but the fundamental
assumption that subregs should operate at the word level remained.
Whether (subreg:M1 (reg:M2 R2) N) is well-formed depended on the
way that M1 and M2 partitioned into words and whether the subword
part of N represented a lowpart. However, some questions depended
instead on the macro REGMODE_NATURAL_SIZE, which was introduced
as part of the patch that moved from SUBREG_WORD to SUBREG_BYTE.
It is used to decide whether setting (subreg:M1 (reg:M2 R2) N)
clobbers all of R2 or just part of it (df_read_modify_subreg).
Using words doesn't really make sense for modern vector
architectures. Vector registers are usually bigger than
a word and:
(a) setting the scalar lowpart of them usually clobbers the
rest of the register (contrary to the subreg rules,
where only the containing words should be clobbered).
(b) high words of vector registers are often not independently
addressable, even though that's what the subreg rules expect.
This patch therefore uses REGMODE_NATURAL_SIZE instead of
UNITS_PER_WORD to determine the size of the independently
addressable blocks in an inner register.
This is needed for SVE because the number of words in a vector
mode isn't known at compile time, so isn't a sensible basis
for calculating the number of registers.
The only existing port to define REGMODE_NATURAL_SIZE is
64-bit SPARC, where FP registers are 32 bits. (This is the
opposite of the use case for SVE, since the natural division
is smaller than a word.) I compiled the testsuite before and
after the patch for sparc64-linux-gnu and the only test whose
assembly changed was g++.dg/debug/pr65678.C, where the order
of two independent stores was reversed and where a different
register was picked for one pseudo. The new code was
otherwise equivalent to the old code.
2017-11-09 Richard Sandiford <richard.sandiford@linaro.org>
Alan Hayward <alan.hayward@arm.com>
David Sherwood <david.sherwood@arm.com>
gcc/
* doc/rtl.texi: Rewrite the subreg rules so that they partition
the inner register into REGMODE_NATURAL_SIZE bytes rather than
UNITS_PER_WORD bytes.
* emit-rtl.c (validate_subreg): Divide subregs into blocks
based on REGMODE_NATURAL_SIZE of the inner mode.
(gen_lowpart_common): Split the SCALAR_FLOAT_MODE_P and
!SCALAR_FLOAT_MODE_P cases. Use REGMODE_NATURAL_SIZE for the latter.
* expmed.c (lowpart_bit_field_p): Divide the value up into
chunks of REGMODE_NATURAL_SIZE rather than UNITS_PER_WORD.
* expr.c (store_constructor): Use REGMODE_NATURAL_SIZE to test
whether something is likely to occupy more than one register.
Co-Authored-By: Alan Hayward <alan.hayward@arm.com>
Co-Authored-By: David Sherwood <david.sherwood@arm.com>
From-SVN: r254583
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|
widening_optab_handler had the comment:
/* ??? Why does find_widening_optab_handler_and_mode attempt to
widen things that can't be widened? E.g. add_optab... */
if (op > LAST_CONV_OPTAB)
return CODE_FOR_nothing;
I think it comes from expand_binop using
find_widening_optab_handler_and_mode for two things: to test whether
a "normal" optab like add_optab is supported for a standard binary
operation and to test whether a "convert" optab is supported for a
widening operation like umul_widen_optab. In the former case from_mode
and to_mode must be the same, in the latter from_mode must be narrower
than to_mode.
For the former case, find_widening_optab_handler_and_mode is only really
testing the modes that are passed in. permit_non_widening must be true
here.
For the latter case, find_widening_optab_handler_and_mode should only
really consider new from_modes that are wider than the original
from_mode and narrower than the original to_mode. Logically
permit_non_widening should be false, since widening optabs aren't
supposed to take operands that are the same width as the destination.
We get away with permit_non_widening being true because no target
would/should define a widening .md pattern with matching modes.
But really, it seems better for expand_binop to handle these two
cases itself rather than pushing them down. With that change,
find_widening_optab_handler_and_mode is only ever called with
permit_non_widening set to false and is only ever called with
a "proper" convert optab. We then no longer need widening_optab_handler,
we can just use convert_optab_handler directly.
The patch also passes the instruction code down to expand_binop_directly.
This should be more efficient and removes an extra call to
find_widening_optab_handler_and_mode.
2017-11-01 Richard Sandiford <richard.sandiford@linaro.org>
Alan Hayward <alan.hayward@arm.com>
David Sherwood <david.sherwood@arm.com>
gcc/
* optabs-query.h (convert_optab_p): New function, split out from...
(convert_optab_handler): ...here.
(widening_optab_handler): Delete.
(find_widening_optab_handler): Remove permit_non_widening parameter.
(find_widening_optab_handler_and_mode): Likewise. Provide an
override that operates on mode class wrappers.
* optabs-query.c (widening_optab_handler): Delete.
(find_widening_optab_handler_and_mode): Remove permit_non_widening
parameter. Assert that the two modes are the same class and that
the "from" mode is narrower than the "to" mode. Use
convert_optab_handler instead of widening_optab_handler.
* expmed.c (expmed_mult_highpart_optab): Use convert_optab_handler
instead of widening_optab_handler.
* expr.c (expand_expr_real_2): Update calls to
find_widening_optab_handler.
* optabs.c (expand_widen_pattern_expr): Likewise.
(expand_binop_directly): Take the insn_code as a parameter.
(expand_binop): Only call find_widening_optab_handler for
conversion optabs; use optab_handler otherwise. Update calls
to find_widening_optab_handler and expand_binop_directly.
Use convert_optab_handler instead of widening_optab_handler.
* tree-ssa-math-opts.c (convert_mult_to_widen): Update calls to
find_widening_optab_handler and use scalar_mode rather than
machine_mode.
(convert_plusminus_to_widen): Likewise.
Co-Authored-By: Alan Hayward <alan.hayward@arm.com>
Co-Authored-By: David Sherwood <david.sherwood@arm.com>
From-SVN: r254302
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|
This patch adds a fixed_size_mode machine_mode wrapper
for modes that are known to have a fixed size. That applies
to all current modes, but future patches will add support for
variable-sized modes.
The use of this class should be pretty restricted. One important
use case is to hold the mode of static data, which can never be
variable-sized with current file formats. Another is to hold
the modes of registers involved in __builtin_apply and
__builtin_result, since those interfaces don't cope well with
variable-sized data.
The class can also be useful when reinterpreting the contents of
a fixed-length bit string as a different kind of value.
2017-11-01 Richard Sandiford <richard.sandiford@linaro.org>
Alan Hayward <alan.hayward@arm.com>
David Sherwood <david.sherwood@arm.com>
gcc/
* machmode.h (fixed_size_mode): New class.
* rtl.h (get_pool_mode): Return fixed_size_mode.
* gengtype.c (main): Add fixed_size_mode.
* target.def (get_raw_result_mode): Return a fixed_size_mode.
(get_raw_arg_mode): Likewise.
* doc/tm.texi: Regenerate.
* targhooks.h (default_get_reg_raw_mode): Return a fixed_size_mode.
* targhooks.c (default_get_reg_raw_mode): Likewise.
* config/ia64/ia64.c (ia64_get_reg_raw_mode): Likewise.
* config/mips/mips.c (mips_get_reg_raw_mode): Likewise.
* config/msp430/msp430.c (msp430_get_raw_arg_mode): Likewise.
(msp430_get_raw_result_mode): Likewise.
* config/avr/avr-protos.h (regmask): Use as_a <fixed_side_mode>
* dbxout.c (dbxout_parms): Require fixed-size modes.
* expr.c (copy_blkmode_from_reg, copy_blkmode_to_reg): Likewise.
* gimple-ssa-store-merging.c (encode_tree_to_bitpos): Likewise.
* omp-low.c (lower_oacc_reductions): Likewise.
* simplify-rtx.c (simplify_immed_subreg): Take fixed_size_modes.
(simplify_subreg): Update accordingly.
* varasm.c (constant_descriptor_rtx::mode): Change to fixed_size_mode.
(force_const_mem): Update accordingly. Return NULL_RTX for modes
that aren't fixed-size.
(get_pool_mode): Return a fixed_size_mode.
(output_constant_pool_2): Take a fixed_size_mode.
Co-Authored-By: Alan Hayward <alan.hayward@arm.com>
Co-Authored-By: David Sherwood <david.sherwood@arm.com>
From-SVN: r254300
|
|
This patch allows (const ...) wrappers to be used for rtx vector
constants, as an alternative to const_vector. This is useful
for SVE, where the number of elements isn't known until runtime.
It could also be useful in future for fixed-length vectors, to
reduce the amount of memory needed to represent simple constants
with high element counts. However, one nice thing about keeping
it restricted to variable-length vectors is that there is never
any need to handle combinations of (const ...) and CONST_VECTOR.
2017-11-01 Richard Sandiford <richard.sandiford@linaro.org>
Alan Hayward <alan.hayward@arm.com>
David Sherwood <david.sherwood@arm.com>
gcc/
* doc/rtl.texi (const): Update description of address constants.
Say that vector constants are allowed too.
* common.md (E, F): Use CONSTANT_P instead of checking for
CONST_VECTOR.
* emit-rtl.c (gen_lowpart_common): Use const_vec_p instead of
checking for CONST_VECTOR.
* expmed.c (make_tree): Use build_vector_from_val for a CONST
VEC_DUPLICATE.
* expr.c (expand_expr_real_2): Check for vector modes instead
of checking for CONST_VECTOR.
* rtl.h (const_vec_p): New function.
(const_vec_duplicate_p): Check for a CONST VEC_DUPLICATE.
(unwrap_const_vec_duplicate): Handle them here too.
Co-Authored-By: Alan Hayward <alan.hayward@arm.com>
Co-Authored-By: David Sherwood <david.sherwood@arm.com>
From-SVN: r254296
|
|
PR middle-end/82569
* tree-outof-ssa.h (always_initialized_rtx_for_ssa_name_p): Delete.
* expr.c (expand_expr_real_1) <expand_decl_rtl>: Revert latest change.
* loop-iv.c (iv_get_reaching_def): Likewise.
* cfgexpand.c (expand_one_ssa_partition): Initialize the RTX if the
variable is promoted and the partition contains undefined values.
From-SVN: r254037
|
|
This patch uses HWI_COMPUTABLE_MODE_P (X) instead of
GET_MODE_PRECISION (X) <= HOST_BITS_PER_WIDE_INT in cases
where X also needs to be a scalar integer.
2017-10-22 Richard Sandiford <richard.sandiford@linaro.org>
Alan Hayward <alan.hayward@arm.com>
David Sherwood <david.sherwood@arm.com>
gcc/
* combine.c (simplify_comparison): Use HWI_COMPUTABLE_MODE_P.
(record_promoted_value): Likewise.
* expr.c (expand_expr_real_2): Likewise.
* ree.c (update_reg_equal_equiv_notes): Likewise.
(combine_set_extension): Likewise.
* rtlanal.c (low_bitmask_len): Likewise.
* simplify-rtx.c (neg_const_int): Likewise.
(simplify_binary_operation_1): Likewise.
Co-Authored-By: Alan Hayward <alan.hayward@arm.com>
Co-Authored-By: David Sherwood <david.sherwood@arm.com>
From-SVN: r253990
|
|
PR c++/82159
* expr.c (store_field): Don't optimize away bitsize == 0 store
from CALL_EXPR with addressable return type.
* g++.dg/opt/pr82159-2.C: New test.
From-SVN: r253673
|
|
The wide_int routines allow things like:
wi::add (t, 1)
to add 1 to an INTEGER_CST T in its native precision. But we also have:
wi::to_offset (t) // Treat T as an offset_int
wi::to_widest (t) // Treat T as a widest_int
Recently we also gained:
wi::to_wide (t, prec) // Treat T as a wide_int in preccision PREC
This patch therefore requires:
wi::to_wide (t)
when operating on INTEGER_CSTs in their native precision. This is
just as efficient, and makes it clearer that a deliberate choice is
being made to treat the tree as a wide_int in its native precision.
This also removes the inconsistency that
a) INTEGER_CSTs in their native precision can be used without an accessor
but must use wi:: functions instead of C++ operators
b) the other forms need an explicit accessor but the result can be used
with C++ operators.
It also helps with SVE, where there's the additional possibility
that the tree could be a runtime value.
2017-10-10 Richard Sandiford <richard.sandiford@linaro.org>
gcc/
* wide-int.h (wide_int_ref_storage): Make host_dependent_precision
a template parameter.
(WIDE_INT_REF_FOR): Update accordingly.
* tree.h (wi::int_traits <const_tree>): Delete.
(wi::tree_to_widest_ref, wi::tree_to_offset_ref): New typedefs.
(wi::to_widest, wi::to_offset): Use them. Expand commentary.
(wi::tree_to_wide_ref): New typedef.
(wi::to_wide): New function.
* calls.c (get_size_range): Use wi::to_wide when operating on
trees as wide_ints.
* cgraph.c (cgraph_node::create_thunk): Likewise.
* config/i386/i386.c (ix86_data_alignment): Likewise.
(ix86_local_alignment): Likewise.
* dbxout.c (stabstr_O): Likewise.
* dwarf2out.c (add_scalar_info, gen_enumeration_type_die): Likewise.
* expr.c (const_vector_from_tree): Likewise.
* fold-const-call.c (host_size_t_cst_p, fold_const_call_1): Likewise.
* fold-const.c (may_negate_without_overflow_p, negate_expr_p)
(fold_negate_expr_1, int_const_binop_1, const_binop)
(fold_convert_const_int_from_real, optimize_bit_field_compare)
(all_ones_mask_p, sign_bit_p, unextend, extract_muldiv_1)
(fold_div_compare, fold_single_bit_test, fold_plusminus_mult_expr)
(pointer_may_wrap_p, expr_not_equal_to, fold_binary_loc)
(fold_ternary_loc, multiple_of_p, fold_negate_const, fold_abs_const)
(fold_not_const, round_up_loc): Likewise.
* gimple-fold.c (gimple_fold_indirect_ref): Likewise.
* gimple-ssa-warn-alloca.c (alloca_call_type_by_arg): Likewise.
(alloca_call_type): Likewise.
* gimple.c (preprocess_case_label_vec_for_gimple): Likewise.
* godump.c (go_output_typedef): Likewise.
* graphite-sese-to-poly.c (tree_int_to_gmp): Likewise.
* internal-fn.c (get_min_precision): Likewise.
* ipa-cp.c (ipcp_store_vr_results): Likewise.
* ipa-polymorphic-call.c
(ipa_polymorphic_call_context::ipa_polymorphic_call_context): Likewise.
* ipa-prop.c (ipa_print_node_jump_functions_for_edge): Likewise.
(ipa_modify_call_arguments): Likewise.
* match.pd: Likewise.
* omp-low.c (scan_omp_1_op, lower_omp_ordered_clauses): Likewise.
* print-tree.c (print_node_brief, print_node): Likewise.
* stmt.c (expand_case): Likewise.
* stor-layout.c (layout_type): Likewise.
* tree-affine.c (tree_to_aff_combination): Likewise.
* tree-cfg.c (group_case_labels_stmt): Likewise.
* tree-data-ref.c (dr_analyze_indices): Likewise.
(prune_runtime_alias_test_list): Likewise.
* tree-dump.c (dequeue_and_dump): Likewise.
* tree-inline.c (remap_gimple_op_r, copy_tree_body_r): Likewise.
* tree-predcom.c (is_inv_store_elimination_chain): Likewise.
* tree-pretty-print.c (dump_generic_node): Likewise.
* tree-scalar-evolution.c (iv_can_overflow_p): Likewise.
(simple_iv_with_niters): Likewise.
* tree-ssa-address.c (addr_for_mem_ref): Likewise.
* tree-ssa-ccp.c (ccp_finalize, evaluate_stmt): Likewise.
* tree-ssa-loop-ivopts.c (constant_multiple_of): Likewise.
* tree-ssa-loop-niter.c (split_to_var_and_offset)
(refine_value_range_using_guard, number_of_iterations_ne_max)
(number_of_iterations_lt_to_ne, number_of_iterations_lt)
(get_cst_init_from_scev, record_nonwrapping_iv)
(scev_var_range_cant_overflow): Likewise.
* tree-ssa-phiopt.c (minmax_replacement): Likewise.
* tree-ssa-pre.c (compute_avail): Likewise.
* tree-ssa-sccvn.c (vn_reference_fold_indirect): Likewise.
(vn_reference_maybe_forwprop_address, valueized_wider_op): Likewise.
* tree-ssa-structalias.c (get_constraint_for_ptr_offset): Likewise.
* tree-ssa-uninit.c (is_pred_expr_subset_of): Likewise.
* tree-ssanames.c (set_nonzero_bits, get_nonzero_bits): Likewise.
* tree-switch-conversion.c (collect_switch_conv_info, array_value_type)
(dump_case_nodes, try_switch_expansion): Likewise.
* tree-vect-loop-manip.c (vect_gen_vector_loop_niters): Likewise.
(vect_do_peeling): Likewise.
* tree-vect-patterns.c (vect_recog_bool_pattern): Likewise.
* tree-vect-stmts.c (vectorizable_load): Likewise.
* tree-vrp.c (compare_values_warnv, vrp_int_const_binop): Likewise.
(zero_nonzero_bits_from_vr, ranges_from_anti_range): Likewise.
(extract_range_from_binary_expr_1, adjust_range_with_scev): Likewise.
(overflow_comparison_p_1, register_edge_assert_for_2): Likewise.
(is_masked_range_test, find_switch_asserts, maybe_set_nonzero_bits)
(vrp_evaluate_conditional_warnv_with_ops, intersect_ranges): Likewise.
(range_fits_type_p, two_valued_val_range_p, vrp_finalize): Likewise.
(evrp_dom_walker::before_dom_children): Likewise.
* tree.c (cache_integer_cst, real_value_from_int_cst, integer_zerop)
(integer_all_onesp, integer_pow2p, integer_nonzerop, tree_log2)
(tree_floor_log2, tree_ctz, mem_ref_offset, tree_int_cst_sign_bit)
(tree_int_cst_sgn, get_unwidened, int_fits_type_p): Likewise.
(get_type_static_bounds, num_ending_zeros, drop_tree_overflow)
(get_range_pos_neg): Likewise.
* ubsan.c (ubsan_expand_ptr_ifn): Likewise.
* config/darwin.c (darwin_mergeable_constant_section): Likewise.
* config/aarch64/aarch64.c (aapcs_vfp_sub_candidate): Likewise.
* config/arm/arm.c (aapcs_vfp_sub_candidate): Likewise.
* config/avr/avr.c (avr_fold_builtin): Likewise.
* config/bfin/bfin.c (bfin_local_alignment): Likewise.
* config/msp430/msp430.c (msp430_attr): Likewise.
* config/nds32/nds32.c (nds32_insert_attributes): Likewise.
* config/powerpcspe/powerpcspe-c.c
(altivec_resolve_overloaded_builtin): Likewise.
* config/powerpcspe/powerpcspe.c (rs6000_aggregate_candidate)
(rs6000_expand_ternop_builtin): Likewise.
* config/rs6000/rs6000-c.c
(altivec_resolve_overloaded_builtin): Likewise.
* config/rs6000/rs6000.c (rs6000_aggregate_candidate): Likewise.
(rs6000_expand_ternop_builtin): Likewise.
* config/s390/s390.c (s390_handle_hotpatch_attribute): Likewise.
gcc/ada/
* gcc-interface/decl.c (annotate_value): Use wi::to_wide when
operating on trees as wide_ints.
gcc/c/
* c-parser.c (c_parser_cilk_clause_vectorlength): Use wi::to_wide when
operating on trees as wide_ints.
* c-typeck.c (build_c_cast, c_finish_omp_clauses): Likewise.
(c_tree_equal): Likewise.
gcc/c-family/
* c-ada-spec.c (dump_generic_ada_node): Use wi::to_wide when
operating on trees as wide_ints.
* c-common.c (pointer_int_sum): Likewise.
* c-pretty-print.c (pp_c_integer_constant): Likewise.
* c-warn.c (match_case_to_enum_1): Likewise.
(c_do_switch_warnings): Likewise.
(maybe_warn_shift_overflow): Likewise.
gcc/cp/
* cvt.c (ignore_overflows): Use wi::to_wide when
operating on trees as wide_ints.
* decl.c (check_array_designated_initializer): Likewise.
* mangle.c (write_integer_cst): Likewise.
* semantics.c (cp_finish_omp_clause_depend_sink): Likewise.
gcc/fortran/
* target-memory.c (gfc_interpret_logical): Use wi::to_wide when
operating on trees as wide_ints.
* trans-const.c (gfc_conv_tree_to_mpz): Likewise.
* trans-expr.c (gfc_conv_cst_int_power): Likewise.
* trans-intrinsic.c (trans_this_image): Likewise.
(gfc_conv_intrinsic_bound): Likewise.
(conv_intrinsic_cobound): Likewise.
gcc/lto/
* lto.c (compare_tree_sccs_1): Use wi::to_wide when
operating on trees as wide_ints.
gcc/objc/
* objc-act.c (objc_decl_method_attributes): Use wi::to_wide when
operating on trees as wide_ints.
From-SVN: r253595
|
|
This patch uses global rather than member operators for wide-int.h,
so that the first operand can be a non-wide-int type.
The patch also removes the and_not and or_not member functions.
It was already inconsistent to have member functions for these
two operations (one of which was never used) and not other wi::
ones like udiv. After the operator change, we'd have the additional
inconsistency that "non-wi & wi" would work but "non-wi.and_not (wi)"
wouldn't.
2017-10-09 Richard Sandiford <richard.sandiford@linaro.org>
gcc/
* wide-int.h (WI_BINARY_OPERATOR_RESULT): New macro.
(WI_BINARY_PREDICATE_RESULT): Likewise.
(wi::binary_traits::operator_result): New type.
(wi::binary_traits::predicate_result): Likewise.
(generic_wide_int::operator~, unary generic_wide_int::operator-)
(generic_wide_int::operator==, generic_wide_int::operator!=)
(generic_wide_int::operator&, generic_wide_int::and_not)
(generic_wide_int::operator|, generic_wide_int::or_not)
(generic_wide_int::operator^, generic_wide_int::operator+
(binary generic_wide_int::operator-, generic_wide_int::operator*):
Delete.
(operator~, unary operator-, operator==, operator!=, operator&)
(operator|, operator^, operator+, binary operator-, operator*): New
functions.
* expr.c (get_inner_reference): Use wi::bit_and_not.
* fold-const.c (fold_binary_loc): Likewise.
* ipa-prop.c (ipa_compute_jump_functions_for_edge): Likewise.
* tree-ssa-ccp.c (get_value_from_alignment): Likewise.
(bit_value_binop): Likewise.
* tree-ssa-math-opts.c (find_bswap_or_nop_load): Likewise.
* tree-vrp.c (zero_nonzero_bits_from_vr): Likewise.
(extract_range_from_binary_expr_1): Likewise.
(masked_increment): Likewise.
(simplify_bit_ops_using_ranges): Likewise.
From-SVN: r253539
|
|
* tree-outof-ssa.h (ssaexpand): Add partitions_for_undefined_values.
(always_initialized_rtx_for_ssa_name_p): New predicate.
* tree-outof-ssa.c (remove_ssa_form): Initialize new field of SA.
(finish_out_of_ssa): Free new field of SA.
* tree-ssa-coalesce.h (get_undefined_value_partitions): Declare.
* tree-ssa-coalesce.c: Include tree-ssa.h.
(get_parm_default_def_partitions): Remove extern keyword.
(get_undefined_value_partitions): New function.
* expr.c (expand_expr_real_1) <expand_decl_rtl>: For a SSA_NAME, do
not set SUBREG_PROMOTED_VAR_P on the sub-register if it may contain
uninitialized bits.
* loop-iv.c (iv_get_reaching_def): Disqualify all subregs.
From-SVN: r253530
|
|
This patch replaces various places that previously used:
if (GET_CODE (y) == CONST_INT)
... plus_constant (..., x, [-]INTVAL (y)) ...
else
... gen_rtx_PLUS/MINUS (..., x, y) ...
with single calls to simplify_gen_binary. This allows
them to handle polynomial integers as well as constants.
2017-09-21 Richard Sandiford <richard.sandiford@linaro.org>
Alan Hayward <alan.hayward@arm.com>
David Sherwood <david.sherwood@arm.com>
gcc/
* calls.c (compute_argument_addresses): Use simplify_gen_binary
rather than choosing between plus_constant and gen_rtx_<CODE>.
* expr.c (emit_push_insn): Likewise.
(expand_expr_real_2): Likewise.
Co-Authored-By: Alan Hayward <alan.hayward@arm.com>
Co-Authored-By: David Sherwood <david.sherwood@arm.com>
From-SVN: r253059
|
|
Previously VECTOR_CST_NELTS (t) read the number of elements from
TYPE_VECTOR_SUBPARTS (TREE_TYPE (t)). There were two ways of handling
this with variable TYPE_VECTOR_SUBPARTS: either forcibly convert the
number to a constant (which is doable) or store the number directly
in the VECTOR_CST. The latter seemed better, since it involves less
pointer chasing and since the tree_node u field is otherwise unused
for VECTOR_CST. It would still be easy to switch to the former in
future if we need to free up the field for someting else.
The patch also changes various bits of VECTOR_CST code to use
VECTOR_CST_NELTS instead of TYPE_VECTOR_SUBPARTS when iterating
over VECTOR_CST_ELTs. Also, when the two are checked for equality,
the patch prefers to read VECTOR_CST_NELTS (which must be constant)
and check against TYPE_VECTOR_SUBPARTS, instead of the other way
around.
2017-09-14 Richard Sandiford <richard.sandiford@linaro.org>
Alan Hayward <alan.hayward@arm.com>
David Sherwood <david.sherwood@arm.com>
gcc/
* tree-core.h (tree_base::u): Add an "nelts" field.
(tree_vector): Use VECTOR_CST_NELTS as the length.
* tree.c (tree_size): Likewise.
(make_vector): Initialize VECTOR_CST_NELTS.
* tree.h (VECTOR_CST_NELTS): Use the u.nelts field.
* cfgexpand.c (expand_debug_expr): Use VECTOR_CST_NELTS instead of
TYPE_VECTOR_SUBPARTS.
* expr.c (const_vector_mask_from_tree): Consistently use "units"
as the number of units, setting it from VECTOR_CST_NELTS.
(const_vector_from_tree): Likewise.
* fold-const.c (negate_expr_p): Use VECTOR_CST_NELTS instead of
TYPE_VECTOR_SUBPARTS for the number of elements in a VECTOR_CST.
(fold_negate_expr_1): Likewise.
(fold_convert_const): Likewise.
(const_binop): Likewise. Differentiate the number of output and
input elements.
(const_unop): Likewise.
(fold_ternary_loc): Use VECTOR_CST_NELTS for the number of elements
in a VECTOR_CST, asserting that it is the same as TYPE_VECTOR_SUBPARTS
in cases that did the opposite.
Co-Authored-By: Alan Hayward <alan.hayward@arm.com>
Co-Authored-By: David Sherwood <david.sherwood@arm.com>
From-SVN: r252758
|
|
2017-09-12 Richard Sandiford <richard.sandiford@linaro.org>
Alan Hayward <alan.hayward@arm.com>
David Sherwood <david.sherwood@arm.com>
gcc/
* defaults.h (SLOW_UNALIGNED_ACCESS): Delete.
* target.def (slow_unaligned_access): New hook.
* targhooks.h (default_slow_unaligned_access): Declare.
* targhooks.c (default_slow_unaligned_access): New function.
* doc/tm.texi.in (SLOW_UNALIGNED_ACCESS): Replace with...
(TARGET_SLOW_UNALIGNED_ACCESS): ...this.
* doc/tm.texi: Regenerate.
* config/alpha/alpha.h (SLOW_UNALIGNED_ACCESS): Delete.
* config/arm/arm.h (SLOW_UNALIGNED_ACCESS): Delete.
* config/i386/i386.h (SLOW_UNALIGNED_ACCESS): Delete commented-out
definition.
* config/powerpcspe/powerpcspe.h (SLOW_UNALIGNED_ACCESS): Delete.
* config/powerpcspe/powerpcspe.c (TARGET_SLOW_UNALIGNED_ACCESS):
Redefine.
(rs6000_slow_unaligned_access): New function.
(rs6000_emit_move): Use it instead of SLOW_UNALIGNED_ACCESS.
(expand_block_compare): Likewise.
(expand_strn_compare): Likewise.
(rs6000_rtx_costs): Likewise.
* config/riscv/riscv.h (SLOW_UNALIGNED_ACCESS): Delete.
(riscv_slow_unaligned_access): Likewise.
* config/riscv/riscv.c (riscv_slow_unaligned_access): Rename to...
(riscv_slow_unaligned_access_p): ...this and make static.
(riscv_option_override): Update accordingly.
(riscv_slow_unaligned_access): New function.
(TARGET_SLOW_UNALIGNED_ACCESS): Redefine.
* config/rs6000/rs6000.h (SLOW_UNALIGNED_ACCESS): Delete.
* config/rs6000/rs6000.c (TARGET_SLOW_UNALIGNED_ACCESS): Redefine.
(rs6000_slow_unaligned_access): New function.
(rs6000_emit_move): Use it instead of SLOW_UNALIGNED_ACCESS.
(rs6000_rtx_costs): Likewise.
* config/rs6000/rs6000-string.c (expand_block_compare)
(expand_strn_compare): Use targetm.slow_unaligned_access instead
of SLOW_UNALIGNED_ACCESS.
* config/tilegx/tilegx.h (SLOW_UNALIGNED_ACCESS): Delete.
* config/tilepro/tilepro.h (SLOW_UNALIGNED_ACCESS): Delete.
* calls.c (expand_call): Use targetm.slow_unaligned_access instead
of SLOW_UNALIGNED_ACCESS.
* expmed.c (simple_mem_bitfield_p): Likewise.
* expr.c (alignment_for_piecewise_move): Likewise.
(emit_group_load_1): Likewise.
(emit_group_store): Likewise.
(copy_blkmode_from_reg): Likewise.
(emit_push_insn): Likewise.
(expand_assignment): Likewise.
(store_field): Likewise.
(expand_expr_real_1): Likewise.
* gimple-fold.c (gimple_fold_builtin_memory_op): Likewise.
* lra-constraints.c (simplify_operand_subreg): Likewise.
* stor-layout.c (bit_field_mode_iterator::next_mode): Likewise.
* gimple-ssa-store-merging.c: Likewise in block comment at start
of file.
* tree-ssa-strlen.c: Include target.h.
(handle_builtin_memcmp): Use targetm.slow_unaligned_access instead
of SLOW_UNALIGNED_ACCESS.
* system.h (SLOW_UNALIGNED_ACCESS): Poison.
Co-Authored-By: Alan Hayward <alan.hayward@arm.com>
Co-Authored-By: David Sherwood <david.sherwood@arm.com>
From-SVN: r252009
|
|
...following on from the mode_for_size change. The patch also removes
machmode.h versions of the stor-layout.c comments, since the comments
in the .c file are more complete.
2017-09-05 Richard Sandiford <richard.sandiford@linaro.org>
gcc/
* machmode.h (mode_for_vector): Return an opt_mode.
* stor-layout.c (mode_for_vector): Likewise.
(mode_for_int_vector): Update accordingly.
(layout_type): Likewise.
* config/i386/i386.c (emit_memmov): Likewise.
(ix86_expand_set_or_movmem): Likewise.
(ix86_expand_vector_init): Likewise.
(ix86_get_mask_mode): Likewise.
* config/powerpcspe/powerpcspe.c (rs6000_expand_vec_perm_const_1):
Likewise.
* config/rs6000/rs6000.c (rs6000_expand_vec_perm_const_1): Likewise.
* expmed.c (extract_bit_field_1): Likewise.
* expr.c (expand_expr_real_2): Likewise.
* optabs-query.c (can_vec_perm_p): Likewise.
(can_vec_mask_load_store_p): Likewise.
* optabs.c (expand_vec_perm): Likewise.
* targhooks.c (default_get_mask_mode): Likewise.
* tree-vect-stmts.c (vectorizable_store): Likewise.
(vectorizable_load): Likewise.
(get_vectype_for_scalar_type_and_size): Likewise.
From-SVN: r251730
|
|
This patch converts more places that could use int_mode_for_size instead
of mode_for_size. This is in preparation for an upcoming patch that
makes mode_for_size itself return an opt_mode.
require () seems like the right choice in expand_builtin_powi
because we have got past the point of backing out. We go on to do:
op1 = expand_expr (arg1, NULL_RTX, mode2, EXPAND_NORMAL);
if (GET_MODE (op1) != mode2)
op1 = convert_to_mode (mode2, op1, 0);
which would be invalid for (and have failed for) BLKmode.
In get_builtin_sync_mode and expand_ifn_atomic_compare_exchange,
the possible bitsizes are {8, 16, 32, 64, 128}, all of which give
target-independent integer modes (up to TImode). The comment above
the call in get_builtin_sync_mode makes clear that an integer mode
must be found.
We can use require () in expand_builtin_atomic_clear and
expand_builtin_atomic_test_and_set because there's always an integer
mode for the boolean type. The same goes for the POINTER_SIZE request
in layout_type. Similarly we can use require () in combine_instructions
and gen_lowpart_common because there's always an integer mode for
HOST_BITS_PER_WIDE_INT (DImode when BITS_PER_UNIT == 8), and
HOST_BITS_PER_DOUBLE_INT (TImode).
The calls in aarch64_function_value, arm_function_value,
aapcs_allocate_return_reg and mips_function_value_1 are handling
cases in which a big-endian target passes or returns values at
the most significant end of a register. In each case the ABI
constrains the size to a small amount and does not handle
non-power-of-2 sizes wider than a word.
The calls in c6x_expand_movmem, i386.c:emit_memset,
lm32_block_move_inline, microblaze_block_move_straight and
mips_block_move_straight are dealing with expansions of
block memory operations using register-wise operations,
and those registers must have non-BLK mode.
The reason for using require () in ix86_expand_sse_cmp,
mips_expand_ins_as_unaligned_store, spu.c:adjust_operand and
spu_emit_branch_and_set is that we go on to emit non-call
instructions that use registers of that mode, which wouldn't
be valid for BLKmode.
2017-09-05 Richard Sandiford <richard.sandiford@linaro.org>
gcc/
* builtins.c (expand_builtin_powi): Use int_mode_for_size.
(get_builtin_sync_mode): Likewise.
(expand_ifn_atomic_compare_exchange): Likewise.
(expand_builtin_atomic_clear): Likewise.
(expand_builtin_atomic_test_and_set): Likewise.
(fold_builtin_atomic_always_lock_free): Likewise.
* calls.c (compute_argument_addresses): Likewise.
(emit_library_call_value_1): Likewise.
(store_one_arg): Likewise.
* combine.c (combine_instructions): Likewise.
* config/aarch64/aarch64.c (aarch64_function_value): Likewise.
* config/arm/arm.c (arm_function_value): Likewise.
(aapcs_allocate_return_reg): Likewise.
* config/c6x/c6x.c (c6x_expand_movmem): Likewise.
* config/i386/i386.c (construct_container): Likewise.
(ix86_gimplify_va_arg): Likewise.
(ix86_expand_sse_cmp): Likewise.
(emit_memmov): Likewise.
(emit_memset): Likewise.
(expand_small_movmem_or_setmem): Likewise.
(ix86_expand_pextr): Likewise.
(ix86_expand_pinsr): Likewise.
* config/lm32/lm32.c (lm32_block_move_inline): Likewise.
* config/microblaze/microblaze.c (microblaze_block_move_straight):
Likewise.
* config/mips/mips.c (mips_function_value_1) Likewise.
(mips_block_move_straight): Likewise.
(mips_expand_ins_as_unaligned_store): Likewise.
* config/powerpcspe/powerpcspe.c
(rs6000_darwin64_record_arg_advance_flush): Likewise.
(rs6000_darwin64_record_arg_flush): Likewise.
* config/rs6000/rs6000.c
(rs6000_darwin64_record_arg_advance_flush): Likewise.
(rs6000_darwin64_record_arg_flush): Likewise.
* config/sparc/sparc.c (sparc_function_arg_1): Likewise.
(sparc_function_value_1): Likewise.
* config/spu/spu.c (adjust_operand): Likewise.
(spu_emit_branch_or_set): Likewise.
(arith_immediate_p): Likewise.
* emit-rtl.c (gen_lowpart_common): Likewise.
* expr.c (expand_expr_real_1): Likewise.
* function.c (assign_parm_setup_block): Likewise.
* gimple-ssa-store-merging.c (encode_tree_to_bitpos): Likewise.
* reload1.c (alter_reg): Likewise.
* stor-layout.c (mode_for_vector): Likewise.
(layout_type): Likewise.
gcc/ada/
* gcc-interface/utils2.c (build_load_modify_store):
Use int_mode_for_size.
From-SVN: r251726
|
|
This involved renaming the rather general-sounding "enum direction" to
"enum pad_direction" to avoid a conflict with the Fortran frontend.
2017-09-04 Richard Sandiford <richard.sandiford@linaro.org>
Alan Hayward <alan.hayward@arm.com>
David Sherwood <david.sherwood@arm.com>
gcc/
* coretypes.h (pad_direction): New enum.
* defaults.h (DEFAULT_FUNCTION_ARG_PADDING): Delete.
(FUNCTION_ARG_PADDING): Likewise.
* target.def (function_arg_padding): New hook.
* targhooks.h (default_function_arg_padding): Declare.
* targhooks.c (default_function_arg_padding): New function.
* doc/tm.texi.in (FUNCTION_ARG_PADDING): Replace with...
(TARGET_FUNCTION_ARG_PADDING): ...this.
* doc/tm.texi: Regenerate.
* calls.c (store_unaligned_arguments_into_pseudos): Use pad_direction
instead of direction.
(compute_argument_addresses): Likewise.
(load_register_parameters): Likewise.
(emit_library_call_value_1): Likewise.
(store_one_arg): Use targetm.calls.function_arg_padding instead
of FUNCTION_ARG_PADDING.
(must_pass_in_stack_var_size_or_pad): Likewise.
* expr.c (emit_group_load_1): Use pad_direction instead of direction.
(emit_group_store): Likewise.
(emit_single_push_insn_1): Use targetm.calls.function_arg_padding
instead of FUNCTION_ARG_PADDING.
(emit_push_insn): Likewise, and propagate enum change throughout
function.
* function.h (direction): Delete.
(locate_and_pad_arg_data::where_pad): Use pad_direction instead
of direction.
* function.c (assign_parm_find_stack_rtl): Likewise.
(assign_parm_setup_block_p): Likewise.
(assign_parm_setup_block): Likewise.
(gimplify_parameters): Likewise.
(locate_and_pad_parm): Use targetm.calls.function_arg_padding
instead of FUNCTION_ARG_PADDING, and propagate enum change throughout
function.
* config/aarch64/aarch64.h (FUNCTION_ARG_PADDING): Delete.
(BLOCK_REG_PADDING): Use pad_direction instead of direction.
* config/aarch64/aarch64-protos.h (aarch64_pad_arg_upward): Delete.
* config/aarch64/aarch64.c (aarch64_pad_arg_upward): Replace with...
(aarch64_function_arg_padding): ...this new function.
(aarch64_gimplify_va_arg_expr): Use pad_direction instead of direction.
(TARGET_FUNCTION_ARG_PADDING): Redefine.
* config/arm/arm.h (FUNCTION_ARG_PADDING): Delete.
(BLOCK_REG_PADDING): Use pad_direction instead of direction.
* config/arm/arm-protos.h (arm_pad_arg_upward): Delete.
* config/arm/arm.c (TARGET_FUNCTION_ARG_PADDING): Redefine.
(arm_pad_arg_upward): Replace with...
(arm_function_arg_padding): ...this new function.
* config/c6x/c6x.h (BLOCK_REG_PADDING): Use pad_direction instead
of direction.
* config/ia64/hpux.h (FUNCTION_ARG_PADDING): Delete.
* config/ia64/ia64-protos.h (ia64_hpux_function_arg_padding): Delete.
* config/ia64/ia64.c (TARGET_FUNCTION_ARG_PADDING): Redefine.
(ia64_hpux_function_arg_padding): Replace with...
(ia64_function_arg_padding): ...this new function. Use pad_direction
instead of direction. Check for TARGET_HPUX.
* config/iq2000/iq2000.h (FUNCTION_ARG_PADDING): Delete.
* config/iq2000/iq2000.c (TARGET_FUNCTION_ARG_PADDING): Redefine.
(iq2000_function_arg_padding): New function.
* config/mips/mips-protos.h (mips_pad_arg_upward): Delete.
* config/mips/mips.c (mips_pad_arg_upward): Replace with...
(mips_function_arg_padding): ...this new function.
(mips_pad_reg_upward): Update accordingly.
(TARGET_FUNCTION_ARG_PADDING): Redefine.
* config/mips/mips.h (PAD_VARARGS_DOWN): Use
targetm.calls.function_arg_padding.
(FUNCTION_ARG_PADDING): Delete.
(BLOCK_REG_PADDING): Use pad_direction instead of direction.
* config/nios2/nios2.h (FUNCTION_ARG_PADDING): Delete.
(PAD_VARARGS_DOWN): Use targetm.calls.function_arg_padding.
* config/nios2/nios2-protos.h (nios2_function_arg_padding): Delete.
(nios2_block_reg_padding): Return pad_direction instead of direction.
* config/nios2/nios2.c (nios2_block_reg_padding): Return pad_direction
instead of direction.
(nios2_function_arg_padding): Likewise. Make static.
(TARGET_FUNCTION_ARG_PADDING): Redefine.
* config/pa/pa.h (FUNCTION_ARG_PADDING): Delete.
(BLOCK_REG_PADDING): Use targetm.calls.function_arg_padding.
* config/pa/pa-protos.h (pa_function_arg_padding): Delete.
* config/pa/pa.c (TARGET_FUNCTION_ARG_PADDING): Redefine.
(pa_function_arg_padding): Make static. Return pad_direction instead
of direction.
* config/powerpcspe/powerpcspe.h (FUNCTION_ARG_PADDING): Delete.
(PAD_VARARGS_DOWN): Use targetm.calls.function_arg_padding.
* config/powerpcspe/aix.h (BLOCK_REG_PADDING): Use pad_direction
instead of direction. Use targetm.calls.function_arg_padding.
* config/powerpcspe/darwin.h (BLOCK_REG_PADDING): Likewise.
* config/powerpcspe/freebsd64.h (BLOCK_REG_PADDING): Likewise.
* config/powerpcspe/linux64.h (BLOCK_REG_PADDING): Likewise.
* config/powerpcspe/powerpcspe-protos.h (function_arg_padding): Delete.
* config/powerpcspe/powerpcspe.c (TARGET_FUNCTION_ARG_PADDING):
Redefine.
(function_arg_padding): Rename to...
(rs6000_function_arg_padding): ...this. Make static. Return
pad_direction instead of direction.
(rs6000_return_in_msb): Use rs6000_function_arg_padding.
* config/rs6000/rs6000.h (FUNCTION_ARG_PADDING): Delete.
(PAD_VARARGS_DOWN): Use targetm.calls.function_arg_padding.
* config/rs6000/aix.h (BLOCK_REG_PADDING): Use pad_direction
instead of direction. Use targetm.calls.function_arg_padding.
* config/rs6000/darwin.h (BLOCK_REG_PADDING): Likewise.
* config/rs6000/freebsd64.h (BLOCK_REG_PADDING): Likewise.
* config/rs6000/linux64.h (BLOCK_REG_PADDING): Likewise.
* config/rs6000/rs6000-protos.h (function_arg_padding): Delete.
* config/rs6000/rs6000.c (TARGET_FUNCTION_ARG_PADDING): Redefine.
(function_arg_padding): Rename to...
(rs6000_function_arg_padding): ...this. Make static. Return
pad_direction instead of direction.
(rs6000_return_in_msb): Use rs6000_function_arg_padding.
* config/s390/s390.h (FUNCTION_ARG_PADDING): Delete.
* config/s390/s390.c (s390_function_arg_padding): New function.
(TARGET_FUNCTION_ARG_PADDING): Redefine.
* config/sparc/sparc.h (FUNCTION_ARG_PADDING): Delete.
* config/sparc/sparc-protos.h (function_arg_padding): Delete.
* config/sparc/sparc.c (TARGET_FUNCTION_ARG_PADDING): Redefine.
(function_arg_padding): Rename to...
(sparc_function_arg_padding): ...this. Make static. Return
pad_direction instead of direction.
* config/spu/spu.h (FUNCTION_ARG_PADDING): Delete.
* config/spu/spu.c (spu_function_arg_padding): New function.
(TARGET_FUNCTION_ARG_PADDING): Redefine.
* system.h (FUNCTION_ARG_PADDING): Poison.
Co-Authored-By: Alan Hayward <alan.hayward@arm.com>
Co-Authored-By: David Sherwood <david.sherwood@arm.com>
From-SVN: r251648
|
|
2017-09-04 Richard Sandiford <richard.sandiford@linaro.org>
Alan Hayward <alan.hayward@arm.com>
David Sherwood <david.sherwood@arm.com>
gcc/
* target.def (hard_regno_mode_ok): New hook.
* doc/tm.texi (HARD_REGNO_MODE_OK): Replace with...
(TARGET_HARD_REGNO_MODE_OK): ...this.
* doc/tm.texi.in: Regenerate.
* hooks.h (hook_bool_uint_mode_true): Declare.
* hooks.c (hook_bool_uint_mode_true): New function.
* doc/md.texi: Refer to targetm.hard_regno_mode_ok instead of
HARD_REGNO_MODE_OK.
* genpreds.c (write_insn_preds_c): Add an include of target.h.
* alias.c (init_alias_target): Use targetm.hard_regno_mode_ok
instead of HARD_REGNO_MODE_OK.
* caller-save.c: Include target.h.
(reg_save_code): Use targetm.hard_regno_mode_ok instead of
HARD_REGNO_MODE_OK.
* combine.c (can_combine_p): Likewise.
(combinable_i3pat): Likewise.
(can_change_dest_mode): Likewise.
* expr.c (init_expr_target): Likewise.
(convert_move): Likewise.
(convert_modes): Likewise.
* ira.c (setup_prohibited_class_mode_regs): Likewise.
(setup_prohibited_mode_move_regs): Likewise.
* ira.h (target_ira): Likewise.
* lra-assigns.c (find_hard_regno_for_1): Likewise.
* lra-constraints.c (process_alt_operands): Likewise.
(split_reg): Likewise.
* recog.c (peep2_find_free_register): Likewise.
* ree.c (combine_reaching_defs): Likewise.
* regcprop.c (maybe_mode_change): Likewise.
* reginfo.c (init_reg_sets_1): Likewise.
(choose_hard_reg_mode): Likewise.
(simplifiable_subregs): Likewise.
* regrename.c (check_new_reg_p): Likewise.
* reload.c (find_valid_class): Likewise.
(find_valid_class_1): Likewise.
(reload_inner_reg_of_subreg): Likewise.
(push_reload): Likewise.
(combine_reloads): Likewise.
(find_dummy_reload): Likewise.
(find_reloads): Likewise.
* reload1.c (find_reg): Likewise.
(set_reload_reg): Likewise.
(allocate_reload_reg): Likewise.
(choose_reload_regs): Likewise.
(reload_adjust_reg_for_temp): Likewise.
* rtlanal.c (subreg_size_offset_from_lsb): Likewise.
(simplify_subreg_regno): Likewise.
* sel-sched.c (init_regs_for_mode): Likewise.
* varasm.c (make_decl_rtl): Likewise.
* config/aarch64/aarch64.h (HARD_REGNO_MODE_OK): Delete.
(MODES_TIEABLE_P): Use targetm.hard_regno_mode_ok instead of
HARD_REGNO_MODE_OK.
* config/aarch64/aarch64-protos.h (aarch64_hard_regno_mode_ok): Delete.
* config/aarch64/aarch64.c (aarch64_hard_regno_mode_ok): Make static.
(TARGET_HARD_REGNO_MODE_OK): Redefine.
* config/alpha/alpha.h (HARD_REGNO_MODE_OK): Delete.
* config/alpha/alpha.c (alpha_hard_regno_mode_ok): New function.
(TARGET_HARD_REGNO_MODE_OK): Redefine.
* config/arc/arc.h (arc_hard_regno_mode_ok): Delete.
(arc_mode_class): Delete.
(HARD_REGNO_MODE_OK): Delete.
* config/arc/arc.c (TARGET_HARD_REGNO_MODE_OK): Redefine.
(arc_hard_regno_mode_ok): Rename old array to...
(arc_hard_regno_mode_ok_modes): ...this.
(arc_conditional_register_usage): Update accordingly.
(arc_mode_class): Make static.
(arc_hard_regno_mode_ok): New function.
* config/arm/arm.h (HARD_REGNO_MODE_OK): Delete.
* config/arm/arm-protos.h (arm_hard_regno_mode_ok): Delete.
* config/arm/arm.c (TARGET_HARD_REGNO_MODE_OK): Redefine.
(arm_hard_regno_mode_ok): Make static.
* config/arm/arm.md (movdi): Use targetm.hard_regno_mode_ok instead of
HARD_REGNO_MODE_OK.
* config/avr/avr-protos.h (avr_hard_regno_mode_ok): Delete.
* config/avr/avr.h (HARD_REGNO_MODE_OK): Delete.
* config/avr/avr.c (avr_hard_regno_mode_ok): Make static and
return a bool.
(TARGET_HARD_REGNO_MODE_OK): Redefine.
* config/bfin/bfin-protos.h (hard_regno_mode_ok): Delete.
* config/bfin/bfin.h (HARD_REGNO_MODE_OK): Delete.
* config/bfin/bfin.c (hard_regno_mode_ok): Rename to...
(bfin_hard_regno_mode_ok): ...this. Make static and return a bool.
(TARGET_HARD_REGNO_MODE_OK): Redefine.
* config/bfin/predicates.md (valid_reg_operand): Use
targetm.hard_regno_mode_ok instead of HARD_REGNO_MODE_OK.
* config/c6x/c6x.h (HARD_REGNO_MODE_OK): Delete.
* config/c6x/c6x.c (c6x_hard_regno_mode_ok): New function.
(TARGET_HARD_REGNO_MODE_OK): Redefine.
* config/cr16/cr16.h (HARD_REGNO_MODE_OK): Delete.
* config/cr16/cr16-protos.h (cr16_hard_regno_mode_ok): Delete.
* config/cr16/cr16.c (TARGET_HARD_REGNO_MODE_OK): Redefine.
(cr16_hard_regno_mode_ok): Make static and return a bool.
* config/cris/cris.h (HARD_REGNO_MODE_OK): Delete.
* config/cris/cris.c (TARGET_HARD_REGNO_MODE_OK): Redefine.
(cris_hard_regno_mode_ok): New function.
* config/epiphany/epiphany.h (epiphany_hard_regno_mode_ok): Delete.
(epiphany_mode_class): Delete.
(HARD_REGNO_MODE_OK): Delete.
* config/epiphany/epiphany-protos.h (hard_regno_mode_ok): Delete.
* config/epiphany/epiphany.c (TARGET_HARD_REGNO_MODE_OK): Redefine.
(hard_regno_mode_ok): Rename to...
(epiphany_hard_regno_mode_ok): ...this. Make static and return a bool.
* config/fr30/fr30.h (HARD_REGNO_MODE_OK): Delete.
* config/fr30/fr30.md: Refer to targetm.hard_regno_mode_ok instead of
HARD_REGNO_MODE_OK.
* config/frv/frv.h (HARD_REGNO_MODE_OK): Delete.
* config/frv/frv-protos.h (frv_hard_regno_mode_ok): Delete.
* config/frv/frv.c (TARGET_HARD_REGNO_MODE_OK): Redefine.
(frv_hard_regno_mode_ok): Make static and return a bool.
* config/frv/frv.md: Refer to targetm.hard_regno_mode_ok instead of
HARD_REGNO_MODE_OK.
* config/ft32/ft32.h (HARD_REGNO_MODE_OK): Delete.
* config/h8300/h8300.h (HARD_REGNO_MODE_OK): Delete.
* config/h8300/h8300-protos.h (h8300_hard_regno_mode_ok): Delete.
* config/h8300/h8300.c (h8300_hard_regno_mode_ok): Make static
and return a bool.
(TARGET_HARD_REGNO_MODE_OK): Redefine.
* config/i386/i386.h (HARD_REGNO_MODE_OK): Delete.
* config/i386/i386-protos.h (ix86_hard_regno_mode_ok): Delete.
* config/i386/i386.c (ix86_hard_regno_mode_ok): Make static and
return a bool.
(TARGET_HARD_REGNO_MODE_OK): Redefine.
* config/ia64/ia64.h (HARD_REGNO_MODE_OK): Delete.
* config/ia64/ia64.c (TARGET_HARD_REGNO_MODE_OK): Redefine.
(ia64_hard_regno_mode_ok): New function.
* config/iq2000/iq2000.h (HARD_REGNO_MODE_OK): Delete.
* config/iq2000/iq2000.c (TARGET_HARD_REGNO_MODE_OK): Redefine.
(iq2000_hard_regno_mode_ok): New function.
* config/lm32/lm32.h (HARD_REGNO_MODE_OK): Delete.
* config/lm32/lm32.c (TARGET_HARD_REGNO_MODE_OK): Redefine.
(lm32_hard_regno_mode_ok): New function.
* config/m32c/m32c.h (HARD_REGNO_MODE_OK): Delete.
* config/m32c/m32c-protos.h (m32c_hard_regno_ok): Delete.
* config/m32c/m32c.c (class_can_hold_mode): Use m32c_hard_regno_mode_ok
instead of HARD_REGNO_MODE_OK.
(m32c_hard_regno_ok): Rename to...
(m32c_hard_regno_mode_ok): ...this. Make static and return a bool.
(m32c_cannot_change_mode_class): Update accordingly.
(TARGET_HARD_REGNO_MODE_OK): Redefine.
* config/m32r/m32r.h (m32r_hard_regno_mode_ok): Delete.
(m32r_mode_class): Delete.
(HARD_REGNO_MODE_OK): Delete.
* config/m32r/m32r.c (TARGET_HARD_REGNO_MODE_OK): Redefine.
(m32r_hard_regno_mode_ok): Rename to...
(m32r_hard_regno_modes): ...this.
(m32r_mode_class): Make static.
(m32r_hard_regno_mode_ok): New function.
* config/m68k/m68k.h (HARD_REGNO_MODE_OK): Delete.
* config/m68k/m68k-protos.h (m68k_regno_mode_ok): Delete.
* config/m68k/m68k.c (TARGET_HARD_REGNO_MODE_OK): Redefine.
(m68k_hard_regno_mode_ok): Make static.
* config/mcore/mcore.h (HARD_REGNO_MODE_OK): Delete.
* config/mcore/mcore.c (TARGET_HARD_REGNO_MODE_OK): Redefine.
(mcore_hard_regno_mode_ok): New function.
* config/microblaze/microblaze.h (microblaze_hard_regno_mode_ok)
(HARD_REGNO_MODE_OK): Delete.
* config/microblaze/microblaze.c (microblaze_hard_regno_mode_ok):
Rename to...
(microblaze_hard_regno_mode_ok_p): ...this and make static.
(microblaze_hard_regno_mode_ok): New function.
(TARGET_HARD_REGNO_MODE_OK): Redefine.
* config/mips/mips.h (HARD_REGNO_MODE_OK): Delete.
(mips_hard_regno_mode_ok): Delete.
* config/mips/mips.c (mips_hard_regno_mode_ok): Rename to...
(mips_hard_regno_mode_ok_p): ...this and make static.
(mips_hard_regno_mode_ok_p): Rename to...
(mips_hard_regno_mode_ok_uncached): ...this.
(mips_hard_regno_mode_ok): New function.
(mips_class_max_nregs): Use mips_hard_regno_mode_ok instead
of HARD_REGNO_MODE_OK.
(mips_option_override): Update after above name changes.
(TARGET_HARD_REGNO_MODE_OK): Redefine.
* config/mmix/mmix.h (HARD_REGNO_MODE_OK): Delete.
* config/mn10300/mn10300.h (HARD_REGNO_MODE_OK): Delete.
* config/mn10300/mn10300-protos.h (mn10300_hard_regno_mode_ok): Delete.
* config/mn10300/mn10300.c (mn10300_hard_regno_mode_ok): Make static.
(TARGET_HARD_REGNO_MODE_OK): Redefine.
* config/moxie/moxie.h (HARD_REGNO_MODE_OK): Delete.
* config/msp430/msp430.h (HARD_REGNO_MODE_OK): Delete.
* config/msp430/msp430-protos.h (msp430_hard_regno_mode_ok): Delete.
* config/msp430/msp430.c (TARGET_HARD_REGNO_MODE_OK): Redefine.
(msp430_hard_regno_mode_ok): Make static and return a bool.
* config/nds32/nds32.h (HARD_REGNO_MODE_OK): Delete.
* config/nds32/nds32-protos.h (nds32_hard_regno_mode_ok): Delete.
* config/nds32/nds32.c (nds32_hard_regno_mode_ok): Make static
and return a bool.
(TARGET_HARD_REGNO_MODE_OK): Redefine.
* config/nios2/nios2.h (HARD_REGNO_MODE_OK): Delete.
* config/nvptx/nvptx.h (HARD_REGNO_MODE_OK): Delete.
* config/pa/pa.h (MODES_TIEABLE_P): Update commentary.
* config/pa/pa32-regs.h (HARD_REGNO_MODE_OK): Rename to...
(PA_HARD_REGNO_MODE_OK): ...this
* config/pa/pa64-regs.h (HARD_REGNO_MODE_OK): Rename to...
(PA_HARD_REGNO_MODE_OK): ...this.
* config/pa/pa.c (TARGET_HARD_REGNO_MODE_OK): Redefine.
(pa_hard_regno_mode_ok): New function.
* config/pdp11/pdp11.h (HARD_REGNO_MODE_OK): Delete.
* config/pdp11/pdp11.c (TARGET_HARD_REGNO_MODE_OK): Redefine.
(pdp11_hard_regno_mode_ok): New function.
* config/powerpcspe/powerpcspe.h (HARD_REGNO_MODE_OK): Delete.
* config/powerpcspe/powerpcspe-protos.h (rs6000_hard_regno_mode_ok_p):
Delete.
* config/powerpcspe/powerpcspe.c (rs6000_hard_regno_mode_ok_p):
Make static.
(TARGET_HARD_REGNO_MODE_OK): Redefine.
(rs6000_hard_regno_mode_ok): Rename to...
(rs6000_hard_regno_mode_ok_uncached): ...this.
(rs6000_init_hard_regno_mode_ok): Update accordingly.
(rs6000_hard_regno_mode_ok): New function.
* config/riscv/riscv.h (HARD_REGNO_MODE_OK): Delete.
* config/riscv/riscv-protos.h (riscv_hard_regno_mode_ok_p): Delete.
* config/riscv/riscv.c (riscv_hard_regno_mode_ok_p): Rename to...
(riscv_hard_regno_mode_ok): ...this and make static.
(TARGET_HARD_REGNO_MODE_OK): Redefine.
* config/rl78/rl78.h (HARD_REGNO_MODE_OK): Delete.
* config/rl78/rl78-protos.h (rl78_hard_regno_mode_ok): Delete.
* config/rl78/rl78.c (TARGET_HARD_REGNO_MODE_OK): Redefine.
(rl78_hard_regno_mode_ok): Make static and return bool.
* config/rs6000/rs6000.h (HARD_REGNO_MODE_OK): Delete.
* config/rs6000/rs6000-protos.h (rs6000_hard_regno_mode_ok_p):
Delete.
* config/rs6000/rs6000.c (rs6000_hard_regno_mode_ok_p): Make static.
(TARGET_HARD_REGNO_MODE_OK): Redefine.
(rs6000_hard_regno_mode_ok): Rename to...
(rs6000_hard_regno_mode_ok_uncached): ...this.
(rs6000_init_hard_regno_mode_ok): Update accordingly.
(rs6000_hard_regno_mode_ok): New function.
* config/rx/rx.h (HARD_REGNO_MODE_OK): Delete.
* config/rx/rx.c (rx_hard_regno_mode_ok): New function.
(TARGET_HARD_REGNO_MODE_OK): Redefine.
* config/s390/s390.h (HARD_REGNO_MODE_OK): Delete.
* config/s390/s390-protos.h (s390_hard_regno_mode_ok): Delete.
* config/s390/s390.c (s390_hard_regno_mode_ok): Make static.
(TARGET_HARD_REGNO_MODE_OK): Redefine.
* config/sh/sh.h (HARD_REGNO_MODE_OK): Delete.
* config/sh/sh-protos.h (sh_hard_regno_mode_ok): Delete.
* config/sh/sh.c (TARGET_HARD_REGNO_MODE_OK): Redefine.
(sh_hard_regno_mode_ok): Make static.
* config/sparc/constraints.md: Refer to targetm.hard_regno_mode_ok
instead of HARD_REGNO_MODE_OK.
* config/sparc/sparc.h (hard_regno_mode_classes): Delete.
(sparc_mode_class): Delete.
(HARD_REGNO_MODE_OK): Delete.
* config/sparc/sparc.c (TARGET_HARD_REGNO_MODE_OK): Redefine.
(hard_regno_mode_classes): Make static.
(sparc_mode_class): Likewise.
(sparc_hard_regno_mode_ok): New function.
* config/spu/spu.h (HARD_REGNO_MODE_OK): Delete.
* config/stormy16/stormy16.h (HARD_REGNO_MODE_OK): Delete.
* config/stormy16/stormy16.c (xstormy16_hard_regno_mode_ok): New
function.
(TARGET_HARD_REGNO_MODE_OK): Redefine.
* config/tilegx/tilegx.h (HARD_REGNO_MODE_OK): Delete.
* config/tilepro/tilepro.h (HARD_REGNO_MODE_OK): Delete.
* config/v850/v850.h (HARD_REGNO_MODE_OK): Delete.
* config/v850/v850.c (v850_hard_regno_mode_ok): New function.
(TARGET_HARD_REGNO_MODE_OK): Redefine.
* config/vax/vax.h (HARD_REGNO_MODE_OK): Delete.
* config/visium/visium.h (HARD_REGNO_MODE_OK): Delete.
* config/visium/visium.c (TARGET_HARD_REGNO_MODE_OK): Redefine.
(visium_hard_regno_mode_ok): New function.
* config/visium/visium.md: Refer to targetm.hard_regno_mode_ok
instead of HARD_REGNO_MODE_OK.
* config/xtensa/xtensa.h (xtensa_hard_regno_mode_ok): Delete.
(HARD_REGNO_MODE_OK): Delete.
* config/xtensa/xtensa.c (xtensa_hard_regno_mode_ok): Rename to...
(xtensa_hard_regno_mode_ok_p): ...this and make static.
(xtensa_option_override): Update accordingly.
(TARGET_HARD_REGNO_MODE_OK): Redefine.
(xtensa_hard_regno_mode_ok): New function.
* system.h (HARD_REGNO_MODE_OK): Poison.
Co-Authored-By: Alan Hayward <alan.hayward@arm.com>
Co-Authored-By: David Sherwood <david.sherwood@arm.com>
From-SVN: r251646
|
|
This patch adds routines for converting a SUBREG_BYTE offset into a
memory address offset. The two only differ for paradoxical subregs,
where SUBREG_BYTE is always 0 but the memory address offset can be
negative.
2017-09-04 Richard Sandiford <richard.sandiford@linaro.org>
Alan Hayward <alan.hayward@arm.com>
David Sherwood <david.sherwood@arm.com>
gcc/
* rtl.h (subreg_memory_offset): Declare.
* emit-rtl.c (subreg_memory_offset): New function.
* expmed.c (store_bit_field_1): Use it.
* expr.c (undefined_operand_subword_p): Likewise.
* simplify-rtx.c (simplify_subreg): Likewise.
Co-Authored-By: Alan Hayward <alan.hayward@arm.com>
Co-Authored-By: David Sherwood <david.sherwood@arm.com>
From-SVN: r251644
|
|
PR82045 is about a bootstrap failure on sparc-sun-solaris2.11.
The problem was that we were passing the new machine_mode wrapper
classes through "..." to emit_library_call(_value), which then
read them back as ints instead.
The simplest fix seemed to be replace "..." with an array of
rtx_mode_ts, then provide wrappers for the common cases. This
bulks out rtl.h a bit, but it does make things a bit more typesafe.
2017-09-04 Richard Sandiford <richard.sandiford@linaro.org>
gcc/
PR bootstrap/82045
* rtl.h (emit_library_call_value_1): Declare.
(emit_library_call): Replace declaration with a series of overloads.
Remove the parameter count argument.
(emit_library_call_value): Likewise.
* calls.c (emit_library_call_value_1): Make global. Replace varargs
with an "rtx_mode_t *".
(emit_library_call_value): Delete.
(emit_library_call): Likewise.
* asan.c (asan_emit_stack_protection): Update calls accordingly.
(asan_emit_allocas_unpoison): Likewise.
* builtins.c (expand_builtin_powi): Likewise.
(expand_asan_emit_allocas_unpoison): Likewise.
* cfgexpand.c (expand_main_function): Likewise.
* config/aarch64/aarch64.c (aarch64_trampoline_init): Likewise.
* config/aarch64/aarch64.h (PROFILE_HOOK): Likewise.
* config/alpha/alpha.c (alpha_trampoline_init): Likewise.
* config/arm/arm.c (arm_trampoline_init): Likewise.
(arm_call_tls_get_addr): Likewise.
(arm_expand_divmod_libfunc): Likewise.
* config/bfin/bfin.md (umulsi3_highpart): Likewise.
(smulsi3_highpart): Likewise.
* config/c6x/c6x.c (c6x_initialize_trampoline): Likewise.
(c6x_expand_compare): Likewise.
(c6x_expand_movmem): Likewise.
* config/frv/frv.c (frv_trampoline_init): Likewise.
* config/i386/i386.c (ix86_trampoline_init): Likewise.
(ix86_expand_divmod_libfunc): Likewise.
* config/ia64/ia64.c (ia64_expand_tls_address): Likewise.
(ia64_expand_compare): Likewise.
(ia64_profile_hook): Likewise.
* config/ia64/ia64.md (save_stack_nonlocal): Likewise.
(nonlocal_goto): Likewise.
(restore_stack_nonlocal): Likewise.
* config/m32r/m32r.c (block_move_call): Likewise.
(m32r_trampoline_init): Likewise.
* config/m68k/linux.h (FINALIZE_TRAMPOLINE): Likewise.
* config/m68k/m68k.c (m68k_call_tls_get_addr): Likewise.
(m68k_call_m68k_read_tp): Likewise.
* config/microblaze/microblaze.c (microblaze_call_tls_get_addr)
(microblaze_expand_divide): Likewise.
* config/mips/mips.h (mips_args): Likewise.
* config/mips/sdemtk.h (mips_sync_icache): Likewise.
(MIPS_ICACHE_SYNC): Likewise.
* config/nios2/nios2.c (nios2_emit_expensive_div): Likewise.
(nios2_trampoline_init): Likewise.
* config/pa/pa.c (hppa_tls_call): Likewise.
(pa_trampoline_init): Likewise.
* config/pa/pa.md (canonicalize_funcptr_for_compare): Likewise.
* config/powerpcspe/powerpcspe.c (rs6000_legitimize_tls_address)
(expand_strn_compare): Likewise.
(rs6000_generate_compare): Likewise.
(rs6000_expand_float128_convert): Likewise.
(output_profile_hook): Likewise.
(rs6000_trampoline_init): Likewise.
* config/powerpcspe/powerpcspe.md (neg<mode>2): Likewise.
* config/riscv/riscv.h (PROFILE_HOOK): Likewise.
* config/rs6000/rs6000-string.c (expand_strn_compare): Likewise.
* config/rs6000/rs6000.c (rs6000_legitimize_tls_address): Likewise.
(rs6000_generate_compare): Likewise.
(rs6000_expand_float128_convert): Likewise.
(output_profile_hook): Likewise.
(rs6000_trampoline_init): Likewise.
* config/rs6000/rs6000.md (neg<mode>2): Likewise.
* config/sh/sh.c (sh_trampoline_init): Likewise.
* config/sparc/sparc.c (emit_soft_tfmode_libcall): Likewise.
(sparc_emit_float_lib_cmp): Likewise.
(sparc32_initialize_trampoline): Likewise.
(sparc64_initialize_trampoline): Likewise.
(sparc_profile_hook): Likewise.
* config/spu/spu.c (ea_load_store): Likewise.
* config/spu/spu.md (floatunssidf2): Likewise.
* config/tilegx/tilegx.c (tilegx_trampoline_init): Likewise.
* config/tilepro/tilepro.c (tilepro_trampoline_init): Likewise.
* config/visium/visium.c (expand_block_move_4): Likewise.
(expand_block_move_2): Likewise.
(expand_block_move_1): Likewise.
(expand_block_set_4): Likewise.
(expand_block_set_2): Likewise.
(expand_block_set_1): Likewise.
(visium_trampoline_init): Likewise.
(visium_profile_hook): Likewise.
* config/xtensa/xtensa.c (xtensa_expand_nonlocal_goto): Likewise.
(xtensa_setup_frame_addresses): Likewise.
(xtensa_trampoline_init): Likewise.
* except.c (sjlj_emit_function_enter): Likewise.
(sjlj_emit_function_exit): Likewise.
* explow.c (allocate_dynamic_stack_space): Likewise.
(probe_stack_range): Likewise.
* expr.c (convert_mode_scalar): Likewise.
* optabs.c (expand_binop): Likewise.
(expand_twoval_binop_libfunc): Likewise.
(expand_unop): Likewise.
(prepare_cmp_insn): Likewise.
(prepare_float_lib_cmp): Likewise.
(expand_float): Likewise.
(expand_fix): Likewise.
(expand_fixed_convert): Likewise.
(maybe_emit_sync_lock_test_and_set): Likewise.
(expand_atomic_compare_and_swap): Likewise.
(expand_mem_thread_fence): Likewise.
(expand_atomic_fetch_op): Likewise.
From-SVN: r251637
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This patch uses opt_scalar_mode when iterating over scalar modes.
2017-08-30 Richard Sandiford <richard.sandiford@linaro.org>
Alan Hayward <alan.hayward@arm.com>
David Sherwood <david.sherwood@arm.com>
gcc/
* coretypes.h (opt_scalar_mode): New typedef.
* gdbhooks.py (build_pretty_printers): Handle it.
* machmode.h (mode_iterator::get_2xwider): Add overload for
opt_mode<T>.
* emit-rtl.c (init_emit_once): Use opt_scalar_mode when iterating
over scalar modes.
* expr.c (convert_mode_scalar): Likewise.
* omp-low.c (omp_clause_aligned_alignment): Likewise.
* optabs.c (expand_float): Likewise.
(expand_fix): Likewise.
* tree-vect-stmts.c (vectorizable_conversion): Likewise.
gcc/c-family/
* c-common.c (c_common_fixed_point_type_for_size): Use opt_scalar_mode
for the mode iterator.
Co-Authored-By: Alan Hayward <alan.hayward@arm.com>
Co-Authored-By: David Sherwood <david.sherwood@arm.com>
From-SVN: r251522
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This patch splits the final scalar-only part of convert_mode out
into its own subroutine and treats the modes as scalar_modes there.
2017-08-30 Richard Sandiford <richard.sandiford@linaro.org>
Alan Hayward <alan.hayward@arm.com>
David Sherwood <david.sherwood@arm.com>
gcc/
* expr.c (convert_mode): Split scalar handling out into...
(convert_mode_scalar): ...this new function. Treat the modes
as scalar_modes.
Co-Authored-By: Alan Hayward <alan.hayward@arm.com>
Co-Authored-By: David Sherwood <david.sherwood@arm.com>
From-SVN: r251520
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This patch adds a SCALAR_TYPE_MODE macro, along the same lines as
SCALAR_INT_TYPE_MODE and SCALAR_FLOAT_TYPE_MODE. It also adds
two instances of as_a <scalar_mode> to c_common_type, when converting
an unsigned fixed-point SCALAR_TYPE_MODE to the equivalent signed mode.
2017-08-30 Richard Sandiford <richard.sandiford@linaro.org>
Alan Hayward <alan.hayward@arm.com>
David Sherwood <david.sherwood@arm.com>
gcc/
* tree.h (SCALAR_TYPE_MODE): New macro.
* expr.c (expand_expr_addr_expr_1): Use it.
(expand_expr_real_2): Likewise.
* fold-const.c (fold_convert_const_fixed_from_fixed): Likeise.
(fold_convert_const_fixed_from_int): Likewise.
(fold_convert_const_fixed_from_real): Likewise.
(native_encode_fixed): Likewise
(native_encode_complex): Likewise
(native_encode_vector): Likewise.
(native_interpret_fixed): Likewise.
(native_interpret_real): Likewise.
(native_interpret_complex): Likewise.
(native_interpret_vector): Likewise.
* omp-simd-clone.c (simd_clone_adjust_return_type): Likewise.
(simd_clone_adjust_argument_types): Likewise.
(simd_clone_init_simd_arrays): Likewise.
(simd_clone_adjust): Likewise.
* stor-layout.c (layout_type): Likewise.
* tree.c (build_minus_one_cst): Likewise.
* tree-cfg.c (verify_gimple_assign_ternary): Likewise.
* tree-inline.c (estimate_move_cost): Likewise.
* tree-ssa-math-opts.c (convert_plusminus_to_widen): Likewise.
* tree-vect-loop.c (vect_create_epilog_for_reduction): Likewise.
(vectorizable_reduction): Likewise.
* tree-vect-patterns.c (vect_recog_widen_mult_pattern): Likewise.
(vect_recog_mixed_size_cond_pattern): Likewise.
(check_bool_pattern): Likewise.
(adjust_bool_pattern): Likewise.
(search_type_for_mask_1): Likewise.
* tree-vect-slp.c (vect_schedule_slp_instance): Likewise.
* tree-vect-stmts.c (vectorizable_conversion): Likewise.
(vectorizable_load): Likewise.
(vectorizable_store): Likewise.
* ubsan.c (ubsan_encode_value): Likewise.
* varasm.c (output_constant): Likewise.
gcc/c-family/
* c-lex.c (interpret_fixed): Use SCALAR_TYPE_MODE.
* c-common.c (c_build_vec_perm_expr): Likewise.
gcc/c/
* c-typeck.c (build_binary_op): Use SCALAR_TYPE_MODE.
(c_common_type): Likewise. Use as_a <scalar_mode> when setting
m1 and m2 to the signed equivalent of a fixed-point
SCALAR_TYPE_MODE.
gcc/cp/
* typeck.c (cp_build_binary_op): Use SCALAR_TYPE_MODE.
Co-Authored-By: Alan Hayward <alan.hayward@arm.com>
Co-Authored-By: David Sherwood <david.sherwood@arm.com>
From-SVN: r251516
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This patch adds a scalar_mode class that can hold any scalar mode,
specifically:
- scalar integers
- scalar floating-point values
- scalar fractional modes
- scalar accumulator modes
- pointer bounds modes
To start with this patch uses this type for GET_MODE_INNER.
Later patches add more uses.
2017-08-30 Richard Sandiford <richard.sandiford@linaro.org>
Alan Hayward <alan.hayward@arm.com>
David Sherwood <david.sherwood@arm.com>
gcc/
* coretypes.h (scalar_mode): New class.
* machmode.h (scalar_mode): Likewise.
(scalar_mode::includes_p): New function.
(mode_to_inner): Return a scalar_mode rather than a machine_mode.
* gdbhooks.py (build_pretty_printers): Handle scalar_mode.
* genmodes.c (get_mode_class): Handle remaining scalar modes.
* cfgexpand.c (expand_debug_expr): Use scalar_mode.
* expmed.c (store_bit_field_1): Likewise.
(extract_bit_field_1): Likewise.
* expr.c (write_complex_part): Likewise.
(read_complex_part): Likewise.
(emit_move_complex_push): Likewise.
(expand_expr_real_2): Likewise.
* function.c (assign_parm_setup_reg): Likewise.
(assign_parms_unsplit_complex): Likewise.
* optabs.c (expand_binop): Likewise.
* rtlanal.c (subreg_get_info): Likewise.
* simplify-rtx.c (simplify_immed_subreg): Likewise.
* varasm.c (output_constant_pool_2): Likewise.
Co-Authored-By: Alan Hayward <alan.hayward@arm.com>
Co-Authored-By: David Sherwood <david.sherwood@arm.com>
From-SVN: r251515
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This patch changes the types of various things from machine_mode
to scalar_int_mode, in cases where (after previous patches)
simply changing the type is enough on its own. The patch does
nothing other than that.
2017-08-30 Richard Sandiford <richard.sandiford@linaro.org>
Alan Hayward <alan.hayward@arm.com>
David Sherwood <david.sherwood@arm.com>
gcc/
* builtins.h (builtin_strncpy_read_str): Take a scalar_int_mode
instead of a machine_mode.
(builtin_memset_read_str): Likewise.
* builtins.c (c_readstr): Likewise.
(builtin_memcpy_read_str): Likewise.
(builtin_strncpy_read_str): Likewise.
(builtin_memset_read_str): Likewise.
(builtin_memset_gen_str): Likewise.
(expand_builtin_signbit): Use scalar_int_mode for local variables.
* cfgexpand.c (convert_debug_memory_address): Take a scalar_int_mode
instead of a machine_mode.
* combine.c (simplify_if_then_else): Use scalar_int_mode for local
variables.
(make_extraction): Likewise.
(try_widen_shift_mode): Take and return scalar_int_modes instead
of machine_modes.
* config/aarch64/aarch64.c (aarch64_libgcc_cmp_return_mode): Return
a scalar_int_mode instead of a machine_mode.
* config/avr/avr.c (avr_addr_space_address_mode): Likewise.
(avr_addr_space_pointer_mode): Likewise.
* config/cr16/cr16.c (cr16_unwind_word_mode): Likewise.
* config/msp430/msp430.c (msp430_addr_space_pointer_mode): Likewise.
(msp430_unwind_word_mode): Likewise.
* config/spu/spu.c (spu_unwind_word_mode): Likewise.
(spu_addr_space_pointer_mode): Likewise.
(spu_addr_space_address_mode): Likewise.
(spu_libgcc_cmp_return_mode): Likewise.
(spu_libgcc_shift_count_mode): Likewise.
* config/rl78/rl78.c (rl78_addr_space_address_mode): Likewise.
(rl78_addr_space_pointer_mode): Likewise.
(fl78_unwind_word_mode): Likewise.
(rl78_valid_pointer_mode): Take a scalar_int_mode instead of a
machine_mode.
* config/alpha/alpha.c (vms_valid_pointer_mode): Likewise.
* config/ia64/ia64.c (ia64_vms_valid_pointer_mode): Likewise.
* config/mips/mips.c (mips_mode_rep_extended): Likewise.
(mips_valid_pointer_mode): Likewise.
* config/tilegx/tilegx.c (tilegx_mode_rep_extended): Likewise.
* config/ft32/ft32.c (ft32_valid_pointer_mode): Likewise.
(ft32_addr_space_pointer_mode): Return a scalar_int_mode instead
of a machine_mode.
(ft32_addr_space_address_mode): Likewise.
* config/m32c/m32c.c (m32c_valid_pointer_mode): Take a
scalar_int_mode instead of a machine_mode.
(m32c_addr_space_pointer_mode): Return a scalar_int_mode instead
of a machine_mode.
(m32c_addr_space_address_mode): Likewise.
* config/powerpcspe/powerpcspe.c (rs6000_abi_word_mode): Likewise.
(rs6000_eh_return_filter_mode): Likewise.
* config/rs6000/rs6000.c (rs6000_abi_word_mode): Likewise.
(rs6000_eh_return_filter_mode): Likewise.
* config/s390/s390.c (s390_libgcc_cmp_return_mode): Likewise.
(s390_libgcc_shift_count_mode): Likewise.
(s390_unwind_word_mode): Likewise.
(s390_valid_pointer_mode): Take a scalar_int_mode rather than a
machine_mode.
* target.def (mode_rep_extended): Likewise.
(valid_pointer_mode): Likewise.
(addr_space.valid_pointer_mode): Likewise.
(eh_return_filter_mode): Return a scalar_int_mode rather than
a machine_mode.
(libgcc_cmp_return_mode): Likewise.
(libgcc_shift_count_mode): Likewise.
(unwind_word_mode): Likewise.
(addr_space.pointer_mode): Likewise.
(addr_space.address_mode): Likewise.
* doc/tm.texi: Regenerate.
* dojump.c (prefer_and_bit_test): Take a scalar_int_mode rather than
a machine_mode.
(do_jump): Use scalar_int_mode for local variables.
* dwarf2cfi.c (init_return_column_size): Take a scalar_int_mode
rather than a machine_mode.
* dwarf2out.c (convert_descriptor_to_mode): Likewise.
(scompare_loc_descriptor_wide): Likewise.
(scompare_loc_descriptor_narrow): Likewise.
* emit-rtl.c (adjust_address_1): Use scalar_int_mode for local
variables.
* except.c (sjlj_emit_dispatch_table): Likewise.
(expand_builtin_eh_copy_values): Likewise.
* explow.c (convert_memory_address_addr_space_1): Likewise.
Take a scalar_int_mode rather than a machine_mode.
(convert_memory_address_addr_space): Take a scalar_int_mode rather
than a machine_mode.
(memory_address_addr_space): Use scalar_int_mode for local variables.
* expmed.h (expand_mult_highpart_adjust): Take a scalar_int_mode
rather than a machine_mode.
* expmed.c (mask_rtx): Likewise.
(init_expmed_one_conv): Likewise.
(expand_mult_highpart_adjust): Likewise.
(extract_high_half): Likewise.
(expmed_mult_highpart_optab): Likewise.
(expmed_mult_highpart): Likewise.
(expand_smod_pow2): Likewise.
(expand_sdiv_pow2): Likewise.
(emit_store_flag_int): Likewise.
(adjust_bit_field_mem_for_reg): Use scalar_int_mode for local
variables.
(extract_low_bits): Likewise.
* expr.h (by_pieces_constfn): Take a scalar_int_mode rather than
a machine_mode.
* expr.c (pieces_addr::adjust): Likewise.
(can_store_by_pieces): Likewise.
(store_by_pieces): Likewise.
(clear_by_pieces_1): Likewise.
(expand_expr_addr_expr_1): Likewise.
(expand_expr_addr_expr): Use scalar_int_mode for local variables.
(expand_expr_real_1): Likewise.
(try_casesi): Likewise.
* final.c (shorten_branches): Likewise.
* fold-const.c (fold_convert_const_int_from_fixed): Change the
type of "mode" to machine_mode.
* internal-fn.c (expand_arith_overflow_result_store): Take a
scalar_int_mode rather than a machine_mode.
(expand_mul_overflow): Use scalar_int_mode for local variables.
* loop-doloop.c (doloop_modify): Likewise.
(doloop_optimize): Likewise.
* optabs.c (expand_subword_shift): Take a scalar_int_mode rather
than a machine_mode.
(expand_doubleword_shift_condmove): Likewise.
(expand_doubleword_shift): Likewise.
(expand_doubleword_clz): Likewise.
(expand_doubleword_popcount): Likewise.
(expand_doubleword_parity): Likewise.
(expand_absneg_bit): Use scalar_int_mode for local variables.
(prepare_float_lib_cmp): Likewise.
* rtl.h (convert_memory_address_addr_space_1): Take a scalar_int_mode
rather than a machine_mode.
(convert_memory_address_addr_space): Likewise.
(get_mode_bounds): Likewise.
(get_address_mode): Return a scalar_int_mode rather than a
machine_mode.
* rtlanal.c (get_address_mode): Likewise.
* stor-layout.c (get_mode_bounds): Take a scalar_int_mode rather
than a machine_mode.
* targhooks.c (default_mode_rep_extended): Likewise.
(default_valid_pointer_mode): Likewise.
(default_addr_space_valid_pointer_mode): Likewise.
(default_eh_return_filter_mode): Return a scalar_int_mode rather
than a machine_mode.
(default_libgcc_cmp_return_mode): Likewise.
(default_libgcc_shift_count_mode): Likewise.
(default_unwind_word_mode): Likewise.
(default_addr_space_pointer_mode): Likewise.
(default_addr_space_address_mode): Likewise.
* targhooks.h (default_eh_return_filter_mode): Likewise.
(default_libgcc_cmp_return_mode): Likewise.
(default_libgcc_shift_count_mode): Likewise.
(default_unwind_word_mode): Likewise.
(default_addr_space_pointer_mode): Likewise.
(default_addr_space_address_mode): Likewise.
(default_mode_rep_extended): Take a scalar_int_mode rather than
a machine_mode.
(default_valid_pointer_mode): Likewise.
(default_addr_space_valid_pointer_mode): Likewise.
* tree-ssa-address.c (addr_for_mem_ref): Use scalar_int_mode for
local variables.
* tree-ssa-loop-ivopts.c (get_shiftadd_cost): Take a scalar_int_mode
rather than a machine_mode.
* tree-switch-conversion.c (array_value_type): Use scalar_int_mode
for local variables.
* tree-vrp.c (simplify_float_conversion_using_ranges): Likewise.
* var-tracking.c (use_narrower_mode): Take a scalar_int_mode rather
than a machine_mode.
Co-Authored-By: Alan Hayward <alan.hayward@arm.com>
Co-Authored-By: David Sherwood <david.sherwood@arm.com>
From-SVN: r251513
|
|
This patch rewrites the condition:
if (tmode != address_mode && tmode != pointer_mode)
tmode = address_mode;
to the equivalent:
tmode == pointer_mode ? pointer_mode : address_mode
The latter has the advantage that the result is naturally
a scalar_int_mode; a later mechanical patch makes it one.
2017-08-30 Richard Sandiford <richard.sandiford@linaro.org>
Alan Hayward <alan.hayward@arm.com>
David Sherwood <david.sherwood@arm.com>
gcc/
* expr.c (expand_expr_addr_expr): Add a new_tmode local variable
that is always either address_mode or pointer_mode.
Co-Authored-By: Alan Hayward <alan.hayward@arm.com>
Co-Authored-By: David Sherwood <david.sherwood@arm.com>
From-SVN: r251509
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This patch adjusts a couple of cases in which we had established
that two modes were equal and happened to be using the one with the
more general type instead of the one with the more specific type.
2017-08-30 Richard Sandiford <richard.sandiford@linaro.org>
Alan Hayward <alan.hayward@arm.com>
David Sherwood <david.sherwood@arm.com>
gcc/
* expr.c (expand_expr_real_2): Use word_mode instead of innermode
when the two are known to be equal.
Co-Authored-By: Alan Hayward <alan.hayward@arm.com>
Co-Authored-By: David Sherwood <david.sherwood@arm.com>
From-SVN: r251508
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The caller of const_scalar_mask_from_tree has proven that
the mode is a MODE_INT, so this patch passes it down as a
scalar_int_mode. It also expands the comment a little.
2017-08-30 Richard Sandiford <richard.sandiford@linaro.org>
Alan Hayward <alan.hayward@arm.com>
David Sherwood <david.sherwood@arm.com>
gcc/
* expr.c (const_scalar_mask_from_tree): Add a mode argument.
Expand commentary.
(expand_expr_real_1): Update call accordingly.
Co-Authored-By: Alan Hayward <alan.hayward@arm.com>
Co-Authored-By: David Sherwood <david.sherwood@arm.com>
From-SVN: r251505
|
