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From-SVN: r255746
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This patch adds a helper routine that constructs rtxes
for constant shift amounts, given the mode of the value
being shifted. As well as helping with the SVE patches, this
is one step towards allowing CONST_INTs to have a real mode.
One long-standing problem has been to decide what the mode
of a shift count should be for arbitrary rtxes (as opposed to those
directly tied to a target pattern). Realistic choices would be
the mode of the shifted elements, word_mode, QImode, or the same
mode as the shift optabs (in which case what should the mode
be when the target doesn't have a pattern?)
For now the patch picks the mode of the shifted elements,
but with a ??? comment.
2017-11-06 Richard Sandiford <richard.sandiford@linaro.org>
Alan Hayward <alan.hayward@arm.com>
David Sherwood <david.sherwood@arm.com>
gcc/
* emit-rtl.h (gen_int_shift_amount): Declare.
* emit-rtl.c (gen_int_shift_amount): New function.
* asan.c (asan_emit_stack_protection): Use gen_int_shift_amount
instead of GEN_INT.
* calls.c (shift_return_value): Likewise.
* cse.c (fold_rtx): Likewise.
* dse.c (find_shift_sequence): Likewise.
* expmed.c (init_expmed_one_mode, store_bit_field_1, expand_shift_1)
(expand_shift, expand_smod_pow2): Likewise.
* lower-subreg.c (shift_cost): Likewise.
* optabs.c (expand_superword_shift, expand_doubleword_mult)
(expand_unop, expand_binop, shift_amt_for_vec_perm_mask)
(expand_vec_perm_var): Likewise.
* simplify-rtx.c (simplify_unary_operation_1): Likewise.
(simplify_binary_operation_1): Likewise.
* combine.c (try_combine, find_split_point, force_int_to_mode)
(simplify_shift_const_1, simplify_shift_const): Likewise.
(change_zero_ext): Likewise. Use simplify_gen_binary.
Co-Authored-By: Alan Hayward <alan.hayward@arm.com>
Co-Authored-By: David Sherwood <david.sherwood@arm.com>
From-SVN: r255745
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PR middle-end/78468
* emit-rtl.c (init_emit): Remove ??? comment.
* explow.c (get_dynamic_stack_size): Take known alignment of stack
pointer + STACK_DYNAMIC_OFFSET into account in lieu of STACK_BOUNDARY.
* config/sparc/sparc.h (INIT_EXPANDERS): In 32-bit mode, lower the
alignment of 3 virtual registers to BITS_PER_WORD.
* config/sparc/sparc.c (sparc_compute_frame_size): Simplify.
Co-Authored-By: Dominik Vogt <vogt@linux.vnet.ibm.com>
From-SVN: r255616
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This patch removes unused RTL functions, introduces alternate ones for
use in a later SFN patch, and regroups other related functions so that
they appear in a more consistent order.
for gcc/ChangeLog
* emit-rtl.c (next_nondebug_insn, prev_nondebug_insn): Reorder.
(next_nonnote_nondebug_insn, prev_nonnote_nondebug_insn): Reorder.
(next_nonnote_nondebug_insn_bb): New.
(prev_nonnote_nondebug_insn_bb): New.
(prev_nonnote_insn_bb, next_nonnote_insn_bb): Remove.
* rtl.h (prev_nonnote_insn_bb, next_nonnote_insn_bb): Remove decls.
(prev_nonnote_nondebug_insn_bb): Declare.
(next_nonnote_nondebug_insn_bb): Declare.
* cfgbuild.c (find_bb_boundaries): Adjust to skip debug insns.
* cfgrtl.c (get_last_bb_insn): Likewise.
* lra.c (push_insns): Likewise.
From-SVN: r255564
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This patch fixes a regression caused by r251469, where I'd incorrectly
converted a call to mode_for_size that sometimes needs MODE_PARTIAL_INTs.
2017-11-22 Richard Sandiford <richard.sandiford@linaro.org>
gcc/
* emit-rtl.c (init_derived_machine_modes): Make sure ptr_mode
has the same mode class as Pmode.
From-SVN: r255057
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The recent gen_vec_duplicate patches used CONST_VECTOR for all
constants, but the documentation says:
@findex const_vector
@item (const_vector:@var{m} [@var{x0} @var{x1} @dots{}])
Represents a vector constant. The square brackets stand for the vector
containing the constant elements. @var{x0}, @var{x1} and so on are
the @code{const_int}, @code{const_double} or @code{const_fixed} elements.
Both the AArch32 and AArch64 ports relied on the elements having
this form and would ICE if the element was something like a CONST
instead. This showed up as a failure in vect-126.c for both arm-eabi
and aarch64-elf (but not aarch64-linux-gnu, which is what the series
was tested on).
The two obvious options were to redefine CONST_VECTOR to accept all
constants or make gen_vec_duplicate honour the existing documentation.
It looks like other code also assumes that integer CONST_VECTORs contain
CONST_INTs, so the patch does the latter.
I deliberately didn't add an assert to gen_const_vec_duplicate
because it looks like the SPU port *does* expect to be able to create
CONST_VECTORs of symbolic constants.
Also, I think the list above should include const_wide_int for vectors
of TImode and wider.
The new routine takes a mode for consistency with the generators,
and because I think it does make sense to accept all constants for
variable-length:
(const (vec_duplicate ...))
rather than have some rtxes for which we instead use:
(vec_duplicate (const ...))
2017-11-09 Richard Sandiford <richard.sandiford@linaro.org>
gcc/
* doc/rtl.texi (const_vector): Say that elements can be
const_wide_ints too.
* emit-rtl.h (valid_for_const_vec_duplicate_p): Declare.
* emit-rtl.c (valid_for_const_vec_duplicate_p): New function.
(gen_vec_duplicate): Use it instead of CONSTANT_P.
* optabs.c (expand_vector_broadcast): Likewise.
From-SVN: r254586
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Originally subregs operated at the word level and subreg offsets
were measured in words. The offset units were later changed from
words to bytes (SUBREG_WORD became SUBREG_BYTE), but the fundamental
assumption that subregs should operate at the word level remained.
Whether (subreg:M1 (reg:M2 R2) N) is well-formed depended on the
way that M1 and M2 partitioned into words and whether the subword
part of N represented a lowpart. However, some questions depended
instead on the macro REGMODE_NATURAL_SIZE, which was introduced
as part of the patch that moved from SUBREG_WORD to SUBREG_BYTE.
It is used to decide whether setting (subreg:M1 (reg:M2 R2) N)
clobbers all of R2 or just part of it (df_read_modify_subreg).
Using words doesn't really make sense for modern vector
architectures. Vector registers are usually bigger than
a word and:
(a) setting the scalar lowpart of them usually clobbers the
rest of the register (contrary to the subreg rules,
where only the containing words should be clobbered).
(b) high words of vector registers are often not independently
addressable, even though that's what the subreg rules expect.
This patch therefore uses REGMODE_NATURAL_SIZE instead of
UNITS_PER_WORD to determine the size of the independently
addressable blocks in an inner register.
This is needed for SVE because the number of words in a vector
mode isn't known at compile time, so isn't a sensible basis
for calculating the number of registers.
The only existing port to define REGMODE_NATURAL_SIZE is
64-bit SPARC, where FP registers are 32 bits. (This is the
opposite of the use case for SVE, since the natural division
is smaller than a word.) I compiled the testsuite before and
after the patch for sparc64-linux-gnu and the only test whose
assembly changed was g++.dg/debug/pr65678.C, where the order
of two independent stores was reversed and where a different
register was picked for one pseudo. The new code was
otherwise equivalent to the old code.
2017-11-09 Richard Sandiford <richard.sandiford@linaro.org>
Alan Hayward <alan.hayward@arm.com>
David Sherwood <david.sherwood@arm.com>
gcc/
* doc/rtl.texi: Rewrite the subreg rules so that they partition
the inner register into REGMODE_NATURAL_SIZE bytes rather than
UNITS_PER_WORD bytes.
* emit-rtl.c (validate_subreg): Divide subregs into blocks
based on REGMODE_NATURAL_SIZE of the inner mode.
(gen_lowpart_common): Split the SCALAR_FLOAT_MODE_P and
!SCALAR_FLOAT_MODE_P cases. Use REGMODE_NATURAL_SIZE for the latter.
* expmed.c (lowpart_bit_field_p): Divide the value up into
chunks of REGMODE_NATURAL_SIZE rather than UNITS_PER_WORD.
* expr.c (store_constructor): Use REGMODE_NATURAL_SIZE to test
whether something is likely to occupy more than one register.
Co-Authored-By: Alan Hayward <alan.hayward@arm.com>
Co-Authored-By: David Sherwood <david.sherwood@arm.com>
From-SVN: r254583
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2017-11-09 Martin Liska <mliska@suse.cz>
PR target/82863
* emit-rtl.c (init_emit_regs): Initialize split_branch_probability to
uninitialized.
2017-11-09 Martin Liska <mliska@suse.cz>
PR target/82863
* gcc.dg/pr82863.c: New test.
From-SVN: r254574
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This patch adds an rtl representation of a vector linear series
of the form:
a[I] = BASE + I * STEP
Like vec_duplicate;
- the new rtx can be used for both constant and non-constant vectors
- when used for constant vectors it is wrapped in a (const ...)
- the constant form is only used for variable-length vectors;
fixed-length vectors still use CONST_VECTOR
At the moment the code is restricted to integer elements, to avoid
concerns over floating-point rounding.
2017-11-01 Richard Sandiford <richard.sandiford@linaro.org>
Alan Hayward <alan.hayward@arm.com>
David Sherwood <david.sherwood@arm.com>
gcc/
* doc/rtl.texi (vec_series): Document.
(const): Say that the operand can be a vec_series.
* rtl.def (VEC_SERIES): New rtx code.
* rtl.h (const_vec_series_p_1): Declare.
(const_vec_series_p): New function.
* emit-rtl.h (gen_const_vec_series): Declare.
(gen_vec_series): Likewise.
* emit-rtl.c (const_vec_series_p_1, gen_const_vec_series)
(gen_vec_series): Likewise.
* optabs.c (expand_mult_highpart): Use gen_const_vec_series.
* simplify-rtx.c (simplify_unary_operation): Handle negations
of vector series.
(simplify_binary_operation_series): New function.
(simplify_binary_operation_1): Use it. Handle VEC_SERIES.
(test_vector_ops_series): New function.
(test_vector_ops): Call it.
* config/powerpcspe/altivec.md (altivec_lvsl): Use
gen_const_vec_series.
(altivec_lvsr): Likewise.
* config/rs6000/altivec.md (altivec_lvsl, altivec_lvsr): Likewise.
Co-Authored-By: Alan Hayward <alan.hayward@arm.com>
Co-Authored-By: David Sherwood <david.sherwood@arm.com>
From-SVN: r254297
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This patch allows (const ...) wrappers to be used for rtx vector
constants, as an alternative to const_vector. This is useful
for SVE, where the number of elements isn't known until runtime.
It could also be useful in future for fixed-length vectors, to
reduce the amount of memory needed to represent simple constants
with high element counts. However, one nice thing about keeping
it restricted to variable-length vectors is that there is never
any need to handle combinations of (const ...) and CONST_VECTOR.
2017-11-01 Richard Sandiford <richard.sandiford@linaro.org>
Alan Hayward <alan.hayward@arm.com>
David Sherwood <david.sherwood@arm.com>
gcc/
* doc/rtl.texi (const): Update description of address constants.
Say that vector constants are allowed too.
* common.md (E, F): Use CONSTANT_P instead of checking for
CONST_VECTOR.
* emit-rtl.c (gen_lowpart_common): Use const_vec_p instead of
checking for CONST_VECTOR.
* expmed.c (make_tree): Use build_vector_from_val for a CONST
VEC_DUPLICATE.
* expr.c (expand_expr_real_2): Check for vector modes instead
of checking for CONST_VECTOR.
* rtl.h (const_vec_p): New function.
(const_vec_duplicate_p): Check for a CONST VEC_DUPLICATE.
(unwrap_const_vec_duplicate): Handle them here too.
Co-Authored-By: Alan Hayward <alan.hayward@arm.com>
Co-Authored-By: David Sherwood <david.sherwood@arm.com>
From-SVN: r254296
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This patch adds helper functions for generating constant and
non-constant vector duplicates. These routines help with SVE because
it is then easier to use:
(const:M (vec_duplicate:M X))
for a broadcast of X, even if the number of elements in M isn't known
at compile time. It also makes it easier for general rtx code to treat
constant and non-constant duplicates in the same way.
In the target code, the patch uses gen_vec_duplicate instead of
gen_rtx_VEC_DUPLICATE if handling constants correctly is potentially
useful. It might be that some or all of the call sites only handle
non-constants in practice, in which case the change is a harmless
no-op (and a saving of a few characters).
Otherwise, the target changes use gen_const_vec_duplicate instead
of gen_rtx_CONST_VECTOR if the constant is obviously a duplicate.
They also include some changes to use CONSTxx_RTX for easy global
constants.
2017-11-01 Richard Sandiford <richard.sandiford@linaro.org>
Alan Hayward <alan.hayward@arm.com>
David Sherwood <david.sherwood@arm.com>
gcc/
* emit-rtl.h (gen_const_vec_duplicate): Declare.
(gen_vec_duplicate): Likewise.
* emit-rtl.c (gen_const_vec_duplicate_1): New function, split
out from...
(gen_const_vector): ...here.
(gen_const_vec_duplicate, gen_vec_duplicate): New functions.
(gen_rtx_CONST_VECTOR): Use gen_const_vec_duplicate for constants
whose elements are all equal.
* optabs.c (expand_vector_broadcast): Use gen_const_vec_duplicate.
* simplify-rtx.c (simplify_const_unary_operation): Likewise.
(simplify_relational_operation): Likewise.
* config/aarch64/aarch64.c (aarch64_simd_gen_const_vector_dup):
Likewise.
(aarch64_simd_dup_constant): Use gen_vec_duplicate.
(aarch64_expand_vector_init): Likewise.
* config/arm/arm.c (neon_vdup_constant): Likewise.
(neon_expand_vector_init): Likewise.
(arm_expand_vec_perm): Use gen_const_vec_duplicate.
(arm_block_set_unaligned_vect): Likewise.
(arm_block_set_aligned_vect): Likewise.
* config/arm/neon.md (neon_copysignf<mode>): Likewise.
* config/i386/i386.c (ix86_expand_vec_perm): Likewise.
(expand_vec_perm_even_odd_pack): Likewise.
(ix86_vector_duplicate_value): Use gen_vec_duplicate.
* config/i386/sse.md (one_cmpl<mode>2): Use CONSTM1_RTX.
* config/ia64/ia64.c (ia64_expand_vecint_compare): Use
gen_const_vec_duplicate.
* config/ia64/vect.md (addv2sf3, subv2sf3): Use CONST1_RTX.
* config/mips/mips.c (mips_gen_const_int_vector): Use
gen_const_vec_duplicate.
(mips_expand_vector_init): Use CONST0_RTX.
* config/powerpcspe/altivec.md (abs<mode>2, nabs<mode>2): Likewise.
(define_split): Use gen_const_vec_duplicate.
* config/rs6000/altivec.md (abs<mode>2, nabs<mode>2): Use CONST0_RTX.
(define_split): Use gen_const_vec_duplicate.
* config/s390/vx-builtins.md (vec_genmask<mode>): Likewise.
(vec_ctd_s64, vec_ctd_u64, vec_ctsl, vec_ctul): Likewise.
* config/spu/spu.c (spu_const): Likewise.
Co-Authored-By: Alan Hayward <alan.hayward@arm.com>
Co-Authored-By: David Sherwood <david.sherwood@arm.com>
From-SVN: r254292
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https://software.intel.com/sites/default/files/managed/4d/2a/control-flow-enforcement-technology-preview.pdf
A proposal is to introduce a target independent flag
-fcf-protection=[none|branch|return|full] with a semantic to
instrument a code to control validness or integrity of control-flow
transfers using jump and call instructions. The main goal is to detect
and block a possible malware execution through transfer the execution
to unknown target address. Implementation could be either software or
target based. Any target platforms can provide their implementation
for instrumentation under this option.
The compiler should instrument any control-flow transfer points in a
program (ex. call/jmp/ret) as well as any landing pads, which are
targets of control-flow transfers.
A new 'nocf_check' attribute is introduced to provide hand tuning
support. The attribute directs the compiler to skip a call to a
function and a function's landing pad from instrumentation. The
attribute can be used for function and pointer to function types,
otherwise it will be ignored.
Currently all platforms except i386 will report the error and do no
instrumentation. i386 will provide the implementation based on a
specification published by Intel for a new technology called
Control-flow Enforcement Technology (CET).
gcc/c-family/
* c-attribs.c (handle_nocf_check_attribute): New function.
(c_common_attribute_table): Add 'nocf_check' handling.
gcc/c/
* gimple-parser.c: Add second argument NULL to
gimple_build_call_from_tree.
gcc/
* attrib.c (comp_type_attributes): Check nocf_check attribute.
* cfgexpand.c (expand_call_stmt): Set REG_CALL_NOCF_CHECK for
call insn.
* combine.c (distribute_notes): Add REG_CALL_NOCF_CHECK handling.
* common.opt: Add fcf-protection flag.
* emit-rtl.c (try_split): Add REG_CALL_NOCF_CHECK handling.
* flag-types.h: Add enum cf_protection_level.
* gimple.c (gimple_build_call_from_tree): Add second parameter.
Add 'nocf_check' attribute propagation to gimple call.
* gimple.h (gf_mask): Add GF_CALL_NOCF_CHECK.
(gimple_build_call_from_tree): Update prototype.
(gimple_call_nocf_check_p): New function.
(gimple_call_set_nocf_check): Likewise.
* gimplify.c: Add second argument to gimple_build_call_from_tree.
* ipa-icf.c: Add nocf_check attribute in statement hash.
* recog.c (peep2_attempt): Add REG_CALL_NOCF_CHECK handling.
* reg-notes.def: Add REG_NOTE (CALL_NOCF_CHECK).
* toplev.c (process_options): Add flag_cf_protection handling.
From-SVN: r253936
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This also seemed like a good opportunity to reverse the sense of the
hook to "can", to avoid the awkward double negative in !CANNOT.
2017-09-15 Richard Sandiford <richard.sandiford@linaro.org>
Alan Hayard <alan.hayward@arm.com>
David Sherwood <david.sherwood@arm.com>
gcc/
* target.def (can_change_mode_class): New hook.
(mode_rep_extended): Refer to it instead of CANNOT_CHANGE_MODE_CLASS.
(hard_regno_nregs): Likewise.
* hooks.h (hook_bool_mode_mode_reg_class_t_true): Declare.
* hooks.c (hook_bool_mode_mode_reg_class_t_true): New function.
* doc/tm.texi.in (CANNOT_CHANGE_MODE_CLASS): Replace with...
(TARGET_CAN_CHANGE_MODE_CLASS): ...this.
(LOAD_EXTEND_OP): Update accordingly.
* doc/tm.texi: Regenerate.
* doc/rtl.texi: Refer to TARGET_CAN_CHANGE_MODE_CLASS instead of
CANNOT_CHANGE_MODE_CLASS.
* hard-reg-set.h (REG_CANNOT_CHANGE_MODE_P): Replace with...
(REG_CAN_CHANGE_MODE_P): ...this new macro.
* combine.c (simplify_set): Update accordingly.
* emit-rtl.c (validate_subreg): Likewise.
* recog.c (general_operand): Likewise.
* regcprop.c (mode_change_ok): Likewise.
* reload1.c (choose_reload_regs): Likewise.
(inherit_piecemeal_p): Likewise.
* rtlanal.c (simplify_subreg_regno): Likewise.
* postreload.c (reload_cse_simplify_set): Use REG_CAN_CHANGE_MODE_P
instead of CANNOT_CHANGE_MODE_CLASS.
(reload_cse_simplify_operands): Likewise.
* reload.c (push_reload): Use targetm.can_change_mode_class
instead of CANNOT_CHANGE_MODE_CLASS.
(push_reload): Likewise. Also use REG_CAN_CHANGE_MODE_P instead of
REG_CANNOT_CHANGE_MODE_P.
* config/alpha/alpha.h (CANNOT_CHANGE_MODE_CLASS): Delete.
* config/alpha/alpha.c (alpha_can_change_mode_class): New function.
(TARGET_CAN_CHANGE_MODE_CLASS): Redefine.
* config/arm/arm.h (CANNOT_CHANGE_MODE_CLASS): Delete.
* config/arm/arm.c (TARGET_CAN_CHANGE_MODE_CLASS): Redefine.
(arm_can_change_mode_class): New function.
* config/arm/neon.md: Refer to TARGET_CAN_CHANGE_MODE_CLASS rather
than CANNOT_CHANGE_MODE_CLASS in comments.
* config/i386/i386.h (CANNOT_CHANGE_MODE_CLASS): Delete.
* config/i386/i386-protos.h (ix86_cannot_change_mode_class): Delete.
* config/i386/i386.c (ix86_cannot_change_mode_class): Replace with...
(ix86_can_change_mode_class): ...this new function, inverting the
sense of the return value.
(TARGET_CAN_CHANGE_MODE_CLASS): Redefine.
* config/ia64/ia64.h (CANNOT_CHANGE_MODE_CLASS): Delete.
* config/ia64/ia64.c (TARGET_CAN_CHANGE_MODE_CLASS): Redefine.
(ia64_can_change_mode_class): New function.
* config/m32c/m32c.h (CANNOT_CHANGE_MODE_CLASS): Delete.
* config/m32c/m32c-protos.h (m32c_cannot_change_mode_class): Delete.
* config/m32c/m32c.c (m32c_cannot_change_mode_class): Replace with...
(m32c_can_change_mode_class): ...this new function, inverting the
sense of the return value.
(TARGET_CAN_CHANGE_MODE_CLASS): Redefine.
* config/mips/mips.h (CANNOT_CHANGE_MODE_CLASS): Delete.
* config/mips/mips-protos.h (mips_cannot_change_mode_class): Delete.
* config/mips/mips.c (mips_cannot_change_mode_class): Replace with...
(mips_can_change_mode_class): ...this new function, inverting the
sense of the return value.
(TARGET_CAN_CHANGE_MODE_CLASS): Redefine.
* config/msp430/msp430.h (CANNOT_CHANGE_MODE_CLASS): Delete.
* config/msp430/msp430.c (TARGET_CAN_CHANGE_MODE_CLASS): Redefine.
(msp430_can_change_mode_class): New function.
* config/nvptx/nvptx.h (CANNOT_CHANGE_MODE_CLASS): Delete.
* config/nvptx/nvptx.c (nvptx_can_change_mode_class): New function.
(TARGET_CAN_CHANGE_MODE_CLASS): Redefine.
* config/pa/pa32-regs.h (CANNOT_CHANGE_MODE_CLASS): Delete.
* config/pa/pa64-regs.h (CANNOT_CHANGE_MODE_CLASS): Delete.
* config/pa/pa-protos.h (pa_cannot_change_mode_class): Delete.
* config/pa/pa.c (TARGET_CAN_CHANGE_MODE_CLASS): Redefine.
(pa_cannot_change_mode_class): Replace with...
(pa_can_change_mode_class): ...this new function, inverting the
sense of the return value.
(pa_modes_tieable_p): Refer to TARGET_CAN_CHANGE_MODE_CLASS rather
than CANNOT_CHANGE_MODE_CLASS in comments.
* config/pdp11/pdp11.h (CANNOT_CHANGE_MODE_CLASS): Delete.
* config/pdp11/pdp11-protos.h (pdp11_cannot_change_mode_class): Delete.
* config/pdp11/pdp11.c (TARGET_CAN_CHANGE_MODE_CLASS): Redefine.
(pdp11_cannot_change_mode_class): Replace with...
(pdp11_can_change_mode_class): ...this new function, inverting the
sense of the return value.
* config/powerpcspe/powerpcspe.h (CANNOT_CHANGE_MODE_CLASS): Delete.
* config/powerpcspe/powerpcspe-protos.h
(rs6000_cannot_change_mode_class_ptr): Delete.
* config/powerpcspe/powerpcspe.c
(rs6000_cannot_change_mode_class_ptr): Delete.
(TARGET_CAN_CHANGE_MODE_CLASS): Redefine.
(rs6000_option_override_internal): Assign to
targetm.can_change_mode_class instead of
rs6000_cannot_change_mode_class_ptr.
(rs6000_cannot_change_mode_class): Replace with...
(rs6000_can_change_mode_class): ...this new function, inverting the
sense of the return value.
(rs6000_debug_cannot_change_mode_class): Replace with...
(rs6000_debug_can_change_mode_class): ...this new function.
* config/riscv/riscv.h (CANNOT_CHANGE_MODE_CLASS): Delete.
* config/riscv/riscv.c (riscv_can_change_mode_class): New function.
(TARGET_CAN_CHANGE_MODE_CLASS): Redefine.
* config/rs6000/rs6000.h (CANNOT_CHANGE_MODE_CLASS): Delete.
* config/rs6000/rs6000-protos.h (rs6000_cannot_change_mode_class_ptr):
Delete.
* config/rs6000/rs6000.c (rs6000_cannot_change_mode_class_ptr): Delete.
(TARGET_CAN_CHANGE_MODE_CLASS): Redefine.
(rs6000_option_override_internal): Assign to
targetm.can_change_mode_class instead of
rs6000_cannot_change_mode_class_ptr.
(rs6000_cannot_change_mode_class): Replace with...
(rs6000_can_change_mode_class): ...this new function, inverting the
sense of the return value.
(rs6000_debug_cannot_change_mode_class): Replace with...
(rs6000_debug_can_change_mode_class): ...this new function.
* config/s390/s390.h (CANNOT_CHANGE_MODE_CLASS): Delete.
* config/s390/s390-protos.h (s390_cannot_change_mode_class): Delete.
* config/s390/s390.c (s390_cannot_change_mode_class): Replace with...
(s390_can_change_mode_class): ...this new function, inverting the
sense of the return value.
(TARGET_CAN_CHANGE_MODE_CLASS): Redefine.
* config/sh/sh.h (CANNOT_CHANGE_MODE_CLASS): Delete.
* config/sh/sh-protos.h (sh_cannot_change_mode_class): Delete.
* config/sh/sh.c (TARGET_CAN_CHANGE_MODE_CLASS): Redefine.
(sh_cannot_change_mode_class): Replace with...
(sh_can_change_mode_class): ...this new function, inverting the
sense of the return value.
* config/sparc/sparc.h (CANNOT_CHANGE_MODE_CLASS): Delete.
* config/sparc/sparc.c (TARGET_CAN_CHANGE_MODE_CLASS): Redefine.
(sparc_can_change_mode_class): New function.
* config/spu/spu.h (CANNOT_CHANGE_MODE_CLASS): Delete.
* config/spu/spu.c (spu_can_change_mode_class): New function.
(TARGET_CAN_CHANGE_MODE_CLASS): Redefine.
* config/visium/visium.h (CANNOT_CHANGE_MODE_CLASS): Delete.
* config/visium/visium.c (TARGET_CAN_CHANGE_MODE_CLASS): Redefine.
(visium_can_change_mode_class): New function.
* system.h (CANNOT_CHANGE_MODE_CLASS): Poison.
Co-Authored-By: Alan Hayward <alan.hayward@arm.com>
Co-Authored-By: David Sherwood <david.sherwood@arm.com>
From-SVN: r252816
|
|
This patch converts hard_regno_nregs into an inline function, which
in turn allows hard_regno_nregs to be used as the name of a targetm
field. This is just a mechanical change.
2017-09-12 Richard Sandiford <richard.sandiford@linaro.org>
gcc/
* regs.h (hard_regno_nregs): Turn into a function.
(end_hard_regno): Update accordingly.
* caller-save.c (setup_save_areas): Likewise.
(save_call_clobbered_regs): Likewise.
(replace_reg_with_saved_mem): Likewise.
(insert_restore): Likewise.
(insert_save): Likewise.
* combine.c (can_change_dest_mode): Likewise.
(move_deaths): Likewise.
(distribute_notes): Likewise.
* config/mips/mips.c (mips_hard_regno_call_part_clobbered): Likewise.
* config/powerpcspe/powerpcspe.c (rs6000_cannot_change_mode_class)
(rs6000_split_multireg_move): Likewise.
(rs6000_register_move_cost): Likewise.
(rs6000_memory_move_cost): Likewise.
* config/rs6000/rs6000.c (rs6000_cannot_change_mode_class): Likewise.
(rs6000_split_multireg_move): Likewise.
(rs6000_register_move_cost): Likewise.
(rs6000_memory_move_cost): Likewise.
* cselib.c (cselib_reset_table): Likewise.
(cselib_lookup_1): Likewise.
* emit-rtl.c (set_mode_and_regno): Likewise.
* function.c (aggregate_value_p): Likewise.
* ira-color.c (setup_profitable_hard_regs): Likewise.
(check_hard_reg_p): Likewise.
(calculate_saved_nregs): Likewise.
(assign_hard_reg): Likewise.
(improve_allocation): Likewise.
(calculate_spill_cost): Likewise.
* ira-emit.c (modify_move_list): Likewise.
* ira-int.h (ira_hard_reg_set_intersection_p): Likewise.
(ira_hard_reg_in_set_p): Likewise.
* ira.c (setup_reg_mode_hard_regset): Likewise.
(clarify_prohibited_class_mode_regs): Likewise.
(check_allocation): Likewise.
* lra-assigns.c (find_hard_regno_for_1): Likewise.
(lra_setup_reg_renumber): Likewise.
(setup_try_hard_regno_pseudos): Likewise.
(spill_for): Likewise.
(assign_hard_regno): Likewise.
(setup_live_pseudos_and_spill_after_risky_transforms): Likewise.
* lra-constraints.c (in_class_p): Likewise.
(lra_constraint_offset): Likewise.
(simplify_operand_subreg): Likewise.
(lra_constraints): Likewise.
(split_reg): Likewise.
(split_if_necessary): Likewise.
(invariant_p): Likewise.
(inherit_in_ebb): Likewise.
* lra-lives.c (process_bb_lives): Likewise.
* lra-remat.c (reg_overlap_for_remat_p): Likewise.
(get_hard_regs): Likewise.
(do_remat): Likewise.
* lra-spills.c (assign_spill_hard_regs): Likewise.
* mode-switching.c (create_pre_exit): Likewise.
* postreload.c (reload_combine_recognize_pattern): Likewise.
* recog.c (peep2_find_free_register): Likewise.
* regcprop.c (kill_value_regno): Likewise.
(set_value_regno): Likewise.
(copy_value): Likewise.
(maybe_mode_change): Likewise.
(find_oldest_value_reg): Likewise.
(copyprop_hardreg_forward_1): Likewise.
* regrename.c (check_new_reg_p): Likewise.
(regrename_do_replace): Likewise.
* reload.c (push_reload): Likewise.
(combine_reloads): Likewise.
(find_dummy_reload): Likewise.
(operands_match_p): Likewise.
(find_reloads): Likewise.
(find_equiv_reg): Likewise.
(reload_adjust_reg_for_mode): Likewise.
* reload1.c (count_pseudo): Likewise.
(count_spilled_pseudo): Likewise.
(find_reg): Likewise.
(clear_reload_reg_in_use): Likewise.
(free_for_value_p): Likewise.
(allocate_reload_reg): Likewise.
(choose_reload_regs): Likewise.
(reload_adjust_reg_for_temp): Likewise.
(emit_reload_insns): Likewise.
(delete_output_reload): Likewise.
* rtlanal.c (subreg_get_info): Likewise.
* sched-deps.c (sched_analyze_reg): Likewise.
* sel-sched.c (init_regs_for_mode): Likewise.
(mark_unavailable_hard_regs): Likewise.
(choose_best_reg_1): Likewise.
(verify_target_availability): Likewise.
* valtrack.c (dead_debug_insert_temp): Likewise.
* var-tracking.c (track_loc_p): Likewise.
(emit_note_insn_var_location): Likewise.
* varasm.c (make_decl_rtl): Likewise.
* reginfo.c (choose_hard_reg_mode): Likewise.
(init_reg_modes_target): Refer directly to
this_target_regs->x_hard_regno_nregs.
From-SVN: r252014
|
|
This patch converts more places that could use int_mode_for_size instead
of mode_for_size. This is in preparation for an upcoming patch that
makes mode_for_size itself return an opt_mode.
require () seems like the right choice in expand_builtin_powi
because we have got past the point of backing out. We go on to do:
op1 = expand_expr (arg1, NULL_RTX, mode2, EXPAND_NORMAL);
if (GET_MODE (op1) != mode2)
op1 = convert_to_mode (mode2, op1, 0);
which would be invalid for (and have failed for) BLKmode.
In get_builtin_sync_mode and expand_ifn_atomic_compare_exchange,
the possible bitsizes are {8, 16, 32, 64, 128}, all of which give
target-independent integer modes (up to TImode). The comment above
the call in get_builtin_sync_mode makes clear that an integer mode
must be found.
We can use require () in expand_builtin_atomic_clear and
expand_builtin_atomic_test_and_set because there's always an integer
mode for the boolean type. The same goes for the POINTER_SIZE request
in layout_type. Similarly we can use require () in combine_instructions
and gen_lowpart_common because there's always an integer mode for
HOST_BITS_PER_WIDE_INT (DImode when BITS_PER_UNIT == 8), and
HOST_BITS_PER_DOUBLE_INT (TImode).
The calls in aarch64_function_value, arm_function_value,
aapcs_allocate_return_reg and mips_function_value_1 are handling
cases in which a big-endian target passes or returns values at
the most significant end of a register. In each case the ABI
constrains the size to a small amount and does not handle
non-power-of-2 sizes wider than a word.
The calls in c6x_expand_movmem, i386.c:emit_memset,
lm32_block_move_inline, microblaze_block_move_straight and
mips_block_move_straight are dealing with expansions of
block memory operations using register-wise operations,
and those registers must have non-BLK mode.
The reason for using require () in ix86_expand_sse_cmp,
mips_expand_ins_as_unaligned_store, spu.c:adjust_operand and
spu_emit_branch_and_set is that we go on to emit non-call
instructions that use registers of that mode, which wouldn't
be valid for BLKmode.
2017-09-05 Richard Sandiford <richard.sandiford@linaro.org>
gcc/
* builtins.c (expand_builtin_powi): Use int_mode_for_size.
(get_builtin_sync_mode): Likewise.
(expand_ifn_atomic_compare_exchange): Likewise.
(expand_builtin_atomic_clear): Likewise.
(expand_builtin_atomic_test_and_set): Likewise.
(fold_builtin_atomic_always_lock_free): Likewise.
* calls.c (compute_argument_addresses): Likewise.
(emit_library_call_value_1): Likewise.
(store_one_arg): Likewise.
* combine.c (combine_instructions): Likewise.
* config/aarch64/aarch64.c (aarch64_function_value): Likewise.
* config/arm/arm.c (arm_function_value): Likewise.
(aapcs_allocate_return_reg): Likewise.
* config/c6x/c6x.c (c6x_expand_movmem): Likewise.
* config/i386/i386.c (construct_container): Likewise.
(ix86_gimplify_va_arg): Likewise.
(ix86_expand_sse_cmp): Likewise.
(emit_memmov): Likewise.
(emit_memset): Likewise.
(expand_small_movmem_or_setmem): Likewise.
(ix86_expand_pextr): Likewise.
(ix86_expand_pinsr): Likewise.
* config/lm32/lm32.c (lm32_block_move_inline): Likewise.
* config/microblaze/microblaze.c (microblaze_block_move_straight):
Likewise.
* config/mips/mips.c (mips_function_value_1) Likewise.
(mips_block_move_straight): Likewise.
(mips_expand_ins_as_unaligned_store): Likewise.
* config/powerpcspe/powerpcspe.c
(rs6000_darwin64_record_arg_advance_flush): Likewise.
(rs6000_darwin64_record_arg_flush): Likewise.
* config/rs6000/rs6000.c
(rs6000_darwin64_record_arg_advance_flush): Likewise.
(rs6000_darwin64_record_arg_flush): Likewise.
* config/sparc/sparc.c (sparc_function_arg_1): Likewise.
(sparc_function_value_1): Likewise.
* config/spu/spu.c (adjust_operand): Likewise.
(spu_emit_branch_or_set): Likewise.
(arith_immediate_p): Likewise.
* emit-rtl.c (gen_lowpart_common): Likewise.
* expr.c (expand_expr_real_1): Likewise.
* function.c (assign_parm_setup_block): Likewise.
* gimple-ssa-store-merging.c (encode_tree_to_bitpos): Likewise.
* reload1.c (alter_reg): Likewise.
* stor-layout.c (mode_for_vector): Likewise.
(layout_type): Likewise.
gcc/ada/
* gcc-interface/utils2.c (build_load_modify_store):
Use int_mode_for_size.
From-SVN: r251726
|
|
This patch adds routines for converting a SUBREG_BYTE offset into a
memory address offset. The two only differ for paradoxical subregs,
where SUBREG_BYTE is always 0 but the memory address offset can be
negative.
2017-09-04 Richard Sandiford <richard.sandiford@linaro.org>
Alan Hayward <alan.hayward@arm.com>
David Sherwood <david.sherwood@arm.com>
gcc/
* rtl.h (subreg_memory_offset): Declare.
* emit-rtl.c (subreg_memory_offset): New function.
* expmed.c (store_bit_field_1): Use it.
* expr.c (undefined_operand_subword_p): Likewise.
* simplify-rtx.c (simplify_subreg): Likewise.
Co-Authored-By: Alan Hayward <alan.hayward@arm.com>
Co-Authored-By: David Sherwood <david.sherwood@arm.com>
From-SVN: r251644
|
|
This patch uses opt_scalar_mode when iterating over scalar modes.
2017-08-30 Richard Sandiford <richard.sandiford@linaro.org>
Alan Hayward <alan.hayward@arm.com>
David Sherwood <david.sherwood@arm.com>
gcc/
* coretypes.h (opt_scalar_mode): New typedef.
* gdbhooks.py (build_pretty_printers): Handle it.
* machmode.h (mode_iterator::get_2xwider): Add overload for
opt_mode<T>.
* emit-rtl.c (init_emit_once): Use opt_scalar_mode when iterating
over scalar modes.
* expr.c (convert_mode_scalar): Likewise.
* omp-low.c (omp_clause_aligned_alignment): Likewise.
* optabs.c (expand_float): Likewise.
(expand_fix): Likewise.
* tree-vect-stmts.c (vectorizable_conversion): Likewise.
gcc/c-family/
* c-common.c (c_common_fixed_point_type_for_size): Use opt_scalar_mode
for the mode iterator.
Co-Authored-By: Alan Hayward <alan.hayward@arm.com>
Co-Authored-By: David Sherwood <david.sherwood@arm.com>
From-SVN: r251522
|
|
This patch treats the mode associated with an integer constant as a
scalar_mode. We can't use the more natural-sounding scalar_int_mode
because we also use (const_int 0) for bounds-checking modes. (It might
be worth adding a bounds-specific code instead, but that's for another
day.)
This exposes a latent bug in simplify_immed_subreg, which for
vectors of CONST_WIDE_INTs would pass the vector mode rather than
the element mode to rtx_mode_t.
I think the:
/* We can get a 0 for an error mark. */
|| GET_MODE_CLASS (mode) == MODE_VECTOR_INT
|| GET_MODE_CLASS (mode) == MODE_VECTOR_FLOAT
in immed_double_const is dead. trunc_int_mode (via gen_int_mode)
would go on to ICE if the mode fitted in a HWI, and surely plenty
of other code would be confused to see a const_int be interpreted
as a vector. We should instead be using CONST0_RTX (mode) if we
need a safe constant for a particular mode.
We didn't try to make these functions take scalar_mode arguments
because in many cases that would be too invasive at this stage.
Maybe it would become feasible in future. Also, the long-term
direction should probably be to add modes to constant integers
rather than have then as VOIDmode odd-ones-out. That would remove
the need for rtx_mode_t and thus remove the question whether they
should use scalar_int_mode, scalar_mode or machine_mode.
The patch also uses scalar_mode for the CONST_DOUBLE handling
in loc_descriptor. In that case the mode can legitimately be
either floating-point or integral.
2017-08-30 Richard Sandiford <richard.sandiford@linaro.org>
Alan Hayward <alan.hayward@arm.com>
David Sherwood <david.sherwood@arm.com>
gcc/
* emit-rtl.c (immed_double_const): Use is_a <scalar_mode> instead
of separate mode class checks. Do not allow vector modes here.
(immed_wide_int_const): Use as_a <scalar_mode>.
* explow.c (trunc_int_for_mode): Likewise.
* rtl.h (wi::int_traits<rtx_mode_t>::get_precision): Likewise.
(wi::shwi): Likewise.
(wi::min_value): Likewise.
(wi::max_value): Likewise.
* dwarf2out.c (loc_descriptor): Likewise.
* simplify-rtx.c (simplify_immed_subreg): Fix rtx_mode_t argument
for CONST_WIDE_INT.
Co-Authored-By: Alan Hayward <alan.hayward@arm.com>
Co-Authored-By: David Sherwood <david.sherwood@arm.com>
From-SVN: r251517
|
|
This patch changes the types of various things from machine_mode
to scalar_int_mode, in cases where (after previous patches)
simply changing the type is enough on its own. The patch does
nothing other than that.
2017-08-30 Richard Sandiford <richard.sandiford@linaro.org>
Alan Hayward <alan.hayward@arm.com>
David Sherwood <david.sherwood@arm.com>
gcc/
* builtins.h (builtin_strncpy_read_str): Take a scalar_int_mode
instead of a machine_mode.
(builtin_memset_read_str): Likewise.
* builtins.c (c_readstr): Likewise.
(builtin_memcpy_read_str): Likewise.
(builtin_strncpy_read_str): Likewise.
(builtin_memset_read_str): Likewise.
(builtin_memset_gen_str): Likewise.
(expand_builtin_signbit): Use scalar_int_mode for local variables.
* cfgexpand.c (convert_debug_memory_address): Take a scalar_int_mode
instead of a machine_mode.
* combine.c (simplify_if_then_else): Use scalar_int_mode for local
variables.
(make_extraction): Likewise.
(try_widen_shift_mode): Take and return scalar_int_modes instead
of machine_modes.
* config/aarch64/aarch64.c (aarch64_libgcc_cmp_return_mode): Return
a scalar_int_mode instead of a machine_mode.
* config/avr/avr.c (avr_addr_space_address_mode): Likewise.
(avr_addr_space_pointer_mode): Likewise.
* config/cr16/cr16.c (cr16_unwind_word_mode): Likewise.
* config/msp430/msp430.c (msp430_addr_space_pointer_mode): Likewise.
(msp430_unwind_word_mode): Likewise.
* config/spu/spu.c (spu_unwind_word_mode): Likewise.
(spu_addr_space_pointer_mode): Likewise.
(spu_addr_space_address_mode): Likewise.
(spu_libgcc_cmp_return_mode): Likewise.
(spu_libgcc_shift_count_mode): Likewise.
* config/rl78/rl78.c (rl78_addr_space_address_mode): Likewise.
(rl78_addr_space_pointer_mode): Likewise.
(fl78_unwind_word_mode): Likewise.
(rl78_valid_pointer_mode): Take a scalar_int_mode instead of a
machine_mode.
* config/alpha/alpha.c (vms_valid_pointer_mode): Likewise.
* config/ia64/ia64.c (ia64_vms_valid_pointer_mode): Likewise.
* config/mips/mips.c (mips_mode_rep_extended): Likewise.
(mips_valid_pointer_mode): Likewise.
* config/tilegx/tilegx.c (tilegx_mode_rep_extended): Likewise.
* config/ft32/ft32.c (ft32_valid_pointer_mode): Likewise.
(ft32_addr_space_pointer_mode): Return a scalar_int_mode instead
of a machine_mode.
(ft32_addr_space_address_mode): Likewise.
* config/m32c/m32c.c (m32c_valid_pointer_mode): Take a
scalar_int_mode instead of a machine_mode.
(m32c_addr_space_pointer_mode): Return a scalar_int_mode instead
of a machine_mode.
(m32c_addr_space_address_mode): Likewise.
* config/powerpcspe/powerpcspe.c (rs6000_abi_word_mode): Likewise.
(rs6000_eh_return_filter_mode): Likewise.
* config/rs6000/rs6000.c (rs6000_abi_word_mode): Likewise.
(rs6000_eh_return_filter_mode): Likewise.
* config/s390/s390.c (s390_libgcc_cmp_return_mode): Likewise.
(s390_libgcc_shift_count_mode): Likewise.
(s390_unwind_word_mode): Likewise.
(s390_valid_pointer_mode): Take a scalar_int_mode rather than a
machine_mode.
* target.def (mode_rep_extended): Likewise.
(valid_pointer_mode): Likewise.
(addr_space.valid_pointer_mode): Likewise.
(eh_return_filter_mode): Return a scalar_int_mode rather than
a machine_mode.
(libgcc_cmp_return_mode): Likewise.
(libgcc_shift_count_mode): Likewise.
(unwind_word_mode): Likewise.
(addr_space.pointer_mode): Likewise.
(addr_space.address_mode): Likewise.
* doc/tm.texi: Regenerate.
* dojump.c (prefer_and_bit_test): Take a scalar_int_mode rather than
a machine_mode.
(do_jump): Use scalar_int_mode for local variables.
* dwarf2cfi.c (init_return_column_size): Take a scalar_int_mode
rather than a machine_mode.
* dwarf2out.c (convert_descriptor_to_mode): Likewise.
(scompare_loc_descriptor_wide): Likewise.
(scompare_loc_descriptor_narrow): Likewise.
* emit-rtl.c (adjust_address_1): Use scalar_int_mode for local
variables.
* except.c (sjlj_emit_dispatch_table): Likewise.
(expand_builtin_eh_copy_values): Likewise.
* explow.c (convert_memory_address_addr_space_1): Likewise.
Take a scalar_int_mode rather than a machine_mode.
(convert_memory_address_addr_space): Take a scalar_int_mode rather
than a machine_mode.
(memory_address_addr_space): Use scalar_int_mode for local variables.
* expmed.h (expand_mult_highpart_adjust): Take a scalar_int_mode
rather than a machine_mode.
* expmed.c (mask_rtx): Likewise.
(init_expmed_one_conv): Likewise.
(expand_mult_highpart_adjust): Likewise.
(extract_high_half): Likewise.
(expmed_mult_highpart_optab): Likewise.
(expmed_mult_highpart): Likewise.
(expand_smod_pow2): Likewise.
(expand_sdiv_pow2): Likewise.
(emit_store_flag_int): Likewise.
(adjust_bit_field_mem_for_reg): Use scalar_int_mode for local
variables.
(extract_low_bits): Likewise.
* expr.h (by_pieces_constfn): Take a scalar_int_mode rather than
a machine_mode.
* expr.c (pieces_addr::adjust): Likewise.
(can_store_by_pieces): Likewise.
(store_by_pieces): Likewise.
(clear_by_pieces_1): Likewise.
(expand_expr_addr_expr_1): Likewise.
(expand_expr_addr_expr): Use scalar_int_mode for local variables.
(expand_expr_real_1): Likewise.
(try_casesi): Likewise.
* final.c (shorten_branches): Likewise.
* fold-const.c (fold_convert_const_int_from_fixed): Change the
type of "mode" to machine_mode.
* internal-fn.c (expand_arith_overflow_result_store): Take a
scalar_int_mode rather than a machine_mode.
(expand_mul_overflow): Use scalar_int_mode for local variables.
* loop-doloop.c (doloop_modify): Likewise.
(doloop_optimize): Likewise.
* optabs.c (expand_subword_shift): Take a scalar_int_mode rather
than a machine_mode.
(expand_doubleword_shift_condmove): Likewise.
(expand_doubleword_shift): Likewise.
(expand_doubleword_clz): Likewise.
(expand_doubleword_popcount): Likewise.
(expand_doubleword_parity): Likewise.
(expand_absneg_bit): Use scalar_int_mode for local variables.
(prepare_float_lib_cmp): Likewise.
* rtl.h (convert_memory_address_addr_space_1): Take a scalar_int_mode
rather than a machine_mode.
(convert_memory_address_addr_space): Likewise.
(get_mode_bounds): Likewise.
(get_address_mode): Return a scalar_int_mode rather than a
machine_mode.
* rtlanal.c (get_address_mode): Likewise.
* stor-layout.c (get_mode_bounds): Take a scalar_int_mode rather
than a machine_mode.
* targhooks.c (default_mode_rep_extended): Likewise.
(default_valid_pointer_mode): Likewise.
(default_addr_space_valid_pointer_mode): Likewise.
(default_eh_return_filter_mode): Return a scalar_int_mode rather
than a machine_mode.
(default_libgcc_cmp_return_mode): Likewise.
(default_libgcc_shift_count_mode): Likewise.
(default_unwind_word_mode): Likewise.
(default_addr_space_pointer_mode): Likewise.
(default_addr_space_address_mode): Likewise.
* targhooks.h (default_eh_return_filter_mode): Likewise.
(default_libgcc_cmp_return_mode): Likewise.
(default_libgcc_shift_count_mode): Likewise.
(default_unwind_word_mode): Likewise.
(default_addr_space_pointer_mode): Likewise.
(default_addr_space_address_mode): Likewise.
(default_mode_rep_extended): Take a scalar_int_mode rather than
a machine_mode.
(default_valid_pointer_mode): Likewise.
(default_addr_space_valid_pointer_mode): Likewise.
* tree-ssa-address.c (addr_for_mem_ref): Use scalar_int_mode for
local variables.
* tree-ssa-loop-ivopts.c (get_shiftadd_cost): Take a scalar_int_mode
rather than a machine_mode.
* tree-switch-conversion.c (array_value_type): Use scalar_int_mode
for local variables.
* tree-vrp.c (simplify_float_conversion_using_ranges): Likewise.
* var-tracking.c (use_narrower_mode): Take a scalar_int_mode rather
than a machine_mode.
Co-Authored-By: Alan Hayward <alan.hayward@arm.com>
Co-Authored-By: David Sherwood <david.sherwood@arm.com>
From-SVN: r251513
|
|
This patch adds is_a <scalar_int_mode> checks to various places
that were explicitly or implicitly restricted to integers already,
in cases where adding an explicit is_a <scalar_int_mode> is useful
for later patches.
In simplify_if_then_else, the:
GET_MODE (XEXP (XEXP (t, 0), N))
expressions were equivalent to:
GET_MODE (XEXP (t, 0))
due to the type of operation.
2017-08-30 Richard Sandiford <richard.sandiford@linaro.org>
Alan Hayward <alan.hayward@arm.com>
David Sherwood <david.sherwood@arm.com>
gcc/
* combine.c (sign_extend_short_imm): Add is_a <scalar_int_mode>
checks.
(try_combine): Likewise.
(simplify_if_then_else): Likewise.
* cse.c (cse_insn): Likewise.
* dwarf2out.c (mem_loc_descriptor): Likewise.
* emit-rtl.c (gen_lowpart_common): Likewise.
* simplify-rtx.c (simplify_truncation): Likewise.
(simplify_binary_operation_1): Likewise.
(simplify_const_relational_operation): Likewise.
(simplify_ternary_operation): Likewise.
* tree-ssa-loop-ivopts.c (force_expr_to_var_cost): Likewise.
Co-Authored-By: Alan Hayward <alan.hayward@arm.com>
Co-Authored-By: David Sherwood <david.sherwood@arm.com>
From-SVN: r251480
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|
This patch adds a wrapper around mode_for_size for cases in which
the mode class is MODE_INT (the commonest case). The return type
can then be an opt_scalar_int_mode instead of a machine_mode.
2017-08-30 Richard Sandiford <richard.sandiford@linaro.org>
Alan Hayward <alan.hayward@arm.com>
David Sherwood <david.sherwood@arm.com>
gcc/
* machmode.h (int_mode_for_size): New function.
* builtins.c (set_builtin_user_assembler_name): Use int_mode_for_size
instead of mode_for_size.
* calls.c (save_fixed_argument_area): Likewise. Make use of BLKmode
explicit.
* combine.c (expand_field_assignment): Use int_mode_for_size
instead of mode_for_size.
(make_extraction): Likewise.
(simplify_shift_const_1): Likewise.
(simplify_comparison): Likewise.
* dojump.c (do_jump): Likewise.
* dwarf2out.c (mem_loc_descriptor): Likewise.
* emit-rtl.c (init_derived_machine_modes): Likewise.
* expmed.c (flip_storage_order): Likewise.
(convert_extracted_bit_field): Likewise.
* expr.c (copy_blkmode_from_reg): Likewise.
* graphite-isl-ast-to-gimple.c (max_mode_int_precision): Likewise.
* internal-fn.c (expand_mul_overflow): Likewise.
* lower-subreg.c (simple_move): Likewise.
* optabs-libfuncs.c (init_optabs): Likewise.
* simplify-rtx.c (simplify_unary_operation_1): Likewise.
* tree.c (vector_type_mode): Likewise.
* tree-ssa-strlen.c (handle_builtin_memcmp): Likewise.
* tree-vect-data-refs.c (vect_lanes_optab_supported_p): Likewise.
* tree-vect-generic.c (expand_vector_parallel): Likewise.
* tree-vect-stmts.c (vectorizable_load): Likewise.
(vectorizable_store): Likewise.
gcc/ada/
* gcc-interface/decl.c (gnat_to_gnu_entity): Use int_mode_for_size
instead of mode_for_size.
(gnat_to_gnu_subprog_type): Likewise.
* gcc-interface/utils.c (make_type_from_size): Likewise.
Co-Authored-By: Alan Hayward <alan.hayward@arm.com>
Co-Authored-By: David Sherwood <david.sherwood@arm.com>
From-SVN: r251469
|
|
Similar to the previous scalar_float_mode patch, but for modes that
satisfy SCALAR_INT_MODE_P. There are very many uses of scalar integers,
so this patch only makes a token change to the types of byte_mode,
word_mode, ptr_mode and rs6000_pmode. The next patches in the series
gradually replace more uses.
The patch also removes and adds casts to some target-specific code
due to the new types of SImode, DImode and Pmode.
The as_a <scalar_int_mode> goes away in a later patch.
2017-08-30 Richard Sandiford <richard.sandiford@linaro.org>
Alan Hayward <alan.hayward@arm.com>
David Sherwood <david.sherwood@arm.com>
gcc/
* config/powerpcspe/powerpcspe.h (rs6000_pmode): Change type from
machine_mode to scalar_int_mode.
* config/powerpcspe/powerpcspe.c (rs6000_pmode): Likewise.
(rs6000_option_override_internal): Remove cast to int.
* config/rs6000/rs6000.h (rs6000_pmode): Change type from
machine_mode to scalar_int_mode.
* config/rs6000/rs6000.c (rs6000_pmode): Likewise.
(rs6000_option_override_internal): Remove cast to int.
* config/s390/s390.h (Pmode): Remove cast to machine_mode.
* config/epiphany/epiphany.h (RTX_OK_FOR_OFFSET_P): Add cast
to machine_mode.
* config/s390/s390.c (s390_expand_builtin): Likewise.
* coretypes.h (scalar_int_mode): New type.
(opt_scalar_int_mode): New typedef.
* machmode.h (scalar_int_mode): New class.
(scalar_int_mode::includes_p): New function.
(byte_mode): Change type to scalar_int_mode.
(word_mode): Likewise.
(ptr_mode): Likewise.
* emit-rtl.c (byte_mode): Likewise.
(word_mode): Likewise.
(ptr_mode): Likewise.
(init_derived_machine_modes): Update accordingly.
* genmodes.c (get_mode_class): Return scalar_int_mode for MODE_INT
and MODE_PARTIAL_INT.
* gdbhooks.py (build_pretty_printer): Handle scalar_int_mode and
opt_scalar_int_mode.
Co-Authored-By: Alan Hayward <alan.hayward@arm.com>
Co-Authored-By: David Sherwood <david.sherwood@arm.com>
From-SVN: r251467
|
|
This provides a type-safe way to ask for a float mode and get it as a
scalar_float_mode.
2017-08-30 Richard Sandiford <richard.sandiford@linaro.org>
Alan Hayward <alan.hayward@arm.com>
David Sherwood <david.sherwood@arm.com>
gcc/
* coretypes.h (opt_scalar_float_mode): New typedef.
* machmode.h (float_mode_for_size): New function.
* emit-rtl.c (double_mode): Delete.
(init_emit_once): Use float_mode_for_size.
* stor-layout.c (layout_type): Likewise.
* gdbhooks.py (build_pretty_printer): Handle opt_scalar_float_mode.
Co-Authored-By: Alan Hayward <alan.hayward@arm.com>
Co-Authored-By: David Sherwood <david.sherwood@arm.com>
From-SVN: r251463
|
|
The new iterators are:
- FOR_EACH_MODE_IN_CLASS: iterate over all the modes in a mode class.
- FOR_EACH_MODE_FROM: iterate over all the modes in a class,
starting at a given mode.
- FOR_EACH_WIDER_MODE: iterate over all the modes in a class,
starting at the next widest mode after a given mode.
- FOR_EACH_2XWIDER_MODE: same, but considering only modes that
are two times wider than the previous mode.
- FOR_EACH_MODE_UNTIL: iterate over all the modes in a class until
a given mode is reached.
- FOR_EACH_MODE: iterate over all the modes in a class between
two given modes, inclusive of the first but not the second.
These help with the stronger type checking added by later patches,
since every new mode will be in the same class as the previous one.
2017-08-30 Richard Sandiford <richard.sandiford@linaro.org>
Alan Hayward <alan.hayward@arm.com>
David Sherwood <david.sherwood@arm.com>
gcc/
* machmode.h (mode_traits): New structure.
(get_narrowest_mode): New function.
(mode_iterator::start): Likewise.
(mode_iterator::iterate_p): Likewise.
(mode_iterator::get_wider): Likewise.
(mode_iterator::get_known_wider): Likewise.
(mode_iterator::get_2xwider): Likewise.
(FOR_EACH_MODE_IN_CLASS): New mode iterator.
(FOR_EACH_MODE): Likewise.
(FOR_EACH_MODE_FROM): Likewise.
(FOR_EACH_MODE_UNTIL): Likewise.
(FOR_EACH_WIDER_MODE): Likewise.
(FOR_EACH_2XWIDER_MODE): Likewise.
* builtins.c (expand_builtin_strlen): Use new mode iterators.
* combine.c (simplify_comparison): Likewise
* config/i386/i386.c (type_natural_mode): Likewise.
* cse.c (cse_insn): Likewise.
* dse.c (find_shift_sequence): Likewise.
* emit-rtl.c (init_derived_machine_modes): Likewise.
(init_emit_once): Likewise.
* explow.c (hard_function_value): Likewise.
* expmed.c (extract_fixed_bit_field_1): Likewise.
(extract_bit_field_1): Likewise.
(expand_divmod): Likewise.
(emit_store_flag_1): Likewise.
* expr.c (init_expr_target): Likewise.
(convert_move): Likewise.
(alignment_for_piecewise_move): Likewise.
(widest_int_mode_for_size): Likewise.
(emit_block_move_via_movmem): Likewise.
(copy_blkmode_to_reg): Likewise.
(set_storage_via_setmem): Likewise.
(compress_float_constant): Likewise.
* omp-low.c (omp_clause_aligned_alignment): Likewise.
* optabs-query.c (get_best_extraction_insn): Likewise.
* optabs.c (expand_binop): Likewise.
(expand_twoval_unop): Likewise.
(expand_twoval_binop): Likewise.
(widen_leading): Likewise.
(widen_bswap): Likewise.
(expand_parity): Likewise.
(expand_unop): Likewise.
(prepare_cmp_insn): Likewise.
(prepare_float_lib_cmp): Likewise.
(expand_float): Likewise.
(expand_fix): Likewise.
(expand_sfix_optab): Likewise.
* postreload.c (move2add_use_add2_insn): Likewise.
* reg-stack.c (reg_to_stack): Likewise.
* reginfo.c (choose_hard_reg_mode): Likewise.
* rtlanal.c (init_num_sign_bit_copies_in_rep): Likewise.
* stor-layout.c (mode_for_size): Likewise.
(smallest_mode_for_size): Likewise.
(mode_for_vector): Likewise.
(finish_bitfield_representative): Likewise.
* tree-ssa-math-opts.c (target_supports_divmod_p): Likewise.
* tree-vect-generic.c (type_for_widest_vector_mode): Likewise.
* tree-vect-stmts.c (vectorizable_conversion): Likewise.
* var-tracking.c (prepare_call_arguments): Likewise.
gcc/ada/
* gcc-interface/misc.c (fp_prec_to_size): Use new mode iterators.
(fp_size_to_prec): Likewise.
gcc/c-family/
* c-common.c (c_common_fixed_point_type_for_size): Use new mode
iterators.
* c-cppbuiltin.c (c_cpp_builtins): Likewise.
Co-Authored-By: Alan Hayward <alan.hayward@arm.com>
Co-Authored-By: David Sherwood <david.sherwood@arm.com>
From-SVN: r251455
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|
This patch makes more use of the existing paradoxical_subreg_p
predicate and also adds a version that operates on outer and
inner modes.
Some of the affected tests were based on GET_MODE_SIZE rather than
GET_MODE_PRECISION and so the patch could change the result for modes
that have the same size but different precisions. I think in each
case the change should be a no-op or more correct, since a mode with
precision N bits can't be expected to hold all of a mode with precision
M>N bits.
The patch changes the branch taken in simplify_subreg for modes with
equal precision, but the new form matches the commentary more closely.
Both branches should be equally good in that situation.
2017-08-22 Richard Sandiford <richard.sandiford@linaro.org>
Alan Hayward <alan.hayward@arm.com>
David Sherwood <david.sherwood@arm.com>
gcc/
* rtl.h (paradoxical_subreg_p): Define inline, and add a version
that takes the outer and inner modes.
* doc/rtl.texi: Use paradoxical_subreg_p instead of a GET_MODE_SIZE
comparison as the canonical test for a paradoxical subreg.
* combine.c (simplify_set): Use paradoxical_subreg_p.
(make_extraction): Likewise.
(force_to_mode): Likewise.
(rtx_equal_for_field_assignment_p): Likewise.
(gen_lowpart_for_combine): Likewise.
(simplify_comparison): Likewise.
* cse.c (equiv_constant): Likewise.
* expmed.c (store_bit_field_1): Likewise.
* final.c (alter_subreg): Likewise.
* fwprop.c (propagate_rtx): Likewise.
(forward_propagate_subreg): Likewise.
* ira-conflicts.c (ira_build_conflicts): Likewise.
* lower-subreg.c (simplify_gen_subreg_concatn): Likewise.
* lra-constraints.c (curr_insn_transform): Likewise.
(split_reg): Likewise.
* lra-eliminations.c (move_plus_up): Likewise.
(lra_eliminate_regs_1): Likewise.
* recog.c (general_operand): Likewise.
* ree.c (combine_reaching_defs): Likewise.
* reload.c (push_reload): Likewise.
(find_reloads): Likewise.
* reload1.c (elimination_effects): Likewise.
(compute_reload_subreg_offset): Likewise.
(choose_reload_regs): Likewise.
* rtlanal.c (subreg_lsb_1): Likewise.
* simplify-rtx.c (simplify_unary_operation_1): Likewise.
(simplify_subreg): Likewise.
* var-tracking.c (track_loc_p): Likewise.
* emit-rtl.c (byte_lowpart_offset): Likewise.
(paradoxical_subreg_p): Delete out-of-line definition.
Co-Authored-By: Alan Hayward <alan.hayward@arm.com>
Co-Authored-By: David Sherwood <david.sherwood@arm.com>
From-SVN: r251282
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|
gcc/ChangeLog:
2017-07-28 Trevor Saunders <tbsaunde+gcc@tbsaunde.org>
* emit-rtl.c (gen_raw_REG): Adjust.
* gengenrtl.c (gendef): Likewise.
* rtl.c (rtx_alloc_stat): Remove _stat from name.
* rtl.h (rtx_alloc): Remove macro.
From-SVN: r250707
|
|
functions.
* profile-count.h (profile_probability::from_reg_br_prob_note,
profile_probability::to_reg_br_prob_note): New functions.
* doc/rtl.texi (REG_BR_PROB_NOTE): Update documentation.
* reg-notes.h (REG_BR_PROB, REG_BR_PRED): Update docs.
* predict.c (probability_reliable_p): Update.
(edge_probability_reliable_p): Update.
(br_prob_note_reliable_p): Update.
(invert_br_probabilities): Update.
(add_reg_br_prob_note): New function.
(combine_predictions_for_insn): Update.
* asan.c (asan_clear_shadow): Update.
* cfgbuild.c (compute_outgoing_frequencies): Update.
* cfgrtl.c (force_nonfallthru_and_redirect): Update.
(update_br_prob_note): Update.
(rtl_verify_edges): Update.
(purge_dead_edges): Update.
(fixup_reorder_chain): Update.
* emit-rtl.c (try_split): Update.
* ifcvt.c (cond_exec_process_insns): Update.
(cond_exec_process_if_block): Update.
(dead_or_predicable): Update.
* internal-fn.c (expand_addsub_overflow): Update.
(expand_neg_overflow): Update.
(expand_mul_overflow): Update.
* loop-doloop.c (doloop_modify): Update.
* loop-unroll.c (compare_and_jump_seq): Update.
* optabs.c (emit_cmp_and_jump_insn_1): Update.
* predict.h: Update.
* reorg.c (mostly_true_jump): Update.
* rtl.h: Update.
* config/aarch64/aarch64.c (aarch64_emit_unlikely_jump): Update.
* config/alpha/alpha.c (emit_unlikely_jump): Update.
* config/arc/arc.c: (emit_unlikely_jump): Update.
* config/arm/arm.c: (emit_unlikely_jump): Update.
* config/bfin/bfin.c (cbranch_predicted_taken_p): Update.
* config/frv/frv.c (frv_print_operand_jump_hint): Update.
* config/i386/i386.c (ix86_expand_split_stack_prologue): Update.
(ix86_print_operand): Update.
(ix86_split_fp_branch): Update.
(predict_jump): Update.
* config/ia64/ia64.c (ia64_print_operand): Update.
* config/mmix/mmix.c (mmix_print_operand): Update.
* config/powerpcspe/powerpcspe.c (output_cbranch): Update.
(rs6000_expand_split_stack_prologue): Update.
* config/rs6000/rs6000.c: Update.
* config/s390/s390.c (s390_expand_vec_strlen): Update.
(s390_expand_vec_movstr): Update.
(s390_expand_cs_tdsi): Update.
(s390_expand_split_stack_prologue): Update.
* config/sh/sh.c (sh_print_operand): Update.
(expand_cbranchsi4): Update.
(expand_cbranchdi4): Update.
* config/sparc/sparc.c (output_v9branch): Update.
* config/spu/spu.c (get_branch_target): Update.
(ea_load_store_inline): Update.
* config/tilegx/tilegx.c (cbranch_predicted_p): Update.
* config/tilepro/tilepro.c: Update.
* gcc.dg/predict-8.c: Update.
From-SVN: r250239
|
|
more conservatively.
2017-05-04 Richard Biener <rguenther@suse.de>
* tree.c (array_at_struct_end_p): Handle arrays at struct
end with flexarrays more conservatively. Refactor and treat
arrays of arrays or aggregates more strict. Fix
VIEW_CONVERT_EXPR handling. Remove allow_compref argument.
* tree.c (array_at_struct_end_p): Adjust prototype.
* emit-rtl.c (set_mem_attributes_minus_bitpos): Adjust.
* gimple-fold.c (get_range_strlen): Likewise.
* tree-chkp.c (chkp_may_narrow_to_field): Likewise.
From-SVN: r247581
|
|
recognize accesses beyond end of array)
2017-04-27 Richard Biener <rguenther@suse.de>
PR middle-end/80533
* emit-rtl.c (set_mem_attributes_minus_bitpos): When
stripping ARRAY_REFs from MEM_EXPR make sure we're not
keeping a reference to a trailing array.
From-SVN: r247327
|
|
PR middle-end/78468
* emit-rtl.c (init_emit): Add ??? comment for problematic alignment
settings of the virtual registers.
Revert again
2016-08-23 Dominik Vogt <vogt@linux.vnet.ibm.com>
* explow.c (get_dynamic_stack_size): Take known alignment of stack
pointer + STACK_DYNAMIC_OFFSET into account when calculating the size
needed.
From-SVN: r245124
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|
This is the combination of these patches:
- [8a/9] Introduce class function_reader (v8)
- Add ASSERT_RTX_PTR_EQ
- [8b/9] Add target-independent selftests of RTL function reader (v2)
- [8c/9] Add aarch64-specific selftests for RTL function reader (v2)
- [8d/9] Add x86_64-specific selftests for RTL function reader (v2)
gcc/ChangeLog:
* Makefile.in (OBJS): Add read-md.o, read-rtl.o,
read-rtl-function.o, and selftest-rtl.o.
* config/aarch64/aarch64.c: Include selftest.h and
selftest-rtl.h.
(selftest::aarch64_test_loading_full_dump): New function.
(selftest::aarch64_run_selftests): New function.
(TARGET_RUN_TARGET_SELFTESTS): Wire it up to
selftest::aarch64_run_selftests.
* config/i386/i386.c
(selftest::ix86_test_loading_dump_fragment_1): New function.
(selftest::ix86_test_loading_call_insn): New function.
(selftest::ix86_test_loading_full_dump): New function.
(selftest::ix86_test_loading_unspec): New function.
(selftest::ix86_run_selftests): Call the new functions.
* emit-rtl.c (maybe_set_max_label_num): New function.
* emit-rtl.h (maybe_set_max_label_num): New decl.
* function.c (instantiate_decls): Guard call to
instantiate_decls_1 with if (DECL_INITIAL (fndecl)).
* function-tests.c (selftest::verify_three_block_rtl_cfg): Remove
"static".
* gensupport.c (gen_reader::gen_reader): Pass "false"
for new "compact" param of rtx_reader.
* print-rtl.c (rtx_writer::print_rtx_operand): Print "(nil)"
rather than an empty string for NULL strings.
* read-md.c: Potentially include config.h rather than bconfig.h.
Wrap include of errors.h with #ifdef GENERATOR_FILE.
(have_error): New global, copied from errors.c.
(md_reader::read_name): Rename to...
(md_reader::read_name_1): ...this, adding "out_loc" param,
and converting "missing name or number" to returning false, rather
than failing.
(md_reader::read_name): Reimplement in terms of read_name_1.
(md_reader::read_name_or_nil): New function.
(md_reader::read_string): Handle "(nil)" by returning NULL.
(md_reader::md_reader): Add new param "compact".
(md_reader::read_md_files): Wrap with #ifdef GENERATOR_FILE.
(md_reader::read_file): New method.
* read-md.h (md_reader::md_reader): Add new param "compact".
(md_reader::read_file): New method.
(md_reader::is_compact): New accessor.
(md_reader::read_name): Convert return type from void to
file_location.
(md_reader::read_name_or_nil): New decl.
(md_reader::read_name_1): New decl.
(md_reader::m_compact): New field.
(noop_reader::noop_reader): Pass "false" for new "compact" param
of rtx_reader.
(rtx_reader::rtx_reader): Add new "compact" param.
(rtx_reader::read_rtx_operand): Make virtual and convert return
type from void to rtx.
(rtx_reader::read_until): New decl.
(rtx_reader::handle_any_trailing_information): New virtual
function.
(rtx_reader::postprocess): New virtual function.
(rtx_reader::finalize_string): New virtual function.
(rtx_reader::m_in_call_function_usage): New field.
(rtx_reader::m_reuse_rtx_by_id): New field.
* read-rtl-function.c: New file.
* selftest-rtl.c (selftest::assert_rtx_ptr_eq_at): New function.
* selftest-rtl.h (ASSERT_RTX_PTR_EQ): New macro.
(selftest::verify_three_block_rtl_cfg): New decl.
* read-rtl-function.h: New file.
* read-rtl.c: Potentially include config.h rather than bconfig.h.
For host, include function.h, memmodel.h, and emit-rtl.h.
(one_time_initialization): New function.
(struct compact_insn_name): New struct.
(compact_insn_names): New array.
(find_code): Handle insn codes in compact dumps.
(apply_subst_iterator): Wrap with #ifdef GENERATOR_FILE.
(bind_subst_iter_and_attr): Likewise.
(add_condition_to_string): Likewise.
(add_condition_to_rtx): Likewise.
(apply_attribute_uses): Likewise.
(add_current_iterators): Likewise.
(apply_iterators): Likewise.
(initialize_iterators): Guard usage of apply_subst_iterator with
#ifdef GENERATOR_FILE.
(read_conditions): Wrap with #ifdef GENERATOR_FILE.
(md_reader::read_mapping): Likewise.
(add_define_attr_for_define_subst): Likewise.
(add_define_subst_attr): Likewise.
(read_subst_mapping): Likewise.
(check_code_iterator): Likewise.
(rtx_reader::read_rtx): Likewise. Move one-time initialization
logic to...
(one_time_initialization): New function.
(rtx_reader::read_until): New method.
(read_flags): New function.
(parse_reg_note_name): New function.
(rtx_reader::read_rtx_code): Initialize "iterator" to NULL.
Handle reuse_rtx ids.
Wrap iterator lookup within #ifdef GENERATOR_FILE.
Add parsing support for RTL dumps, mirroring the special-cases in
print_rtx, by calling read_flags, reading REG_NOTE names, INSN_UID
values, and calling handle_any_trailing_information.
(rtx_reader::read_rtx_operand): Convert return type from void
to rtx, returning return_rtx. Handle case 'e'. Call
finalize_string on XSTR and XTMPL fields.
(rtx_reader::read_nested_rtx): Handle dumps in which trailing
"(nil)" values were omitted. Call the postprocess vfunc on the
return_rtx.
(rtx_reader::rtx_reader): Add new "compact" param and pass to base
class ctor. Initialize m_in_call_function_usage. Call
one_time_initialization.
* rtl-tests.c (selftest::test_uncond_jump): Call
set_new_first_and_last_insn.
* rtl.h (read_rtx): Wrap decl with #ifdef GENERATOR_FILE.
* selftest-rtl.c: New file.
* selftest-rtl.h (class selftest::rtl_dump_test): New class.
(selftest::get_insn_by_uid): New decl.
* selftest-run-tests.c (selftest::run_tests): Call
read_rtl_function_c_tests.
* selftest.h (selftest::read_rtl_function_c_tests): New decl.
* tree-dfa.c (ssa_default_def): Return NULL_TREE for rtl function
dumps.
gcc/testsuite/ChangeLog:
* selftests/asr_div1.rtl: New file.
* selftests/aarch64: New subdirectory.
* selftests/aarch64/times-two.rtl: New file.
* selftests/bb-index.rtl: New file.
* selftests/cfg-test.rtl: New file.
* selftests/const-int.rtl: New file.
* selftests/example-labels.rtl: New file.
* selftests/insn-with-mode.rtl: New file.
* selftests/jump-to-label-ref.rtl: New file.
* selftests/jump-to-return.rtl: New file.
* selftests/jump-to-simple-return.rtl: New file.
* selftests/mem.rtl: New file.
* selftests/note-insn-deleted.rtl: New file.
* selftests/note_insn_basic_block.rtl: New file.
* selftests/simple-cse.rtl: New file.
* selftests/symbol-ref.rtl: New file.
* selftests/x86_64: New subdirectory.
* selftests/x86_64/call-insn.rtl: New file.
* selftests/x86_64/copy-hard-reg-into-frame.rtl: New file.
* selftests/x86_64/times-two.rtl: New file.
* selftests/x86_64/unspec.rtl: New file.
From-SVN: r244110
|
|
mips{,el}-linux-gnu)
PR rtl-optimization/65618
* emit-rtl.c (try_split): Move initialization of "before" and
"after" to just before the call to emit_insn_after_setloc.
From-SVN: r244029
|
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From-SVN: r243994
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gcc/ChangeLog:
* emit-rtl.c (gen_reg_rtx): Move regno_pointer_align and
regno_reg_rtx resizing logic to...
(emit_status::ensure_regno_capacity): ...this new method,
and ensure that the buffers are large enough.
(init_emit): Allocate regno_reg_rtx using ggc_cleared_vec_alloc
rather than ggc_vec_alloc.
* function.h (emit_status::ensure_regno_capacity): New method.
From-SVN: r243447
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Move this part of "expand"'s initialization of crtl into its own
method so that it can used by the RTL frontend when postprocessing
RTL dumps.
gcc/ChangeLog:
* cfgexpand.c (pass_expand::execute): Move stack initializations
to rtl_data::init_stack_alignment and call it.
* emit-rtl.c (rtl_data::init_stack_alignment): New method.
* emit-rtl.h (rtl_data::init_stack_alignment): New method.
From-SVN: r243371
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PR middle-end/78642
* emit-rtl.c (verify_rtx_sharing) <CLOBBER>: Relax condition.
(copy_rtx_if_shared_1) <CLOBBER>: Likewise.
(copy_insn_1) <CLOBBER>: Likewise.
From-SVN: r243282
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(verify_rtx_sharing) gcc/emit-rtl.c:2743)
PR target/78614
* rtl.c (copy_rtx): Don't clear used flag here.
(shallow_copy_rtx_stat): Clear used flag here unless code the rtx
is shareable.
* simplify-rtx.c (simplify_replace_fn_rtx): When copying rtx with
'E' in format, copy all vectors.
* emit-rtl.c (copy_insn_1): Don't clear used flag here.
* valtrack.c (cleanup_auto_inc_dec): Likewise.
* config/rs6000/rs6000.c (rs6000_frame_related): Likewise.
From-SVN: r243194
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-Os -g -mstringop-strategy=libcall -freorder-blocks-algorithm=simple)
PR rtl-optimization/78547
* emit-rtl.c (unshare_all_rtl): Make sure DECL_RTL and
DECL_INCOMING_RTL is not shared.
* config/i386/i386.c (convert_scalars_to_vectors): If any
insns have been converted, adjust all parameter's DEC_RTL and
DECL_INCOMING_RTL back from V1TImode to TImode if the parameters have
TImode.
* gcc.dg/pr78547.c: New test.
From-SVN: r243165
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reset_used_flags.
* emit-rtl.c (verify_insn_sharing): Call verify_rtx_sharing instead of
reset_used_flags.
From-SVN: r243019
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Provide versions of subreg_lowpart_offset and subreg_highpart_offset
that work on mode sizes rather than modes. Also provide a routine
that converts an lsb position to a subreg offset.
The intent (in combination with later patches) is to move the
handling of the BYTES_BIG_ENDIAN != WORDS_BIG_ENDIAN case into
just two places, so that for other combinations we don't have
to split offsets into words and subwords.
gcc/
2016-11-15 Richard Sandiford <richard.sandiford@arm.com>
Alan Hayward <alan.hayward@arm.com>
David Sherwood <david.sherwood@arm.com>
* rtl.h (subreg_size_offset_from_lsb): Declare.
(subreg_offset_from_lsb): New function.
(subreg_size_lowpart_offset): Declare.
(subreg_lowpart_offset): Turn into an inline function.
(subreg_size_highpart_offset): Declare.
(subreg_highpart_offset): Turn into an inline function.
* emit-rtl.c (subreg_size_lowpart_offset): New function.
(subreg_size_highpart_offset): Likewise
* rtlanal.c (subreg_size_offset_from_lsb): Likewise.
Co-Authored-By: Alan Hayward <alan.hayward@arm.com>
Co-Authored-By: David Sherwood <david.sherwood@arm.com>
From-SVN: r242755
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* emit-rtl.c (emit_copy_of_insn_after): Duplicate notes in order.
* sel-sched-ir.c (create_copy_of_insn_rtx): Likewise.
* rtl.h (duplicate_reg_notes): Declare.
* rtlanal.c (duplicate_reg_note): New function.
From-SVN: r241913
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gcc/ChangeLog:
2016-11-01 Trevor Saunders <tbsaunde+gcc@tbsaunde.org>
* emit-rtl.c (prev_nonnote_insn_bb): Change argument type to
rtx_insn *.
* rtl.h (prev_nonnote_insn_bb): Adjust prototype.
From-SVN: r241773
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gcc/ChangeLog:
2016-11-01 Trevor Saunders <tbsaunde+gcc@tbsaunde.org>
* config/arc/arc.c (arc_emit_call_tls_get_addr): Make the type
of variables rtx_insn *.
* config/arm/arm.c (arm_call_tls_get_addr): Likewise.
(legitimize_tls_address): Likewise.
* config/bfin/bfin.c (hwloop_optimize): Likewise.
(bfin_gen_bundles): Likewise.
* config/c6x/c6x.c (reorg_split_calls): Likewise.
(c6x_reorg): Likewise.
* config/frv/frv.c (frv_reorder_packet): Likewise.
* config/i386/i386.c (ix86_split_idivmod): Likewise.
* config/ia64/ia64.c (ia64_expand_compare): Likewise.
* config/m32c/m32c.c (m32c_prepare_shift): Likewise.
* config/mn10300/mn10300.c: Likewise.
* config/rl78/rl78.c: Likewise.
* config/s390/s390.c (s390_fix_long_loop_prediction): Likewise.
* config/sh/sh-mem.cc (sh_expand_cmpstr): Likewise.
(sh_expand_cmpnstr): Likewise.
(sh_expand_strlen): Likewise.
(sh_expand_setmem): Likewise.
* config/sh/sh.md: Likewise.
* emit-rtl.c (emit_pattern_before): Likewise.
* except.c: Likewise.
* final.c: Likewise.
* jump.c: Likewise.
From-SVN: r241768
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While changing LABEL_REF_LABEL it might as well become an inline
function, so that its clearer what types are involved. Unfortunately
because it is still possible to use XEXP and related macros on a
LABEL_REF rtx you can still set the field to be a non insn rtx. The
other unfortunate thing is that the generators actually create LABEL_REF
rtx that refer to MATCH_x rtx, so there we actually need to use XEXP to
bypass the checking this patch adds.
gcc/ChangeLog:
2016-10-21 Trevor Saunders <tbsaunde+gcc@tbsaunde.org>
* rtl.h (label_ref_label): New function.
(set_label_ref_label): New function.
(LABEL_REF_LABEL): Delete.
* alias.c (rtx_equal_for_memref_p): Adjust.
* cfgbuild.c (make_edges): Likewise.
(purge_dead_tablejump_edges): Likewise.
* cfgexpand.c (convert_debug_memory_address): Likewise.
* cfgrtl.c (patch_jump_insn): Likewise.
* combine.c (distribute_notes): Likewise.
* cse.c (hash_rtx_cb): Likewise.
(exp_equiv_p): Likewise.
(fold_rtx): Likewise.
(check_for_label_ref): Likewise.
* cselib.c (rtx_equal_for_cselib_1): Likewise.
(cselib_hash_rtx): Likewise.
* emit-rtl.c (mark_label_nuses): Likewise.
* explow.c (convert_memory_address_addr_space_1): Likewise.
* final.c (output_asm_label): Likewise.
(output_addr_const): Likewise.
* gcse.c (add_label_notes): Likewise.
* genconfig.c (walk_insn_part): Likewise.
* genrecog.c (validate_pattern): Likewise.
* ifcvt.c (cond_exec_get_condition): Likewise.
(noce_emit_store_flag): Likewise.
(noce_get_alt_condition): Likewise.
(noce_get_condition): Likewise.
* jump.c (maybe_propagate_label_ref): Likewise.
(mark_jump_label_1): Likewise.
(redirect_exp_1): Likewise.
(rtx_renumbered_equal_p): Likewise.
* lra-constraints.c (operands_match_p): Likewise.
* print-rtl.c (print_value): Likewise.
* reload.c (find_reloads): Likewise.
* reload1.c (set_label_offsets): Likewise.
* reorg.c (get_branch_condition): Likewise.
* rtl-tests.c (test_uncond_jump): Likewise.
* rtl.c (rtx_equal_p_cb): Likewise.
(rtx_equal_p): Likewise.
* rtlanal.c (reg_mentioned_p): Likewise.
(rtx_referenced_p): Likewise.
(get_condition): Likewise.
* varasm.c (const_hash_1): Likewise.
(compare_constant): Likewise.
(const_rtx_hash_1): Likewise.
(output_constant_pool_1): Likewise.
From-SVN: r241401
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2016-10-13 Thomas Preud'homme <thomas.preudhomme@arm.com>
gcc/
* coretypes.h: Move MEMMODEL_* macros and enum memmodel definition
into ...
* memmodel.h: This file.
* alias.c, asan.c, auto-inc-dec.c, bb-reorder.c, bt-load.c,
caller-save.c, calls.c, ccmp.c, cfgbuild.c, cfgcleanup.c,
cfgexpand.c, cfgloopanal.c, cfgrtl.c, cilk-common.c, combine.c,
combine-stack-adj.c, common/config/aarch64/aarch64-common.c,
common/config/arm/arm-common.c, common/config/bfin/bfin-common.c,
common/config/c6x/c6x-common.c, common/config/i386/i386-common.c,
common/config/ia64/ia64-common.c, common/config/nvptx/nvptx-common.c,
compare-elim.c, config/aarch64/aarch64-builtins.c,
config/aarch64/aarch64-c.c, config/aarch64/cortex-a57-fma-steering.c,
config/arc/arc.c, config/arc/arc-c.c, config/arm/arm-builtins.c,
config/arm/arm-c.c, config/avr/avr.c, config/avr/avr-c.c,
config/avr/avr-log.c, config/bfin/bfin.c, config/c6x/c6x.c,
config/cr16/cr16.c, config/cris/cris.c, config/darwin-c.c,
config/darwin.c, config/epiphany/epiphany.c,
config/epiphany/mode-switch-use.c,
config/epiphany/resolve-sw-modes.c, config/fr30/fr30.c,
config/frv/frv.c, config/ft32/ft32.c, config/h8300/h8300.c,
config/i386/i386-c.c, config/i386/winnt.c, config/iq2000/iq2000.c,
config/lm32/lm32.c, config/m32c/m32c.c, config/m32r/m32r.c,
config/m68k/m68k.c, config/mcore/mcore.c,
config/microblaze/microblaze.c, config/mmix/mmix.c,
config/mn10300/mn10300.c, config/moxie/moxie.c,
config/msp430/msp430.c, config/nds32/nds32-cost.c,
config/nds32/nds32-intrinsic.c, config/nds32/nds32-md-auxiliary.c,
config/nds32/nds32-memory-manipulation.c,
config/nds32/nds32-predicates.c, config/nds32/nds32.c,
config/nios2/nios2.c, config/nvptx/nvptx.c, config/pa/pa.c,
config/pdp11/pdp11.c, config/rl78/rl78.c, config/rs6000/rs6000-c.c,
config/rx/rx.c, config/s390/s390-c.c, config/s390/s390.c,
config/sh/sh.c, config/sh/sh-c.c, config/sh/sh-mem.cc,
config/sh/sh_treg_combine.cc, config/sol2.c, config/spu/spu.c,
config/stormy16/stormy16.c, config/tilegx/tilegx.c,
config/tilepro/tilepro.c, config/v850/v850.c, config/vax/vax.c,
config/visium/visium.c, config/vms/vms-c.c, config/xtensa/xtensa.c,
coverage.c, cppbuiltin.c, cprop.c, cse.c, cselib.c, dbxout.c, dce.c,
df-core.c, df-problems.c, df-scan.c, dojump.c, dse.c, dwarf2asm.c,
dwarf2cfi.c, dwarf2out.c, emit-rtl.c, except.c, explow.c, expmed.c,
expr.c, final.c, fold-const.c, function.c, fwprop.c, gcse.c,
ggc-page.c, haifa-sched.c, hsa-brig.c, hsa-gen.c, hw-doloop.c,
ifcvt.c, init-regs.c, internal-fn.c, ira-build.c, ira-color.c,
ira-conflicts.c, ira-costs.c, ira-emit.c, ira-lives.c, ira.c, jump.c,
loop-doloop.c, loop-invariant.c, loop-iv.c, loop-unroll.c,
lower-subreg.c, lra.c, lra-assigns.c, lra-coalesce.c,
lra-constraints.c, lra-eliminations.c, lra-lives.c, lra-remat.c,
lra-spills.c, mode-switching.c, modulo-sched.c, omp-low.c, passes.c,
postreload-gcse.c, postreload.c, predict.c, print-rtl-function.c,
recog.c, ree.c, reg-stack.c, regcprop.c, reginfo.c, regrename.c,
reload.c, reload1.c, reorg.c, resource.c, rtl-chkp.c, rtl-tests.c,
rtlanal.c, rtlhooks.c, sched-deps.c, sched-rgn.c, sdbout.c,
sel-sched-ir.c, sel-sched.c, shrink-wrap.c, simplify-rtx.c,
stack-ptr-mod.c, stmt.c, stor-layout.c, target-globals.c,
targhooks.c, toplev.c, tree-nested.c, tree-outof-ssa.c,
tree-profile.c, tree-ssa-coalesce.c, tree-ssa-ifcombine.c,
tree-ssa-loop-ivopts.c, tree-ssa-loop.c, tree-ssa-reassoc.c,
tree-ssa-sccvn.c, tree-vect-data-refs.c, ubsan.c, valtrack.c,
var-tracking.c, varasm.c: Include memmodel.h.
* genattrtab.c (write_header): Include memmodel.h in generated file.
* genautomata.c (main): Likewise.
* gengtype.c (open_base_files): Likewise.
* genopinit.c (main): Likewise.
* genconditions.c (write_header): Include memmodel.h earlier in
generated file.
* genemit.c (main): Likewise.
* genoutput.c (output_prologue): Likewise.
* genpeep.c (main): Likewise.
* genpreds.c (write_insn_preds_c): Likewise.
* genrecog.c (write_header): Likewise.
* Makefile.in (PLUGIN_HEADERS): Include memmodel.h
gcc/ada/
* gcc-interface/utils2.c: Include memmodel.h.
gcc/c-family/
* c-cppbuiltin.c: Include memmodel.h.
* c-opts.c: Likewise.
* c-pragma.c: Likewise.
* c-warn.c: Likewise.
gcc/c/
* c-typeck.c: Include memmodel.h.
gcc/cp/
* decl2.c: Include memmodel.h.
* rtti.c: Likewise.
gcc/fortran/
* trans-intrinsic.c: Include memmodel.h.
gcc/go/
* go-backend.c: Include memmodel.h.
libgcc/
* libgcov-profiler.c: Replace MEMMODEL_* macros by their __ATOMIC_*
equivalent.
* config/tilepro/atomic.c: Likewise and stop casting model to
enum memmodel.
From-SVN: r241121
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gcc/ChangeLog:
2016-09-22 Trevor Saunders <tbsaunde+gcc@tbsaunde.org>
* emit-rtl.c (next_cc0_user): Make argument type rtx_insn *.
* rtl.h: Adjust prototype.
From-SVN: r240362
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gcc/ChangeLog:
2016-09-22 Trevor Saunders <tbsaunde+gcc@tbsaunde.org>
* emit-rtl.c (next_active_insn): Change argument type to
rtx_insn *.
(prev_active_insn): Likewise.
(active_insn_p): Likewise.
* rtl.h: Adjust prototypes.
* cfgcleanup.c (merge_blocks_move_successor_nojumps): Adjust.
* config/arc/arc.md: Likewise.
* config/pa/pa.c (branch_to_delay_slot_p): Likewise.
(branch_needs_nop_p): Likewise.
(use_skip_p): Likewise.
* config/sh/sh.c (gen_block_redirect): Likewise.
(split_branches): Likewise.
* reorg.c (optimize_skip): Likewise.
(fill_simple_delay_slots): Likewise.
(fill_slots_from_thread): Likewise.
(relax_delay_slots): Likewise.
* resource.c (mark_target_live_regs): Likewise.
From-SVN: r240361
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gcc/ChangeLog:
2016-09-22 Trevor Saunders <tbsaunde+gcc@tbsaunde.org>
* config/cris/cris.c (cris_asm_output_case_end): Change argument
type to rtx_insn *.
* emit-rtl.c (next_nonnote_nondebug_insn): Likewise.
(prev_nonnote_nondebug_insn): Likewise.
* config/cris/cris-protos.h: Adjust prototype.
* rtl.h: Likewise.
* jump.c (rtx_renumbered_equal_p): Adjust.
From-SVN: r240360
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gcc/ChangeLog:
2016-09-22 Trevor Saunders <tbsaunde+gcc@tbsaunde.org>
* emit-rtl.c (prev_real_insn): Change argument type to rtx_insn *.
* rtl.h: Adjust prototype.
* config/sh/sh.md: Adjust.
* dwarf2out.c (add_var_loc_to_decl): Likewise.
From-SVN: r240359
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gcc/ChangeLog:
2016-09-22 Trevor Saunders <tbsaunde+gcc@tbsaunde.org>
* emit-rtl.c (next_nondebug_insn): Change argument type to
rtx_insn *.
(prev_nondebug_insn): Likewise.
* loop-doloop.c (doloop_condition_get): Likewise.
* rtl.h: Adjust prototype.
* cfgloop.h: Likewise.
From-SVN: r240358
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