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PR rtl-optimization/19705 - -fno-branch-count-reg doesn't prevent decrement
and branch instructions on a count register
gcc/ChangeLog:
2016-03-07 Martin Sebor <msebor@redhat.com>
PR rtl-optimization/19705
* doc/invoke.texi (Options That Control Optimization): Clarify
-fno-branch-count-reg.
From-SVN: r234039
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* doc/extend.texi (__builtin_alloca, __builtin_alloca_with_align):
Fix @xref usage.
From-SVN: r233960
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* doc/tm.texi: Regenerated.
From-SVN: r233917
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for the reciprocal square root to reflect its approximative characteristic.
gcc/
* config/aarch64/aarch64-protos.h (aarch64_emit_swrsqrt): Rename
function to "aarch64_emit_approx_rsqrt".
* config/aarch64/aarch64-tuning-flags.def: Rename tuning flag to
AARCH64_EXTRA_TUNE_APPROX_RSQRT.
* config/aarch64/aarch64.c (exynosm1_tunigs): Use new flag name.
(xgene1_tunings): Likewise.
(use_rsqrt_p): Likewise.
(aarch64_emit_swrsqrt): Use new function name.
* config/aarch64/aarch64-simd.md (aarch64_rsqrts_*): Likewise.
* config/aarch64/aarch64.opt (mlow-precision-recip-sqrt): Reword the
text explaining this option.
* doc/invoke.texi (-mlow-precision-recip-sqrt): Likewise.
From-SVN: r233772
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* doc/extend.texi: Mention clog10, clog10f an clog10l
in Builtins section.
From-SVN: r233738
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Martin Liska <mliska@suse.cz>
* doc/install.texi: Mention --enable-valgrind-annotations.
Co-Authored-By: Martin Liska <mliska@suse.cz>
From-SVN: r233735
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From-SVN: r233680
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gcc/
* common.opt (flifetime-dse): Add -flifetime-dse=1.
gcc/cp/
* decl.c (start_preparsed_function): Condition ctor clobber on
flag_lifetime_dse > 1.
From-SVN: r233672
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* config/arm/arm-cores.def (cortex-a32): New entry.
* config/arm/arm-tables.opt: Regenerate.
* config/arm/arm-tune.md: Regenerate.
* config/arm/bpabi.h (BE8_LINK_SPEC): Add mcpu=cortex-a32.
* config/arm/t-aprofile: Handle mcpu=cortex-a32.
* doc/invoke.texi (ARM Options): Document cortex-a32 as value
for -mcpu and -mtune.
From-SVN: r233659
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PR middle-end/69780 - [4.9/5/6 Regression] ICE on __builtin_alloca_with_align
with small alignment
PR c/69759 - __builtin_alloca and __builtin_alloca_with_align undocumented
gcc/c-family/ChangeLog:
* c-common.c (check_builtin_function_arguments): Validate and reject
invalid arguments to __builtin_alloca_with_align.
gcc/ChangeLog:
* doc/extend.texi (Other Builtins): Document __builtin_alloca and
__builtin_alloca_with_align.
gcc/testsuite/ChangeLog:
* g++.dg/ext/builtin_alloca.C: New test.
* gcc.dg/builtins-68.c: New test.
From-SVN: r233640
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* config/i386/i386-c.c (ix86_target_macros): Remove __SEG_TLS.
(ix86_register_pragmas): Remove __seg_tls.
* config/i386/i386-protos.h (ADDR_SPACE_SEG_TLS): Remove.
* config/i386/i386.c (ix86_print_operand_address_as): Don't handle it.
(ix86_addr_space_subset_p, TARGET_ADDR_SPACE_SUBSET_P): Remove.
(ix86_addr_space_convert, TARGET_ADDR_SPACE_CONVERT): Remove.
(ix86_addr_space_debug, TARGET_ADDR_SPACE_DEBUG): Remove.
* doc/extend.texi (__seg_tls): Remove item.
testsuite/
* gcc.target/i386/addr-space-3.c: Remove test.
From-SVN: r233639
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There is some controversy about enabling -Wunused-const-variable for all
unused static const variables because some feel there are too many errors
exposed in header files. Create two levels for -Wunused-const-variable.
One level to only check for unused static const variables in the main
compilation file. Which is enabled by -Wunused-variable. And a second
level that also checks for unused static const variables in included
files. Which must be explicitly enabled.
gcc/ChangeLog
PR c/28901
* cgraphunit.c (check_global_declaration): Check level of
warn_unused_const_variable and main_input_filename.
* doc/invoke.texi (Warning Options): Add -Wunused-const-variable=.
(-Wunused-variable): For C implies -Wunused-const-variable=1.
(-Wunused-const-variable): Explain levels 1 and 2.
gcc/c-family/ChangeLog
PR c/28901
* c.opt (Wunused-const-variable): Turn into Alias for...
(Wunused-const-variable=): New option.
gcc/testsuite/ChangeLog
PR c/28901
* gcc.dg/unused-variable-3.c: New test.
From-SVN: r233616
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m68k-linux-gnu)
PR target/69885
* doc/md.texi (ashl@var{m}3): Document that mode of operand 2 must
be specified.
From-SVN: r233613
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* doc/invoke.texi (C++ Dialect Options): Clarify interaction of
-Wnarrowing with -std.
From-SVN: r233569
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support it
* lib/target-supports.exp: Define aarch64_asm_FUNC_ok checks
for fp, simd, crypto, crc, lse.
* doc/sourcebuild.texi (AArch64-specific attributes): Document the
above.
* gcc.target/aarch64/assembler_arch_1.c: Add aarch64_asm_lse_ok
effective target check.
From-SVN: r233559
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* doc/extend.texi (C++ Attributes): Correct description of
warn_unused type attribute.
From-SVN: r233502
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those could have changed)
PR c/69835
* common.opt (Wnonnull-compare): New warning.
* doc/invoke.texi (-Wnonnull): Remove text about comparison
of arguments against NULL.
(-Wnonnull-compare): Document.
* Makefile.in (OBJS): Add gimple-ssa-nonnull-compare.o.
* tree-pass.h (make_pass_warn_nonnull_compare): Declare.
* passes.def (pass_warn_nonnull_compare): Add.
* gimple-ssa-nonnull-compare.c: New file.
c-family/
* c.opt (Wnonnull-compare): Enable for -Wall.
c/
* c-typeck.c (build_binary_op): Revert 2015-09-09 change.
cp/
* typeck.c (cp_build_binary_op): Revert 2015-09-09 change.
testsuite/
* c-c++-common/nonnull-1.c: Use -Wnonnull-compare instead of
-Wnonnull in dg-options.
* c-c++-common/nonnull-2.c: New test.
From-SVN: r233472
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gcc/
2016-02-16 Claudiu Zissulescu <claziss@synopsys.com>
* config/arc/arc-modes.def (CC_FPU, CC_FPU_UNEQ): New modes.
* config/arc/arc-opts.h (FPU_SP, FPU_SF, FPU_SC, FPU_SD, FPU_DP)
(FPU_DF, FPU_DC, FPU_DD, FXP_DP): Define.
* config/arc/arc.c (arc_init): Check FPU options.
(get_arc_condition_code): Handle new CC_FPU* modes.
(arc_select_cc_mode): Likewise.
(arc_conditional_register_usage): Allow 64 bit datum into even-odd
register pair only. Allow access for ARCv2 accumulator.
(gen_compare_reg): Whenever we have FPU support use FPU compare
instructions.
(arc_reorg): Don't generate brcc insns when FPU compare
instructions are involved.
* config/arc/arc.h (TARGET_DPFP): Add TARGET_FP_DPAX condition.
(TARGET_OPTFPE): Add condition when ARC EM can use optimized
floating point emulation.
(ACC_REG_FIRST, ACC_REG_LAST, ACCL_REGNO, ACCH_REGNO): Define.
(REVERSE_CONDITION): Add new CC_FPU* modes.
(TARGET_FP_SP_BASE): Define.
(TARGET_FP_DP_BASE): Likewise.
(TARGET_FP_SP_FUSED): Likewise.
(TARGET_FP_DP_FUSED): Likewise.
(TARGET_FP_SP_CONV): Likewise.
(TARGET_FP_DP_CONV): Likewise.
(TARGET_FP_SP_SQRT): Likewise.
(TARGET_FP_DP_SQRT): Likewise.
(TARGET_FP_DP_AX): Likewise.
* config/arc/arc.md (ARCV2_ACC): New constant.
(type): New fpu type attribute.
(SDF): Conditional iterator.
(cstore<mode>, cbranch<mode>): Change expand condition.
(addsf3, subsf3, mulsf3, adddf3, subdf3, muldf3): New expands,
handles FPU/FPX cases as well.
* config/arc/arc.opt (mfpu): New option.
* config/arc/fpx.md (addsf3_fpx, subsf3_fpx, mulsf3_fpx):
Renamed.
(adddf3, muldf3, subdf3): Removed.
* config/arc/predicates.md (proper_comparison_operator): Recognize
CC_FPU* modes.
* config/arc/fpu.md: New file.
* doc/invoke.texi (ARC Options): Document mfpu option.
From-SVN: r233451
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* cgraph.c: Spelling fixes - behaviour -> behavior and
neighbour -> neighbor.
* target.def: Likewise.
* sel-sched.c: Likewise.
* config/mips/mips.c: Likewise.
* config/arc/arc.md: Likewise.
* config/arm/cortex-a57.md: Likewise.
* config/arm/arm.c: Likewise.
* config/arm/neon.md: Likewise.
* config/arm/arm-c.c: Likewise.
* config/vms/vms-c.c: Likewise.
* config/s390/s390.c: Likewise.
* config/i386/znver1.md: Likewise.
* config/i386/i386.c: Likewise.
* config/ia64/hpux-unix2003.h: Likewise.
* config/msp430/msp430.md: Likewise.
* config/rx/rx.c: Likewise.
* config/rx/rx.md: Likewise.
* config/aarch64/aarch64-simd.md: Likewise.
* config/aarch64/aarch64.c: Likewise.
* config/nvptx/nvptx.c: Likewise.
* config/bfin/bfin.c: Likewise.
* config/cris/cris.opt: Likewise.
* config/rs6000/rs6000.c: Likewise.
* target.h: Likewise.
* spellcheck.c: Likewise.
* ira-build.c: Likewise.
* tree-inline.c: Likewise.
* builtins.c: Likewise.
* lra-constraints.c: Likewise.
* explow.c: Likewise.
* hwint.h: Likewise.
* targhooks.c: Likewise.
* tree-vect-data-refs.c: Likewise.
* expr.c: Likewise.
* doc/tm.texi: Likewise.
* doc/extend.texi: Likewise.
* doc/install.texi: Likewise.
* doc/md.texi: Likewise.
* tree-ssa-tail-merge.c: Likewise.
* sched-int.h: Likewise.
* match.pd: Likewise.
* sched-ebb.c: Likewise.
* target.def (omit_struct_return_reg): Likewise.
* gimple-ssa-isolate-paths.c: Likewise.
(find_implicit_erroneous_behaviour): Renamed to...
(find_implicit_erroneous_behavior): ... this.
(find_explicit_erroneous_behaviour): Renamed to...
(find_explicit_erroneous_behavior): ... this.
(gimple_ssa_isolate_erroneous_paths): Adjust caller.
gcc/cp/
* error.c: Spelling fixes - behaviour -> behavior and
neighbour -> neighbor.
* decl.c: Likewise.
* typeck.c (cp_build_binary_op): Fix up behavior spelling in
diagnostics.
* init.c (build_delete): Likewise.
gcc/objc/
* objc-act.c: Spelling fixes - behaviour -> behavior and
neighbour -> neighbor.
* objc-map.h: Likewise.
gcc/go/
* gofrontend/lex.cc: Spelling fixes - behaviour -> behavior and
neighbour -> neighbor.
* gccgo.texi: Likewise.
gcc/ada/
* prj-tree.ads: Spelling fixes - behaviour -> behavior and
neighbour -> neighbor.
* prep.adb: Likewise.
* prj.ads: Likewise.
* prepcomp.adb: Likewise.
* g-socket.ads: Likewise.
* s-imgrea.adb: Likewise.
* a-calend.adb: Likewise.
* exp_disp.adb: Likewise.
* doc/gnat_ugn/gnat_utility_programs.rst: Likewise.
* g-socket.adb: Likewise.
* sem_ch12.adb: Likewise.
* terminals.c: Likewise.
gcc/testsuite/
* objc.dg/gnu-api-2-method.m: Spelling fixes - behaviour -> behavior
and neighbour -> neighbor.
* objc.dg/attributes/method-nonnull-1.m: Likewise.
* objc.dg/gnu-api-2-class-meta.m: Likewise.
* c-c++-common/Wvarargs.c: Likewise.
* c-c++-common/goacc/host_data-5.c: Likewise.
* obj-c++.dg/gnu-api-2-class-meta.mm: Likewise.
* obj-c++.dg/attributes/method-nonnull-1.mm: Likewise.
* obj-c++.dg/gnu-api-2-method.mm: Likewise.
* gcc.target/aarch64/pr60697.c: Likewise.
* gcc.target/aarch64/advsimd-intrinsics/vldX_lane.c: Likewise.
* gcc.target/aarch64/advsimd-intrinsics/vqshl.c: Likewise.
* gcc.target/aarch64/advsimd-intrinsics/vshuffle.inc: Likewise.
* gcc.target/aarch64/advsimd-intrinsics/vrshl.c: Likewise.
* gcc.target/aarch64/advsimd-intrinsics/vldX_dup.c: Likewise.
* gcc.target/aarch64/advsimd-intrinsics/vstX_lane.c: Likewise.
* gcc.target/aarch64/advsimd-intrinsics/vqrshl.c: Likewise.
* gcc.target/aarch64/advsimd-intrinsics/vldX.c: Likewise.
* gcc.target/aarch64/aapcs64/ice_2.c: Likewise.
* gcc.target/aarch64/aapcs64/test_23.c: Likewise.
* gcc.target/aarch64/vrnd_f64_1.c: Likewise.
* g++.dg/warn/Wconversion-real-integer-3.C: Likewise.
* g++.dg/lookup/koenig5.C: Likewise.
* g++.dg/ext/no-asm-2.C: Likewise.
* gfortran.dg/bounds_check_array_ctor_3.f90: Likewise.
* gfortran.dg/bounds_check_array_ctor_7.f90: Likewise.
* gfortran.dg/used_types_16.f90: Likewise.
* gfortran.dg/assumed_rank_bounds_1.f90: Likewise.
* gfortran.dg/bounds_check_array_ctor_1.f90: Likewise.
* gfortran.dg/assumed_rank_bounds_2.f90: Likewise.
* gfortran.dg/bounds_check_array_ctor_4.f90: Likewise.
* gfortran.dg/abstract_type_6.f03: Likewise.
* gfortran.dg/bounds_check_array_ctor_5.f90: Likewise.
* gfortran.dg/used_types_15.f90: Likewise.
* gfortran.dg/bounds_check_array_ctor_8.f90: Likewise.
* gfortran.dg/exit_3.f08: Likewise.
* gfortran.dg/open_status_2.f90: Likewise.
* gfortran.dg/derived_pointer_recursion_2.f90: Likewise.
* gfortran.dg/intrinsic_std_1.f90: Likewise.
* gfortran.dg/associate_1.f03: Likewise.
* gfortran.dg/bounds_check_array_ctor_2.f90: Likewise.
* gfortran.dg/intrinsic_std_6.f90: Likewise.
* gfortran.dg/bounds_check_array_ctor_6.f90: Likewise.
* gcc.dg/builtin-object-size-1.c: Likewise.
* gcc.dg/noreturn-6.c: Likewise.
* gcc.dg/builtin-stringop-chk-1.c: Likewise.
* gcc.dg/globalalias.c: Likewise.
* gcc.dg/builtins-config.h: Likewise.
* gcc.dg/pr30457.c: Likewise.
* gcc.c-torture/compile/volatile-1.c: Likewise.
* gcc.c-torture/execute/20101011-1.c: Likewise.
* c-c++-common/Waddress-1.c: Likewise.
From-SVN: r233358
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next for `Extended Asm' in menu but not in sectioning)
2016-02-08 Sandra Loosemore <sandra@codesourcery.com>
PR other/69722
gcc/
* doc/extend.texi (Flag Output Operands): Correct sectioning.
Minor copy-edit to fix verb tenses.
From-SVN: r233236
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* doc/tree-ssa.texi (Preserving the virtual SSA form): Remove
outdated section.
From-SVN: r233221
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PR target/60410
* tree.c (build_common_tree_nodes): Remove short_double argument.
All callers changed.
* tree.h (build_common_tree_nodes): Adjust declaration.
* doc/invoke.texi (-fshort-double): Remove documentation.
* config/mips/t-img-elf (MULTILIB_OPTIONS, MULTILIB_DIRNAMES,
MULTILIB_EXCEPTIONS): Remove -fshort-double variant.
* lto-wrapper.c (merge_and_complain, append_compiler_options,
append_linker_options): Don't handle OPT_fshort_double.
c-family/
PR target/60410
* c.opt (fshort-double): Remove.
testsuite/
PR target/60410
* gcc.dg/lto/pr55113_0.c: Remove test.
From-SVN: r233218
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gcc/testsuite/ChangeLog:
PR c++/69662
* g++.dg/warn/Wplacement-new-size-1.C: New test.
* g++.dg/warn/Wplacement-new-size-2.C: New test.
gcc/cp/ChangeLog:
PR c++/69662
* init.c (find_field_init): New function.
(warn_placement_new_too_small): Call it. Handle one-element arrays
at ends of structures special.
gcc/c-family/ChangeLog:
PR c++/69662
* c.opt (Warning options): Update -Wplacement-new to take
an optional argument.
gcc/ChangeLog:
PR c++/69662
* doc/invoke.texi: Update -Wplacement-new to take an optional
argument.
From-SVN: r233190
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occurrence of tracer-min-branch-ratio...
2016-01-05 Jeremy Bennett <jeremy.bennett@embecosm.com>
* doc/invoke.texi (Optimize Options): In table of --param options
rename second occurrence of tracer-min-branch-ratio to
tracer-min-branch-probability, rename
tracer-min-branch-ratio-feedback to
tracer-min-branch-probability-feedback and clarify description,
rename sched-spec-state-edge-prob-cutoff to
sched-state-edge-prob-cutoff, rename selsched-max-insns-to-rename
to selsched-insns-to-rename, rename lto-minpartition to
lto-min-partition, delete reorder-blocks-duplicate and
reorder-blocks-duplicate-feedback.
From-SVN: r233175
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gcc/ChangeLog
* doc/extend.texi: S/390: Correct some typos.
From-SVN: r233172
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We don't document the -mno-xxx variants for other flags here, and the
paragraph here specifically says "Each has a corresponding -mno- option
to disable use of these instructions". Drop the -mno-fma4 line.
From-SVN: r233144
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Improve TARGET_IRA_CHANGE_PSEUDO_ALLOCNO_CLASS target hook. It turns out there
is another case where the register allocator uses the union of register classes
without checking that the cost of the resulting register class is lower than
both (see https://gcc.gnu.org/ml/gcc-patches/2015-12/msg01765.html ). This
happens when the cost of the best and alternative class are both lower than the
memory cost. In this case we typically end up with ALL_REGS as the allocno
class, which almost invariably results in bad allocations with many redundant
int<->FP moves (which are expensive on various cores). AArch64 is affected by
this significantly due to supporting many scalar integer operations in SIMD.
Currently the TARGET_IRA_CHANGE_PSEUDO_ALLOCNO_CLASS hook forces the class to
GENERAL_REGS if the allocno class is ALL_REGS and the register has an integer
mode. This is bad if the best class happens to be FP_REGS. To handle this
case as well, an extra argument is needed in the hook to pass the best class.
If the allocno class is ALL_REGS, but the best class isn't, we use the best
class instead (rather than using the mode to force to GENERAL_REGS or FP_REGS).
Previously this might happen:
r79: preferred FP_REGS, alternative GENERAL_REGS, allocno GENERAL_REGS
a1 (r79,l0) best GENERAL_REGS, allocno GENERAL_REGS
a1(r79,l0) costs: CALLER_SAVE_REGS:5000,5000 GENERAL_REGS:5000,5000
FP_LO_REGS:0,0 FP_REGS:0,0 ALL_REGS:10000,10000 MEM:9000,9000
The proposed allocno is ALL_REGS (despite having the highest cost!) and is then
forced by the hook to GENERAL_REGS because r79 has integer mode. However
FP_REGS has the lowest cost. After this patch the choice is as follows:
r79: preferred FP_REGS, alternative GENERAL_REGS, allocno FP_REGS
a1 (r79,l0) best FP_REGS, allocno FP_REGS
As a result it is now no longer a requirement to use register move costs that
are larger than the memory move cost. So it will be feasible to use realistic
costs for both without a huge penalty.
2016-02-02 Wilco Dijkstra <wdijkstr@arm.com>
gcc/
* ira-costs.c (find_costs_and_classes): Add extra argument.
* target.def (ira_change_pseudo_allocno_class): Add parameter.
* targhooks.h (ira_change_pseudo_allocno_class): Likewise.
* targhooks.c (ira_change_pseudo_allocno_class): Likewise.
* config/aarch64/aarch64.c (aarch64_ira_change_pseudo_allocno_class)
Add best_class parameter, and return it if not ALL_REGS.
* config/mips/mips.c (mips_ira_change_pseudo_allocno_class):
Add parameter.
* doc/tm.texi (TARGET_IRA_CHANGE_PSEUDO_ALLOCNO_CLASS):
Update target hook.
From-SVN: r233084
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gcc/
* config/nvptx/nvptx.c (PTX_GANG_DEFAULT): New.
(nvptx_goacc_validate_dims): Extend to handle global defaults.
* target.def (OACC_VALIDATE_DIMS): Extend documentation.
* doc/tm.texti: Rebuilt.
* doc/invoke.texi (fopenacc-dim): Document.
* lto-wrapper.c (merge_and_complain): Add OPT_fopenacc_dim_ case.
(append_compiler_options): Likewise.
* omp-low.c (oacc_default_dims, oacc_min_dims): New.
(oacc_parse_default_dims): New.
(oacc_validate_dims): Add USED arg. Select non-unity default when
possible.
(oacc_loop_fixed_partitions): Return mask of used partitions.
(oacc_loop_auto_partitions): Emit dump info.
(oacc_loop_partition): Return mask of used partitions.
(execute_oacc_device_lower): Parse default dimension arg. Adjust
loop partitioning and validation calls.
gcc/c-family/
* c.opt (fopenacc-dim=): New option.
gcc/fortran/
* lang.opt (fopenacc-dim=): New option.
libgomp/
* testsuite/libgomp.oacc-c-c++-common/loop-dim-default.c: New.
* testsuite/libgomp.oacc-fortran/routine-7.f90: Serialize loop.
From-SVN: r233041
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* config/isl.m4: Add comments about isl-0.16.
* configure: Regenerate.
gcc/
* doc/install.texi: Document that isl-0.16 is supported.
From-SVN: r232997
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2016-01-29 Vladimir Makarov <vmakarov@redhat.com>
PR target/69299
* config/i386/constraints.md (Bm): Describe as special memory
constraint.
* doc/md.texi (DEFINE_SPECIAL_MEMORY_CONSTRAINT): Describe it.
* genoutput.c (main): Process DEFINE_SPECIAL_MEMORY_CONSTRAINT.
* genpreds.c (struct constraint_data): Add is_special_memory.
(have_special_memory_constraints, special_memory_start): New
static vars.
(special_memory_end): Ditto.
(add_constraint): Add new arg is_special_memory. Add code to
process its true value. Update have_special_memory_constraints.
(process_define_constraint): Pass the new arg.
(process_define_register_constraint): Ditto.
(choose_enum_order): Process special memory.
(write_tm_preds_h): Generate enum const CT_SPECIAL_MEMORY and
function insn_extra_special_memory_constraint.
(main): Process DEFINE_SPECIAL_MEMORY_CONSTRAINT.
* gensupport.c (process_rtx): Process
DEFINE_SPECIAL_MEMORY_CONSTRAINT.
* ira-costs.c (record_reg_classes): Process CT_SPECIAL_MEMORY.
* ira-lives.c (single_reg_class): Use
insn_extra_special_memory_constraint.
* ira.c (ira_setup_alts): Process CT_SPECIAL_MEMORY.
* lra-constraints.c (process_alt_operands): Ditto.
(curr_insn_transform): Use insn_extra_special_memory_constraint.
* recog.c (asm_operand_ok, preprocess_constraints): Process
CT_SPECIAL_MEMORY.
* reload.c (find_reloads): Ditto.
* rtl.def (DEFINE_SPECIFAL_MEMORY_CONSTRAINT): New.
* stmt.c (parse_input_constraint): Use
insn_extra_special_memory_constraint.
From-SVN: r232993
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PR target/69459
* config/i386/constraints.md (C): Only accept constant zero operand.
(BC): New constraint.
* config/i386/sse.md (*mov<mode>_internal): Use BC constraint
instead of C constraint.
* doc/md.texi (Machine Constraints): Update description
of C constraint.
testsuite/ChangeLog:
PR target/69459
* gcc.target/i386/pr69459.c: New test.
From-SVN: r232955
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From-SVN: r232931
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gcc/ChangeLog:
2016-01-26 Martin Sebor <msebor@redhat.com>
PR other/69477
* doc/extend.texi (Common Type Attributes): Move text that talks about
attribute packed from attribute aligned to the section discussing
the former attribute for clarity.
From-SVN: r232840
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From-SVN: r232824
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PR target/69442
* combine.c (combine_instructions): For REG_EQUAL note with
SET_DEST being ZERO_EXTRACT, also temporarily set SET_DEST
to the underlying register.
* doc/rtl.texi (REG_EQUAL): Document the behavior of
REG_EQUAL/REG_EQUIV notes if SET_DEST is ZERO_EXTRACT.
* gcc.dg/pr69442.c: New test.
From-SVN: r232819
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wording for mixed storage order support.
* doc/extend.texi (scalar_storage_order type attribute): Fix typo and
improve wording for mixed storage order support.
From-SVN: r232791
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gcc/
2016-01-25 Claudiu Zissulescu <claziss@synopsys.com>
* config/arc/arc.c (TARGET_DWARF_REGISTER_SPAN): Define.
(arc_init): Check validity mll64 option.
(arc_save_restore): Use double load/store instruction.
(arc_expand_movmem): Likewise.
(arc_split_move): Don't split if we have double load/store
instructions. Returns a boolean.
(arc_process_double_reg_moves): Change function to return boolean
instead of a sequence of instructions.
(arc_dwarf_register_span): New function.
* config/arc/arc-protos.h (arc_split_move): Change prototype.
* config/arc/arc.h (TARGET_CPU_CPP_BUILTINS): Define __ARC_LL64__.
* config/arc/arc.md (*movdi_insn): Emit ldd/std instructions.
(*movdf_insn): Likewise.
* config/arc/arc.opt (mll64): New option.
* config/arc/predicates.md (even_register_operand): New predicate.
* doc/invoke.texi (ARC Options): Add mll64 documentation.
From-SVN: r232788
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type punning and aliasing, and remove future tense.
* doc/extend.texi (scalar_storage_order type attribute): Document
restriction on type punning and aliasing, and remove future tense.
From-SVN: r232718
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PR c/52291 - __sync_fetch_and_add and friends poorly specified for pointer
types
2016-01-20 Martin Sebor <msebor@redhat.com>
* extend.texi (__sync Builtins): Clarify the semantics of
__sync_fetch_and_OP built-ins on pointers.
(__atomic Builtins): Same.
From-SVN: r232662
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2016-01-20 Sandra Loosemore <sandra@codesourcery.com>
gcc/
* doc/invoke.texi (Instrumentation Options): Clarify -mmpx linking
requirements.
From-SVN: r232648
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just "DWARF".
2016-01-20 Sandra Loosemore <sandra@codesourcery.com>
gcc/
* common.opt (feliminate-dwarf2-dups): Replace references to
"DWARF 2" with just "DWARF".
* config/ia64/ia64.opt (mdwarf2-asm): Likewise.
* doc/extend.texi: Likewise.
* doc/cpp.texi: Likewise.
* doc/invoke.texi: Likewise.
(Option Summary): Add -gdwarf to list of Debugging Options.
(Debugging Options): Document -gdwarf.
* doc/contrib.texi: Spell "DWARF" like that.
From-SVN: r232647
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gcc/
* config/rs6000/ppc-auxv.h: New file.
* config/rs6000/rs6000-builtin.def (cpu_init): Add new builtin.
(cpu_is): Likewise.
(cpu_supports): Likewise.
* config/rs6000/rs6000.c: include "ppc-auxv.h".
(cpu_is_info): New variable.
(cpu_supports_info): Likewise.
(tcb_verification_symbol): Likewise.
(cpu_builtin_p): Likewise.
(cpu_expand_builtin): New function.
(rs6000_expand_ternop_builtin): Add support for CPU builtin functions.
(rs6000_init_builtins): Likewise.
(rs6000_elf_file_end): Emit HWCAP in TCB verification symbol.
* config/rs6000/rs6000.h (TLS_REGNUM): New define.
* configure.ac (gcc_cv_libc_provides_hwcap_in_tcb): New test.
* configure: Regenerate.
* config.in: Likewise.
* doc/extend.texi (PowerPC Built-in Functions): Document
__builtin_cpu_init, __builtin_cpu_is and __builtin_cpu_supports.
gcc/testsuite/
* gcc.target/powerpc/cpu-builtin-1.c: New test.
From-SVN: r232634
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2016-01-20 Christophe Lyon <christophe.lyon@linaro.org>
gcc/
* doc/sourcebuild.texi (arm_crypto_pragma_ok): Document new entry.
(arm_fp_ok): Likewise.
(arm_fp): Likewise.
(arm_crypto): Likewise.
gcc/testsuite/
* lib/target-supports.exp
(check_effective_target_arm_fp_ok_nocache): New.
(check_effective_target_arm_fp_ok): New.
(add_options_for_arm_fp): New.
(check_effective_target_arm_crypto_ok_nocache): Require
target_arm_v8_neon_ok instead of arm32.
(check_effective_target_arm_crypto_pragma_ok_nocache): New.
(check_effective_target_arm_crypto_pragma_ok): New.
(add_options_for_arm_vfp): New.
* gcc.target/arm/attr-crypto.c: Use arm_crypto_pragma_ok effective
target. Do not force -mfloat-abi=softfp, use arm_fp_ok effective
target instead. Force initial fpu to vfp.
* gcc.target/arm/attr-neon-builtin-fail.c: Do not force
-mfloat-abi=softfp, use arm_fp_ok effective target instead.
* gcc.target/arm/attr-neon-fp16.c: Likewise. Remove arm_neon_ok
dependency.
* gcc.target/arm/attr-neon2.c: Do not force -mfloat-abi=softfp,
use arm_vfp effective target instead. Force initial fpu to vfp.
* gcc.target/arm/attr-neon3.c: Likewise.
* gcc.target/arm/cmp-2.c: Use arm_fp_ok effective target instead of
arm_vfp_ok.
* gcc.target/arm/unsigned-float.c: Likewise.
* gcc.target/arm/vfp-1.c: Likewise.
* gcc.target/arm/vfp-ldmdbd.c: Likewise.
* gcc.target/arm/vfp-ldmdbs.c: Likewise.
* gcc.target/arm/vfp-ldmiad.c: Likewise.
* gcc.target/arm/vfp-ldmias.c: Likewise.
* gcc.target/arm/vfp-stmdbd.c: Likewise.
* gcc.target/arm/vfp-stmdbs.c: Likewise.
* gcc.target/arm/vfp-stmiad.c: Likewise.
* gcc.target/arm/vfp-stmias.c: Likewise.
* gcc.target/arm/vnmul-1.c: Likewise.
* gcc.target/arm/vnmul-2.c: Likewise.
* gcc.target/arm/vnmul-3.c: Likewise.
* gcc.target/arm/vnmul-4.c: Likewise.
From-SVN: r232616
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From-SVN: r232599
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gcc/ChangeLog:
2016-01-20 Kugan Vivekanandarajah <kuganv@linaro.org>
* doc/lto.texi: Remove text that says only Gold has linker plugin
support.
From-SVN: r232587
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throughout the file.
2016-01-19 Sandra Loosemore <sandra@codesourcery.com>
gcc/
* doc/standards.texi: Copy-editing for grammar, markup, and sentence
flow throughout the file. Fix broken link to Objective-C 2.0
documentation.
* doc/invoke.texi: More copy-editing; fix numerous typos and spelling
errors.
From-SVN: r232583
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2015-01-19 Wilco Dijkstra <wdijkstr@arm.com>
gcc/
* target.def (gen_ccmp_first): Update documentation.
(gen_ccmp_next): Likewise.
* doc/tm.texi (gen_ccmp_first): Update documentation.
(gen_ccmp_next): Likewise.
* ccmp.c (expand_ccmp_expr): Extract cmp_code from return value of
expand_ccmp_expr_1. Improve comments.
* config/aarch64/aarch64.md (ccmp_and): Use if_then_else for ccmp.
(ccmp_ior<mode>): Remove pattern.
(cmp<mode>): Remove expand.
(cmp): Globalize pattern.
(cstorecc4): Use cc_register.
(mov<mode>cc): Remove ccmp_cc_register check.
* config/aarch64/aarch64.c (aarch64_get_condition_code_1):
Simplify after removal of CC_DNE/* modes.
(aarch64_ccmp_mode_to_code): Remove.
(aarch64_print_operand): Remove 'K' case. Merge 'm' and 'M' cases.
In 'k' case use integer as condition.
(aarch64_nzcv_codes): Remove inverted cases.
(aarch64_code_to_ccmode): Remove.
(aarch64_gen_ccmp_first): Use cmp pattern directly. Return the correct
comparison with CC register to be used in folowing CCMP/branch/CSEL.
(aarch64_gen_ccmp_next): Use previous comparison and mode in CCMP
pattern. Return the comparison with CC register. Invert conditions
when bitcode is OR.
* config/aarch64/aarch64-modes.def: Remove CC_DNE/* modes.
* config/aarch64/predicates.md (ccmp_cc_register): Remove.
From-SVN: r232561
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2016-01-19 Martin Jambor <mjambor@suse.cz>
Martin Liska <mliska@suse.cz>
Michael Matz <matz@suse.de>
libgomp/
* plugin/Makefrag.am: Add HSA plugin requirements.
* plugin/configfrag.ac (HSA_RUNTIME_INCLUDE): New variable.
(HSA_RUNTIME_LIB): Likewise.
(HSA_RUNTIME_CPPFLAGS): Likewise.
(HSA_RUNTIME_INCLUDE): New substitution.
(HSA_RUNTIME_LIB): Likewise.
(HSA_RUNTIME_LDFLAGS): Likewise.
(hsa-runtime): New configure option.
(hsa-runtime-include): Likewise.
(hsa-runtime-lib): Likewise.
(PLUGIN_HSA): New substitution variable.
Fill HSA_RUNTIME_INCLUDE and HSA_RUNTIME_LIB according to the new
configure options.
(PLUGIN_HSA_CPPFLAGS): Likewise.
(PLUGIN_HSA_LDFLAGS): Likewise.
(PLUGIN_HSA_LIBS): Likewise.
Check that we have access to HSA run-time.
* libgomp-plugin.h (offload_target_type): New element
OFFLOAD_TARGET_TYPE_HSA.
* libgomp.h (gomp_target_task): New fields firstprivate_copies and
args.
(bool gomp_create_target_task): Updated.
(gomp_device_descr): Extra parameter of run_func and async_run_func,
new field can_run_func.
* libgomp_g.h (GOMP_target_ext): Update prototype.
* oacc-host.c (host_run): Added a new parameter args.
* target.c (calculate_firstprivate_requirements): New function.
(copy_firstprivate_data): Likewise.
(gomp_target_fallback_firstprivate): Use them.
(gomp_target_unshare_firstprivate): New function.
(gomp_get_target_fn_addr): Allow returning NULL for shared memory
devices.
(GOMP_target): Do host fallback for all shared memory devices. Do not
pass any args to plugins.
(GOMP_target_ext): Introduce device-specific argument parameter args.
Allow host fallback if device shares memory. Do not remap data if
device has shared memory.
(gomp_target_task_fn): Likewise. Also treat shared memory devices
like host fallback for mappings.
(GOMP_target_data): Treat shared memory devices like host fallback.
(GOMP_target_data_ext): Likewise.
(GOMP_target_update): Likewise.
(GOMP_target_update_ext): Likewise. Also pass NULL as args to
gomp_create_target_task.
(GOMP_target_enter_exit_data): Likewise.
(omp_target_alloc): Treat shared memory devices like host fallback.
(omp_target_free): Likewise.
(omp_target_is_present): Likewise.
(omp_target_memcpy): Likewise.
(omp_target_memcpy_rect): Likewise.
(omp_target_associate_ptr): Likewise.
(gomp_load_plugin_for_device): Also load can_run.
* task.c (GOMP_PLUGIN_target_task_completion): Free
firstprivate_copies.
(gomp_create_target_task): Accept new argument args and store it to
ttask.
* plugin/plugin-hsa.c: New file.
gcc/
* Makefile.in (OBJS): Add new source files.
(GTFILES): Add hsa.c.
* common.opt (disable_hsa): New variable.
(-Whsa): New warning.
* config.in (ENABLE_HSA): New.
* configure.ac: Treat hsa differently from other accelerators.
(OFFLOAD_TARGETS): Define ENABLE_OFFLOADING according to
$enable_offloading.
(ENABLE_HSA): Define ENABLE_HSA according to $enable_hsa.
* doc/install.texi (Configuration): Document --with-hsa-runtime,
--with-hsa-runtime-include, --with-hsa-runtime-lib and
--with-hsa-kmt-lib.
* doc/invoke.texi (-Whsa): Document.
(hsa-gen-debug-stores): Likewise.
* lto-wrapper.c (compile_images_for_offload_targets): Do not attempt
to invoke offload compiler for hsa acclerator.
* opts.c (common_handle_option): Determine whether HSA offloading
should be performed.
* params.def (PARAM_HSA_GEN_DEBUG_STORES): New parameter.
* builtin-types.def (BT_FN_VOID_UINT_PTR_INT_PTR): New.
(BT_FN_VOID_INT_OMPFN_SIZE_PTR_PTR_PTR_UINT_PTR_INT_INT): Removed.
(BT_FN_VOID_INT_OMPFN_SIZE_PTR_PTR_PTR_UINT_PTR_PTR): New.
* gimple-low.c (lower_stmt): Also handle GIMPLE_OMP_GRID_BODY.
* gimple-pretty-print.c (dump_gimple_omp_for): Also handle
GF_OMP_FOR_KIND_GRID_LOOP.
(dump_gimple_omp_block): Also handle GIMPLE_OMP_GRID_BODY.
(pp_gimple_stmt_1): Likewise.
* gimple-walk.c (walk_gimple_stmt): Likewise.
* gimple.c (gimple_build_omp_grid_body): New function.
(gimple_copy): Also handle GIMPLE_OMP_GRID_BODY.
* gimple.def (GIMPLE_OMP_GRID_BODY): New.
* gimple.h (enum gf_mask): Added GF_OMP_PARALLEL_GRID_PHONY,
GF_OMP_FOR_KIND_GRID_LOOP, GF_OMP_FOR_GRID_PHONY and
GF_OMP_TEAMS_GRID_PHONY.
(gimple_statement_omp_single_layout): Updated comments.
(gimple_build_omp_grid_body): New function.
(gimple_has_substatements): Also handle GIMPLE_OMP_GRID_BODY.
(gimple_omp_for_grid_phony): New function.
(gimple_omp_for_set_grid_phony): Likewise.
(gimple_omp_parallel_grid_phony): Likewise.
(gimple_omp_parallel_set_grid_phony): Likewise.
(gimple_omp_teams_grid_phony): Likewise.
(gimple_omp_teams_set_grid_phony): Likewise.
(gimple_return_set_retbnd): Also handle GIMPLE_OMP_GRID_BODY.
* omp-builtins.def (BUILT_IN_GOMP_OFFLOAD_REGISTER): New.
(BUILT_IN_GOMP_OFFLOAD_UNREGISTER): Likewise.
(BUILT_IN_GOMP_TARGET): Updated type.
* omp-low.c: Include symbol-summary.h, hsa.h and params.h.
(adjust_for_condition): New function.
(get_omp_for_step_from_incr): Likewise.
(extract_omp_for_data): Moved parts to adjust_for_condition and
get_omp_for_step_from_incr.
(build_outer_var_ref): Handle GIMPLE_OMP_GRID_BODY.
(fixup_child_record_type): Bail out if receiver_decl is NULL.
(scan_sharing_clauses): Handle OMP_CLAUSE__GRIDDIM_.
(scan_omp_parallel): Do not create child functions for phony
constructs.
(check_omp_nesting_restrictions): Handle GIMPLE_OMP_GRID_BODY.
(scan_omp_1_op): Checking assert we are not remapping to
ERROR_MARK. Also also handle GIMPLE_OMP_GRID_BODY.
(parallel_needs_hsa_kernel_p): New function.
(expand_parallel_call): Register apprpriate parallel child
functions as HSA kernels.
(grid_launch_attributes_trees): New type.
(grid_attr_trees): New variable.
(grid_create_kernel_launch_attr_types): New function.
(grid_insert_store_range_dim): Likewise.
(grid_get_kernel_launch_attributes): Likewise.
(get_target_argument_identifier_1): Likewise.
(get_target_argument_identifier): Likewise.
(get_target_argument_value): Likewise.
(push_target_argument_according_to_value): Likewise.
(get_target_arguments): Likewise.
(expand_omp_target): Call get_target_arguments instead of looking
up for teams and thread limit.
(grid_expand_omp_for_loop): New function.
(grid_arg_decl_map): New type.
(grid_remap_kernel_arg_accesses): New function.
(grid_expand_target_kernel_body): New function.
(expand_omp): Call it.
(lower_omp_for): Do not emit phony constructs.
(lower_omp_taskreg): Do not emit phony constructs but create for them
a temporary variable receiver_decl.
(lower_omp_taskreg): Do not emit phony constructs.
(lower_omp_teams): Likewise.
(lower_omp_grid_body): New function.
(lower_omp_1): Call it.
(grid_reg_assignment_to_local_var_p): New function.
(grid_seq_only_contains_local_assignments): Likewise.
(grid_find_single_omp_among_assignments_1): Likewise.
(grid_find_single_omp_among_assignments): Likewise.
(grid_find_ungridifiable_statement): Likewise.
(grid_target_follows_gridifiable_pattern): Likewise.
(grid_remap_prebody_decls): Likewise.
(grid_copy_leading_local_assignments): Likewise.
(grid_process_kernel_body_copy): Likewise.
(grid_attempt_target_gridification): Likewise.
(grid_gridify_all_targets_stmt): Likewise.
(grid_gridify_all_targets): Likewise.
(execute_lower_omp): Call grid_gridify_all_targets.
(make_gimple_omp_edges): Handle GIMPLE_OMP_GRID_BODY.
* tree-core.h (omp_clause_code): Added OMP_CLAUSE__GRIDDIM_.
(tree_omp_clause): Added union field dimension.
* tree-pretty-print.c (dump_omp_clause): Handle OMP_CLAUSE__GRIDDIM_.
* tree.c (omp_clause_num_ops): Added number of arguments of
OMP_CLAUSE__GRIDDIM_.
(omp_clause_code_name): Added name of OMP_CLAUSE__GRIDDIM_.
(walk_tree_1): Handle OMP_CLAUSE__GRIDDIM_.
* tree.h (OMP_CLAUSE_GRIDDIM_DIMENSION): New.
(OMP_CLAUSE_SET_GRIDDIM_DIMENSION): Likewise.
(OMP_CLAUSE_GRIDDIM_SIZE): Likewise.
(OMP_CLAUSE_GRIDDIM_GROUP): Likewise.
* passes.def: Schedule pass_ipa_hsa and pass_gen_hsail.
* tree-pass.h (make_pass_gen_hsail): Declare.
(make_pass_ipa_hsa): Likewise.
* ipa-hsa.c: New file.
* lto-section-in.c (lto_section_name): Add hsa section name.
* lto-streamer.h (lto_section_type): Add hsa section.
* timevar.def (TV_IPA_HSA): New.
* hsa-brig-format.h: New file.
* hsa-brig.c: New file.
* hsa-dump.c: Likewise.
* hsa-gen.c: Likewise.
* hsa.c: Likewise.
* hsa.h: Likewise.
* toplev.c (compile_file): Call hsa_output_brig.
* hsa-regalloc.c: New file.
gcc/fortran/
* types.def (BT_FN_VOID_UINT_PTR_INT_PTR): New.
(BT_FN_VOID_INT_OMPFN_SIZE_PTR_PTR_PTR_UINT_PTR_INT_INT): Removed.
(BT_FN_VOID_INT_OMPFN_SIZE_PTR_PTR_PTR_UINT_PTR_PTR): New.
gcc/lto/
* lto-partition.c: Include "hsa.h"
(add_symbol_to_partition_1): Put hsa implementations into the
same partition as host implementations.
liboffloadmic/
* plugin/libgomp-plugin-intelmic.cpp (GOMP_OFFLOAD_async_run): New
unused parameter.
(GOMP_OFFLOAD_run): Likewise.
include/
* gomp-constants.h (GOMP_DEVICE_HSA): New macro.
(GOMP_VERSION_HSA): Likewise.
(GOMP_TARGET_ARG_DEVICE_MASK): Likewise.
(GOMP_TARGET_ARG_DEVICE_ALL): Likewise.
(GOMP_TARGET_ARG_SUBSEQUENT_PARAM): Likewise.
(GOMP_TARGET_ARG_ID_MASK): Likewise.
(GOMP_TARGET_ARG_NUM_TEAMS): Likewise.
(GOMP_TARGET_ARG_THREAD_LIMIT): Likewise.
(GOMP_TARGET_ARG_VALUE_SHIFT): Likewise.
(GOMP_TARGET_ARG_HSA_KERNEL_ATTRIBUTES): Likewise.
From-SVN: r232549
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2016-01-18 Sandra Loosemore <sandra@codesourcery.com>
gcc/
* doc/invoke.texi (Invoking GCC): Add new section to menu.
(Option Summary): Update to reflect new section and moved options.
(C++ Dialect Options): Move -fstats to new section.
(Debugging Options): Move all dump, statistics, and other GCC
developer options to new section. Rewrite section introduction
and re-order remaining options to put the more basic ones first.
(Optimization Options): Move -fira-verbose and -flto-report* to
new section.
(Developer Options): New section incorporating moved options.
* doc/cppopts.texi (-dM): Update cross-reference.
From-SVN: r232541
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2016-01-16 Sandra Loosemore <sandra@codesourcery.com>
gcc/
* doc/invoke.texi (Invoking GCC): Add new section to menu.
(Option Summary): Update to reflect new section and moved options.
(C++ Dialect Options): Move -fvtable-verify and related options.
(Debugging Options): Move Sanitizer, Pointer Bounds Checker,
and profiling-related options.
(Optimization Options): Move profile generation options and
-fstack-protector and related options.
(Instrumentation Options): New section incorporating moved options.
(Code Generation Options): Move -finstrument-functions and
related options, -fstack-check, -fstack-limit*, and -fbounds-check.
From-SVN: r232475
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