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2016-04-15[ARM][doc] Document deprecation of pre-ARMv4T architecture revisionsKyrylo Tkachov1-0/+2
* doc/invoke.texi (ARM Options): Add note on deprecation of pre-ARMv4T architecture revisions. From-SVN: r235029
2016-04-14PR c++/70652 - [6 Regression] r234966 causes bootstrap to failMartin Sebor1-36/+2
PR c++/70652 - [6 Regression] r234966 causes bootstrap to fail Revert patch for c++/69517, c++/70019, and c++/70588. From-SVN: r234981
2016-04-13PR c++/69517 - [5/6 regression] SEGV on a VLA with excess initializer elementsMartin Sebor1-2/+36
PR c++/69517 - [5/6 regression] SEGV on a VLA with excess initializer elements PR c++/70019 - VLA size overflow not detected PR c++/70588 - SIGBUS on a VLA larger than SIZE_MAX / 2 gcc/testsuite/ChangeLog: 2016-04-13 Martin Sebor <msebor@redhat.com> PR c++/69517 PR c++/70019 PR c++/70588 * c-c++-common/ubsan/vla-1.c (main): Catch exceptions. * g++.dg/cpp1y/vla11.C: New test. * g++.dg/cpp1y/vla12.C: New test. * g++.dg/cpp1y/vla13.C: New test. * g++.dg/cpp1y/vla14.C: New test. * g++.dg/cpp1y/vla3.C: Restore deleted test. * gcc/testsuite/g++.dg/init/array24.C: Fully brace VLA initializer. * g++.dg/ubsan/vla-1.C: Disable exceptions. gcc/cp/ChangeLog: 2016-04-13 Martin Sebor <msebor@redhat.com> PR c++/69517 PR c++/70019 PR c++/70588 * cp-tree.h (throw_bad_array_length, build_vla_check): Declare new functions. * decl.c (check_initializer, cp_finish_decl): Call them. (reshape_init_r): Reject incompletely braced intializer-lists for VLAs. * init.c (throw_bad_array_length, build_vla_check) (build_vla_size_check, build_vla_init_check): Define new functions. * typeck2.c (split_nonconstant_init_1): Use variably_modified_type_p() to detect a VLA. (store_init_value): Same. gcc/doc/ChangeLog: 2016-04-13 Martin Sebor <msebor@redhat.com> PR c++/69517 PR c++/70019 PR c++/70588 * extend.texi (Variable Length): Document C++ specifics. libstdc++-v3/ChangeLog: 2016-04-13 Martin Sebor <msebor@redhat.com> PR c++/69517 * testsuite/25_algorithms/rotate/moveable2.cc: Make sure VLA upper bound is positive. From-SVN: r234966
2016-04-11re PR target/70381 (On powerpc, -mfloat128 is on by default for all VSX systems)Michael Meissner1-3/+7
[gcc] 2016-04-11 Michael Meissner <meissner@linux.vnet.ibm.com> PR target/70381 * config/rs6000/rs6000.c (rs6000_opt_masks): Disable using the target attribute and pragma from changing the -mfloat128 and -mfloat128-hardware options. * doc/extend.texi (Additional Floating Types): Document PowerPC __float128 restrictions. [libgcc] 2016-04-11 Michael Meissner <meissner@linux.vnet.ibm.com> PR target/70381 * configure.ac (powerpc*-*-linux*): Rework tests to build __float128 emulation routines to not depend on using #pragma GCC target to enable -mfloat128. * configure: Regnerate. [gcc/testsuite] 2016-04-11 Michael Meissner <meissner@linux.vnet.ibm.com> PR target/70381 * gcc.target/powerpc/float128-1.c: New tests to make sure the __float128 emulator is built and runs. * gcc.target/powerpc/float128-1.c: Likewise. * lib/target-supports.exp (check_ppc_float128_sw_available): Rework tests for __float128 software and hardware availability. Fix exit condition to return 0 on success. From-SVN: r234884
2016-03-30re PR middle-end/12392 (very long optimized compile)Michael Matz1-0/+5
2016-03-30 Michael Matz <matz@suse.de> Richard Biener <rguenther@suse.de> PR ipa/12392 * ipa-polymorphic-call.c (struct type_change_info): Change speculative to an unsigned allowing to limit the work we do. (csftc_abort_walking_p): New inline function.. (check_stmt_for_type_change): Limit the number of may-defs skipped for speculative devirtualization to max-speculative-devirt-maydefs. * params.def (max-speculative-devirt-maydefs): New param. * doc/invoke.texi (--param max-speculative-devirt-maydefs): Document. Co-Authored-By: Richard Biener <rguenther@suse.de> From-SVN: r234546
2016-03-29ft32.opt (mnodiv): New.James Bowman1-1/+5
* config/ft32/ft32.opt (mnodiv): New. * config/ft32/ft32.md (*divsi3, *modsi3): Qualify with TARGET_NODIV. * doc/invoke.texi (FT32 Options -mnodiv): New. * libgcc/config/ft32/lib1funcs.S (*divsi3, *modsi3): New. From-SVN: r234516
2016-03-25* doc/extend.texi: Fix typo in documentation to pure attribute.Aldy Hernandez1-1/+1
From-SVN: r234477
2016-03-23re PR c++/69884 (warning: ignoring attributes on template argument)Marek Polacek1-1/+9
PR c++/69884 * c.opt (Wignored-attributes): New option. * pt.c (canonicalize_type_argument): Use OPT_Wignored_attributes. * doc/invoke.texi: Document -Wignored-attributes. * g++.dg/warn/Wignored-attributes-1.C: New test. * g++.dg/warn/Wignored-attributes-2.C: New test. From-SVN: r234433
2016-03-18David Wohlferd's patch to document more issues with basic asmsDavid Wohlferd1-7/+22
* doc/extend.texi: Document more potential problems with basic asms. From-SVN: r234343
2016-03-16Cleanup and expand on the 'leaf' function attribute documentation.Carlos O'Donell1-23/+34
Describe the problems that a user might face with indirect functions and ELF symbol interposition. gcc/ChangeLog: 2016-03-16 Carlos O'Donell <carlos@redhat.com> Sandra Loosemore <sandra@codesourcery.com> * doc/extend.texi (Common Function Attributes): Describe ifunc impact on leaf attribute. Mention ELF interposition problems. Co-Authored-By: Sandra Loosemore <sandra@codesourcery.com> From-SVN: r234247
2016-03-10Add -funconstrained-commons to work around PR/69368 (and others) in SPEC2006Alan Lawrence1-1/+7
gcc/: * common.opt (funconstrained-commons, flag_unconstrained_commons): New. * tree.c (array_at_struct_end_p): Do not limit to size of decl for DECL_COMMONS if flag_unconstrained_commons is set. * tree-dfa.c (get_ref_base_and_extent): Likewise. * doc/invoke.texi (Optimize Options): Add -funconstrained-commons. (funconstrained-commons): Document. gcc/testsuite: * gfortran.dg/unconstrained_commons.f: New. Co-Authored-By: Jakub Jelinek <jakub@redhat.com> From-SVN: r234106
2016-03-08Remove Concepts from -std=c++1z.Jason Merrill1-0/+10
gcc/c-family/ * c-opts.c (set_std_cxx1z): Don't enable concepts. gcc/testsuite/ * lib/g++-dg.exp (g++-dg-runtest): Handle "concepts" in std list. * lib/target-supports.exp (check_effective_target_concepts): New. gcc/cp/ * parser.c (cp_parser_diagnose_invalid_type_name): Give helpful diagnostic for use of "concept". (cp_parser_requires_clause_opt): And "requires". (cp_parser_type_parameter, cp_parser_late_return_type_opt) (cp_parser_explicit_template_declaration): Adjust. * Make-lang.in (check-c++-all): Add "concepts" to std list. From-SVN: r234069
2016-03-07arm-cores.def (cortex-r8): New.Andre Vieira1-1/+2
2016-03-07 Andre Vieira <andre.simoesdiasvieira@arm.com> gcc/ * config/arm/arm-cores.def (cortex-r8): New. * config/arm/arm-tables.opt (cortex-r8): Regenerate. * config/arm/arm-tune.md: Likewise. * gcc/doc/invoke.texi: Add cortex-r8 to list of cpu values. From-SVN: r234040
2016-03-07PR rtl-optimization/19705 - -fno-branch-count-reg doesn't prevent decrementMartin Sebor1-5/+8
PR rtl-optimization/19705 - -fno-branch-count-reg doesn't prevent decrement and branch instructions on a count register gcc/ChangeLog: 2016-03-07 Martin Sebor <msebor@redhat.com> PR rtl-optimization/19705 * doc/invoke.texi (Options That Control Optimization): Clarify -fno-branch-count-reg. From-SVN: r234039
2016-03-04extend.texi (__builtin_alloca, [...]): Fix @xref usage.Jakub Jelinek1-3/+4
* doc/extend.texi (__builtin_alloca, __builtin_alloca_with_align): Fix @xref usage. From-SVN: r233960
2016-03-02Regenerate doc/tm.texiH.J. Lu1-1/+1
* doc/tm.texi: Regenerated. From-SVN: r233917
2016-02-26Rename the tuning option and related functions to enable the Newton series ↵Evandro Menezes1-6/+4
for the reciprocal square root to reflect its approximative characteristic. gcc/ * config/aarch64/aarch64-protos.h (aarch64_emit_swrsqrt): Rename function to "aarch64_emit_approx_rsqrt". * config/aarch64/aarch64-tuning-flags.def: Rename tuning flag to AARCH64_EXTRA_TUNE_APPROX_RSQRT. * config/aarch64/aarch64.c (exynosm1_tunigs): Use new flag name. (xgene1_tunings): Likewise. (use_rsqrt_p): Likewise. (aarch64_emit_swrsqrt): Use new function name. * config/aarch64/aarch64-simd.md (aarch64_rsqrts_*): Likewise. * config/aarch64/aarch64.opt (mlow-precision-recip-sqrt): Reword the text explaining this option. * doc/invoke.texi (-mlow-precision-recip-sqrt): Likewise. From-SVN: r233772
2016-02-26Mention clog10{,f,l} in documentation (Builtins section)Martin Liska1-0/+7
* doc/extend.texi: Mention clog10, clog10f an clog10l in Builtins section. From-SVN: r233738
2016-02-26Mention --enable-valgrind-annotations in install.texiMarkus Trippelsdorf1-0/+4
Martin Liska <mliska@suse.cz> * doc/install.texi: Mention --enable-valgrind-annotations. Co-Authored-By: Martin Liska <mliska@suse.cz> From-SVN: r233735
2016-02-24* doc/invoke.texi: Adjust -flifetime-dse documentation.Jason Merrill1-1/+3
From-SVN: r233680
2016-02-24Add -flifetime-dse=1.Jason Merrill1-1/+4
gcc/ * common.opt (flifetime-dse): Add -flifetime-dse=1. gcc/cp/ * decl.c (start_preparsed_function): Condition ctor clobber on flag_lifetime_dse > 1. From-SVN: r233672
2016-02-24[ARM] Add initial support for the Cortex-A32Kyrylo Tkachov1-2/+2
* config/arm/arm-cores.def (cortex-a32): New entry. * config/arm/arm-tables.opt: Regenerate. * config/arm/arm-tune.md: Regenerate. * config/arm/bpabi.h (BE8_LINK_SPEC): Add mcpu=cortex-a32. * config/arm/t-aprofile: Handle mcpu=cortex-a32. * doc/invoke.texi (ARM Options): Document cortex-a32 as value for -mcpu and -mtune. From-SVN: r233659
2016-02-23PR middle-end/69780 - [4.9/5/6 Regression] ICE on __builtin_alloca_with_alignMartin Sebor1-0/+88
PR middle-end/69780 - [4.9/5/6 Regression] ICE on __builtin_alloca_with_align with small alignment PR c/69759 - __builtin_alloca and __builtin_alloca_with_align undocumented gcc/c-family/ChangeLog: * c-common.c (check_builtin_function_arguments): Validate and reject invalid arguments to __builtin_alloca_with_align. gcc/ChangeLog: * doc/extend.texi (Other Builtins): Document __builtin_alloca and __builtin_alloca_with_align. gcc/testsuite/ChangeLog: * g++.dg/ext/builtin_alloca.C: New test. * gcc.dg/builtins-68.c: New test. From-SVN: r233640
2016-02-23Remove __seg_tls before first release.Richard Henderson1-17/+0
* config/i386/i386-c.c (ix86_target_macros): Remove __SEG_TLS. (ix86_register_pragmas): Remove __seg_tls. * config/i386/i386-protos.h (ADDR_SPACE_SEG_TLS): Remove. * config/i386/i386.c (ix86_print_operand_address_as): Don't handle it. (ix86_addr_space_subset_p, TARGET_ADDR_SPACE_SUBSET_P): Remove. (ix86_addr_space_convert, TARGET_ADDR_SPACE_CONVERT): Remove. (ix86_addr_space_debug, TARGET_ADDR_SPACE_DEBUG): Remove. * doc/extend.texi (__seg_tls): Remove item. testsuite/ * gcc.target/i386/addr-space-3.c: Remove test. From-SVN: r233639
2016-02-22PR28901 Add two levels for -Wunused-const-variable.Mark Wielaard1-5/+21
There is some controversy about enabling -Wunused-const-variable for all unused static const variables because some feel there are too many errors exposed in header files. Create two levels for -Wunused-const-variable. One level to only check for unused static const variables in the main compilation file. Which is enabled by -Wunused-variable. And a second level that also checks for unused static const variables in included files. Which must be explicitly enabled. gcc/ChangeLog PR c/28901 * cgraphunit.c (check_global_declaration): Check level of warn_unused_const_variable and main_input_filename. * doc/invoke.texi (Warning Options): Add -Wunused-const-variable=. (-Wunused-variable): For C implies -Wunused-const-variable=1. (-Wunused-const-variable): Explain levels 1 and 2. gcc/c-family/ChangeLog PR c/28901 * c.opt (Wunused-const-variable): Turn into Alias for... (Wunused-const-variable=): New option. gcc/testsuite/ChangeLog PR c/28901 * gcc.dg/unused-variable-3.c: New test. From-SVN: r233616
2016-02-22re PR bootstrap/69885 (ICE in maybe_legitimize_operand, at optabs.c:6903 on ↵Jakub Jelinek1-1/+3
m68k-linux-gnu) PR target/69885 * doc/md.texi (ashl@var{m}3): Document that mode of operand 2 must be specified. From-SVN: r233613
2016-02-19invoke.texi (C++ Dialect Options): Clarify interaction of -Wnarrowing with -std.Jonathan Wakely1-5/+9
* doc/invoke.texi (C++ Dialect Options): Clarify interaction of -Wnarrowing with -std. From-SVN: r233569
2016-02-19[AArch64] Skip gcc.target/aarch64/assembler_arch_1.c if assembler does not ↵Kyrylo Tkachov1-0/+3
support it * lib/target-supports.exp: Define aarch64_asm_FUNC_ok checks for fp, simd, crypto, crc, lse. * doc/sourcebuild.texi (AArch64-specific attributes): Document the above. * gcc.target/aarch64/assembler_arch_1.c: Add aarch64_asm_lse_ok effective target check. From-SVN: r233559
2016-02-17extend.texi (C++ Attributes): Correct description of warn_unused type attribute.Jonathan Wakely1-1/+1
* doc/extend.texi (C++ Attributes): Correct description of warn_unused type attribute. From-SVN: r233502
2016-02-16re PR c/69835 (-Wnonnull diagnoses parameter comparisons with NULL even when ↵Jakub Jelinek1-4/+12
those could have changed) PR c/69835 * common.opt (Wnonnull-compare): New warning. * doc/invoke.texi (-Wnonnull): Remove text about comparison of arguments against NULL. (-Wnonnull-compare): Document. * Makefile.in (OBJS): Add gimple-ssa-nonnull-compare.o. * tree-pass.h (make_pass_warn_nonnull_compare): Declare. * passes.def (pass_warn_nonnull_compare): Add. * gimple-ssa-nonnull-compare.c: New file. c-family/ * c.opt (Wnonnull-compare): Enable for -Wall. c/ * c-typeck.c (build_binary_op): Revert 2015-09-09 change. cp/ * typeck.c (cp_build_binary_op): Revert 2015-09-09 change. testsuite/ * c-c++-common/nonnull-1.c: Use -Wnonnull-compare instead of -Wnonnull in dg-options. * c-c++-common/nonnull-2.c: New test. From-SVN: r233472
2016-02-16[ARC] Add single/double IEEE precission FPU support.Claudiu Zissulescu1-1/+83
gcc/ 2016-02-16 Claudiu Zissulescu <claziss@synopsys.com> * config/arc/arc-modes.def (CC_FPU, CC_FPU_UNEQ): New modes. * config/arc/arc-opts.h (FPU_SP, FPU_SF, FPU_SC, FPU_SD, FPU_DP) (FPU_DF, FPU_DC, FPU_DD, FXP_DP): Define. * config/arc/arc.c (arc_init): Check FPU options. (get_arc_condition_code): Handle new CC_FPU* modes. (arc_select_cc_mode): Likewise. (arc_conditional_register_usage): Allow 64 bit datum into even-odd register pair only. Allow access for ARCv2 accumulator. (gen_compare_reg): Whenever we have FPU support use FPU compare instructions. (arc_reorg): Don't generate brcc insns when FPU compare instructions are involved. * config/arc/arc.h (TARGET_DPFP): Add TARGET_FP_DPAX condition. (TARGET_OPTFPE): Add condition when ARC EM can use optimized floating point emulation. (ACC_REG_FIRST, ACC_REG_LAST, ACCL_REGNO, ACCH_REGNO): Define. (REVERSE_CONDITION): Add new CC_FPU* modes. (TARGET_FP_SP_BASE): Define. (TARGET_FP_DP_BASE): Likewise. (TARGET_FP_SP_FUSED): Likewise. (TARGET_FP_DP_FUSED): Likewise. (TARGET_FP_SP_CONV): Likewise. (TARGET_FP_DP_CONV): Likewise. (TARGET_FP_SP_SQRT): Likewise. (TARGET_FP_DP_SQRT): Likewise. (TARGET_FP_DP_AX): Likewise. * config/arc/arc.md (ARCV2_ACC): New constant. (type): New fpu type attribute. (SDF): Conditional iterator. (cstore<mode>, cbranch<mode>): Change expand condition. (addsf3, subsf3, mulsf3, adddf3, subdf3, muldf3): New expands, handles FPU/FPX cases as well. * config/arc/arc.opt (mfpu): New option. * config/arc/fpx.md (addsf3_fpx, subsf3_fpx, mulsf3_fpx): Renamed. (adddf3, muldf3, subdf3): Removed. * config/arc/predicates.md (proper_comparison_operator): Recognize CC_FPU* modes. * config/arc/fpu.md: New file. * doc/invoke.texi (ARC Options): Document mfpu option. From-SVN: r233451
2016-02-12cgraph.c: Spelling fixes - behaviour -> behavior and neighbour -> neighbor.Jakub Jelinek4-4/+4
* cgraph.c: Spelling fixes - behaviour -> behavior and neighbour -> neighbor. * target.def: Likewise. * sel-sched.c: Likewise. * config/mips/mips.c: Likewise. * config/arc/arc.md: Likewise. * config/arm/cortex-a57.md: Likewise. * config/arm/arm.c: Likewise. * config/arm/neon.md: Likewise. * config/arm/arm-c.c: Likewise. * config/vms/vms-c.c: Likewise. * config/s390/s390.c: Likewise. * config/i386/znver1.md: Likewise. * config/i386/i386.c: Likewise. * config/ia64/hpux-unix2003.h: Likewise. * config/msp430/msp430.md: Likewise. * config/rx/rx.c: Likewise. * config/rx/rx.md: Likewise. * config/aarch64/aarch64-simd.md: Likewise. * config/aarch64/aarch64.c: Likewise. * config/nvptx/nvptx.c: Likewise. * config/bfin/bfin.c: Likewise. * config/cris/cris.opt: Likewise. * config/rs6000/rs6000.c: Likewise. * target.h: Likewise. * spellcheck.c: Likewise. * ira-build.c: Likewise. * tree-inline.c: Likewise. * builtins.c: Likewise. * lra-constraints.c: Likewise. * explow.c: Likewise. * hwint.h: Likewise. * targhooks.c: Likewise. * tree-vect-data-refs.c: Likewise. * expr.c: Likewise. * doc/tm.texi: Likewise. * doc/extend.texi: Likewise. * doc/install.texi: Likewise. * doc/md.texi: Likewise. * tree-ssa-tail-merge.c: Likewise. * sched-int.h: Likewise. * match.pd: Likewise. * sched-ebb.c: Likewise. * target.def (omit_struct_return_reg): Likewise. * gimple-ssa-isolate-paths.c: Likewise. (find_implicit_erroneous_behaviour): Renamed to... (find_implicit_erroneous_behavior): ... this. (find_explicit_erroneous_behaviour): Renamed to... (find_explicit_erroneous_behavior): ... this. (gimple_ssa_isolate_erroneous_paths): Adjust caller. gcc/cp/ * error.c: Spelling fixes - behaviour -> behavior and neighbour -> neighbor. * decl.c: Likewise. * typeck.c (cp_build_binary_op): Fix up behavior spelling in diagnostics. * init.c (build_delete): Likewise. gcc/objc/ * objc-act.c: Spelling fixes - behaviour -> behavior and neighbour -> neighbor. * objc-map.h: Likewise. gcc/go/ * gofrontend/lex.cc: Spelling fixes - behaviour -> behavior and neighbour -> neighbor. * gccgo.texi: Likewise. gcc/ada/ * prj-tree.ads: Spelling fixes - behaviour -> behavior and neighbour -> neighbor. * prep.adb: Likewise. * prj.ads: Likewise. * prepcomp.adb: Likewise. * g-socket.ads: Likewise. * s-imgrea.adb: Likewise. * a-calend.adb: Likewise. * exp_disp.adb: Likewise. * doc/gnat_ugn/gnat_utility_programs.rst: Likewise. * g-socket.adb: Likewise. * sem_ch12.adb: Likewise. * terminals.c: Likewise. gcc/testsuite/ * objc.dg/gnu-api-2-method.m: Spelling fixes - behaviour -> behavior and neighbour -> neighbor. * objc.dg/attributes/method-nonnull-1.m: Likewise. * objc.dg/gnu-api-2-class-meta.m: Likewise. * c-c++-common/Wvarargs.c: Likewise. * c-c++-common/goacc/host_data-5.c: Likewise. * obj-c++.dg/gnu-api-2-class-meta.mm: Likewise. * obj-c++.dg/attributes/method-nonnull-1.mm: Likewise. * obj-c++.dg/gnu-api-2-method.mm: Likewise. * gcc.target/aarch64/pr60697.c: Likewise. * gcc.target/aarch64/advsimd-intrinsics/vldX_lane.c: Likewise. * gcc.target/aarch64/advsimd-intrinsics/vqshl.c: Likewise. * gcc.target/aarch64/advsimd-intrinsics/vshuffle.inc: Likewise. * gcc.target/aarch64/advsimd-intrinsics/vrshl.c: Likewise. * gcc.target/aarch64/advsimd-intrinsics/vldX_dup.c: Likewise. * gcc.target/aarch64/advsimd-intrinsics/vstX_lane.c: Likewise. * gcc.target/aarch64/advsimd-intrinsics/vqrshl.c: Likewise. * gcc.target/aarch64/advsimd-intrinsics/vldX.c: Likewise. * gcc.target/aarch64/aapcs64/ice_2.c: Likewise. * gcc.target/aarch64/aapcs64/test_23.c: Likewise. * gcc.target/aarch64/vrnd_f64_1.c: Likewise. * g++.dg/warn/Wconversion-real-integer-3.C: Likewise. * g++.dg/lookup/koenig5.C: Likewise. * g++.dg/ext/no-asm-2.C: Likewise. * gfortran.dg/bounds_check_array_ctor_3.f90: Likewise. * gfortran.dg/bounds_check_array_ctor_7.f90: Likewise. * gfortran.dg/used_types_16.f90: Likewise. * gfortran.dg/assumed_rank_bounds_1.f90: Likewise. * gfortran.dg/bounds_check_array_ctor_1.f90: Likewise. * gfortran.dg/assumed_rank_bounds_2.f90: Likewise. * gfortran.dg/bounds_check_array_ctor_4.f90: Likewise. * gfortran.dg/abstract_type_6.f03: Likewise. * gfortran.dg/bounds_check_array_ctor_5.f90: Likewise. * gfortran.dg/used_types_15.f90: Likewise. * gfortran.dg/bounds_check_array_ctor_8.f90: Likewise. * gfortran.dg/exit_3.f08: Likewise. * gfortran.dg/open_status_2.f90: Likewise. * gfortran.dg/derived_pointer_recursion_2.f90: Likewise. * gfortran.dg/intrinsic_std_1.f90: Likewise. * gfortran.dg/associate_1.f03: Likewise. * gfortran.dg/bounds_check_array_ctor_2.f90: Likewise. * gfortran.dg/intrinsic_std_6.f90: Likewise. * gfortran.dg/bounds_check_array_ctor_6.f90: Likewise. * gcc.dg/builtin-object-size-1.c: Likewise. * gcc.dg/noreturn-6.c: Likewise. * gcc.dg/builtin-stringop-chk-1.c: Likewise. * gcc.dg/globalalias.c: Likewise. * gcc.dg/builtins-config.h: Likewise. * gcc.dg/pr30457.c: Likewise. * gcc.c-torture/compile/volatile-1.c: Likewise. * gcc.c-torture/execute/20101011-1.c: Likewise. * c-c++-common/Waddress-1.c: Likewise. From-SVN: r233358
2016-02-08re PR other/69722 (gcc/doc/extend.texi:7526: warning: node `Constraints' is ↵Sandra Loosemore1-3/+3
next for `Extended Asm' in menu but not in sectioning) 2016-02-08 Sandra Loosemore <sandra@codesourcery.com> PR other/69722 gcc/ * doc/extend.texi (Flag Output Operands): Correct sectioning. Minor copy-edit to fix verb tenses. From-SVN: r233236
2016-02-08tree-ssa.texi (Preserving the virtual SSA form): Remove outdated section.Nicklas Bo Jensen1-35/+1
* doc/tree-ssa.texi (Preserving the virtual SSA form): Remove outdated section. From-SVN: r233221
2016-02-08Remove -fshort-doubleBernd Schmidt1-10/+1
PR target/60410 * tree.c (build_common_tree_nodes): Remove short_double argument. All callers changed. * tree.h (build_common_tree_nodes): Adjust declaration. * doc/invoke.texi (-fshort-double): Remove documentation. * config/mips/t-img-elf (MULTILIB_OPTIONS, MULTILIB_DIRNAMES, MULTILIB_EXCEPTIONS): Remove -fshort-double variant. * lto-wrapper.c (merge_and_complain, append_compiler_options, append_linker_options): Don't handle OPT_fshort_double. c-family/ PR target/60410 * c.opt (fshort-double): Remove. testsuite/ PR target/60410 * gcc.dg/lto/pr55113_0.c: Remove test. From-SVN: r233218
2016-02-05PR c++/69662 - -Wplacement-new on allocated one element array membersMartin Sebor1-2/+33
gcc/testsuite/ChangeLog: PR c++/69662 * g++.dg/warn/Wplacement-new-size-1.C: New test. * g++.dg/warn/Wplacement-new-size-2.C: New test. gcc/cp/ChangeLog: PR c++/69662 * init.c (find_field_init): New function. (warn_placement_new_too_small): Call it. Handle one-element arrays at ends of structures special. gcc/c-family/ChangeLog: PR c++/69662 * c.opt (Warning options): Update -Wplacement-new to take an optional argument. gcc/ChangeLog: PR c++/69662 * doc/invoke.texi: Update -Wplacement-new to take an optional argument. From-SVN: r233190
2016-02-05invoke.texi (Optimize Options): In table of --param options rename second ↵Jeremy Bennett1-23/+11
occurrence of tracer-min-branch-ratio... 2016-01-05 Jeremy Bennett <jeremy.bennett@embecosm.com> * doc/invoke.texi (Optimize Options): In table of --param options rename second occurrence of tracer-min-branch-ratio to tracer-min-branch-probability, rename tracer-min-branch-ratio-feedback to tracer-min-branch-probability-feedback and clarify description, rename sched-spec-state-edge-prob-cutoff to sched-state-edge-prob-cutoff, rename selsched-max-insns-to-rename to selsched-insns-to-rename, rename lto-minpartition to lto-min-partition, delete reorder-blocks-duplicate and reorder-blocks-duplicate-feedback. From-SVN: r233175
2016-02-05S/390: Correct documentationDominik Vogt1-3/+3
gcc/ChangeLog * doc/extend.texi: S/390: Correct some typos. From-SVN: r233172
2016-02-04gcc: invoke: delete -mno-fma4 docsMike Frysinger1-3/+0
We don't document the -mno-xxx variants for other flags here, and the paragraph here specifically says "Each has a corresponding -mno- option to disable use of these instructions". Drop the -mno-fma4 line. From-SVN: r233144
2016-02-02Improve TARGET_IRA_CHANGE_PSEUDO_ALLOCNO_CLASS target hook.Wilco Dijkstra1-2/+2
Improve TARGET_IRA_CHANGE_PSEUDO_ALLOCNO_CLASS target hook. It turns out there is another case where the register allocator uses the union of register classes without checking that the cost of the resulting register class is lower than both (see https://gcc.gnu.org/ml/gcc-patches/2015-12/msg01765.html ). This happens when the cost of the best and alternative class are both lower than the memory cost. In this case we typically end up with ALL_REGS as the allocno class, which almost invariably results in bad allocations with many redundant int<->FP moves (which are expensive on various cores). AArch64 is affected by this significantly due to supporting many scalar integer operations in SIMD. Currently the TARGET_IRA_CHANGE_PSEUDO_ALLOCNO_CLASS hook forces the class to GENERAL_REGS if the allocno class is ALL_REGS and the register has an integer mode. This is bad if the best class happens to be FP_REGS. To handle this case as well, an extra argument is needed in the hook to pass the best class. If the allocno class is ALL_REGS, but the best class isn't, we use the best class instead (rather than using the mode to force to GENERAL_REGS or FP_REGS). Previously this might happen: r79: preferred FP_REGS, alternative GENERAL_REGS, allocno GENERAL_REGS a1 (r79,l0) best GENERAL_REGS, allocno GENERAL_REGS a1(r79,l0) costs: CALLER_SAVE_REGS:5000,5000 GENERAL_REGS:5000,5000 FP_LO_REGS:0,0 FP_REGS:0,0 ALL_REGS:10000,10000 MEM:9000,9000 The proposed allocno is ALL_REGS (despite having the highest cost!) and is then forced by the hook to GENERAL_REGS because r79 has integer mode. However FP_REGS has the lowest cost. After this patch the choice is as follows: r79: preferred FP_REGS, alternative GENERAL_REGS, allocno FP_REGS a1 (r79,l0) best FP_REGS, allocno FP_REGS As a result it is now no longer a requirement to use register move costs that are larger than the memory move cost. So it will be feasible to use realistic costs for both without a huge penalty. 2016-02-02 Wilco Dijkstra <wdijkstr@arm.com> gcc/ * ira-costs.c (find_costs_and_classes): Add extra argument. * target.def (ira_change_pseudo_allocno_class): Add parameter. * targhooks.h (ira_change_pseudo_allocno_class): Likewise. * targhooks.c (ira_change_pseudo_allocno_class): Likewise. * config/aarch64/aarch64.c (aarch64_ira_change_pseudo_allocno_class) Add best_class parameter, and return it if not ALL_REGS. * config/mips/mips.c (mips_ira_change_pseudo_allocno_class): Add parameter. * doc/tm.texi (TARGET_IRA_CHANGE_PSEUDO_ALLOCNO_CLASS): Update target hook. From-SVN: r233084
2016-02-01nvptx.c (PTX_GANG_DEFAULT): New.Nathan Sidwell2-7/+12
gcc/ * config/nvptx/nvptx.c (PTX_GANG_DEFAULT): New. (nvptx_goacc_validate_dims): Extend to handle global defaults. * target.def (OACC_VALIDATE_DIMS): Extend documentation. * doc/tm.texti: Rebuilt. * doc/invoke.texi (fopenacc-dim): Document. * lto-wrapper.c (merge_and_complain): Add OPT_fopenacc_dim_ case. (append_compiler_options): Likewise. * omp-low.c (oacc_default_dims, oacc_min_dims): New. (oacc_parse_default_dims): New. (oacc_validate_dims): Add USED arg. Select non-unity default when possible. (oacc_loop_fixed_partitions): Return mask of used partitions. (oacc_loop_auto_partitions): Emit dump info. (oacc_loop_partition): Return mask of used partitions. (execute_oacc_device_lower): Parse default dimension arg. Adjust loop partitioning and validation calls. gcc/c-family/ * c.opt (fopenacc-dim=): New option. gcc/fortran/ * lang.opt (fopenacc-dim=): New option. libgomp/ * testsuite/libgomp.oacc-c-c++-common/loop-dim-default.c: New. * testsuite/libgomp.oacc-fortran/routine-7.f90: Serialize loop. From-SVN: r233041
2016-01-29document that isl-0.16 is supportedSebastian Pop1-1/+1
* config/isl.m4: Add comments about isl-0.16. * configure: Regenerate. gcc/ * doc/install.texi: Document that isl-0.16 is supported. From-SVN: r232997
2016-01-29re PR target/69299 (-mavx performance degradation with r232088)Vladimir Makarov1-0/+14
2016-01-29 Vladimir Makarov <vmakarov@redhat.com> PR target/69299 * config/i386/constraints.md (Bm): Describe as special memory constraint. * doc/md.texi (DEFINE_SPECIAL_MEMORY_CONSTRAINT): Describe it. * genoutput.c (main): Process DEFINE_SPECIAL_MEMORY_CONSTRAINT. * genpreds.c (struct constraint_data): Add is_special_memory. (have_special_memory_constraints, special_memory_start): New static vars. (special_memory_end): Ditto. (add_constraint): Add new arg is_special_memory. Add code to process its true value. Update have_special_memory_constraints. (process_define_constraint): Pass the new arg. (process_define_register_constraint): Ditto. (choose_enum_order): Process special memory. (write_tm_preds_h): Generate enum const CT_SPECIAL_MEMORY and function insn_extra_special_memory_constraint. (main): Process DEFINE_SPECIAL_MEMORY_CONSTRAINT. * gensupport.c (process_rtx): Process DEFINE_SPECIAL_MEMORY_CONSTRAINT. * ira-costs.c (record_reg_classes): Process CT_SPECIAL_MEMORY. * ira-lives.c (single_reg_class): Use insn_extra_special_memory_constraint. * ira.c (ira_setup_alts): Process CT_SPECIAL_MEMORY. * lra-constraints.c (process_alt_operands): Ditto. (curr_insn_transform): Use insn_extra_special_memory_constraint. * recog.c (asm_operand_ok, preprocess_constraints): Process CT_SPECIAL_MEMORY. * reload.c (find_reloads): Ditto. * rtl.def (DEFINE_SPECIFAL_MEMORY_CONSTRAINT): New. * stmt.c (parse_input_constraint): Use insn_extra_special_memory_constraint. From-SVN: r232993
2016-01-28re PR target/69459 (wrong code with -O2 and vector arithmetics @ x86_64)Uros Bizjak1-1/+1
PR target/69459 * config/i386/constraints.md (C): Only accept constant zero operand. (BC): New constraint. * config/i386/sse.md (*mov<mode>_internal): Use BC constraint instead of C constraint. * doc/md.texi (Machine Constraints): Update description of C constraint. testsuite/ChangeLog: PR target/69459 * gcc.target/i386/pr69459.c: New test. From-SVN: r232955
2016-01-28* tree.h (BINFO_FLAG_0): Rename from BINFO_MARKED.Jason Merrill1-3/+2
From-SVN: r232931
2016-01-26PR other/69477 - attribute aligned documentation misleadingMartin Sebor1-33/+33
gcc/ChangeLog: 2016-01-26 Martin Sebor <msebor@redhat.com> PR other/69477 * doc/extend.texi (Common Type Attributes): Move text that talks about attribute packed from attribute aligned to the section discussing the former attribute for clarity. From-SVN: r232840
2016-01-26remove arm_crypto_pragma test selectorChristian Bruel1-12/+0
From-SVN: r232824
2016-01-26re PR target/69442 (wrong code with -Og and 64bit modulo @ armv7a)Jakub Jelinek1-3/+3
PR target/69442 * combine.c (combine_instructions): For REG_EQUAL note with SET_DEST being ZERO_EXTRACT, also temporarily set SET_DEST to the underlying register. * doc/rtl.texi (REG_EQUAL): Document the behavior of REG_EQUAL/REG_EQUIV notes if SET_DEST is ZERO_EXTRACT. * gcc.dg/pr69442.c: New test. From-SVN: r232819
2016-01-25extend.texi (scalar_storage_order type attribute): Fix typo and improve ↵Eric Botcazou1-2/+2
wording for mixed storage order support. * doc/extend.texi (scalar_storage_order type attribute): Fix typo and improve wording for mixed storage order support. From-SVN: r232791
2016-01-25[ARC] Add basic support for double load and store instructionsClaudiu Zissulescu1-1/+5
gcc/ 2016-01-25 Claudiu Zissulescu <claziss@synopsys.com> * config/arc/arc.c (TARGET_DWARF_REGISTER_SPAN): Define. (arc_init): Check validity mll64 option. (arc_save_restore): Use double load/store instruction. (arc_expand_movmem): Likewise. (arc_split_move): Don't split if we have double load/store instructions. Returns a boolean. (arc_process_double_reg_moves): Change function to return boolean instead of a sequence of instructions. (arc_dwarf_register_span): New function. * config/arc/arc-protos.h (arc_split_move): Change prototype. * config/arc/arc.h (TARGET_CPU_CPP_BUILTINS): Define __ARC_LL64__. * config/arc/arc.md (*movdi_insn): Emit ldd/std instructions. (*movdf_insn): Likewise. * config/arc/arc.opt (mll64): New option. * config/arc/predicates.md (even_register_operand): New predicate. * doc/invoke.texi (ARC Options): Add mll64 documentation. From-SVN: r232788
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