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sse2_runtime.
gcc:
* doc/sourcebuild.texi (Effective-Target Keywords): Document
sse_runtime, sse2_runtime.
gcc/testsuite:
* lib/target-supports.exp (check_sse_os_support_available): New
proc.
(check_sse_hw_available): New proc.
(check_effective_target_sse_runtime): New proc.
(check_effective_target_sse2_runtime): New proc.
* lib/fortran-torture.exp (get-fortran-torture-options): Only add
-msse2 if check_sse_os_support_available.
* g++.dg/vect/vect.exp: Only run -msse2 tests if
check_sse_os_support_available.
* gcc.dg/vect/vect.exp: Likewise.
* gfortran.dg/vect/vect.exp: Likewise.
* gcc.target/i386/sol2-check: Renamed to ...
* gcc.target/i386/sse-os-support.h: ... this.
(sol2_check): Renamed to ...
(sse_os_support): ... this.
Only test movss with xmm registers.
* gcc.target/i386/sse-check.h: Reflect new header and function names.
Removed ILL_INSN, ILL_INSN_LEN.
* gcc.target/i386/sse2-check.h: Likewise.
* gcc.target/i386/sse3-check.h: Likewise.
* gcc.dg/pr40550.c: Use dg-require-effective-target sse_runtime.
Removed cpuid.h, __get_cpuid test.
* g++.dg/other/i386-1.C: Use dg-require-effective-target sse2_runtime.
Removed cpuid.h, __get_cpuid test.
* g++.dg/other/pr40446.C: Likewise.
* gcc.dg/compat/union-m128-1_main.c: Likewise.
* gcc.dg/compat/vector-1a_main.c: Likewise.
* gcc.dg/compat/vector-2a_main.c: Likewise.
* gcc.dg/pr36584.c: Likewise.
* gcc.dg/pr37544.c: Likewise.
* gcc.dg/torture/pr16104-1.c: Likewise.
* gcc.dg/torture/stackalign/alloca-2.c: Likewise.
* gcc.dg/torture/stackalign/alloca-3.c: Likewise.
* gcc.dg/torture/stackalign/push-1.c: Likewise.
* gcc.dg/torture/stackalign/vararg-3.c: Likewise.
* gcc.dg/torture/pr35771.h: Removed cpuid.h, __get_cpuid test.
* gcc.dg/torture/pr35771-1.c: Use dg-require-effective-target
sse2_runtime.
* gcc.dg/torture/pr35771-2.c: Likewise.
* gcc.dg/torture/pr35771-3.c: Likewise.
* gcc.target/i386/pr39315-2.c: Likewise.
* gcc.target/i386/pr39315-4.c: Likewise.
* gcc.target/i386/vperm-v2df.c: Likewise.
* gcc.target/i386/vperm-v2di.c: Likewise.
* gcc.target/i386/vperm-v4si-1.c: Likewise.
* gcc.target/i386/vperm-v4sf-1.c: Use dg-require-effective-target
sse_runtime.
From-SVN: r162295
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2010-07-15 Magnus Granberg <zorry@gentoo.org>
Kevin F. Quinn <kevquinn@gentoo.org>
* builtins.c (expand_builtin_init_trampoline): If
-Wtrampolines make a warning.
* common.opt: Add -Wtrampolines.
* doc/invoke.texi: Add -Wtrampolines.
testsuite/
* gcc.dg/Wtrampolines.c: New.
Co-Authored-By: Kevin F. Quinn <kevquinn@gentoo.org>
From-SVN: r162205
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gcc/
* doc/tm.texi.in (SWITCHABLE_TARGET): Document.
* doc/tm.texi: Regenerate.
* Makefile.in (OBJS-common): Add target-globals.o.
(gtype-desc.o): Depend on $(IPA_PROP_H), $(LTO_STREAMER_H)
and target-globals.h.
(target-globals.o): New rule.
(GTFILES): Include $(srcdir)/target-globals.h.
* defaults.h (SWITCHABLE_TARGET): Define.
* gengtype.c (open_base_files): Add target-globals.h to the
list of includes.
* target-globals.h: New file.
* target-globals.c: Likewise.
* Makefile.in (target-globals.o): Depend on $(FLAGS_H).
* flags.h (target_flag_state): New structure.
(default_target_flag_state): Declare.
(this_target_flag_state): Declare as a variable or define as a macro.
(align_loops_log): Redefine as a macro.
(align_loops_max_skip, align_jumps_log): Likewise.
(align_jumps_max_skip, align_labels_log): Likewise.
(align_labels_max_skip, align_functions_log): Likewise.
* toplev.c (default_target_flag_state): New variable.
(this_target_flag_state): New conditional variable.
(align_loops_log): Delete.
(align_loops_max_skip, align_jumps_log): Likewise.
(align_jumps_max_skip, align_labels_log): Likewise.
(align_labels_max_skip, align_functions_log): Likewise.
* target-globals.h (this_target_flag_state): Declare.
(target_globals): Add a flag_state field.
(restore_target_globals): Copy the flag_state field to
this_target_flag_state.
* target-globals.c: Include flags.h.
(default_target_globals): Initialize the flag_state field.
(save_target_globals): Likewise.
From-SVN: r162086
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Solaris 8 and 9/x86.
gcc:
* config.gcc (i[34567]86-*-solaris2*): Default with_arch_32 to
pentiumpro on Solaris 8 and 9/x86.
* doc/install.texi (Specific, i?86-*-solaris2.[89]): Recommend GNU as.
Document SSE/SSE2 support.
* doc/sourcebuild.texi (Effective-Target Keywords): Document sse.
gcc/testsuite:
* lib/target-supports.exp (check_effective_target_sse): New proc.
* gcc.target/i386/sol2-check.h: New file.
* gcc.target/i386/sse-check.h (ILL_INSN, ILL_INSN_LEN): Define.
Include sol2-check.h.
(main) Only run do_test () if sol2_check ().
* gcc.target/i386/sse2-check.h: Likewise.
* gcc.target/i386/sse3-check.h: Likewise.
* gcc.dg/vect/tree-vect.h (check_vect) [__i386__ || __x86_64__]
[__sun__ && __svr4__]: Execute SSE2 instruction.
* gcc.target/i386/math-torture/math-torture.exp: Only add options
with -msse to MATH_TORTURE_OPTIONS if check_effective_target_sse.
* g++.dg/debug/dwarf2/const2b.C: Use dg-require-effective-target sse.
* g++.dg/ext/vector14.C: Likewise.
* g++.dg/other/mmintrin.C: Likewise.
* gcc.dg/20020418-1.c: Likewise.
* gcc.dg/debug/dwarf2/const-2b.c: Likewise.
* gcc.dg/format/ms_unnamed-1.c: Likewise.
* gcc.dg/format/unnamed-1.c: Likewise.
Adapt dg-warning line number.
* gcc.dg/graphite/pr40281.c: Likewise.
* gcc.dg/pr32176.c: Likewise.
* gcc.dg/pr40550.c: Likewise.
* gcc.dg/prefetch-loop-arrays-1.c: Likewise.
* gcc.dg/torture/pr36891.c: Likewise.
* gcc.target/i386/20020218-1.c: Likewise.
* gcc.target/i386/20020523.c: Likewise.
* gcc.target/i386/abi-1.c: Likewise.
* gcc.target/i386/brokensqrt.c: Likewise.
* gcc.target/i386/fastcall-sseregparm.c: Likewise.
* gcc.target/i386/pr13366.c: Likewise.
* gcc.target/i386/pr13685.c: Likewise.
* gcc.target/i386/pr24306.c: Likewise.
* gcc.target/i386/pr31486.c: Likewise.
* gcc.target/i386/pr32065-1.c: Likewise.
* gcc.target/i386/pr32065-2.c: Likewise.
* gcc.target/i386/pr32389.c: Likewise.
* gcc.target/i386/pr38824.c: Likewise.
* gcc.target/i386/pr38931.c: Likewise.
* gcc.target/i386/pr39592-1.c: Likewise.
* gcc.target/i386/pr43766.c: Likewise.
* gcc.target/i386/recip-divf.c: Likewise.
* gcc.target/i386/recip-sqrtf.c: Likewise.
* gcc.target/i386/recip-vec-divf.c: Likewise.
* gcc.target/i386/recip-vec-sqrtf.c: Likewise.
* gcc.target/i386/sse-1.c: Likewise.
* gcc.target/i386/sse-16.c: Likewise.
* gcc.target/i386/sse-2.c: Likewise.
* gcc.target/i386/sse-20.c: Likewise.
* gcc.target/i386/sse-3.c: Likewise.
* gcc.target/i386/sse-7.c: Likewise.
* gcc.target/i386/sse-9.c: Likewise.
* gcc.target/i386/sse-addps-1.c: Likewise.
* gcc.target/i386/sse-addss-1.c: Likewise.
* gcc.target/i386/sse-andnps-1.c: Likewise.
* gcc.target/i386/sse-andps-1.c: Likewise.
* gcc.target/i386/sse-cmpss-1.c: Likewise.
* gcc.target/i386/sse-comiss-1.c: Likewise.
* gcc.target/i386/sse-comiss-2.c: Likewise.
* gcc.target/i386/sse-comiss-3.c: Likewise.
* gcc.target/i386/sse-comiss-4.c: Likewise.
* gcc.target/i386/sse-comiss-5.c: Likewise.
* gcc.target/i386/sse-comiss-6.c: Likewise.
* gcc.target/i386/sse-copysignf-vec.c: Likewise.
* gcc.target/i386/sse-cvtsi2ss-1.c: Likewise.
* gcc.target/i386/sse-cvtsi2ss-2.c: Likewise.
* gcc.target/i386/sse-cvtss2si-1.c: Likewise.
* gcc.target/i386/sse-cvtss2si-2.c: Likewise.
* gcc.target/i386/sse-cvttss2si-1.c: Likewise.
* gcc.target/i386/sse-cvttss2si-2.c: Likewise.
* gcc.target/i386/sse-divps-1.c: Likewise.
* gcc.target/i386/sse-divss-1.c: Likewise.
* gcc.target/i386/sse-init-v4hi-1.c: Likewise.
* gcc.target/i386/sse-init-v4sf-1.c: Likewise.
* gcc.target/i386/sse-maxps-1.c: Likewise.
* gcc.target/i386/sse-maxss-1.c: Likewise.
* gcc.target/i386/sse-minps-1.c: Likewise.
* gcc.target/i386/sse-minss-1.c: Likewise.
* gcc.target/i386/sse-movaps-1.c: Likewise.
* gcc.target/i386/sse-movaps-2.c: Likewise.
* gcc.target/i386/sse-movhlps-1.c: Likewise.
* gcc.target/i386/sse-movhps-1.c: Likewise.
* gcc.target/i386/sse-movhps-2.c: Likewise.
* gcc.target/i386/sse-movlhps-1.c: Likewise.
* gcc.target/i386/sse-movmskps-1.c: Likewise.
* gcc.target/i386/sse-movntps-1.c: Likewise.
* gcc.target/i386/sse-movss-1.c: Likewise.
* gcc.target/i386/sse-movss-2.c: Likewise.
* gcc.target/i386/sse-movss-3.c: Likewise.
* gcc.target/i386/sse-movups-1.c: Likewise.
* gcc.target/i386/sse-movups-2.c: Likewise.
* gcc.target/i386/sse-mulps-1.c: Likewise.
* gcc.target/i386/sse-mulss-1.c: Likewise.
* gcc.target/i386/sse-orps-1.c: Likewise.
* gcc.target/i386/sse-rcpps-1.c: Likewise.
* gcc.target/i386/sse-recip-vec.c: Likewise.
* gcc.target/i386/sse-recip.c: Likewise.
* gcc.target/i386/sse-rsqrtps-1.c: Likewise.
* gcc.target/i386/sse-set-ps-1.c: Likewise.
* gcc.target/i386/sse-sqrtps-1.c: Likewise.
* gcc.target/i386/sse-subps-1.c: Likewise.
* gcc.target/i386/sse-subss-1.c: Likewise.
* gcc.target/i386/sse-ucomiss-1.c: Likewise.
* gcc.target/i386/sse-ucomiss-2.c: Likewise.
* gcc.target/i386/sse-ucomiss-3.c: Likewise.
* gcc.target/i386/sse-ucomiss-4.c: Likewise.
* gcc.target/i386/sse-ucomiss-5.c: Likewise.
* gcc.target/i386/sse-ucomiss-6.c: Likewise.
* gcc.target/i386/sse-unpckhps-1.c: Likewise.
* gcc.target/i386/sse-unpcklps-1.c: Likewise.
* gcc.target/i386/sse-xorps-1.c: Likewise.
* gcc.target/i386/ssefn-1.c: Likewise.
* gcc.target/i386/ssefn-3.c: Likewise.
* gcc.target/i386/sseregparm-1.c: Likewise.
* gcc.target/i386/stackalign/return-3.c: Likewise.
* gcc.target/i386/vectorize1.c: Likewise.
* gcc.target/i386/vperm-v4sf-1.c: Likewise.
* gcc.target/i386/xorps-sse.c: Likewise.
* gfortran.dg/pr28158.f90: Likewise.
* gfortran.dg/pr30667.f: Likewise.
* gnat.dg/loop_optimization7.adb: Likewise.
* gnat.dg/sse_nolib.adb: Likewise.
libgfortran:
* config/fpu-387.h [__sun__ && __svr4__] Include <signal.h>,
<ucontext.h>.
(sigill_caught): New.
(sigill_hdlr): New function
(has_sse) [__sun__ && __svr4__]: Check if SSE instruction causes
SIGILL.
From-SVN: r162073
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2010-07-08 Kai Tietz <kai.tietz@onevision.com>
* config/i386/i386-protos.h (ix86_asm_output_function_label):
New prototype.
* config/i386/i386.c (ix86_function_ms_hook_prologue): Check
for NULL fntype argument and allow 64-bit targets.
(ix86_asm_output_function_label): New function.
(ix86_expand_prologue): Handle 64-bit ms hook prologue.
(ix86_handle_fndecl_attribute): Likewise.
* doc/extend.texi (ms_hook_prologue): Adjust documentation.
* doc/doc/tm.texi: Regenerated.
* doc/doc/doc/tm.texi.in (ASM_OUTPUT_FUNCTION_LABEL): New.
(ASM_DECLARE_FUNCTION_NAME): Adjust documentation.
* defaults.h (ASM_OUTPUT_FUNCTION_LABEL): New macro.
* config/darwin.h (ASM_DECLARE_FUNCTION_NAME): Use
ASM_OUTPUT_FUNCTION_LABEL instead of ASM_OUTPUT_LABEL.
* config/elfos.h: Likewise.
* config/i386/cygming.h: Likewise.
* config/netbsd-aout.h: Likewise.
* config/openbsd.h: Likewise.
* config/i386/i386.h (ASM_OUTPUT_FUNCTION_LABEL): Override
by ix86_asm_output_function_label function call.
* varasm.c (assemble_start_function): Use
ASM_OUTPUT_FUNCTION_LABEL instead of ASM_OUTPUT_LABEL.
From-SVN: r161971
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2010-07-08 Sebastian Pop <sebastian.pop@amd.com>
* common.opt (ftree-loop-if-convert): New flag.
* doc/invoke.texi (ftree-loop-if-convert): Documented.
* tree-if-conv.c (gate_tree_if_conversion): Enable if-conversion
when flag_tree_loop_if_convert is set.
From-SVN: r161963
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gcc
* doc/tm.texi: Update.
* doc/tm.texi.in (SDB and DWARF) <TARGET_WANT_DEBUG_PUB_SECTIONS>:
Add @hook.
* target.def (want_debug_pub_sections): New hook.
* config/darwin.h (TARGET_WANT_DEBUG_PUB_SECTIONS): Define.
* dwarf2out.c (add_pubname_string): Check
targetm.want_debug_pub_sections.
(add_pubname): Likewise.
(add_pubtype): Likewise.
gcc/testsuite
* g++.dg/debug/dwarf2/pubnames-1.C: Make darwin-specific.
From-SVN: r161924
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2010-07-07 H.J. Lu <hongjiu.lu@intel.com>
PR target/44850
* config/i386/i386.c (ix86_function_ms_hook_prologue): Revert
revision 161876.
(ix86_expand_prologue): Likewise.
(ix86_handle_fndecl_attribute): Likewise.
(ix86_asm_declare_function_name): Likewise.
* config/i386/i386.h (ASM_DECLARE_FUNCTION_NAME): Likewise.
* config/i386/cygming.h (ASM_DECLARE_FUNCTION_NAME): Likewise.
(SUBTARGET_ASM_DECLARE_FUNCTION_NAME): Likewise.
* config/i386/i386-protos.h (ix86_asm_declare_function_name):
Likewise.
* doc/extend.texi: Likewise.
From-SVN: r161911
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* doc/gimple.texi (GIMPLE_DEBUG): Document.
* doc/rtl.texi (Debug Information): New node.
(NOTE_INSN_VAR_LOCATION): Document.
(debug_insn): Likewise.
* doc/generic.texi (DEBUG_EXPR_DECL): Document.
From-SVN: r161899
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2010-07-06 Kai Tietz <kai.tietz@onevision.com>
* config/i386/i386.c (ix86_function_ms_hook_prologue): Enable x64
support.
(ix86_expand_prologue): Likewise.
(ix86_handle_fndecl_attribute): Likewise.
(ix86_asm_declare_function_name): New function for
ASM_DECLARE_FUNCTION_NAME.
* config/i386/i386.h (ASM_DECLARE_FUNCTION_NAME): New macro.
* config/i386/cygming.h (ASM_DECLARE_FUNCTION_NAME): Removed.
(SUBTARGET_ASM_DECLARE_FUNCTION_NAME): New macro.
* config/i386/i386-protos.h (ix86_asm_declare_function_name): New.
* doc/extend.texi: Adjust documentation about ms_hook_prologue
attribute.
From-SVN: r161876
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gcc/
2010-07-05 H.J. Lu <hongjiu.lu@intel.com>
AVX Programming Reference (June, 2010)
* config/i386/cpuid.h (bit_F16C): New.
(bit_RDRND): Likewise.
(bit_FSGSBASE): Likewise.
* config/i386/i386-builtin-types.def: Add
"DEF_FUNCTION_TYPE (UINT16)", function types for
float16 <-> float conversions and
"DEF_FUNCTION_TYPE (VOID, UINT64)".
* config/i386/i386-c.c (ix86_target_macros_internal): Support
OPTION_MASK_ISA_FSGSBASE, OPTION_MASK_ISA_RDRND and
OPTION_MASK_ISA_F16C.
* config/i386/i386.c (OPTION_MASK_ISA_FSGSBASE_SET): New.
(OPTION_MASK_ISA_RDRND_SET): Likewise.
(OPTION_MASK_ISA_F16C_SET): Likewise.
(OPTION_MASK_ISA_FSGSBASE_UNSET): Likewise.
(OPTION_MASK_ISA_RDRND_UNSET): Likewise.
(OPTION_MASK_ISA_F16C_UNSET): Likewise.
(OPTION_MASK_ISA_AVX_UNSET): Add OPTION_MASK_ISA_F16C_UNSET.
(ix86_handle_option): Handle OPT_mfsgsbase, OPT_mrdrnd and
OPT_mf16c.
(ix86_target_string): Support -mfsgsbase, -mrdrnd and -mf16c.
(pta_flags): Add PTA_FSGSBASE, PTA_RDRND and PTA_F16C.
(override_options): Handle them.
(ix86_valid_target_attribute_inner_p): Handle fsgsbase, rdrnd
and f16c.
(ix86_builtins): Add IX86_BUILTIN_RDFSBASE32,
IX86_BUILTIN_RDFSBASE64, IX86_BUILTIN_RDGSBASE32,
IX86_BUILTIN_RDGSBASE64, IX86_BUILTIN_WRFSBASE32,
IX86_BUILTIN_WRFSBASE64, IX86_BUILTIN_WRGSBASE32,
IX86_BUILTIN_WRGSBASE64, IX86_BUILTIN_RDRAND16,
IX86_BUILTIN_RDRAND32, IX86_BUILTIN_RDRAND64,
IX86_BUILTIN_CVTPH2PS, IX86_BUILTIN_CVTPH2PS256,
IX86_BUILTIN_CVTPS2PH and IX86_BUILTIN_CVTPS2PH256.
(bdesc_args): Likewise.
(ix86_expand_args_builtin): Handle V8SF_FTYPE_V8HI,
V4SF_FTYPE_V8HI, V8HI_FTYPE_V8SF_INT and V8HI_FTYPE_V4SF_INT.
(ix86_expand_special_args_builtin): Handle VOID_FTYPE_UINT64,
VOID_FTYPE_UNSIGNED, UNSIGNED_FTYPE_VOID and UINT16_FTYPE_VOID.
Handle non-memory store.
* config/i386/i386.h (TARGET_FSGSBASE): New.
(TARGET_RDRND): Likewise.
(TARGET_F12C): Likewise.
* config/i386/i386.md (UNSPEC_VCVTPH2PS): New.
(UNSPEC_VCVTPS2PH): Likewise.
(UNSPECV_RDFSBASE): Likewise.
(UNSPECV_RDGSBASE): Likewise.
(UNSPECV_WRFSBASE): Likewise.
(UNSPECV_WRGSBASE): Likewise.
(UNSPECV_RDRAND): Likewise.
(rdfsbase<mode>): Likewise.
(rdgsbase<mode>): Likewise.
(wrfsbase<mode>): Likewise.
(wrgsbase<mode>): Likewise.
(rdrand<mode>): Likewise.
* config/i386/i386.opt: Add -mfsgsbase, -mrdrnd and -mf16c.
* config/i386/immintrin.h (_rdrand_u16): New.
(_rdrand_u32): Likewise.
(_readfsbase_u32): Likewise.
(_readfsbase_u64): Likewise.
(_readgsbase_u32): Likewise.
(_readgsbase_u64): Likewise.
(_writefsbase_u32): Likewise.
(_writefsbase_u64): Likewise.
(_writegsbase_u32): Likewise.
(_writegsbase_u64): Likewise.
(_rdrand_u64): Likewise.
(_cvtsh_ss): Likewise.
(_mm_cvtph_ps): Likewise.
(_mm256_cvtph_ps): Likewise.
(_cvtss_sh): Likewise.
(_mm_cvtps_ph): Likewise.
(_mm256_cvtps_ph): Likewise.
* config/i386/sse.md (vcvtph2ps): New.
(*vcvtph2ps_load): Likewise.
(vcvtph2ps256): Likewise.
(vcvtps2ph): Likewise.
(*vcvtps2ph): Likewise.
(*vcvtps2ph_store): Likewise.
(vcvtps2ph256): Likewise.
* doc/extend.texi: Document FSGSBASE and RDRND built-in functions.
* doc/invoke.texi: Document -mfsgsbase, -mrdrnd and -mf16c.
gcc/testsuite/
2010-07-05 H.J. Lu <hongjiu.lu@intel.com>
AVX Programming Reference (June, 2010)
* g++.dg/other/i386-2.C: Add -mfsgsbase -mrdrnd -mf16c.
* g++.dg/other/i386-3.C: Likewise.
* gcc.target/i386/sse-12.c: Likewise.
* gcc.target/i386/f16c-check.h: New.
* gcc.target/i386/rdfsbase-1.c: Likewise.
* gcc.target/i386/rdfsbase-2.c: Likewise.
* gcc.target/i386/rdgsbase-1.c: Likewise.
* gcc.target/i386/rdgsbase-2.c: Likewise.
* gcc.target/i386/rdrand-1.c: Likewise.
* gcc.target/i386/rdrand-2.c: Likewise.
* gcc.target/i386/rdrand-3.c: Likewise.
* gcc.target/i386/vcvtph2ps-1.c: Likewise.
* gcc.target/i386/vcvtph2ps-2.c: Likewise.
* gcc.target/i386/vcvtph2ps-3.c: Likewise.
* gcc.target/i386/vcvtps2ph-1.c: Likewise.
* gcc.target/i386/vcvtps2ph-2.c: Likewise.
* gcc.target/i386/vcvtps2ph-3.c: Likewise.
* gcc.target/i386/wrfsbase-1.c: Likewise.
* gcc.target/i386/wrfsbase-2.c: Likewise.
* gcc.target/i386/wrgsbase-1.c: Likewise.
* gcc.target/i386/wrgsbase-2.c: Likewise.
* gcc.target/i386/sse-13.c: Add -mfsgsbase -mrdrnd -mf16c.
(__builtin_ia32_vcvtps2ph): New.
(__builtin_ia32_vcvtps2ph256): Likewise.
* gcc.target/i386/sse-14.c: Add -mfsgsbase -mrdrnd -mf16c.
Test _cvtss_sh, _mm_cvtps_ph and _mm256_cvtps_ph.
* gcc.target/i386/sse-22.c: Add fsgsbase,rdrnd,f16c.
Test _cvtss_sh, _mm_cvtps_ph and _mm256_cvtps_ph.
* gcc.target/i386/sse-23.c (__builtin_ia32_vcvtps2ph): New.
(__builtin_ia32_vcvtps2ph256): Likewise.
Add fsgsbase,rdrnd,f16c.
* lib/target-supports.exp (check_effective_target_f16c): New.
From-SVN: r161855
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arguments.
* doc/tm.texi.in (TARGET_VECTORIZE_BUILTIN_VECTORIZATION_COST):
Document new arguments.
* doc/tm.texi: Regenerate.
* targhooks.c (default_builtin_vectorization_cost): Add new arguments.
Handle unaligned store.
* targhooks.h (default_builtin_vectorization_cost): Add new arguments.
* target.def (builtin_vectorization_cost): Add new arguments.
* target.h (enum vect_cost_for_stmt): Add unaligned_store.
* tree-vect-loop-manip.c (vect_gen_niters_for_prolog_loop): Take number
of iterations of prolog loop directly from LOOP_PEELING_FOR_ALIGNMENT.
(vect_vfa_segment_size): Fix indentation.
* tree-vectorizer.h (struct _vect_peel_info): New.
(struct _vect_peel_extended_info): New.
(struct _loop_vec_info): Add new field for peeling hash table and a
macro for its access.
(VECT_MAX_COST): Define.
(vect_get_load_cost): Declare.
(vect_get_store_cost, vect_get_known_peeling_cost,
vect_get_single_scalar_iteraion_cost): Likewise.
(vect_supportable_dr_alignment): Add new argument.
* tree-vect-loop.c (new_loop_vec_info): Initialize peeling hash table
field.
(destroy_loop_vec_info): Free peeling hash table.
(vect_analyze_loop_form): Update call to builtin_vectorization_cost.
(vect_analyze_loop): Move vect_enhance_data_refs_alignment before
vect_analyze_slp. Fix indentation.
(vect_get_single_scalar_iteraion_cost): New function.
(vect_get_known_peeling_cost): Likewise.
(vect_estimate_min_profitable_iters): Rename byte_misalign to npeel.
Call vect_get_single_scalar_iteraion_cost instead of cost_for_stmt per
statement. Move outside cost calculation inside unknown peeling case.
Call vect_get_known_peeling_cost for known amount of peeling.
* tree-vect-data-refs.c (vect_compute_data_ref_alignment): Add data
reference to the print message of forced alignment.
(vect_verify_datarefs_alignment): Update call to
vect_supportable_dr_alignment.
(vect_get_data_access_cost): New function.
(vect_peeling_hash, vect_peeling_hash_eq, vect_peeling_hash_insert,
vect_peeling_hash_get_most_frequent, vect_peeling_hash_get_lowest_cost,
vect_peeling_hash_choose_best_peeling): Likewise.
(vect_enhance_data_refs_alignment): Fix documentation. Use hash table
to store all the accesses in the loop and find best possible access to
align using peeling for known alignment case. For unknown alignment
check if stores are preferred or if peeling is worthy.
(vect_find_same_alignment_drs): Analyze pairs of loads too.
(vect_supportable_dr_alignment): Add new argument and check aligned
accesses according to it.
* tree-vect-stmts.c (vect_get_stmt_cost): New function.
(cost_for_stmt): Call vect_get_stmt_cost.
(vect_model_simple_cost): Likewise.
(vect_model_store_cost): Call vect_get_stmt_cost. Call
vect_get_store_cost to calculate the cost of the statement.
(vect_get_store_cost): New function.
(vect_model_load_cost): Call vect_get_stmt_cost. Call
vect_get_load_cost to calculate the cost of the statement.
(vect_get_load_cost): New function.
(vectorizable_store): Update call to vect_supportable_dr_alignment.
(vectorizable_load): Likewise.
* config/spu/spu.c (spu_builtin_vectorization_cost): Add new
arguments.
* config/i386/i386.c (ix86_builtin_vectorization_cost): Add new
arguments. Handle unaligned store.
* config/rs6000/rs6000.c (rs6000_builtin_vectorization_cost): New.
(rs6000_builtin_support_vector_misalignment): Return true for word and
double word alignments for VSX.
* tree-vect-slp.c (vect_build_slp_tree): Update calls to
vect_supportable_dr_alignment and builtin_vectorization_cost.
Co-Authored-By: Revital Eres <eres@il.ibm.com>
From-SVN: r161797
|
|
PR/44128
* gcc/doc/invoke.texi: Update documentation of -Wshadow.
* gcc/cp/name-lookup.c (pushdecl_maybe_friend): Warn when a local
decl (variable or type) shadows another type.
* gcc/testsuite/g++.dg/warn/Wshadow-7.C: New test.
From-SVN: r161765
|
|
autovectorization)
2010-07-02 Julian Brown <julian@codesourcery.com>
Sandra Loosemore <sandra@codesourcery.com>
PR target/43703
gcc/
* config/arm/vec-common.md (add<mode>3, sub<mode>3, smin<mode>3)
(smax<mode>3): Disable for NEON float modes when
flag_unsafe_math_optimizations is false.
* config/arm/neon.md (*add<mode>3_neon, *sub<mode>3_neon)
(*mul<mode>3_neon)
(mul<mode>3add<mode>_neon, mul<mode>3neg<mode>add<mode>_neon)
(reduc_splus_<mode>, reduc_smin_<mode>, reduc_smax_<mode>): Disable
for NEON float modes when flag_unsafe_math_optimizations is false.
(quad_halves_<code>v4sf): Only enable if flag_unsafe_math_optimizations
is true.
* doc/invoke.texi (ARM Options): Add note about floating point
vectorization requiring -funsafe-math-optimizations.
gcc/testsuite/
* gcc.dg/vect/vect.exp: Add -ffast-math for NEON.
* gcc.dg/vect/vect-reduc-6.c: Add XFAIL for NEON.
Co-Authored-By: Sandra Loosemore <sandra@codesourcery.com>
From-SVN: r161763
|
|
2010-07-02 Sandra Loosemore <sandra@codesourcery.com>
Julian Brown <julian@codesourcery.com>
gcc/
* config/arm/neon.md (UNSPEC_VABA): Delete.
(UNSPEC_VABAL): Delete.
(UNSPEC_VABS): Delete.
(UNSPEC_VMUL_N): Delete.
(adddi3_neon): New.
(subdi3_neon): New.
(mul<mode>3add<mode>_neon): Make the pattern named.
(mul<mode>3neg<mode>add<mode>_neon): Likewise.
(neon_vadd<mode>): Replace with define_expand, and move the remaining
unspec parts...
(neon_vadd<mode>_unspec): ...to this.
(neon_vmla<mode>, neon_vmla<mode>_unspec): Likewise.
(neon_vlms<mode>, neon_vmls<mode>_unspec): Likewise.
(neon_vsub<mode>, neon_vsub<mode>_unspec): Likewise.
(neon_vaba<mode>): Rewrite in terms of vabd.
(neon_vabal<mode>): Rewrite in terms of vabdl.
(neon_vabs<mode>): Rewrite without unspec.
* config/arm/arm.md (*arm_adddi3): Disable for TARGET_NEON.
(*arm_subdi3): Likewise.
* config/arm/neon.ml (Vadd, Vsub): Split out 64-bit variants and add
No_op attribute to disable assembly output checks.
* config/arm/arm_neon.h: Regenerated.
* doc/arm-neon-intrinsics.texi: Regenerated.
gcc/testsuite/
* gcc.target/arm/neon/vadds64.c: Regenerated.
* gcc.target/arm/neon/vaddu64.c: Regenerated.
* gcc.target/arm/neon/vsubs64.c: Regenerated.
* gcc.target/arm/neon/vsubu64.c: Regenerated.
* gcc.target/arm/neon-vmla-1.c: Add -ffast-math to options.
* gcc.target/arm/neon-vmls-1.c: Likewise.
* gcc.target/arm/neon-vsubs64.c: New execution test.
* gcc.target/arm/neon-vsubu64.c: New execution test.
* gcc.target/arm/neon-vadds64.c: New execution test.
* gcc.target/arm/neon-vaddu64.c: New execution test.
Co-Authored-By: Julian Brown <julian@codesourcery.com>
From-SVN: r161762
|
|
2010-07-02 Sandra Loosemore <sandra@codesourcery.com>
gcc/
* config/arm/neon.md (UNSPEC_VAND): Delete.
(UNSPEC_VBIC): Delete.
(UNSPEC_VCLZ): Delete.
(UNSPEC_VCNT): Delete.
(UNSPEC_VEOR): Delete.
(UNSPEC_VORN): Delete.
(UNSPEC_VORR): Delete.
(iordi3_neon): Rewrite RTL without unspec. Add alternatives to handle
core registers too.
(anddi3_neon): Likewise.
(orndi3_neon): Likewise.
(bicdi3_neon): Likewise.
(xordi3_neon): Likewise.
(neon_vclz<mode>): Rewrite as define_expand and clz<mode>2 to get
rid of unspec and handle unused operand.
(neon_vcnt<mode>): Similarly, with popcount<mode>2.
* config/arm/predicates.md (imm_for_neon_logic_operand):
Require TARGET_NEON.
(imm_for_neon_inv_logic_operand): Likewise.
* config/arm/arm.md (define_split for logical_binary_operator):
Disable for NEON registers.
(anddi3): Add new define_expand, and rename the insn. Disable
this insn for NEON, where anddi3_neon now applies.
(*anddi_notdi_di): Disable for TARGET_NEON, where bicdi3_neon applies.
(iordi3): As for anddi3.
(xordi3): Likewise.
* config/arm/neon.ml (Vand): Split DImode variants and mark them
as No_op to disable testing for exact instruction match.
(Vorr): Likewise.
(Veor): Likewise.
(Vbic): Likewise.
(Vorn): Likewise.
* config/arm/arm_neon.h: Regenerated.
* doc/arm-neon-intrinsics.texi: Regenerated.
gcc/testsuite/
* gcc.target/arm/neon-vands64.c: New.
* gcc.target/arm/neon-vandu64.c: New.
* gcc.target/arm/neon-vbics64.c: New.
* gcc.target/arm/neon-vbicu64.c: New.
* gcc.target/arm/neon-veors64.c: New.
* gcc.target/arm/neon-veoru64.c: New.
* gcc.target/arm/neon-vorns64.c: New.
* gcc.target/arm/neon-vornu64.c: New.
* gcc.target/arm/neon-vorrs64.c: New.
* gcc.target/arm/neon-vorru64.c: New.
* gcc.target/arm/neon/vands64.c: Regenerated.
* gcc.target/arm/neon/vandu64.c: Regenerated.
* gcc.target/arm/neon/vbics64.c: Regenerated.
* gcc.target/arm/neon/vbicu64.c: Regenerated.
* gcc.target/arm/neon/veors64.c: Regenerated.
* gcc.target/arm/neon/veoru64.c: Regenerated.
* gcc.target/arm/neon/vorns64.c: Regenerated.
* gcc.target/arm/neon/vornu64.c: Regenerated.
* gcc.target/arm/neon/vorrs64.c: Regenerated.
* gcc.target/arm/neon/vorru64.c: Regenerated.
From-SVN: r161755
|
|
2010-07-02 Sandra Loosemore <sandra@codesourcery.com>
gcc/
* config/arm/arm.c (neon_vdup_constant): Expand into canonical RTL
instead of an unspec.
(neon_expand_vector_init): Likewise.
* config/arm/neon.md (UNSPEC_VCOMBINE): Delete.
(UNSPEC_VDUP_LANE): Delete.
(UNSPEC VDUP_N): Delete.
(UNSPEC_VGET_HIGH): Delete.
(UNSPEC_VGET_LANE): Delete.
(UNSPEC_VGET_LOW): Delete.
(UNSPEC_VMVN): Delete.
(UNSPEC_VSET_LANE): Delete.
(V_double_vector_mode): New.
(vec_set<mode>_internal): Make code emitted match that for the
corresponding intrinsics.
(vec_setv2di_internal): Likewise.
(neon_vget_lanedi): Rewrite to expand into emit_move_insn.
(neon_vget_lanev2di): Rewrite to expand into vec_extractv2di.
(neon_vset_lane<mode>): Combine double and quad patterns and
expand into vec_set<mode>_internal instead of UNSPEC_VSET_LANE.
(neon_vset_lanedi): Rewrite to expand into emit_move_insn.
(neon_vdup_n<mode>): Rewrite RTL without unspec.
(neon_vdup_ndi): Rewrite as define_expand and use emit_move_insn.
(neon_vdup_nv2di): Rewrite RTL without unspec and merge with
with neon_vdup_lanev2di, adjusting the pattern from the latter
to be predicable for consistency.
(neon_vdup_lane<mode>_internal): New.
(neon_vdup_lane<mode>): Turn into a define_expand and rewrite
to avoid using an unspec.
(neon_vdup_lanedi): Rewrite RTL pattern to avoid unspec.
(neon_vdup_lanev2di): Turn into a define_expand.
(neon_vcombine): Rewrite pattern to eliminate UNPSEC_VCOMBINE.
(neon_vget_high<mode>): Replace with....
(neon_vget_highv16qi): New pattern using canonical RTL.
(neon_vget_highv8hi): Likewise.
(neon_vget_highv4si): Likewise.
(neon_vget_highv4sf): Likewise.
(neon_vget_highv2di): Likewise.
(neon_vget_low<mode>): Replace with....
(neon_vget_lowv16qi): New pattern using canonical RTL.
(neon_vget_lowv8hi): Likewise.
(neon_vget_lowv4si): Likewise.
(neon_vget_lowv4sf): Likewise.
(neon_vget_lowv2di): Likewise.
* config/arm/neon.ml (Vget_lane): Add No_op attribute to suppress
test for this emitting vmov.
(Vset_lane): Likewise.
(Vdup_n): Likewise.
(Vmov_n): Likewise.
* doc/arm-neon-intrinsics.texi: Regenerated.
gcc/testsuite/
* gcc.target/arm/neon/vdup_ns64.c: Regenerated.
* gcc.target/arm/neon/vdup_nu64.c: Regenerated.
* gcc.target/arm/neon/vdupQ_ns64.c: Regenerated.
* gcc.target/arm/neon/vdupQ_nu64.c: Regenerated.
* gcc.target/arm/neon/vmov_ns64.c: Regenerated.
* gcc.target/arm/neon/vmov_nu64.c: Regenerated.
* gcc.target/arm/neon/vmovQ_ns64.c: Regenerated.
* gcc.target/arm/neon/vmovQ_nu64.c: Regenerated.
* gcc.target/arm/neon/vget_lanes64.c: Regenerated.
* gcc.target/arm/neon/vget_laneu64.c: Regenerated.
* gcc.target/arm/neon/vset_lanes64.c: Regenerated.
* gcc.target/arm/neon/vset_laneu64.c: Regenerated.
* gcc.target/arm/neon-vdup_ns64.c: New.
* gcc.target/arm/neon-vdup_nu64.c: New.
* gcc.target/arm/neon-vdupQ_ns64.c: New.
* gcc.target/arm/neon-vdupQ_nu64.c: New.
* gcc.target/arm/neon-vdupQ_lanes64.c: New.
* gcc.target/arm/neon-vdupQ_laneu64.c: New.
* gcc.target/arm/neon-vmov_ns64.c: New.
* gcc.target/arm/neon-vmov_nu64.c: New.
* gcc.target/arm/neon-vmovQ_ns64.c: New.
* gcc.target/arm/neon-vmovQ_nu64.c: New.
* gcc.target/arm/neon-vget_lanes64.c: New.
* gcc.target/arm/neon-vget_laneu64.c: New.
* gcc.target/arm/neon-vset_lanes64.c: New.
* gcc.target/arm/neon-vset_laneu64.c: New.
From-SVN: r161720
|
|
config:
* gc++filt.m4: New file.
contrib:
* make_sunver.pl: New file.
libstdc++v3:
* acinclude.m4 (GLIBCXX_ENABLE_SYMVERS): Handle sun style.
Require GCC_PROG_GNU_CXXFILT.
(_GLIBCXX_HAVE_SYMVER_SYMBOL_RENAMING_RUNTIME_SUPPORT): Define
unless targetting solaris2*.
Include ../config/gc++filt.m4.
* configure.host (i?86-*-solaris2*): Set abi_baseline_pair.
(sparc-*-solaris2*): Likewise.
* src/Makefile.am [ENABLE_SYMVERS_SUN] (version_dep, version_arg):
New variables.
(libstdc++-symbols.ver-sun): New target.
* configure: Regenerate.
* config.h.in: Regenerate.
* Makefile.in: Likewise.
* doc/Makefile.in: Likewise.
* include/Makefile.in: Likewise.
* libsupc++/Makefile.in: Likewise.
* po/Makefile.in: Likewise.
* python/Makefile.in: Likewise.
* src/Makefile.in: Likewise.
* src/atomic.cc: Only define/use _GLIBCXX_ASM_SYMVER if
_GLIBCXX_HAVE_SYMVER_RENAMING_RUNTIME_SUPPORT.
* src/compatibility.cc: Likewise.
* testsuite/Makefile.am (baseline_subdir): Define.
(baseline_symbols): Use it.
(new-abi-baseline): Likewise.
* testsuite/Makefile.in: Regenerate.
* config/abi/pre/gnu.ver (GLIBCXX_3.4.5): Enclose duplicates in
#ifdef HAVE_SYMVER_RENAMING_RUNTIME_SUPPORT.
(GLIBCXX_3.4.6): Likewise.
* doc/xml/manual/configure.xml (--enable-symvers): Document sun
style.
* doc/xml/manual/abi.xml: Fix grammar.
(Symbol versioning on the libstdc++.so binary): Fix mapfile path.
(Incremental bumping of a library pre-defined macro): Fix
c++config path.
(Incremental bumping of a library pre-defined macro,
_GLIBCPP_VERSION): Likewise.
(Matching each specific C++ compiler release to a specific set of
C++ include files): Fix acinclude.m4 path.
(Prerequisites): Allow for Sun linker on Solaris 2.5+.
Use proper link to Configuring.
Fix acinclude.m4 path.
(Checking Active): Allow for additional symbol versioning styles.
Provide Solaris 2 example with pvs -r.
(Bibliography): Update Linker and Libraries Guide, C++ Migration
Guide entries.
gcc:
* doc/install.texi (Prerequisites): Document Perl requirement on
Solaris 2.
(Specific, *-*-solaris2*): Document GNU c++filt requirement.
From-SVN: r161696
|
|
2010-07-01 Richard Guenther <rguenther@suse.de>
PR middle-end/42834
PR middle-end/44468
* doc/gimple.texi (is_gimple_mem_ref_addr): Document.
* doc/generic.texi (References to storage): Document MEM_REF.
* tree-pretty-print.c (dump_generic_node): Handle MEM_REF.
(print_call_name): Likewise.
* tree.c (recompute_tree_invariant_for_addr_expr): Handle MEM_REF.
(build_simple_mem_ref_loc): New function.
(mem_ref_offset): Likewise.
* tree.h (build_simple_mem_ref_loc): Declare.
(build_simple_mem_ref): Define.
(mem_ref_offset): Declare.
* fold-const.c: Include tree-flow.h.
(operand_equal_p): Handle MEM_REF.
(build_fold_addr_expr_with_type_loc): Likewise.
(fold_comparison): Likewise.
(fold_unary_loc): Fold
VIEW_CONVERT_EXPR <T1, MEM_REF <T2, ...>> to MEM_REF <T1, ...>.
(fold_binary_loc): Fold MEM[&MEM[p, CST1], CST2] to MEM[p, CST1 + CST2],
fold MEM[&a.b, CST2] to MEM[&a, offsetof (a, b) + CST2].
* tree-ssa-alias.c (ptr_deref_may_alias_decl_p): Handle MEM_REF.
(ptr_deref_may_alias_ref_p_1): Likewise.
(ao_ref_base_alias_set): Properly differentiate base object for
offset and TBAA.
(ao_ref_init_from_ptr_and_size): Use MEM_REF.
(indirect_ref_may_alias_decl_p): Handle MEM_REFs properly.
(indirect_refs_may_alias_p): Likewise.
(refs_may_alias_p_1): Likewise. Remove pointer SSA name def
chasing code.
(ref_maybe_used_by_call_p_1): Handle MEM_REF.
(call_may_clobber_ref_p_1): Likewise.
* dwarf2out.c (loc_list_from_tree): Handle MEM_REF.
* expr.c (expand_assignment): Handle MEM_REF.
(store_expr): Handle MEM_REFs from STRING_CSTs.
(store_field): If expanding a MEM_REF of a non-addressable
decl use bitfield operations.
(get_inner_reference): Handle MEM_REF.
(expand_expr_addr_expr_1): Likewise.
(expand_expr_real_1): Likewise.
* tree-eh.c (tree_could_trap_p): Handle MEM_REF.
* alias.c (ao_ref_from_mem): Handle MEM_REF.
(get_alias_set): Likewise. Properly handle VIEW_CONVERT_EXPRs.
* tree-data-ref.c (dr_analyze_innermost): Handle MEM_REF.
(dr_analyze_indices): Likewise.
(dr_analyze_alias): Likewise.
(object_address_invariant_in_loop_p): Likewise.
* gimplify.c (mark_addressable): Handle MEM_REF.
(gimplify_cond_expr): Build MEM_REFs.
(gimplify_modify_expr_to_memcpy): Likewise.
(gimplify_init_ctor_preeval_1): Handle MEM_REF.
(gimple_fold_indirect_ref): Adjust.
(gimplify_expr): Handle MEM_REF. Gimplify INDIRECT_REF to MEM_REF.
* tree.def (MEM_REF): New tree code.
* tree-dfa.c: Include toplev.h.
(get_ref_base_and_extent): Handle MEM_REF.
(get_addr_base_and_unit_offset): New function.
* emit-rtl.c (set_mem_attributes_minus_bitpos): Handle MEM_REF.
* gimple-fold.c (may_propagate_address_into_dereference): Handle
MEM_REF.
(maybe_fold_offset_to_array_ref): Allow possibly out-of bounds
accesses if the array has just one dimension. Remove always true
parameter. Do not require type compatibility here.
(maybe_fold_offset_to_component_ref): Remove.
(maybe_fold_stmt_indirect): Remove.
(maybe_fold_reference): Remove INDIRECT_REF handling.
Fold back to non-MEM_REF.
(maybe_fold_offset_to_address): Simplify. Deal with type
mismatches here.
(maybe_fold_reference): Likewise.
(maybe_fold_stmt_addition): Likewise. Also handle
&ARRAY + I in addition to &ARRAY[0] + I.
(fold_gimple_assign): Handle ADDR_EXPR of MEM_REFs.
(gimple_get_relevant_ref_binfo): Handle MEM_REF.
* cfgexpand.c (expand_debug_expr): Handle MEM_REF.
* tree-ssa.c (useless_type_conversion_p): Make most pointer
conversions useless.
(warn_uninitialized_var): Handle MEM_REF.
(maybe_rewrite_mem_ref_base): New function.
(execute_update_addresses_taken): Implement re-writing of MEM_REFs
to SSA form.
* tree-inline.c (remap_gimple_op_r): Handle MEM_REF, remove
INDIRECT_REF handling.
(copy_tree_body_r): Handle MEM_REF.
* gimple.c (is_gimple_addressable): Adjust.
(is_gimple_address): Likewise.
(is_gimple_invariant_address): ADDR_EXPRs of MEM_REFs with
invariant base are invariant.
(is_gimple_min_lval): Adjust.
(is_gimple_mem_ref_addr): New function.
(get_base_address): Handle MEM_REF.
(count_ptr_derefs): Likewise.
(get_base_loadstore): Likewise.
* gimple.h (is_gimple_mem_ref_addr): Declare.
(gimple_call_fndecl): Handle invariant MEM_REF addresses.
* tree-cfg.c (verify_address): New function, split out from ...
(verify_expr): ... here. Use for verifying ADDR_EXPRs and
the address operand of MEM_REFs. Verify MEM_REFs. Reject
INDIRECT_REFs.
(verify_types_in_gimple_min_lval): Handle MEM_REF. Disallow
INDIRECT_REF. Allow conversions.
(verify_types_in_gimple_reference): Verify VIEW_CONVERT_EXPR of
a register does not change its size.
(verify_types_in_gimple_reference): Verify MEM_REF.
(verify_gimple_assign_single): Disallow INDIRECT_REF.
Handle MEM_REF.
* tree-ssa-operands.c (opf_non_addressable, opf_not_non_addressable):
New.
(mark_address_taken): Handle MEM_REF.
(get_indirect_ref_operands): Pass through opf_not_non_addressable.
(get_asm_expr_operands): Pass opf_not_non_addressable.
(get_expr_operands): Handle opf_[not_]non_addressable.
Handle MEM_REF. Remove INDIRECT_REF handling.
* tree-vrp.c: (check_array_ref): Handle MEM_REF.
(search_for_addr_array): Likewise.
(check_array_bounds): Likewise.
(vrp_stmt_computes_nonzero): Adjust for MEM_REF.
* tree-ssa-loop-im.c (for_each_index): Handle MEM_REF.
(ref_always_accessed_p): Likewise.
(gen_lsm_tmp_name): Likewise. Handle ADDR_EXPR.
* tree-complex.c (extract_component): Do not handle INDIRECT_REF.
Handle MEM_REF.
* cgraphbuild.c (mark_load): Properly check for NULL result
from get_base_address.
(mark_store): Likewise.
* tree-ssa-loop-niter.c (array_at_struct_end_p): Handle MEM_REF.
* tree-loop-distribution.c (generate_builtin): Exchange INDIRECT_REF
handling for MEM_REF.
* tree-scalar-evolution.c (follow_ssa_edge_expr): Handle
&MEM[ptr + CST] similar to POINTER_PLUS_EXPR.
* builtins.c (stabilize_va_list_loc): Use the function ABI
valist type if we couldn't canonicalize the argument type.
Always dereference with the canonical va-list type.
(maybe_emit_free_warning): Handle MEM_REF.
(fold_builtin_memory_op): Simplify and handle MEM_REFs in folding
memmove to memcpy.
* builtins.c (fold_builtin_memory_op): Use ref-all types
for all memcpy foldings.
* omp-low.c (build_receiver_ref): Adjust for MEM_REF.
(build_outer_var_ref): Likewise.
(scan_omp_1_op): Likewise.
(lower_rec_input_clauses): Likewise.
(lower_lastprivate_clauses): Likewise.
(lower_reduction_clauses): Likewise.
(lower_copyprivate_clauses): Likewise.
(expand_omp_atomic_pipeline): Likewise.
(expand_omp_atomic_mutex): Likewise.
(create_task_copyfn): Likewise.
* tree-ssa-sccvn.c (copy_reference_ops_from_ref): Handle MEM_REF.
Remove old union trick. Initialize constant offsets.
(ao_ref_init_from_vn_reference): Likewise. Do not handle
INDIRECT_REF. Init base_alias_set properly.
(vn_reference_lookup_3): Replace INDIRECT_REF handling with
MEM_REF.
(vn_reference_fold_indirect): Adjust for MEM_REFs.
(valueize_refs): Fold MEM_REFs. Re-evaluate constant offset
for ARRAY_REFs.
(may_insert): Remove.
(visit_reference_op_load): Do not test may_insert.
(run_scc_vn): Remove parameter, do not fiddle with may_insert.
* tree-ssa-sccvn.h (struct vn_reference_op_struct): Add
a field to store the constant offset this op applies.
(run_scc_vn): Adjust prototype.
* cgraphunit.c (thunk_adjust): Adjust for MEM_REF.
* tree-ssa-ccp.c (ccp_fold): Replace INDIRECT_REF folding with
MEM_REF. Propagate &foo + CST as &MEM[&foo, CST]. Do not
bother about volatile qualifiers on pointers.
(fold_const_aggregate_ref): Handle MEM_REF, do not handle INDIRECT_REF.
* tree-ssa-loop-ivopts.c
* tree-ssa-loop-ivopts.c (determine_base_object): Adjust
for MEM_REF.
(strip_offset_1): Likewise.
(find_interesting_uses_address): Replace INDIRECT_REF handling with
MEM_REF handling.
(get_computation_cost_at): Likewise.
* ipa-pure-const.c (check_op): Handle MEM_REF.
* tree-stdarg.c (check_all_va_list_escapes): Adjust for MEM_REF.
* tree-ssa-sink.c (is_hidden_global_store): Handle MEM_REF
and constants.
* ipa-inline.c (likely_eliminated_by_inlining_p): Handle MEM_REF.
* tree-parloops.c (take_address_of): Adjust for MEM_REF.
(eliminate_local_variables_1): Likewise.
(create_call_for_reduction_1): Likewise.
(create_loads_for_reductions): Likewise.
(create_loads_and_stores_for_name): Likewise.
* matrix-reorg.c (may_flatten_matrices_1): Sanitize.
(ssa_accessed_in_tree): Handle MEM_REF.
(ssa_accessed_in_assign_rhs): Likewise.
(update_type_size): Likewise.
(analyze_accesses_for_call_stmt): Likewise.
(analyze_accesses_for_assign_stmt): Likewise.
(transform_access_sites): Likewise.
(transform_allocation_sites): Likewise.
* tree-affine.c (tree_to_aff_combination): Handle MEM_REF.
* tree-vect-data-refs.c (vect_create_addr_base_for_vector_ref): Do
not handle INDIRECT_REF.
* tree-ssa-phiopt.c (add_or_mark_expr): Handle MEM_REF.
(cond_store_replacement): Likewise.
* tree-ssa-pre.c (create_component_ref_by_pieces_1): Handle
MEM_REF, no not handle INDIRECT_REFs.
(insert_into_preds_of_block): Properly initialize avail.
(phi_translate_1): Fold MEM_REFs. Re-evaluate constant offset
for ARRAY_REFs. Properly handle reference lookups that
require a bit re-interpretation.
(can_PRE_operation): Do not handle INDIRECT_REF. Handle MEM_REF.
* tree-sra.c
* tree-sra.c (build_access_from_expr_1): Handle MEM_REF.
(build_ref_for_offset_1): Remove.
(build_ref_for_offset): Build MEM_REFs.
(gate_intra_sra): Disable for now.
(sra_ipa_modify_expr): Handle MEM_REF.
(ipa_early_sra_gate): Disable for now.
* tree-sra.c (create_access): Swap INDIRECT_REF handling for
MEM_REF handling.
(disqualify_base_of_expr): Likewise.
(ptr_parm_has_direct_uses): Swap INDIRECT_REF handling for
MEM_REF handling.
(sra_ipa_modify_expr): Remove INDIRECT_REF handling.
Use mem_ref_offset. Remove bogus folding.
(build_access_from_expr_1): Properly handle MEM_REF for
non IPA-SRA.
(make_fancy_name_1): Add support for MEM_REF.
* tree-predcom.c (ref_at_iteration): Handle MEM_REFs.
* tree-mudflap.c (mf_xform_derefs_1): Adjust for MEM_REF.
* ipa-prop.c (compute_complex_assign_jump_func): Handle MEM_REF.
(compute_complex_ancestor_jump_func): Likewise.
(ipa_analyze_virtual_call_uses): Likewise.
* tree-ssa-forwprop.c (forward_propagate_addr_expr_1): Replace
INDIRECT_REF folding with more generalized MEM_REF folding.
(tree_ssa_forward_propagate_single_use_vars): Adjust accordingly.
(forward_propagate_addr_into_variable_array_index): Also handle
&ARRAY + I in addition to &ARRAY[0] + I.
* tree-ssa-dce.c (ref_may_be_aliased): Handle MEM_REF.
* tree-ssa-ter.c (find_replaceable_in_bb): Avoid TER if that
creates assignments with overlap.
* tree-nested.c (get_static_chain): Adjust for MEM_REF.
(get_frame_field): Likewise.
(get_nonlocal_debug_decl): Likewise.
(convert_nonlocal_reference_op): Likewise.
(struct nesting_info): Add mem_refs pointer-set.
(create_nesting_tree): Allocate it.
(convert_local_reference_op): Insert to be folded mem-refs.
(fold_mem_refs): New function.
(finalize_nesting_tree_1): Perform defered folding of mem-refs
(free_nesting_tree): Free the pointer-set.
* tree-vect-stmts.c (vectorizable_store): Adjust for MEM_REF.
(vectorizable_load): Likewise.
* tree-ssa-phiprop.c (phiprop_insert_phi): Adjust for MEM_REF.
(propagate_with_phi): Likewise.
* tree-object-size.c (addr_object_size): Handle MEM_REFs
instead of INDIRECT_REFs.
(compute_object_offset): Handle MEM_REF.
(plus_stmt_object_size): Handle MEM_REF.
(collect_object_sizes_for): Dispatch to plus_stmt_object_size
for &MEM_REF.
* tree-flow.h (get_addr_base_and_unit_offset): Declare.
(symbol_marked_for_renaming): Likewise.
* Makefile.in (tree-dfa.o): Add $(TOPLEV_H).
(fold-const.o): Add $(TREE_FLOW_H).
* tree-ssa-structalias.c (get_constraint_for_1): Handle MEM_REF.
(find_func_clobbers): Likewise.
* ipa-struct-reorg.c (decompose_indirect_ref_acc): Handle MEM_REF.
(decompose_access): Likewise.
(replace_field_acc): Likewise.
(replace_field_access_stmt): Likewise.
(insert_new_var_in_stmt): Likewise.
(get_stmt_accesses): Likewise.
(reorg_structs_drive): Disable.
* config/i386/i386.c (ix86_va_start): Adjust for MEM_REF.
(ix86_canonical_va_list_type): Likewise.
cp/
* cp-gimplify.c (cp_gimplify_expr): Open-code the rhs
predicate we are looking for, allow non-gimplified
INDIRECT_REFs.
testsuite/
* gcc.c-torture/execute/20100316-1.c: New testcase.
* gcc.c-torture/execute/pr44468.c: Likewise.
* gcc.c-torture/compile/20100609-1.c: Likewise.
* gcc.dg/volatile2.c: Adjust.
* gcc.dg/plugin/selfassign.c: Likewise.
* gcc.dg/pr36902.c: Likewise.
* gcc.dg/tree-ssa/foldaddr-2.c: Remove.
* gcc.dg/tree-ssa/foldaddr-3.c: Likewise.
* gcc.dg/tree-ssa/forwprop-8.c: Adjust.
* gcc.dg/tree-ssa/pr17141-1.c: Likewise.
* gcc.dg/tree-ssa/ssa-fre-13.c: Likewise.
* gcc.dg/tree-ssa/ssa-fre-14.c: Likewise.
* gcc.dg/tree-ssa/ssa-ccp-21.c: Likewise.
* gcc.dg/tree-ssa/pta-ptrarith-1.c: Likewise.
* gcc.dg/tree-ssa/20030807-7.c: Likewise.
* gcc.dg/tree-ssa/forwprop-10.c: Likewise.
* gcc.dg/tree-ssa/ssa-fre-1.c: Likewise.
* gcc.dg/tree-ssa/pta-ptrarith-2.c: Likewise.
* gcc.dg/tree-ssa/ssa-ccp-23.c: Likewise.
* gcc.dg/tree-ssa/forwprop-1.c: Likewise.
* gcc.dg/tree-ssa/forwprop-2.c: Likewise.
* gcc.dg/tree-ssa/struct-aliasing-1.c: Likewise.
* gcc.dg/tree-ssa/ssa-ccp-25.c: Likewise.
* gcc.dg/tree-ssa/ssa-pre-26.c: Likewise.
* gcc.dg/tree-ssa/struct-aliasing-2.c: Likewise.
* gcc.dg/tree-ssa/ssa-ccp-26.c: Likewise.
* gcc.dg/tree-ssa/ssa-sccvn-4.c: Likewise.
* gcc.dg/tree-ssa/ssa-pre-7.c: Likewise.
* gcc.dg/tree-ssa/forwprop-5.c: Likewise.
* gcc.dg/struct/w_prof_two_strs.c: XFAIL.
* gcc.dg/struct/wo_prof_escape_arg_to_local.c: Likewise.
* gcc.dg/struct/wo_prof_global_var.c: Likewise.
* gcc.dg/struct/wo_prof_malloc_size_var.c: Likewise.
* gcc.dg/struct/w_prof_local_array.c: Likewise.
* gcc.dg/struct/w_prof_single_str_global.c: Likewise.
* gcc.dg/struct/wo_prof_escape_str_init.c: Likewise.
* gcc.dg/struct/wo_prof_array_through_pointer.c: Likewise.
* gcc.dg/struct/w_prof_global_array.c: Likewise.
* gcc.dg/struct/wo_prof_array_field.c: Likewise.
* gcc.dg/struct/wo_prof_single_str_local.c: Likewise.
* gcc.dg/struct/w_prof_local_var.c: Likewise.
* gcc.dg/struct/wo_prof_two_strs.c: Likewise.
* gcc.dg/struct/wo_prof_empty_str.c: Likewise.
* gcc.dg/struct/wo_prof_local_array.c: Likewise.
* gcc.dg/struct/w_prof_global_var.c: Likewise.
* gcc.dg/struct/wo_prof_single_str_global.c: Likewise.
* gcc.dg/struct/wo_prof_escape_substr_value.c: Likewise.
* gcc.dg/struct/wo_prof_global_array.c: Likewise.
* gcc.dg/struct/wo_prof_escape_return.c: Likewise.
* gcc.dg/struct/wo_prof_escape_substr_array.c: Likewise.
* gcc.dg/struct/wo_prof_double_malloc.c: Likewise.
* gcc.dg/struct/w_ratio_cold_str.c: Likewise.
* gcc.dg/struct/wo_prof_escape_substr_pointer.c: Likewise.
* gcc.dg/struct/wo_prof_local_var.c: Likewise.
* gcc.dg/tree-prof/stringop-1.c: Adjust.
* g++.dg/tree-ssa/pr31146.C: Likewise.
* g++.dg/tree-ssa/copyprop-1.C: Likewise.
* g++.dg/tree-ssa/pr33604.C: Likewise.
* g++.dg/plugin/selfassign.c: Likewise.
* gfortran.dg/array_memcpy_3.f90: Likewise.
* gfortran.dg/array_memcpy_4.f90: Likewise.
* c-c++-common/torture/pr42834.c: New testcase.
From-SVN: r161655
|
|
not supported.)
PR other/44566
* coretypes.h [!USED_FOR_TARGET] (reg_class_t): Define.
* target.def (struct gcc_target): Replace enum reg_class with
reg_class_t in hook argument / return types.
* doc/tm.texi.in (TARGET_SECONDARY_RELOAD): Likewise.
(TARGET_IRA_COVER_CLASSES, TARGET_MEMORY_MOVE_COST): Likewise.
(TARGET_BRANCH_TARGET_REGISTER_CLASS): Likewise.
* targhooks.h (default_branch_target_register_class): Likewise.
(default_ira_cover_classes, default_secondary_reload): Likewise.
(default_memory_move_cost, default_register_move_cost): Likewise.
* targhooks.c (default_branch_target_register_class): Likewise.
(default_ira_cover_classes, default_secondary_reload): Likewise.
(default_memory_move_cost, default_register_move_cost): Likewise.
* reload.c (push_secondary_reload, secondary_reload_class): Likewise.
* bt-load.c (branch_target_load_optimize): Likewise.
* ira.c (setup_cover_and_important_classes): Likewise.
* ira-costs.c (copy_cost): Likewise.
* reload1.c (emit_input_reload_insns): Likewise.
* config/alpha/alpha.c (alpha_secondary_reload): Likewise.
* config/frv/frv.c (frv_secondary_reload): Likewise.
* config/s390/s390.c (s390_secondary_reload): Likewise.
* config/i386/i386.c (i386_ira_cover_classes): Likewise.
(ix86_secondary_reload, ix86_memory_move_cost): Likewise.
(ix86_register_move_cost): Likewise.
* config/sh/sh-protos.h (sh_secondary_reload): Likewise.
* config/sh/sh.c (sh_target_reg_class, sh_secondary_reload): Likewise.
* config/xtensa/xtensa.c (xtensa_secondary_reload): Likewise.
* config/xtensa/xtensa-protos.h (xtensa_secondary_reload): Likewise.
* config/rs6000/rs6000.c (rs6000_secondary_reload): Likewise.
(rs6000_ira_cover_classes): Likewise.
* config/picochip/picochip.c (picochip_secondary_reload): Likewise.
* config/picochip/picochip-protos.h (picochip_secondary_reload):
Likewise.
* config/pa/pa.c (pa_secondary_reload): Likewise.
* config/mips/mips.c (mips_ira_cover_classes): Likewise.
* config/bfin/bfin.c (bfin_secondary_reload): Likewise.
* config/ia64/ia64.c (ia64_register_move_cost): Likewise.
* doc/tm.texi: Regenerate.
From-SVN: r161633
|
|
* target.def (dfa_new_cycle): Use DEFHOOK. Rename dump_file to dump,
last-sched_cycle to last_clock, cur_cycle to clock.
* doc/tm.texi.in: Use @hook.
* doc/tm.texi: Regenerate.
From-SVN: r161628
|
|
* target.def (return_pops_args): Use DEFHOOK.
* doc/tm.texi.in (TARGET_RETURN_POPS_ARGS): Use @hook.
Rename stack-size to size.
* doc/tm.texi: Regenerate.
From-SVN: r161627
|
|
* target.def (resolve_overloaded_builtin): Rename params to arglist.
Use DEFHOOK.
* doc/tm.texi.in (TARGET_RESOLVE_OVERLOADED_BUILTIN): Use @hook.
* doc/tm.texi: Regenerate.
From-SVN: r161626
|
|
* target.def (pass_by_reference): Use DEFHOOK.
* doc/tm.texi.in (TARGET_PASS_BY_REFERENCE): Use @hook.
* doc/tm.texi: Regenerate.
From-SVN: r161625
|
|
* target.def (pragma_parse): Use DEFHOOK.
* doc/tm.texi.in (TARGET_OPTION_PRAGMA_PARSE): Use @hook.
s/TARGET_VALID_OPTION_ATTRIBUTE_P/TARGET_OPTION_VALID_ATRIBUTE_P/ .
* doc/tm.texi: Regenerate.
From-SVN: r161624
|
|
* target.def (memory_move_cost): Use DEFHOOK.
* doc/tm.texi.in (TARGET_MEMORY_MOVE_COST): Use @hook.
Rename regclass AKA class to rclass.
* doc/tm.texi: Regenerate.
From-SVN: r161623
|
|
* target.def (fold_builtin): Rename nargs to n_args. Use DEFHOOK.
* doc/tm.texi.in (TARGET_FOLD_BUILTIN): Use @hook.
* doc/tm.texi: Regenerate.
From-SVN: r161622
|
|
* target.def (enum_va_list_p): Use DEFHOOK.
* doc/tm.texi.in (TARGET_ENUM_VA_LIST_P): Use @hook.
Rename ptype to ptree.
* doc/tm.texi: Regenerate.
From-SVN: r161621
|
|
* target.def (builtin_reciprocal): Change tm_fn to md_fn. Use DEFHOOK.
* doc/tm.texi.in (TARGET_BUILTIN_RECIPROCAL): Use @hook.
From-SVN: r161620
|
|
* target.def (declare_constant_name): Change exp to expr. Use DEFHOOK.
* doc/tm.texi.in (TARGET_ASM_DECLARE_CONSTANT_NAME): Use @hook.
* doc/tm.texi: Regenerate.
From-SVN: r161619
|
|
gcc:
PR other/44034
* target.def, doc/tm.texi.in, genhooks.c: New files.
* target.h: Instead of defining individual hook members,
define DEFHOOKPOD / DEFHOOK / DEFHOOK_UNDOC / HOOKSTRUCT and
include target.def.
* target-def.h: Instead of defining individual hook initializers,
include target-hooks-def.h.
* df-scan.c, haifa-sched.c, sel-sched.c: Rename targetm members:
targetm.live_on_entry -> targetm.extra_live_on_entry
targetm.sched.md_finish ->targetm.sched.finish
targetm.sched.md_init -> targetm.sched.init
targetm.sched.md_init_global -> targetm.sched.init_global
targetm.asm_out.unwind_label -> targetm.asm_out.emit_unwind_label
targetm.asm_out.except_table_label ->
targetm.asm_out.emit_except_table_label
targetm.asm_out.visibility -> targetm.asm_out.assemble_visibility
targetm.target_help -> targetm.help
targetm.vectorize.builtin_support_vector_misalignment ->
targetm.vectorize.support_vector_misalignment
targetm.file_start_app_off -> targetm.asm_file_start_app_off
targetm.file_start_file_directive ->
targetm.asm_file_start_file_directive
* dwarf2out.c, opts.c, tree-vect-data-refs.c, except.c: Likewise.
* varasm.c, config/alpha/alpha.c, config/cris/cris.c: Likewise.
* gcc/config/spu/spu.c, config/ia64/ia64.c: Rename target macros:
TARGET_VECTOR_ALIGNMENT_REACHABLE ->
TARGET_VECTORIZE_VECTOR_ALIGNMENT_REACHABLE
TARGET_SUPPORT_VECTOR_MISALIGNMENT ->
TARGET_VECTORIZE_SUPPORT_VECTOR_MISALIGNMENT
TARGET_UNWIND_EMIT -> TARGET_ASM_UNWIND_EMIT
* config/rs6000/rs6000.c, config/arm/arm.c: Likewise.
* Makefile.in (TARGET_H): Depend on target.def.
(TARGET_DEF_H): Depend on target-hooks-def.h.
(target-hooks-def.h, tm.texi, s-target-hooks-def-h): New rules.
(s-tm-texi, build/genhooks.o, build/genhooks): Likewise.
* doc/tm.texi: Regenerate.
gcc/c-family:
* c-common.c: Rename targetm member:
targetm.enum_va_list -> targetm.enum_va_list_p
gcc/po:
* EXCLUDES: Add genhooks.c.
Index: gcc/doc/tm.texi
From-SVN: r161547
|
|
* doc/tm.texi (TARGET_OPTION_OVERRIDE): Document.
(OVERRIDE_OPTIONS): Add note of obsolescence.
Replace references with references to TARGET_OPTION_OVERRIDE.
(Except for C_COMMON_OVERRIDE_OPTIONS, which remains similar to
the macro).
* targhooks.c (default_target_option_override): New function.
* targhooks.h (default_target_option_override): Declare.
* target.h (struct gcc_target): Add override member to
target_option emmber.
* toplev.c (process_options): Replace OVERRIDE_OPTIONS use with
targetm.target_option.override call.
* target-def.h (TARGET_OPTION_OVERRIDE): Define.
(TARGET_OPTION_HOOKS): Add TARGET_OPTION_OVERRIDE.
From-SVN: r161538
|
|
* reginfo.c (init_reg_sets_1): Adjust comments.
* combine-stack-adj.c (rest_of_handle_stack_adjustments): Likewise.
* calls.c (prepare_call_address): Likewise.
(emit_call_1): Use targetm.calls.return_pops_args.
(expand_call): Likewise.
* function.c (assign_parms): Likewise.
* system.h (RETURN_POPS_ARGS): Add to #pragma poison list.
* target.h (struct gcc_target) [struct calls]: Add
return_pops_args field.
* targhooks.h (default_return_pops_args): Declare.
* targhooks.c (default_return_pops_args): Define.
* target-def.h (TARGET_RETURN_POPS_ARGS): Define.
(TARGET_CALLS): Add TARGET_RETURN_POPS_ARGS.
* doc/tm.texi (RETURN_POPS_ARGS): Rename to...
(TARGET_RETURN_POPS_ARGS): ...this. Use deftypefn. Adjust
documentation.
* config/alpha/alpha.h (RETURN_POPS_ARGS): Delete.
* config/arc/arc.h (RETURN_POPS_ARGS): Likewise.
* config/arm/arm.h (RETURN_POPS_ARGS): Likewise.
* config/avr/avr.h (RETURN_POPS_ARGS): Likewise.
* config/bfin/bfin.h (RETURN_POPS_ARGS): Likewise.
* config/cris/cris.h (RETURN_POPS_ARGS): Likewise.
* config/crx/crx.h (RETURN_POPS_ARGS): Likewise.
* config/fr30/fr30.h (RETURN_POPS_ARGS): Likewise.
* config/frv/frv.h (RETURN_POPS_ARGS): Likewise.
* config/h8300/h8300.h (RETURN_POPS_ARGS): Likewise.
* config/ia64/ia64.h (RETURN_POPS_ARGS): Likewise.
* config/iq2000/iq2000.h (RETURN_POPS_ARGS): Likewise.
* config/lm32/lm32.h (RETURN_POPS_ARGS): Likewise.
* config/m32c/m32c.h (RETURN_POPS_ARGS): Likewise.
* config/m32r/m32r.h (RETURN_POPS_ARGS): Likewise.
* config/m68hc11/m68hc11.h (RETURN_POPS_ARGS): Likewise.
* config/mcore/mcore.h (RETURN_POPS_ARGS): Likewise.
* config/mep/mep.h (RETURN_POPS_ARGS): Likewise.
* config/mips/mips.h (RETURN_POPS_ARGS): Likewise.
* config/mmix/mmix.h (RETURN_POPS_ARGS): Likewise.
* config/mn10300/mn10300.h (RETURN_POPS_ARGS): Likewise.
* config/moxie/moxie.h (RETURN_POPS_ARGS): Likewise.
* config/pa/pa.h (RETURN_POPS_ARGS): Likewise.
* config/pdp11/pdp11.h (RETURN_POPS_ARGS): Likewise.
* config/picochip/picochip.h (RETURN_POPS_ARGS): Likewise.
* config/rs6000/rs6000.h (RETURN_POPS_ARGS): Likewise.
* config/rx/rx.h (RETURN_POPS_ARGS): Likewise.
* config/s390/s390.h (RETURN_POPS_ARGS): Likewise.
* config/score/score.h (RETURN_POPS_ARGS): Likewise.
* config/sh/sh.h (RETURN_POPS_ARGS): Likewise.
* config/sparc/sparc.h (RETURN_POPS_ARGS): Likewise.
* config/spu/spu.h (RETURN_POPS_ARGS): Likewise.
* config/stormy16/stormy16.h (RETURN_POPS_ARGS): Likewise.
* config/v850/v850.h (RETURN_POPS_ARGS): Likewise.
* config/xtensa/xtensa.h (RETURN_POPS_ARGS): Likewise.
* config/i386/i386-protos.h (ix86_return_pops_args): Delete.
* config/i386/i386.h (RETURN_POPS_ARGS): Delete.
* config/i386/i386.c (ix86_return_pops_args): Make static.
Constify arguments.
(TARGET_RETURN_POPS_ARGS): Define.
* config/m68k/m68k.h (RETURN_POPS_ARGS): Move to...
* config/m68k/m68k.c (m68k_return_pops_args): ...here. New function.
(TARGET_RETURN_POPS_ARGS): Define.
* config/vax/vax.h (RETURN_POPS_ARGS): Move to...
* config/vax/vax.c (vax_return_pops_args): ...here. New function.
(TARGET_RETURN_POPS_ARGS): Define.
From-SVN: r161528
|
|
2010-06-28 Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
* config.gcc (powerpc*-*-*): Handle titan.
* config/rs6000/rs6000.c (titan_cost): New costs.
(rs6000_override_options): Add "titan" to processor_target_table.
Add Titan to branch alignment logic.
Correctly set rs6000_cost for titan.
* config/rs6000/rs6000.md (cpu): Add titan. Include "titan.md".
* config/rs6000/titan.md: New file.
* doc/invoke.texi (RS/6000 and PowerPC Options): Document -mcpu=titan.
From-SVN: r161491
|
|
2010-06-28 Bingfeng Mei <bmei@broadcom.com>
* cgraph.h (struct varpool_node): new used_from_object_file flag.
(struct cgraph_local_info): new used_from_object_file flag.
* cgraph.c (dump_cgraph_node): dump used_from_object_file flag.
(cgraph_clone_node): initialize used_from_object_file.
(cgraph_create_virtual_clone): initialize used_from_object_file.
* lto-symbtab.c (lto_symtab_merge_decls_1): Set
used_from_object_file flags for symbols of LDPR_PREVAILING_DEF
when compiling with -fwhole-program.
(lto_symtab_resolve_symbols) Use LDPR_PREVAILING_DEF_IRONLY for
internal resolver.
* ipa.c (function_and_variable_visibility): Set externally_visible
flag of varpool_node if used_from_object_file flag is set.
(cgraph_externally_visible_p): check used_from_object_file flag.
* doc/invoke.texi (-fwhole-program option): Change description of
externally_visible attribute accordingly.
* doc/extend.texi (externally_visible): Ditto.
From-SVN: r161483
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* params.def (max-inline-insns-auto): Default to 40.
* doc/invoke.texi (max-inline-insns-auto): Document the change.
From-SVN: r161481
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* target.h (struct gcc_target): Add register_move_cost field.
* target-def.h (TARGET_REGISTER_MOVE_COST): New.
(TARGET_INITIALIZER): Use TARGET_REGISTER_MOVE_COST.
* targhooks.c (default_register_move_cost): New function.
* targhooks.h (default_register_move_cost): Declare function.
* defaults.h (REGISTER_MOVE_COST): Delete.
* ira-int.h (ira_register_move_cost): Update comment.
* ira.c: (ira_register_move_cost): Update comment.
* reload.h (register_move_cost): Declare.
* reginfo.c (register_move_cost): New function.
(move_cost): Update comment.
(init_move_cost, memory_move_secondary_cost): Replace
REGISTER_MOVE_COST with register_move_cost.
* postreload.c (reload_cse_simplify_set): (Ditto.).
* reload.c (find_valid_class, find_reloads): (Ditto.).
* reload1.c (choose_reload_regs): (Ditto.).
* doc/tm.texi (TARGET_REGISTER_MOVE_COST): New.
(REGISTER_MOVE_COST, TARGET_MEMORY_MOVE_COST): Update documentation.
* doc/md.texi (can_create_pseudo_p): Update documentation.
* config/i386/i386.h (MEMORY_MOVE_COST): Remove macro.
* config/i386/i386-protos.h (int ix86_memory_move_cost): Remove.
* config/i386/i386.h (ix86_memory_move_cost): Make static.
(TARGET_MEMORY_MOVE_COST): Define.
* config/ia64/ia64.h (MEMORY_MOVE_COST): Remove macro.
* config/ia64/ia64-protos.h (int ia64_memory_move_cost): Remove.
* config/ia64/ia64.h (ia64_memory_move_cost): Make static.
(TARGET_MEMORY_MOVE_COST): Define.
From-SVN: r161470
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* collect2.c (main): Remove SWITCHES_NEED_SPACES conditional.
* doc/tm.texi (SWITCHES_NEED_SPACES): Don't document.
* gcc.c (SWITCHES_NEED_SPACES, switches_need_spaces): Remove.
(static_specs): Remove switches_need_spaces.
(process_command, do_self_spec): Hardcode handling "-o" instead of
checking switches_need_spaces.
* system.h (SWITCHES_NEED_SPACES): Poison.
From-SVN: r161436
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* config/m32c/m32c-protos.h (m32c_note_pragma_address): Declare.
(m32c_output_aligned_common): Likewise.
* config/m32c/m32c.h (ASM_OUTPUT_ALIGNED_DECL_COMMON): New.
(ASM_OUTPUT_ALIGNED_DECL_LOCAL): New.
* config/m32c/m32c-pragma.c (m32c_pragma_address): New.
(m32c_register_pragmas): Register it.
* config/m32c/m32c.c (m32c_get_pragma_address): New.
(m32c_insert_attributes): Set #pragma address decls volatile.
(pragma_entry_eq): New.
(pragma_entry_hash): New.
(m32c_note_pragma_address): New.
(m32c_get_pragma_address): New.
(m32c_output_aligned_common): New.
* doc/extend.texi: Document the new pragma.
* config/m32c/m32c.c (m32c_illegal_subreg_p): Reject illegal MEMs
also.
* config/m32c/predicates.md (m32c_any_operand): Check the code
instead of memory_operand so as to allow matching volatile MEMs.
(m32c_nonimmediate_operand): Likewise.
(mra_operand): Allow volatiles.
From-SVN: r161425
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2010-06-25 Manuel López-Ibáñez <manu@gcc.gnu.org>
* doc/invoke.texi (-Wsuggest-attribute): Add item for noreturn.
From-SVN: r161383
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* tree-pass.h (pass_split_functions): Declare.
* opts.c (decode_options): Enable function splitting at -O2
* timevar.def (TV_IPA_FNSPLIT): New macro.
* ipa-split.c: New file.
* common.opt (-fpartial-inlining): New flag.
* Makefile.in (ipa-split.o): New object file.
* passes.c (init_optimization_passes): Add ipa-split.
* params.def (max-inline-insns-auto): Reduce max-inline-insns-auto to 40.
(partial-inlining-entry-probability): New parameters.
* doc/invoke.texi (-fpartial-inlining): New.
* testsuite/gcc.dg/tree-ssa/ipa-split.c
From-SVN: r161382
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* config/pa/pa.h (MODIFY_TARGET_NAME): Remove.
* doc/tm.texi (MODIFY_TARGET_NAME): Don't document.
* gcc.c (enum add_del, struct modify_target, modify_target):
Remove.
(process_command): Remove code conditional on MODIFY_TARGET_NAME.
* system.h (MODIFY_TARGET_NAME): Poison.
From-SVN: r161372
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* doc/invoke.texi: Delete mcmodel=medium from powerpc options.
* config/rs6000/rs6000.h (enum rs6000_cmodel): Delete CMODEL_MEDIUM.
* config/rs6000/linux64.h (SUBSUBTARGET_OVERRIDE_OPTIONS): Set
CMODEL_LARGE as default.
* config/rs6000/rs6000.c (rs6000_handle_option): Remove mcmodel=medium.
(offsettable_ok_by_alignment): Delete.
(rs6000_emit_move): Remove mcmodel=medium optimization.
From-SVN: r161371
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PR target/43902
* tree-pretty-print.c (dump_generic_node, op_code_prio): Add
WIDEN_MULT_PLUS_EXPR and WIDEN_MULT_MINUS_EXPR.
* optabs.c (optab_for_tree_code): Likewise.
(expand_widen_pattern_expr): Likewise.
* tree-ssa-math-opts.c (convert_mult_to_widen): New function, broken
out of execute_optimize_widening_mul.
(convert_plusminus_to_widen): New function.
(execute_optimize_widening_mul): Use the two new functions.
* expr.c (expand_expr_real_2): Add support for GIMPLE_TERNARY_RHS.
Remove code to generate widening multiply-accumulate. Add support
for WIDEN_MULT_PLUS_EXPR and WIDEN_MULT_MINUS_EXPR.
* gimple-pretty-print.c (dump_ternary_rhs): New function.
(dump_gimple_assign): Call it when appropriate.
* tree.def (WIDEN_MULT_PLUS_EXPR, WIDEN_MULT_MINUS_EXPR): New codes.
* cfgexpand.c (gimple_assign_rhs_to_tree): Likewise.
(expand_gimple_stmt_1): Likewise.
(expand_debug_expr): Support WIDEN_MULT_PLUS_EXPR and
WIDEN_MULT_MINUS_EXPR.
* tree-ssa-operands.c (get_expr_operands): Likewise.
* tree-inline.c (estimate_operator_cost): Likewise.
* gimple.c (extract_ops_from_tree_1): Renamed from
extract_ops_from_tree. Add new arg for a third operand; fill it.
(gimple_build_assign_stat): Support operations with three operands.
(gimple_build_assign_with_ops_stat): Likewise.
(gimple_assign_set_rhs_from_tree): Likewise.
(gimple_assign_set_rhs_with_ops_1): Renamed from
gimple_assign_set_rhs_with_ops. Add new arg for a third operand.
(get_gimple_rhs_num_ops): Support GIMPLE_TERNARY_RHS.
(get_gimple_rhs_num_ops): Handle WIDEN_MULT_PLUS_EXPR and
WIDEN_MULT_MINUS_EXPR.
* gimple.h (enum gimple_rhs_class): Add GIMPLE_TERNARY_RHS.
(extract_ops_from_tree_1): Adjust declaration.
(gimple_assign_set_rhs_with_ops_1): Likewise.
(gimple_build_assign_with_ops): Pass NULL for last operand.
(gimple_build_assign_with_ops3): New macro.
(gimple_assign_rhs3, gimple_assign_rhs3_ptr, gimple_assign_set_rhs3,
gimple_assign_set_rhs_with_ops, extract_ops_from_tree): New inline
functions.
* tree-cfg.c (verify_gimple_assign_ternary): New static function.
(verify_gimple_assign): Call it.
* doc/gimple.texi (Manipulating operands): Document GIMPLE_TERNARY_RHS.
(Tuple specific accessors, subsection GIMPLE_ASSIGN): Document new
functions for dealing with three-operand statements.
* tree.c (commutative_ternary_tree_code): New function.
* tree.h (commutative_ternary_tree_code): Declare it.
* tree-vrp.c (gimple_assign_nonnegative_warnv_p): Return false for ternary
statements.
(gimple_assign_nonzero_warnv_p): Likewise.
* tree-ssa-sccvn.c (stmt_has_constants): Handle GIMPLE_TERNARY_RHS.
* tree-ssa-ccp.c (get_rhs_assign_op_for_ccp): New static function.
(ccp_fold): Use it. Handle GIMPLE_TERNARY_RHS.
* tree-ssa-dom.c (enum expr_kind): Add EXPR_TERNARY.
(struct hashtable_expr): New member ternary in the union.
(initialize_hash_element): Handle GIMPLE_TERNARY_RHS.
(hashable_expr_equal_p): Fix indentation. Handle EXPR_TERNARY.
(iterative_hash_hashable_expr): Likewise.
(print_expr_hash_elt): Handle EXPR_TERNARY.
* gimple-fold.c (fold_gimple_assign): Handle GIMPLE_TERNARY_RHS.
* tree-ssa-threadedge.c (fold_assignment_stmt): Remove useless break
statements. Handle GIMPLE_TERNARY_RHS.
testsuite/
PR target/43902
* gcc.target/mips/madd-9.c: New test.
From-SVN: r161366
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From-SVN: r161364
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asm operands)
PR middle-end/44492
* recog.h (struct recog_data): Add is_asm field.
* recog.c (asm_operand_ok, constrain_operands): If neither < nor > is
present in constraints of inline-asm operand and memory operand
contains {PRE,POST}_{INC,DEC,MODIFY}, return 0.
(extract_insn): Initialize recog_data.is_asm.
* doc/md.texi (Constraints): Document operand side-effect rules.
* g++.dg/torture/pr44492.C: New test.
From-SVN: r161328
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2010-06-24 Andi Kleen <ak@linux.intel.com>
* c-parser.c (c_parser_conditional_expression):
Call warn_for_omitted_condop.
* doc/invoke.texi: Document omitted condop warning.
c-family/
* c-common.c (warn_for_omitted_condop): New.
* c-common.h (warn_for_omitted_condop): Add prototype.
testsuite/
* c-c++-common/warn-omitted-condop.c: New.
cp/
* parser.c: (cp_parser_question_colon_clause):
Switch to use cp_lexer_peek_token.
Call warn_for_omitted_condop. Call pedwarn for omitted
middle operand.
From-SVN: r161318
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PR 22220
* doc/install.texi: Update requirements to build GNAT.
From-SVN: r161255
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* diagnostic.h (diagnostic_classification_change_t): New.
(diagnostic_context): Add history and push/pop list.
(diagnostic_push_diagnostics): Declare.
(diagnostic_pop_diagnostics): Declare.
* diagnostic.c (diagnostic_classify_diagnostic): Store changes
from pragmas in a history chain instead of the global table.
(diagnostic_push_diagnostics): New.
(diagnostic_pop_diagnostics): New.
(diagnostic_report_diagnostic): Scan history chain to find state
of diagnostics as of the diagnostic location.
* opts.c (set_option): Pass UNKNOWN_LOCATION to
diagnostic_classify_diagnostic.
(enable_warning_as_error): Likewise.
* diagnostic-core.h (DK_POP): Add after "real" diagnostics, for
use in the history chain.
* c-family/c-pragma.c (handle_pragma_diagnostic): Add push/pop,
allow these pragmas anywhere.
* doc/extend.texi: Document pragma GCC diagnostic changes.
* gcc.dg/pragma-diag-1.c: New.
From-SVN: r161115
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contrib/ChangeLog:
* compare-debug: Drop LTO sections.
config/ChangeLog:
* bootstrap-lto.mk: New.
gcc/ChangeLog:
* doc/install.texi: Document bootstrap-lto.
From-SVN: r161061
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