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2020-02-10md.texi (Define Subst): Match closing paren in example.Hans-Peter Nilsson1-1/+1
2020-02-03rs6000: Update constraint documentationSegher Boessenkool1-98/+94
2020-01-09re PR inline-asm/93202 ([RISCV] ICE when using inline asm 'h' operand modifier)Jakub Jelinek1-1/+1
2020-01-07Update 'Q' constraint documentation.Michael Meissner1-2/+1
2020-01-06mips.c (vr4130_align_insns): Fix typo.Bryan Stenson1-1/+1
2020-01-01Update copyright years.Jakub Jelinek1-1/+1
2019-11-18Add optabs for accelerating RAW and WAR alias checksRichard Sandiford1-0/+31
2019-11-08Generalise gather and scatter optabsRichard Sandiford1-17/+17
2019-11-06doc: Insn splitting by combineSegher Boessenkool1-1/+1
2019-10-01doc/md.texi: Fix some typosSegher Boessenkool1-3/+3
2019-09-30[AArch64][SVE] Utilize ASRD instruction for division and remainderYuliang Wang1-0/+11
2019-09-12Vectorise multiply high with scaling operations (PR 89386)Yuliang Wang1-0/+27
2019-09-03Remove Cell Broadband Engine SPU targetsUlrich Weigand1-70/+0
2019-08-13[AArch64] Add a "y" constraint for V0-V7Richard Sandiford1-0/+6
2019-07-12Support multiple operand counts for .md @ patternsRichard Sandiford1-0/+9
2019-07-02optabs.def (movmem_optab): Add movmem back for memmove().Aaron Sawdey1-0/+36
2019-06-27builtins.c (get_memory_rtx): Fix comment.Aaron Sawdey1-12/+14
2019-06-19md.texi: Document vec_shl_<mode> pattern.Jakub Jelinek1-0/+8
2019-06-18[Vectorizer] Support masking fold left reductionsAlejandro Martinez1-0/+5
2019-06-12Initial TI PRU GCC portDimitar Dimitrov1-0/+19
2019-06-05rs6000: Remove wp and wqSegher Boessenkool1-9/+2
2019-06-05rs6000: ww -> waSegher Boessenkool1-4/+1
2019-06-04rs6000: wf -> waSegher Boessenkool1-4/+1
2019-06-04rs6000: wd -> waSegher Boessenkool1-4/+1
2019-06-04rs6000: ws -> waSegher Boessenkool1-4/+1
2019-06-04rs6000: wv -> v+p7vSegher Boessenkool1-4/+1
2019-06-04rs6000: wi->wa, wt->waSegher Boessenkool1-10/+2
2019-06-04rs6000: Delete wgSegher Boessenkool1-4/+1
2019-05-31New .md construct: define_insn_and_rewriteRichard Sandiford1-0/+113
2019-05-30constraints.md (eI): New constraint.Bill Schmidt1-0/+3
2019-05-22rs6000: wz -> d+p7Segher Boessenkool1-3/+0
2019-05-22rs6000: wl -> d+p6Segher Boessenkool1-4/+1
2019-05-22rs6000: wm -> wa+p8vSegher Boessenkool1-4/+1
2019-05-22rs6000: wk -> ws+p8vSegher Boessenkool1-4/+1
2019-05-22rs6000: wj -> wi+p8vSegher Boessenkool1-4/+1
2019-05-22rs6000: wh -> d+p8vSegher Boessenkool1-4/+1
2019-05-20rs6000: Delete the "wH" and "wI" constraintsSegher Boessenkool1-6/+0
2019-05-20rs6000: Delete the "wy" constraintSegher Boessenkool1-4/+1
2019-05-20rs6000: Delete the "wu" constraintSegher Boessenkool1-4/+1
2019-05-20rs6000: Delete "wJ" and "wK" constraintsSegher Boessenkool1-6/+0
2019-05-20rs6000: Delete the "wb" constraintSegher Boessenkool1-3/+0
2019-05-20rs6000: Delete the "wo" constraintSegher Boessenkool1-4/+1
2019-05-12Accept code attributes as rtx codes in .md filesRichard Sandiford1-0/+21
2019-02-26extend.texi (__builtin_object_size): Use @pxref instead of @xref inside paren...Uros Bizjak1-1/+1
2019-01-22Document AMD GCN.Andrew Stubbs1-0/+94
2019-01-09PR other/16615 [1/5]Sandra Loosemore1-8/+8
2019-01-01Update copyright years.Jakub Jelinek1-1/+1
2018-12-18re PR target/88513 (FAIL: gcc.target/i386/pr59591-1.c)Jakub Jelinek1-0/+21
2018-11-27Document the xorsign optab.Tamar Christina1-0/+9
2018-11-22PR85434: Prevent spilling of stack protector guard's address on ARMThomas Preud'homme1-8/+47
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