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2011-11-18Add _mm_stream_si64.H.J. Lu1-0/+1
2011-11-18 H.J. Lu <hongjiu.lu@intel.com> PR target/33944 * doc/extend.texi: Document __builtin_ia32_movnti64. * config/i386/emmintrin.h (_mm_stream_si64): New. * config/i386/i386-builtin-types.def: Add VOID_FTYPE_PLONGLONG_LONGLONG. * config/i386/i386.c (ix86_builtins): Add IX86_BUILTIN_MOVNTI64. (bdesc_special_args): Update __builtin_ia32_movnti. Add __builtin_ia32_movnti64. (ix86_expand_special_args_builtin): Handle VOID_FTYPE_PLONGLONG_LONGLONG. * config/i386/i386.md (UNSPEC_MOVNTI): New. * config/i386/sse.md (sse2_movntsi): Renamed to ... (sse2_movnti<mode>): This. From-SVN: r181491
2011-11-10extend.texi: Document __atomic_test_and_set and __atomic_clear.Andrew MacLeod1-0/+21
2011-11-10 Andrew MacLeod <amacleod@redhat.com> * doc/extend.texi: Document __atomic_test_and_set and __atomic_clear. From-SVN: r181273
2011-11-07atomic_base.h (atomic_thread_fence): Call builtin.Andrew MacLeod1-7/+1
2011-11-07 Andrew MacLeod <amacleod@redhat.com> libstdc++-v3 * include/bits/atomic_base.h (atomic_thread_fence): Call builtin. (atomic_signal_fence): Call builtin. (atomic_flag::test_and_set): Call __atomic_exchange when it is lockfree, otherwise fall back to call __sync_lock_test_and_set. (atomic_flag::clear): Call __atomic_store when it is lockfree, otherwise fall back to call __sync_lock_release. gcc * doc/extend.texi: Docuemnt behaviour change for __atomic_exchange and __atomic_store. * optabs.c (expand_atomic_exchange): Expand to __sync_lock_test_and_set only when originated from that builtin. (expand_atomic_store): Expand to __sync_lock_release when originated from that builtin. * builtins.c (expand_builtin_sync_lock_test_and_set): Add flag that expand_atomic_exchange call originated from here. (expand_builtin_sync_lock_release): Add flag that expand_atomic_store call originated from here. (expand_builtin_atomic_exchange): Add origination flag. (expand_builtin_atomic_store): Add origination flag. * expr.h (expand_atomic_exchange, expand_atomic_store): Add boolean parameters to indicate implementation fall back options. From-SVN: r181111
2011-11-06Check in patch/merge from cxx-mem-model BranchAndrew Macleod1-3/+236
From-SVN: r181031
2011-11-05config.gcc (epiphany-*-*): New architecture.Joern Rennecke1-3/+4
gcc: * config.gcc (epiphany-*-*): New architecture. (epiphany-*-elf): New configuration. * config/epiphany, common/config/epiphany : New directories. * doc/extend.texi (disinterrupt attribute): Add Epiphany. (interrupt attribute): Add Epiphany. (long_call, short_call attribute): Add Epiphany. * doc/invoke.texi (Options): Add Epiphany options. * doc/md.texi (Machine Constraints): Add Epiphany constraints. * doc/install.texi (Options specification): Add --with-stack-offset=@var{num} description. (host/target specific issues): Add epiphany-*-elf. * doc/contrib.texi (Contributors): Mention Epiphany port. gcc/testsuite: * gcc.c-torture/execute/ieee/mul-subnormal-single-1.x: Disable test on Epiphany. * gcc.c-torture/execute/20101011-1.c: Disable test on Epiphany. * gcc.dg/stack-usage-1.c [__epiphany__] (SIZE): Define. * gcc.dg/pragma-pack-3.c: Disable test on Epiphany. * g++.dg/parse/pragma3.C: Likewise. * stackalign/builtin-apply-2.c (STACK_ARGUMENTS_SIZE): Define. (bar): Use it. * gcc.dg/weak/typeof-2.c [epiphany-*-*]: Add option -mshort-calls. * gcc.dg/tls/thr-cse-1.c: Likewise. * g++.dg/opt/devirt2.C: Likewise. * gcc.dg/20020312-2.c [epiphany-*-*] (PIC_REG): Define. * gcc.dg/builtin-apply2.c [__epiphany__]: (STACK_ARGUMENTS_SIZE): 20. * gcc.target/epiphany: New directory. libgcc: * config.host (epiphany-*-elf*): New configuration. * config/epiphany: New Directory. contrib: * contrib-list.mk: Add Epiphany configurations. From-SVN: r181016
2011-10-24re PR target/49824 ([avr] Missing documentation for OS_task and OS_main ↵Anatoly Sokolov1-10/+40
attributes) PR target/49824 * doc/extend.texi (Declaring Attributes of Functions): Document OS_main and OS_task attributes. (Specifying Attributes of Variables): Move up subsection "AVR Variable Attributes" as of alphabetical order. Co-Authored-By: Georg-Johann Lay <avr@gjlay.de> From-SVN: r180385
2011-10-07Rename vshuffle/vec_shuffle to vec_perm.Richard Henderson1-23/+14
* doc/extend.texi (__builtin_shuffle): Improve the description to include the modulus of the selector. Mention OpenCL. * doc/md.texi (vec_perm, vec_perm_const): Document named patterns. * tree.def (VEC_PERM_EXPR): Rename from VEC_SHUFFLE_EXPR. * genopinit.c (optabs): Rename vshuffle to vec_perm. * c-typeck.c (c_build_vec_perm_expr): Rename from c_build_vec_shuffle_expr. Update for name changes. * optabs.c (expand_vec_perm_expr_p): Rename from expand_vec_shuffle_expr_p. (expand_vec_perm_expr): Rename from expand_vec_shuffle_expr. * optabs.h (OTI_vec_perm): Rename from DOI_vshuffle. (vec_perm_optab): Rename from vshuffle_optab. * expr.c, gimple-pretty-print.c, gimple.c, gimplify.c, c-tree.h, c-parser.c, tree-cfg.c, tree-inline.c, tree-pretty-print.c, tree-ssa-operands.c, tree-vect-generic.c: Update for name changes. * config/i386/i386.c (ix86_expand_vec_perm): Rename from ix86_expand_vshuffle. * config/i386/i386-protos.h: Update. * config/i386/sse.md (VEC_PERM_AVX2): Rename from VSHUFFLE_AVX2. (vec_perm<VEC_PERM_AVX2>): Rename from vshuffle<VSHUFFLE_AVX2>. From-SVN: r179701
2011-10-04Add support for more sparc VIS 3.0 instructions.David S. Miller1-0/+11
gcc/ * config/sparc/sparc.md (UNSPEC_FHADD, UNSPEC_FHSUB, UNSPEC_XMUL): New unspecs. (muldi3_v8plus): Use output_v8plus_mult. (*naddsf3, *nadddf3, *nmulsf3, *nmuldf3, *nmuldf3_extend): New VIS 3.0 combiner patterns. (fhaddsf_vis, fhadddf_vis, fhsubsf_vis, fhsubdf_vis, fnhaddsf_vis, fnhaddf_vis, umulxhi_vis, *umulxhi_sp64, umulxhi_v8plus, xmulx_vis, *xmulx_sp64, xmulx_v8plus, xmulxhi_vis, *xmulxhi_sp64, xmulxhi_v8plus): New VIS 3.0 builtins patterns. * config/sparc/sparc.c (sparc_vis_init_builtins): Emit new builtins. (output_v8plus_mult): New function. * config/sparc/sparc-protos.h: Declare it. * config/sparc/visintrin.h (__vis_fhadds, __vis_fhaddd, __vis_fhsubs, __vis_fhsubd, __vis_fnhadds, __vis_fnhaddd, __vis_umulxhi, __vis_xmulx, __vis_xmulxhi): New intrinsics. * doc/extend.texi: Document new builtins. gcc/testsuite/ * gcc.target/sparc/fhalve.c: New test. * gcc.target/sparc/fnegop.c: New test. * gcc.target/sparc/xmul.c: New test. From-SVN: r179535
2011-10-03Vector shuffling patch from Artem Shinkarov.Artjoms Sinkarovs1-0/+26
From-SVN: r179462
2011-10-01Start adding support for VIS 3.0 instructions.David S. Miller1-2/+43
gcc/ * config/sparc/sparc.opt (VIS3): New option. * doc/invoke.texi: Document it. * config/sparc/sparc.h: Force TARGET_VIS3 to zero if assembler is not capable of such instructions. * config/sparc/sparc-c.c (sparc_target_macros): Define __VIS__ to 0x300 when TARGET_VIS3. * config/sparc/sparc-modes.def: Create 16-byte vector modes. * config/sparc/sparc.md (UNSPEC_CMASK8, UNSPEC_CMASK16, UNSPEC_CMASK32, UNSPEC_FCHKSM16, UNSPEC_PDISTN, UNSPC_FUCMP): New unspecs. (V64N8, VASS): New mode iterators. (vis3_shift, vis3_addsub_ss): New code iterators. (vbits, vconstr): New mode attributes. (vis3_shift_insn, vis3_addsub_ss_insn): New code attributes. (cmask8<P:mode>_vis, cmask16<P:mode>_vis, cmask32<P:mode>_vis, fchksm16_vis, <vis3_shift_insn><vbits>_vis, pdistn<mode>_vis, fmean16_vis, fpadd64_vis, fpsub64_vis, <vis3_addsub_ss_insn><vbits>_vis, fucmp<code>8<P:mode>_vis): New VIS 3.0 instruction patterns. * config/sparc/sparc.c (sparc_option_override): Set MASK_VIS3 by default when targetting capable cpus. TARGET_VIS3 implies TARGET_VIS2 and TARGET_VIS, and clear them when TARGET_FPU is disabled. (sparc_vis_init_builtins): Emit new VIS 3.0 builtins. (sparc_fold_builtin): Do not eliminate cmask{8,16,32} when result is ignored. * config/sparc/visintrin.h (__vis_cmask8, __vis_cmask16, __vis_cmask32, __vis_fchksm16, __vis_fsll16, __vis_fslas16, __vis_fsrl16, __vis_fsra16, __vis_fsll32, __vis_fslas32, __vis_fsrl32, __vis_fsra32, __vis_pdistn, __vis_fmean16, __vis_fpadd64, __vis_fpsub64, __vis_fpadds16, __vis_fpadds16s, __vis_fpsubs16, __vis_fpsubs16s, __vis_fpadds32, __vis_fpadds32s, __vis_fpsubs32, __vis_fpsubs32s, __vis_fucmple8, __vis_fucmpne8, __vis_fucmpgt8, __vis_fucmpeq8): New VIS 3.0 interfaces. * doc/extend.texi: Document new VIS 3.0 builtins. gcc/testsuite/ * gcc.target/sparc/cmask.c: New test. * gcc.target/sparc/fpadds.c: New test. * gcc.target/sparc/fshift.c: New test. * gcc.target/sparc/fucmp.c: New test. * gcc.target/sparc/vis3misc.c: New test. From-SVN: r179421
2011-09-30Add missing ','.H.J. Lu1-2/+2
2011-09-30 H.J. Lu <hongjiu.lu@intel.com> * doc/extend.texi: Add missing ','. From-SVN: r179397
2011-09-30Add sparc VIS 2.0 builtins, intrinsics, and option to control them.David S. Miller1-0/+18
gcc/ * config/sparc/sparc.opt (VIS2): New option. * doc/invoke.texi: Document it. * config/sparc/sparc.md (UNSPEC_EDGE8N, UNSPEC_EDGE8LN, UNSPEC_EDGE16N, UNSPEC_EDGE16LN, UNSPEC_EDGE32N, UNSPEC_EDGE32LN, UNSPEC_BSHUFFLE): New unspecs. (define_attr type): New insn type 'edgen'. (bmask<P:mode>_vis, bshuffle<V64I:mode>_vis, edge8n<P:mode>_vis, edge8ln<P:mode>_vis, edge16n<P:mode>_vis, edge16ln<P:mode>_vis, edge32n<P:mode>_vis, edge32ln<P:mode>_vis): New insn VIS 2.0 patterns. * niagara.md: Handle edgen. * niagara2.md: Likewise. * ultra1_2.md: Likewise. * ultra3.md: Likewise. * config/sparc/sparc-c.c (sparc_target_macros): Define __VIS__ to 0x200 when TARGET_VIS2. * config/sparc/sparc.c (sparc_option_override): Set MASK_VIS2 by default when targetting capable cpus. TARGET_VIS2 implies TARGET_VIS, clear and it when TARGET_FPU is disabled. (sparc_vis_init_builtins): Emit new VIS 2.0 builtins. (sparc_expand_builtin): Fix predicate indexing when builtin returns void. (sparc_fold_builtin): Do not eliminate bmask when result is ignored. * config/sparc/visintrin.h (__vis_bmask, __vis_bshuffledi, __vis_bshufflev2si, __vis_bshufflev4hi, __vis_bshufflev8qi, __vis_edge8n, __vis_edge8ln, __vis_edge16n, __vis_edge16ln, __vis_edge32n, __vis_edge32ln): New VIS 2.0 interfaces. * doc/extend.texi: Document new VIS 2.0 builtins. gcc/testsuite/ * gcc.target/sparc/bmaskbshuf.c: New test. * gcc.target/sparc/edgen.c: New test. From-SVN: r179376
2011-09-29expr.c (do_store_flag): Expand vector comparison by building an appropriate ↵Artjoms Sinkarovs1-0/+23
VEC_COND_EXPR. 2011-09-29 Artjoms Sinkarovs <artyom.shinkaroff@gmail.com> * expr.c (do_store_flag): Expand vector comparison by building an appropriate VEC_COND_EXPR. * c-typeck.c (build_binary_op): Typecheck vector comparisons. (c_objc_common_truthvalue_conversion): Adjust. * tree-vect-generic.c (do_compare): Helper function. (expand_vector_comparison): Check if hardware supports vector comparison of the given type or expand vector piecewise. (expand_vector_operation): Treat comparison as binary operation of vector type. (expand_vector_operations_1): Adjust. * gcc.c-torture/execute/vector-compare-1.c: New testcase. * gcc.c-torture/execute/vector-compare-2.c: Likewise. * gcc.dg/vector-compare-1.c: Likewise. * gcc.dg/vector-compare-2.c: Likewise. From-SVN: r179342
2011-09-29Add sparc 3D array addressing VIS intrinsics.David S. Miller1-0/+4
gcc/ * config/sparc/sparc.md (UNSPEC_ARRAY8, UNSPEC_ARRAY16, UNSPEC_ARRAY32): New unspec. (define_attr type): New type 'array'. (array{8,16,32}<P:mode>_vis): New patterns. * config/sparc/ultra1_2.md: Add reservations for 'array'. * config/sparc/ultra3.md: Likewise. * config/sparc/niagara.md: Likewise. * config/sparc/niagara2.md: Likewise. * config/sparc/sparc.c (sparc_vis_init_builtins): Build new array builtins. * config/sparc/visintrin.h (__vis_array8, __vis_array16, __vis_array32): New. * doc/extend.texi: Document new VIS builtins. gcc/testsuite/ * gcc.target/sparc/array.c: New test. From-SVN: r179334
2011-09-26Add explicit VIS intrinsics for addition and subtraction.David S. Miller1-0/+10
gcc/ * config/sparc/sparc.c (sparc_vis_init_builtins): Add explicit builtins for VIS vector addition and subtraction. * config/sparc/visintrin.h (__vis_fpadd16, __vis_fpadd16s, __vis_fpadd32, __vis_fpadd32s, __vis_fpsub16, __vis_fpsub16s, __vis_fpsub32, __vis_fpsub32s): New. * doc/extend.texi: Document new VIS intrinsics. gcc/testsuite/ * gcc.target/sparc/fpaddsubi.c: New test. From-SVN: r179235
2011-09-26Improve code generation for edge and pixel-compare...David S. Miller1-15/+15
Improve code generation for edge and pixel-compare, specifically avoid sign and zero extensions on 64-bit and allow such instructions to be placed in delay slots. gcc/ * config/sparc/sparc.md (edge{8,16,32}{,l}): Return Pmode. (fcmp{le,ne,gt,eq}{16,32}): Likewise. * config/sparc/visintrin.h: Update edge and pixel-compare intrinsics to return 'long' instead of 'int'. * doc/extend.texi: Update documentation to match. * config/sparc/sparc.c (eligible_for_return_delay): When leaf or flat, allow any instruction. Otherwise, when V9 allow parallels which consist only of sets to registers outside of %o0 to %o5. (sparc_vis_init_builtins): Update VIS builtin types for edge and pixel-compare. gcc/testsuite/ * gcc.target/sparc/edge.c: Update for new return types. * gcc.target/sparc/fcmp.c: Likewise. From-SVN: r179227
2011-09-24Teach sparc backend about %gsr register and add intrinsics to access it.David S. Miller1-0/+3
* config/sparc/sparc.h (FIRST_PSEUDO_REGISTER): Bump to 103. (SPARC_GSR_REG): Define. (FIXED_REGISTERS): Mark GSR as fixed. (CALL_USED_REGISTERS): Mark GSR as call used. (HARD_REGNO_NREGS): GSR is always 1 register. (REG_CLASS_CONTENTS): Add GSR to ALL_REGS. (REG_ALLOC_ORDER, REG_LEAF_ALLOC_ORDER): Add GSR to the end. (REGISTER_NAMES): Add "%gsr". * config/sparc/sparc.md (UNSPEC_ALIGNADDR, UNSPEC_ALIGNADDRL): Delete. (UNSPEC_WRGSR): New unspec. (GSR_REG): New constant. (type): Add new insn type 'gsr'. (fpack16_vis, fpackfix_vis, fpack32_vis, faligndata<V64I:MODE>_vis)): Add use of GSR_REG. (wrgsr_vis, *wrgsr_sp64, wrgsr_v8plus, rdgsr_vis, *rdgsr_sp64, rdgsr_v8plus): New expanders and insns. (alignaddr<P:mode>_vis, alignaddrl<P:mode>_vis): Reimplement using patterns which show that this is a plus in addition to a modification of GSR_REG, instead of an unspec. * config/sparc/ultra1_2.md: Handle 'gsr'. * config/sparc/ultra3.md: Likewise. * config/sparc/niagara.md: Likewise. * config/sparc/niagara2.md: Likewise. * config/sparc/sparc.c (leaf_reg_remap, sparc_leaf_regs): Fill out end of table. (sparc_option_override): Make -mvis imply -mv8plus. (hard_32bit_mode_classes, hard_64bit_mode_classes): Add entries for %gsr. (sparc_vis_init_builtins): Build __builtin_vis_write_gsr and __builtin_vis_read_gsr. (sparc_expand_buildin): Handle builtins that take one argument and return void. (sparc_fold_builtin): Never fold writes to %gsr. * config/sparc/visintrin.h (__vis_write_gsr, __vis_read_gsr): New. * doc/extend.texi: Document new VIS intrinsics. From-SVN: r179159
2011-09-21Add pixel compare VIS intrinsics.David S. Miller1-0/+9
* config/sparc/sparc.md (UNSPEC_FCMPLE, UNSPEC_FCMPNE, UNSPEC_FCMPGT, UNSPEC_FCMPEQ): New unspec codes. (fcmple16_vis, fcmple32_vis, fcmpne16_vis, fcmpne32_vis, fcmpgt16_vis, fcmpgt32_vis, fcmpeq16_vis, fcmpeq32_vis): New patterns. * config/sparc/sparc.c (sparc_vis_init_builtins): Create builtins for new pixel compare VIS patterns. * config/sparc/visintrin.h (__vis_fcmple16, __vis_fcmple32, __vis_fcmpne16, __vis_fcmpne32, __vis_fcmpgt16, __vis_fcmpgt32, __vis_fcmpeq16, __vis_fcmpeq32): New. * doc/extend.texi: Document new pixel compare VIS intrinsics. From-SVN: r179072
2011-09-20sparc.md (UNSPEC_ALIGNADDRL): New unspec.David S. Miller1-11/+12
* config/sparc/sparc.md (UNSPEC_ALIGNADDRL): New unspec. (aligneddrl<P:mode>_vis): New pattern. (edge8_vis, edge8l_vis, edge16_vis, edge16l_vis, edge32_vis, edge32l_vis): Adjust to take Pmode arguments, and return SImode. * config/sparc/sparc.c (sparc_vis_init_builtins): Handle new alignaddrl insn, and adjust edge operations for updated types. * config/sparc/visintrin.h: Likewise. * doc/extend.texi: Make typing in VIS documentation match reality. From-SVN: r179012
2011-09-17sparc.md (UNSPEC_EDGE8, [...]): New unspecs.David S. Miller1-0/+7
* config/sparc/sparc.md (UNSPEC_EDGE8, UNSPEC_EDGE8L, UNSPEC_EDGE16, UNSPEC_EDGE16L, UNSPEC_EDGE32, UNSPEC_EDGE32L): New unspecs. (define_attr type): New type 'edge'. (edge8_vis, edge8l_vis, edge16_vis, edge16l_vis, edge32_vis, edge32l_vis): New patterns. * config/sparc/ultra1_2.md: Add insn reservation for 'edge'. * config/sparc/ultra3.md: Likewise. * config/sparc/niagara.md: Likewise. * config/sparc/niagara2.md: Likewise. * config/sparc/sparc.d (sparc_vis_init_builtins): Generate builtins for VIS edge instructions. * config/sparc/visintrin.h (__vis_edge8, __vis_edge8l) (__vis_edge16, __vis_edge16l, __vis_edge32, __vis_edge32l): New intrinsics. (__v8qi, __v4qi): Make unsigned. (__vis_faligndatadi, ___vis_faligndatav2si, __vis_faligndatav4hi, __vis_faligndatav8qi, __vis_fmul8x16au, __vis_fmul8x16al, __vis_fpack32): Fix types. * doc/extend.texi: Document new 'edge' VIS intrinsics. From-SVN: r178931
2011-08-23Add BMI2 support.H.J. Lu1-0/+11
gcc/ 2011-08-23 Uros Bizjak <ubizjak@gmail.com> * config/i386/i386.md (type): Add imulx, ishiftx and rotatex. (length_immediate): Handle imulx, ishiftx and rotatex. (imm_disp): Ditto. (isa): Add bmi2. (enabled): Handle bmi2. (w): New mode attribute. (*mul<mode><dwi>3): Split from *<u>mul<mode><dwi>3. (*umul<mode><dwi>3): Ditto. Add imulx BMI2 alternative. (*bmi2_umulditi3_1): New insn pattern. (*bmi2_umulsidi3_1): Ditto. (*umul<mode><dwi>3 splitter): New splitter to avoid flags dependency. (*bmi2_ashl<mode>3_1): New insn pattern. (*ashl<mode>3_1): Add ishiftx BMI2 alternative. (*ashl<mode>3_1 splitter): New splitter to avoid flags dependency. (*bmi2_ashlsi3_1_zext): New insn pattern. (*ashlsi3_1_zext): Add ishiftx BMI2 alternative. (*ashlsi3_1_zext splitter): New splitter to avoid flags dependency. (*bmi2_<shiftrt_insn><mode>3_1): New insn pattern. (*<shiftrt_insn><mode>3_1): Add ishiftx BMI2 alternative. (*<shiftrt_insn><mode>3_1 splitter): New splitter to avoid flags dependency. (*bmi2_<shiftrt_insn>si3_1_zext): New insn pattern. (*<shiftrt_insn>si3_1_zext): Add ishiftx BMI2 alternative. (*<shiftrt_insn>si3_1_zext splitter): New splitter to avoid flags dependency. (*bmi2_rorx<mode>3_1): New insn pattern. (*<rotate_insn><mode>3_1): Add rotatex BMI2 alternative. (*rotate<mode>3_1 splitter): New splitter to avoid flags dependency. (*rotatert<mode>3_1 splitter): Ditto. (*bmi2_rorxsi3_1_zext): New insn pattern. (*<rotate_insn>si3_1_zext): Add rotatex BMI2 alternative. (*rotatesi3_1_zext splitter): New splitter to avoid flags dependency. (*rotatertsi3_1_zext splitter): Ditto. 2011-08-23 Kirill Yukhin <kirill.yukhin@intel.com> * common/config/i386/i386-common.c (OPTION_MASK_ISA_BMI2_SET): New. (OPTION_MASK_ISA_BMI2_UNSET): Likewise. (ix86_handle_option): Handle OPT_mbmi2 case. * config.gcc (i[34567]86-*-*): Add bmi2intrin.h. (x86_64-*-*): Likewise. * config/i386/bmi2intrin.h: New file. * config/i386/cpuid.h (bit_BMI2): New. * config/i386/driver-i386.c (host_detect_local_cpu): Detect BMI2 feature. * config/i386/i386-c.c (ix86_target_macros_internal): Conditionally define __BMI2__. * config/i386/i386.c (ix86_option_override_internal): Define PTA_BMI2. Handle BMI2 option. (ix86_valid_target_attribute_inner_p): Handle BMI2 option. (print_reg): New code. (ix86_print_operand): Likewise. (ix86_builtins): Add IX86_BUILTIN_BZHI32, IX86_BUILTIN_BZHI64, IX86_BUILTIN_PDEP32, IX86_BUILTIN_PDEP64, IX86_BUILTIN_PEXT32, IX86_BUILTIN_PEXT64. (bdesc_args): Add IX86_BUILTIN_BZHI32, IX86_BUILTIN_BZHI64, IX86_BUILTIN_PDEP32, IX86_BUILTIN_PDEP64, IX86_BUILTIN_PEXT32, IX86_BUILTIN_PEXT64. * config/i386/i386.h (TARGET_BMI2): New. * config/i386/i386.md (UNSPEC_PDEP): New. (UNSPEC_PEXT): Likewise. (*bmi2_bzhi_<mode>3): Likewise. (*bmi2_pdep_<mode>3): Likewise. (*bmi2_pext_<mode>3): Likewise. * config/i386/i386.opt (mbmi2): New. * config/i386/x86intrin.h: Include bmi2intrin.h when __BMI2__ is defined. * doc/extend.texi: Document BMI2 built-in functions. * doc/invoke.texi: Document -mbmi2. gcc/testsuite/ 2011-08-23 Kirill Yukhin <kirill.yukhin@intel.com> * g++.dg/other/i386-2.C: Add -mbmi2 check. * g++.dg/other/i386-3.C: Likewise. * gcc.target/i386/bmi2-bzhi32-1.c: New testcase. * gcc.target/i386/bmi2-bzhi32-1a.c: Likewise. * gcc.target/i386/bmi2-bzhi64-1.c: Likewise. * gcc.target/i386/bmi2-bzhi64-1a.c: Likewise. * gcc.target/i386/bmi2-mulx32-1.c: Likewise. * gcc.target/i386/bmi2-mulx32-1a.c: Likewise. * gcc.target/i386/bmi2-mulx64-1.c: Likewise. * gcc.target/i386/bmi2-mulx64-1a.c: Likewise. * gcc.target/i386/bmi2-pdep32-1.c: Likewise. * gcc.target/i386/bmi2-pdep32-1a.c: Likewise. * gcc.target/i386/bmi2-pdep64-1.c: Likewise. * gcc.target/i386/bmi2-pdep64-1a.c: Likewise. * gcc.target/i386/bmi2-pext32-1.c: Likewise. * gcc.target/i386/bmi2-pext32-1a.c: Likewise. * gcc.target/i386/bmi2-pext64-1.c: Likewise. * gcc.target/i386/bmi2-pext64-1a.c: Likewise. * gcc.target/i386/bmi2-rorx32-1.c: Likewise. * gcc.target/i386/bmi2-rorx32-1a.c: Likewise. * gcc.target/i386/bmi2-rorx64-1.c: Likewise. * gcc.target/i386/bmi2-rorx64-1a.c: Likewise. * gcc.target/i386/bmi2-sarx32-1.c: Likewise. * gcc.target/i386/bmi2-sarx32-1a.c: Likewise. * gcc.target/i386/bmi2-sarx64-1.c: Likewise. * gcc.target/i386/bmi2-sarx64-1a.c: Likewise. * gcc.target/i386/bmi2-shlx32-1.c: Likewise. * gcc.target/i386/bmi2-shlx32-1a.c: Likewise. * gcc.target/i386/bmi2-shlx64-1.c: Likewise. * gcc.target/i386/bmi2-shlx64-1a.c: Likewise. * gcc.target/i386/bmi2-shrx32-1.c: Likewise. * gcc.target/i386/bmi2-shrx32-1a.c: Likewise. * gcc.target/i386/bmi2-shrx64-1.c: Likewise. * gcc.target/i386/bmi2-shrx64-1a.c: Likewise. * gcc.target/i386/i386.exp (check_effective_target_bmi2): New. * gcc.target/i386/sse-12.c: Add BMI2. * gcc.target/i386/sse-13.c: Likewise. * gcc.target/i386/sse-14.c: Likewise. * gcc.target/i386/sse-22.c: Likewise. * gcc.target/i386/sse-23.c: Likewise. From-SVN: r178001
2011-08-22Add support for AVX2 builtin functions.Kirill Yukhin1-0/+178
2011-08-22 Kirill Yukhin <kirill.yukhin@intel.com> * config/i386/avx2intrin.h: New file. * config/i386/i386-builtin-types.def (PCINT, PCINT64, PV4SI, PV8SI, V32QI_FTYPE_V32QI, V32QI_FTYPE_V16QI, V16HI_FTYPE_V16HI, V16HI_FTYPE_V8HI, V8SI_FTYPE_V8SI, V16HI_FTYPE_V16QI, V8SI_FTYPE_V16QI, V4DI_FTYPE_V16QI, V8SI_FTYPE_V8HI, V4DI_FTYPE_V8HI, V4DI_FTYPE_V4SI, V4DI_FTYPE_PV4DI, V4DI_FTYPE_V2DI, V2DI_FTYPE_PCV2DI_V2DI, V4SI_FTYPE_PCV4SI_V4SI, V32QI_FTYPE_V16HI_V16HI, V16HI_FTYPE_V8SI_V8SI, V32QI_FTYPE_V32QI_V32QI, V16HI_FTYPE_V32QI_V32QI, V16HI_FTYPE_V16HI_V8HI, V16HI_FTYPE_V16HI_V16HI, V16HI_FTYPE_V16HI_INT, V16HI_FTYPE_V16HI_SI, V16HI_FTYPE_V16HI_V16HI_INT, V32QI_FTYPE_V32QI_V32QI_INT, V8SI_FTYPE_V8SI_V4SI, V8SI_FTYPE_V8SI_V8SI, V8SI_FTYPE_V16HI_V16HI, V8SI_FTYPE_V8SI_INT, V8SI_FTYPE_V8SI_SI, V8SI_FTYPE_PCV8SI_V8SI, V4DI_FTYPE_V4DI_V4DI, V4DI_FTYPE_V8SI_V8SI, V4DI_FTYPE_V4DI_V2DI, V4DI_FTYPE_PCV4DI_V4DI, V4DI_FTYPE_V4DI_INT, V2DI_FTYPE_V4DI_INT, V4DI_FTYPE_V4DI_V4DI_INT, V4DI_FTYPE_V4DI_V2DI_INT, VOID_FTYPE_PV2DI_V2DI_V2DI, VOID_FTYPE_PV4DI_V4DI_V4DI, VOID_FTYPE_PV4SI_V4SI_V4SI, VOID_FTYPE_PV8SI_V8SI_V8SI, V2DF_FTYPE_V2DF_PCDOUBLE_V4SI_V2DF_INT, V4DF_FTYPE_V4DF_PCDOUBLE_V4SI_V4DF_INT, V2DF_FTYPE_V2DF_PCDOUBLE_V2DI_V2DF_INT, V4DF_FTYPE_V4DF_PCDOUBLE_V4DI_V4DF_INT, V4SF_FTYPE_V4SF_PCFLOAT_V4SI_V4SF_INT, V8SF_FTYPE_V8SF_PCFLOAT_V8SI_V8SF_INT, V4SF_FTYPE_V4SF_PCFLOAT_V2DI_V4SF_INT, V4SF_FTYPE_V4SF_PCFLOAT_V4DI_V4SF_INT, V2DI_FTYPE_V2DI_PCINT64_V4SI_V2DI_INT, V4DI_FTYPE_V4DI_PCINT64_V4SI_V4DI_INT, V2DI_FTYPE_V2DI_PCINT64_V2DI_V2DI_INT, V4DI_FTYPE_V4DI_PCINT64_V4DI_V4DI_INT, V4SI_FTYPE_V4SI_PCINT_V4SI_V4SI_INT, V8SI_FTYPE_V8SI_PCINT_V8SI_V8SI_INT, V4SI_FTYPE_V4SI_PCINT_V2DI_V4SI_INT, V4SI_FTYPE_V4SI_PCINT_V4DI_V4SI_INT, V16HI_FTYPE_V16HI_SI_COUNT, V16HI_FTYPE_V16HI_V8HI_COUNT, V8SI_FTYPE_V8SI_SI_COUNT, V8SI_FTYPE_V8SI_V4SI_COUNT, V4DI_FTYPE_V4DI_INT_COUNT, V4DI_FTYPE_V4DI_V2DI_COUNT, V4DI_FTYPE_V4DI_INT_CONVERT, V4DI_FTYPE_V4DI_V4DI_INT_CONVERT): New. * config/i386/i386.c (ix86_builtins): Add IX86_BUILTIN_MPSADBW256, IX86_BUILTIN_PABSB256, IX86_BUILTIN_PABSW256, IX86_BUILTIN_PABSD256, IX86_BUILTIN_PACKSSDW256, IX86_BUILTIN_PACKSSWB256, IX86_BUILTIN_PACKUSDW256, IX86_BUILTIN_PACKUSWB256, IX86_BUILTIN_PADDB256, IX86_BUILTIN_PADDW256, IX86_BUILTIN_PADDD256, IX86_BUILTIN_PADDQ256, IX86_BUILTIN_PADDSB256, IX86_BUILTIN_PADDSW256, IX86_BUILTIN_PADDUSB256, IX86_BUILTIN_PADDUSW256, IX86_BUILTIN_PALIGNR256, IX86_BUILTIN_AND256I, IX86_BUILTIN_ANDNOT256I, IX86_BUILTIN_PAVGB256, IX86_BUILTIN_PAVGW256, IX86_BUILTIN_PBLENDVB256, IX86_BUILTIN_PBLENDVW256, IX86_BUILTIN_PCMPEQB256, IX86_BUILTIN_PCMPEQW256, IX86_BUILTIN_PCMPEQD256, IX86_BUILTIN_PCMPEQQ256, IX86_BUILTIN_PCMPGTB256, IX86_BUILTIN_PCMPGTW256, IX86_BUILTIN_PCMPGTD256, IX86_BUILTIN_PCMPGTQ256, IX86_BUILTIN_PHADDW256, IX86_BUILTIN_PHADDD256, IX86_BUILTIN_PHADDSW256, IX86_BUILTIN_PHSUBW256, IX86_BUILTIN_PHSUBD256, IX86_BUILTIN_PHSUBSW256, IX86_BUILTIN_PMADDUBSW256, IX86_BUILTIN_PMADDWD256, IX86_BUILTIN_PMAXSB256, IX86_BUILTIN_PMAXSW256, IX86_BUILTIN_PMAXSD256, IX86_BUILTIN_PMAXUB256, IX86_BUILTIN_PMAXUW256, IX86_BUILTIN_PMAXUD256, IX86_BUILTIN_PMINSB256, IX86_BUILTIN_PMINSW256, IX86_BUILTIN_PMINSD256, IX86_BUILTIN_PMINUB256, IX86_BUILTIN_PMINUW256, IX86_BUILTIN_PMINUD256, IX86_BUILTIN_PMOVMSKB256, IX86_BUILTIN_PMOVSXBW256, IX86_BUILTIN_PMOVSXBD256, IX86_BUILTIN_PMOVSXBQ256, IX86_BUILTIN_PMOVSXWD256, IX86_BUILTIN_PMOVSXWQ256, IX86_BUILTIN_PMOVSXDQ256, IX86_BUILTIN_PMOVZXBW256, IX86_BUILTIN_PMOVZXBD256, IX86_BUILTIN_PMOVZXBQ256, IX86_BUILTIN_PMOVZXWD256, IX86_BUILTIN_PMOVZXWQ256, IX86_BUILTIN_PMOVZXDQ256, IX86_BUILTIN_PMULDQ256, IX86_BUILTIN_PMULHRSW256, IX86_BUILTIN_PMULHUW256, IX86_BUILTIN_PMULHW256, IX86_BUILTIN_PMULLW256, IX86_BUILTIN_PMULLD256, IX86_BUILTIN_PMULUDQ256, IX86_BUILTIN_POR256, IX86_BUILTIN_PSADBW256, IX86_BUILTIN_PSHUFB256, IX86_BUILTIN_PSHUFD256, IX86_BUILTIN_PSHUFHW256, IX86_BUILTIN_PSHUFLW256, IX86_BUILTIN_PSIGNB256, IX86_BUILTIN_PSIGNW256, IX86_BUILTIN_PSIGND256, IX86_BUILTIN_PSLLDQI256, IX86_BUILTIN_PSLLWI256, IX86_BUILTIN_PSLLW256, IX86_BUILTIN_PSLLDI256, IX86_BUILTIN_PSLLD256, IX86_BUILTIN_PSLLQI256, IX86_BUILTIN_PSLLQ256, IX86_BUILTIN_PSRAWI256, IX86_BUILTIN_PSRAW256, IX86_BUILTIN_PSRADI256, IX86_BUILTIN_PSRAD256, IX86_BUILTIN_PSRLDQI256, IX86_BUILTIN_PSRLWI256, IX86_BUILTIN_PSRLW256, IX86_BUILTIN_PSRLDI256, IX86_BUILTIN_PSRLD256, IX86_BUILTIN_PSRLQI256, IX86_BUILTIN_PSRLQ256, IX86_BUILTIN_PSUBB256, IX86_BUILTIN_PSUBW256, IX86_BUILTIN_PSUBD256, IX86_BUILTIN_PSUBQ256, IX86_BUILTIN_PSUBSB256, IX86_BUILTIN_PSUBSW256, IX86_BUILTIN_PSUBUSB256, IX86_BUILTIN_PSUBUSW256, IX86_BUILTIN_PUNPCKHBW256, IX86_BUILTIN_PUNPCKHWD256, IX86_BUILTIN_PUNPCKHDQ256, IX86_BUILTIN_PUNPCKHQDQ256, IX86_BUILTIN_PUNPCKLBW256, IX86_BUILTIN_PUNPCKLWD256, IX86_BUILTIN_PUNPCKLDQ256, IX86_BUILTIN_PUNPCKLQDQ256, IX86_BUILTIN_PXOR256, IX86_BUILTIN_MOVNTDQA256, IX86_BUILTIN_VBROADCASTSS_PS, IX86_BUILTIN_VBROADCASTSS_PS256, IX86_BUILTIN_VBROADCASTSD_PD256, IX86_BUILTIN_VBROADCASTSI256, IX86_BUILTIN_PBLENDD256, IX86_BUILTIN_PBLENDD128, IX86_BUILTIN_PBROADCASTB256, IX86_BUILTIN_PBROADCASTW256, IX86_BUILTIN_PBROADCASTD256, IX86_BUILTIN_PBROADCASTQ256, IX86_BUILTIN_PBROADCASTB128, IX86_BUILTIN_PBROADCASTW128, IX86_BUILTIN_PBROADCASTD128, IX86_BUILTIN_PBROADCASTQ128, IX86_BUILTIN_VPERMVARSI256, IX86_BUILTIN_VPERMDF256, IX86_BUILTIN_VPERMVARSF256, IX86_BUILTIN_VPERMDI256, IX86_BUILTIN_VPERMTI256, IX86_BUILTIN_VEXTRACT128I256, IX86_BUILTIN_VINSERT128I256, IX86_BUILTIN_MASKLOADD, IX86_BUILTIN_MASKLOADQ, IX86_BUILTIN_MASKLOADD256, IX86_BUILTIN_MASKLOADQ256, IX86_BUILTIN_MASKSTORED, IX86_BUILTIN_MASKSTOREQ, IX86_BUILTIN_MASKSTORED256, IX86_BUILTIN_MASKSTOREQ256, IX86_BUILTIN_PSLLVV4DI, IX86_BUILTIN_PSLLVV2DI, IX86_BUILTIN_PSLLVV8SI, IX86_BUILTIN_PSLLVV4SI, IX86_BUILTIN_PSRAVV8SI, IX86_BUILTIN_PSRAVV4SI, IX86_BUILTIN_PSRLVV4DI, IX86_BUILTIN_PSRLVV2DI, IX86_BUILTIN_PSRLVV8SI, IX86_BUILTIN_PSRLVV4SI, IX86_BUILTIN_GATHERSIV2DF, IX86_BUILTIN_GATHERSIV4DF, IX86_BUILTIN_GATHERDIV2DF, IX86_BUILTIN_GATHERDIV4DF, IX86_BUILTIN_GATHERSIV4SF, IX86_BUILTIN_GATHERSIV8SF, IX86_BUILTIN_GATHERDIV4SF, IX86_BUILTIN_GATHERDIV8SF, IX86_BUILTIN_GATHERSIV2DI, IX86_BUILTIN_GATHERSIV4DI, IX86_BUILTIN_GATHERDIV2DI, IX86_BUILTIN_GATHERDIV4DI, IX86_BUILTIN_GATHERSIV4SI, IX86_BUILTIN_GATHERSIV8SI, IX86_BUILTIN_GATHERDIV4SI, IX86_BUILTIN_GATHERDIV8SI. (bdesc_special_args): Add IX86_BUILTIN_MOVNTDQA256, IX86_BUILTIN_MASKLOADD, IX86_BUILTIN_MASKLOADQ, IX86_BUILTIN_MASKLOADD256, IX86_BUILTIN_MASKLOADQ256, IX86_BUILTIN_MASKSTORED, IX86_BUILTIN_MASKSTOREQ, IX86_BUILTIN_MASKSTORED256, IX86_BUILTIN_MASKSTOREQ256. (bdesc_args): Add IX86_BUILTIN_MPSADBW256, IX86_BUILTIN_PABSB256, IX86_BUILTIN_PABSW256, IX86_BUILTIN_PABSD256, IX86_BUILTIN_PACKSSDW256, IX86_BUILTIN_PACKSSWB256, IX86_BUILTIN_PACKUSDW256, IX86_BUILTIN_PACKUSWB256, IX86_BUILTIN_PADDB256, IX86_BUILTIN_PADDW256, IX86_BUILTIN_PADDD256, IX86_BUILTIN_PADDQ256, IX86_BUILTIN_PADDSB256, IX86_BUILTIN_PADDSW256, IX86_BUILTIN_PADDUSB256, IX86_BUILTIN_PADDUSW256, IX86_BUILTIN_PALIGNR256, IX86_BUILTIN_AND256I, IX86_BUILTIN_ANDNOT256I, IX86_BUILTIN_PAVGB256, IX86_BUILTIN_PAVGW256, IX86_BUILTIN_PBLENDVB256, IX86_BUILTIN_PBLENDVW256, IX86_BUILTIN_PCMPEQB256, IX86_BUILTIN_PCMPEQW256, IX86_BUILTIN_PCMPEQD256, IX86_BUILTIN_PCMPEQQ256, IX86_BUILTIN_PCMPGTB256, IX86_BUILTIN_PCMPGTW256, IX86_BUILTIN_PCMPGTD256, IX86_BUILTIN_PCMPGTQ256, IX86_BUILTIN_PHADDW256, IX86_BUILTIN_PHADDD256, IX86_BUILTIN_PHADDSW256, IX86_BUILTIN_PHSUBW256, IX86_BUILTIN_PHSUBD256, IX86_BUILTIN_PHSUBSW256, IX86_BUILTIN_PMADDUBSW256, IX86_BUILTIN_PMADDWD256, IX86_BUILTIN_PMAXSB256, IX86_BUILTIN_PMAXSW256, IX86_BUILTIN_PMAXSD256, IX86_BUILTIN_PMAXUB256, IX86_BUILTIN_PMAXUW256, IX86_BUILTIN_PMAXUD256, IX86_BUILTIN_PMINSB256, IX86_BUILTIN_PMINSW256, IX86_BUILTIN_PMINSD256, IX86_BUILTIN_PMINUB256, IX86_BUILTIN_PMINUW256, IX86_BUILTIN_PMINUD256, IX86_BUILTIN_PMOVMSKB256, IX86_BUILTIN_PMOVSXBW256, IX86_BUILTIN_PMOVSXBD256, IX86_BUILTIN_PMOVSXBQ256, IX86_BUILTIN_PMOVSXWD256, IX86_BUILTIN_PMOVSXWQ256, IX86_BUILTIN_PMOVSXDQ256, IX86_BUILTIN_PMOVZXBW256, IX86_BUILTIN_PMOVZXBD256, IX86_BUILTIN_PMOVZXBQ256, IX86_BUILTIN_PMOVZXWD256, IX86_BUILTIN_PMOVZXWQ256, IX86_BUILTIN_PMOVZXDQ256, IX86_BUILTIN_PMULDQ256, IX86_BUILTIN_PMULHRSW256, IX86_BUILTIN_PMULHUW256, IX86_BUILTIN_PMULHW256, IX86_BUILTIN_PMULLW256, IX86_BUILTIN_PMULLD256, IX86_BUILTIN_PMULUDQ256, IX86_BUILTIN_POR256, IX86_BUILTIN_PSADBW256, IX86_BUILTIN_PSHUFB256, IX86_BUILTIN_PSHUFD256, IX86_BUILTIN_PSHUFHW256, IX86_BUILTIN_PSHUFLW256, IX86_BUILTIN_PSIGNB256, IX86_BUILTIN_PSIGNW256, IX86_BUILTIN_PSIGND256, IX86_BUILTIN_PSLLDQI256, IX86_BUILTIN_PSLLWI256, IX86_BUILTIN_PSLLW256, IX86_BUILTIN_PSLLDI256, IX86_BUILTIN_PSLLD256, IX86_BUILTIN_PSLLQI256, IX86_BUILTIN_PSLLQ256, IX86_BUILTIN_PSRAWI256, IX86_BUILTIN_PSRAW256, IX86_BUILTIN_PSRADI256, IX86_BUILTIN_PSRAD256, IX86_BUILTIN_PSRLDQI256, IX86_BUILTIN_PSRLWI256, IX86_BUILTIN_PSRLW256, IX86_BUILTIN_PSRLDI256, IX86_BUILTIN_PSRLD256, IX86_BUILTIN_PSRLQI256, IX86_BUILTIN_PSRLQ256, IX86_BUILTIN_PSUBB256, IX86_BUILTIN_PSUBW256, IX86_BUILTIN_PSUBD256, IX86_BUILTIN_PSUBQ256, IX86_BUILTIN_PSUBSB256, IX86_BUILTIN_PSUBSW256, IX86_BUILTIN_PSUBUSB256, IX86_BUILTIN_PSUBUSW256, IX86_BUILTIN_PUNPCKHBW256, IX86_BUILTIN_PUNPCKHWD256, IX86_BUILTIN_PUNPCKHDQ256, IX86_BUILTIN_PUNPCKHQDQ256, IX86_BUILTIN_PUNPCKLBW256, IX86_BUILTIN_PUNPCKLWD256, IX86_BUILTIN_PUNPCKLDQ256, IX86_BUILTIN_PUNPCKLQDQ256, IX86_BUILTIN_PXOR256, IX86_BUILTIN_VBROADCASTSS_PS, IX86_BUILTIN_VBROADCASTSS_PS256, IX86_BUILTIN_VBROADCASTSD_PD256, IX86_BUILTIN_VBROADCASTSI256, IX86_BUILTIN_PBLENDD256, IX86_BUILTIN_PBLENDD128, IX86_BUILTIN_PBROADCASTB256, IX86_BUILTIN_PBROADCASTW256, IX86_BUILTIN_PBROADCASTD256, IX86_BUILTIN_PBROADCASTQ256, IX86_BUILTIN_PBROADCASTB128, IX86_BUILTIN_PBROADCASTW128, IX86_BUILTIN_PBROADCASTD128, IX86_BUILTIN_PBROADCASTQ128, IX86_BUILTIN_VPERMVARSI256, IX86_BUILTIN_VPERMDF256, IX86_BUILTIN_VPERMVARSF256, IX86_BUILTIN_VPERMDI256, IX86_BUILTIN_VPERMTI256, IX86_BUILTIN_VEXTRACT128I256, IX86_BUILTIN_VINSERT128I256, IX86_BUILTIN_PSLLVV4DI, IX86_BUILTIN_PSLLVV2DI, IX86_BUILTIN_PSLLVV8SI, IX86_BUILTIN_PSLLVV4SI, IX86_BUILTIN_PSRAVV8SI, IX86_BUILTIN_PSRAVV4SI, IX86_BUILTIN_PSRLVV4DI, IX86_BUILTIN_PSRLVV2DI, IX86_BUILTIN_PSRLVV8SI, IX86_BUILTIN_PSRLVV4SI. (ix86_init_mmx_sse_builtins): Add IX86_BUILTIN_GATHERSIV2DF, IX86_BUILTIN_GATHERSIV4DF, IX86_BUILTIN_GATHERDIV2DF, IX86_BUILTIN_GATHERDIV4DF, IX86_BUILTIN_GATHERSIV4SF, IX86_BUILTIN_GATHERSIV8SF, IX86_BUILTIN_GATHERDIV4SF, IX86_BUILTIN_GATHERDIV8SF, IX86_BUILTIN_GATHERSIV2DI, IX86_BUILTIN_GATHERSIV4DI, IX86_BUILTIN_GATHERDIV2DI, IX86_BUILTIN_GATHERDIV4DI, IX86_BUILTIN_GATHERSIV4SI, IX86_BUILTIN_GATHERSIV8SI, IX86_BUILTIN_GATHERDIV4SI, IX86_BUILTIN_GATHERDIV8SI. (ix86_preferred_simd_mode): Support AVX2 modes. (ix86_expand_args_builtin): Support AVX2 built-ins. (ix86_expand_special_args_builtin): Likewise. (ix86_expand_builtin): Likewise. * config/i386/i386.md (UNSPEC_VPERMSI): New. (UNSPEC_VPERMDF): Likewise. (UNSPEC_VPERMSF): Likewise. (UNSPEC_VPERMDI): Likewise. (UNSPEC_VPERMTI): Likewise. (UNSPEC_GATHER): Likewise. (ssemodesuffix): Extend. * config/i386/immintrin.h: Include avx2intrin.h when __AVX2__ is defined. * config/i386/predicates.md (const1248_operand): New. * config/i386/sse.md (VI_AVX2): (VI1_AVX2): Likewise. (VI2_AVX2): Likewise. (VI4_AVX2): Likewise. (VI8_AVX2): Likewise. (VIMAX_AVX2): Likewise. (SSESCALARMODE): Likewise. (VI12_AVX2): Likewise. (VI24_AVX2): Likewise. (VI124_AVX2): Likeuse_submit_for_speed = 1 wise. (VI248_AVX2): Likewise. (VI48_AVX2): Likewise. (VI4SD_AVX2): Likewise. (V48_AVX2): Likewise. (avx2modesuffix): Likewise. (sse_avx2): Likewise. (sse2_avx2): Likewise. (ssse3_avx2): Likewise. (sse4_1_avx2): Likewise. (avx_avx2): Likewise. (lshift)<code_oterator>: Likewise. (lshift_insn): Likewise. (lshift)<code_attr>: Likewise. (SSESHORTMODE): Likewise. (SSELONGMODE): Likewise. (SSEBYTEMODE): Likewise. (AVXTOSSEMODE): Likewise. (shortmode): Likewise. (ssescalarmodesuffix): Update. (sseunpackmode): Likewise. (ssepackmode): Likewise. (AVX256MODEI): New. (AVX256MODE124): Likewise. (AVX256MODE1248): Likewise. (AVX256MODE248): Likewise. (AVXMODE48P_SI): Likewise. (AVXMODE48P_SI): Likewise. (AVXMODE48P_DI): Likewise. (AVXMODE48P_DI): Likewise. (gthrfirstp): Likewise. (gthrlastp): Likewise. (avx2): Likwise. (ssevecsize): Likewise. (ssedoublesizemode): Likewise. (avxvecmode): Likewise. (avxvecsize): Likewise. (avxhalfvecmode): Likewise. (avxscalarmode): Likewise. (avxpermvecmode): Likewise. (avxmodesuffixp): Likewise. (avxmodesuffix): Likewise. (avx2_vec_dupv4sf): New. (avx2_vec_dupv8sf): Likewise. (avx2_interleave_highv4di): Likewise. (avx2_interleave_lowv4di): Likewise. (<plusminus_insn><mode>3): Update. (*<plusminus_insn><mode>3): Likewise. (sse2_<plusminus_insn><mode>3): Rename to ... ("<sse2_avx2>_<plusminus_insn><mode>3): ... this. updated. (*sse2_<plusminus_insn><mode>3): Likewise. (*<sse2_avx2>_<plusminus_insn><mode>3): Likewise. (mulv8hi3): Likewise. (mul<mode>3): Likewise. (*mulv8hi3): Likewise. (*mul<mode>3): Likewise. (<s>mulv8hi3_highpart): Likewise. (<s>mul<mode>3_highpart): Likewise. (*<s>mulv8hi3_highpart): Likewise. (*<s>mul<mode>3_highpart): Likewise. (avx2_umulv4siv4di3): Likewise. (*avx_umulv4siv4di3): Likewise. (sse4_1_mulv2siv2di3): Likewise. (<sse4_1_avx2>_mul<shortmode><mode>3): Likewise. (*sse4_1_mulv2siv2di3): Likewise. (*<sse4_1_avx2>_mulv2siv2di3): Likewise. (avx2_pmaddwd): New. (*avx2_pmaddwd): Likewise. (mulv4si3): Rename to ... (mul<mode>3): ... this. Update. (*sse4_1_mulv4si3): Likewise. (*<sse4_1_avx2>_mul<mode>3): Likewise. (ashr<mode>3): Update. (avx2_lshrqv4di3): New. (lshr<mode>3): Update. (avx2_lshlqv4di3): New. (avx2_lshl<mode>3): Likewise. (sse2_ashlv1ti3): Rename to ... (<sse2_avx2>_ashl<mode>3): ... this. Update. (avx2_<code><mode>3)<umaxmin>: New. (*avx2_<code><mode>3)<umaxmin>: Likewise. (avx2_<code><mode>3)<smaxmin>: New. (*avx2_<code><mode>3)<smaxmin>: Likewise. (avx2_eq<mode>3): Likewise. (*avx2_eq<mode>3): Likewise. (avx2_gt<mode>3): Likewise. (sse2_andnot<mode>3): Rename to ... (<sse2_avx2>_andnot<mode>3): ... this. Update. (*andnot<mode>3): Update. (<code><mode>3)<any_logic>: Update. (*<code><mode>3)<any_logic>: Likewise. (sse2_packsswb): Rename to ... (<sse2_avx2>_packsswb): ... this. Update. (sse2_packssdw): Likewise. (<sse2_avx2>_packssdw): Likewise. (sse2_packuswb): Likewise. (<sse2_avx2>_packuswb): Likewise. (avx2_interleave_highv32qi): New. (avx2_interleave_lowv32qi): Likewise. (avx2_interleave_highv16hi): Likewise. (avx2_interleave_lowv16hi): Likewise. (avx2_interleave_highv8si): Likewise. (avx2_interleave_lowv8si): Likewise. (avx2_pshufd): New (avx2_pshufd_1): Likewise. (avx2_pshuflwv3): Likewise. (avx2_pshuflw_1): Likewise. (avx2_pshufhwv3): Likewise. (avx2_pshufhw_1): Likewise. (avx2_uavgv32qi3): Likewise. (*avx2_uavgv32qi3): Likewise. (avx2_uavgv16hi3): Likewise. (*avx2_uavgv16hi3): Likewise. (sse2_psadbw): Rename to ... (<sse2_avx2>_psadbw): ... this. Update. (avx2_pmovmskb): New. (avx2_phaddwv16hi3): Likewise. (avx2_phadddv8si3): Likewise. (avx2_phaddswv16hi3): Likewise. (avx2_phsubwv16hi3): Likewise. (avx2_phsubdv8si3): Likewise. (avx2_phsubswv16hi3): Likewise. (avx2_pmaddubsw256): Likewise. (avx2_umulhrswv16hi3): Likewise. (*avx2_umulhrswv16hi3): Likewise. (ssse3_pshufbv16qi3): Rename to ... (<ssse3_avx2>_pshufb<mode>3): ... this. Update. (ssse3_psign<mode>3): Likewise. (<ssse3_avx2>_psign<mode>3): Likewise. (ssse3_palignrti): Likewise. (<ssse3_avx2>_palignr<mode>): Likewise. (abs<mode>2): Likewise. (sse4_1_movntdqa): Rename to ... (<sse4_1_avx2>_movntdqa): ... this. Update. (sse4_1_mpsadbw): Likewise. (<sse4_1_avx2>_mpsadbw): Likewise. (avx2_packusdw): New. (sse4_1_pblendvb): Rename to ... (<sse4_1_avx2>_pblendvb): ... this. Update. (sse4_1_pblendw): Likewise. (<sse4_1_avx2>_pblendw): Likewise. (avx2_pblendd<mode>): New. (avx2_<code>v16qiv16hi2): Likewise. (avx2_<code>v8qiv8si2): Likewise. (avx2_<code>v8hiv8si2): Likewise. (avx2_<code>v4qiv4di2): Likewise. (avx2_<code>v4hiv4di2): Likewise. (avx2_<code>v4siv4di2): Likewise. (avx2_pbroadcast<mode>): Likewise. (avx2_permvarv8si): Likewise. (avx2_permv4df): Likewise. (avx2_permvarv8sf): Likewise. (avx2_permv4di): Likewise. (avx2_permv2ti): Likewise. (avx2_vec_dupv4df): Likewise. (avx2_vbroadcasti128_<mode>): Likewise. (avx2_vec_set_lo_v4di): Likewise. (avx2_vec_set_hi_v4di): Likewise. (avx_maskload<ssemodesuffix><avxsizesuffix>): Rename to ... (<avx_avx2>_maskload<avx2modesuffix><avxmodesuffix>): ... this. Update. (avx_maskstore<ssemodesuffix><avxsizesuffix>): Likewise. (<avx_avx2>_maskstore<avx2modesuffix><avxmodesuffix>): Likewise. (*avx2_maskmov<avx2modesuffix><avxmodesuffix>): New. (avx2_extracti128): Likewise. (avx2_inserti128): Likewise. (avx2_ashrvv8si): Likewise. (avx2_ashrvv4si): Likewise. (avx2_<lshift>vv8si): Likewise. (avx2_<lshift>v<mode>): Likewise. (avx2_<lshift>vv2di): Likewise. (avx2_gathersi<mode>): Likewise. (*avx2_gathersi<mode>): Likewise. (avx2_gatherdi<mode>): Likewise. (*avx2_gatherdi<mode>): Likewise. (avx2_gatherdi<mode>256): Likewise. (*avx2_gatherdi<mode>256): Likewise. * doc/extend.texi: Document AVX2 built-in functions. * doc/invoke.texi: Document -mavx2. From-SVN: r177955
2011-08-19c-parser.c (c_parser_postfix_expression): Handle RID_BUILTIN_COMPLEX.Joseph Myers1-0/+12
* c-parser.c (c_parser_postfix_expression): Handle RID_BUILTIN_COMPLEX. * doc/extend.texi (__builtin_complex): Document. c-family: * c-common.c (c_common_reswords): Add __builtin_complex. * c-common.h (RID_BUILTIN_COMPLEX): New. testsuite: * gcc.dg/builtin-complex-err-1.c, gcc.dg/builtin-complex-err-2.c, gcc.dg/dfp/builtin-complex.c, gcc.dg/torture/builtin-complex-1.c: New tests. From-SVN: r177911
2011-08-16pt.c (instantiate_class_template_1): If DECL_PRESERVE_P is set on a member ↵Jason Merrill1-0/+8
function or static data member... * pt.c (instantiate_class_template_1): If DECL_PRESERVE_P is set on a member function or static data member, call mark_used. From-SVN: r177811
2011-08-10c-typeck.c (scalar_to_vector): New function.Artjoms Sinkarovs1-6/+13
2011-08-10 Artjoms Sinkarovs <artyom.shinakroff@gmail.com> * c-typeck.c (scalar_to_vector): New function. Try scalar to vector conversion. (stv_conv): New enum for scalar_to_vector return type. (build_binary_op): Adjust. * doc/extend.texi: Description of scalar to vector expansion. c-family/ * c-common.c (unsafe_conversion_p): New function. Check if it is unsafe to convert an expression to the type. (conversion_warning): Adjust, use unsafe_conversion_p. * c-common.h (unsafe_conversion_p): New function declaration. testsuite/ * gcc.c-torture/execute/scal-to-vec1.c: New test. * gcc.c-torture/execute/scal-to-vec2.c: New test. * gcc.c-torture/execute/scal-to-vec3.c: New test. * gcc.dg/scal-to-vec1.c: New test. * gcc.dg/scal-to-vec2.c: New test. From-SVN: r177622
2011-08-01Add -mlzcnt.Kirill Yukhin1-0/+5
gcc/ 2011-08-01 Kirill Yukhin <kirill.yukhin@intel.com> PR target/49547 * config.gcc (i[34567]86-*-*): Replace abmintrin.h with lzcntintrin.h. (x86_64-*-*): Likewise. * config/i386/i386.opt (mlzcnt): New. * config/i386/abmintrin.h: File removed. (__lzcnt_u16, __lzcnt, __lzcnt_u64): Moved to ... * config/i386/lzcntintrin.h: ... here. New file. (__lzcnt): Rename to ... (__lzcnt32): ... this. * config/i386/bmiintrin.h (head): Update copyright year. (__lzcnt_u16): Removed. (__lzcnt_u32): Likewise. (__lzcnt_u64): Likewise. * config/i386/x86intrin.h: Include lzcntintrin.h when __LZCNT__ is defined, remove abmintrin.h. * config/i386/cpuid.h (bit_LZCNT): New. * config/i386/driver-i386.c (host_detect_local_cpu): Detect LZCNT feature. * config/i386/i386-c.c (ix86_target_macros_internal): Define __LZCNT__ if needed. * config/i386/i386.c (ix86_target_string): New option -mlzcnt. (ix86_option_override_internal): Handle LZCNT option. (ix86_valid_target_attribute_inner_p): Likewise. (struct builtin_description bdesc_args) <IX86_BUILTIN_CLZS>: Update. * config/i386/i386.h (TARGET_LZCNT): New. (CLZ_DEFINED_VALUE_AT_ZERO): Update. * config/i386/i386.md (clz<mode>2): Update insn constraint. (clz<mode>2_lzcnt): Likewise. * doc/invoke.texi: Mention -mlzcnt option. * doc/extend.texi: Likewise. gcc/testsuite/ 2011-08-01 Kirill Yukhin <kirill.yukhin@intel.com> * gcc.target/i386/i386.exp (check_effective_target_lzcnt): New. * gcc.target/i386/lzcnt-1.c: New test. * gcc.target/i386/lzcnt-2.c: Likewise. * gcc.target/i386/lzcnt-2a.c: Likewise. * gcc.target/i386/lzcnt-3.c: Likewise. * gcc.target/i386/lzcnt-4.c: Likewise. * gcc.target/i386/lzcnt-4a.c: Likewise. * gcc.target/i386/lzcnt-5.c: Likewise. * gcc.target/i386/lzcnt-6.c: Likewise. * gcc.target/i386/lzcnt-6a.c: Likewise. * gcc.target/i386/lzcnt-check.h: Likewise. * gcc.target/i386/sse-12.c (dg-compile): Add -mlzcnt. * gcc.target/i386/sse-13.c: Likewise. * gcc.target/i386/sse-14.c: Likewise. * g++.dg/other/i386-2.C: Likewise. * g++.dg/other/i386-3.C: Likewise. From-SVN: r177034
2011-07-27i386.c (ix86_option_override_internal): Allow -mabi for 32-bit, too.Kai Tietz1-8/+11
* config/i386/i386.c (ix86_option_override_internal): Allow -mabi for 32-bit, too. (ix86_handle_abi_attribute): Allow function attributes ms_abi/sysv_abi in 32-bit mode, too. * doc/extend.texi: Adjust attribute documentation. * gcc.target/i386/aggregate-ret3.c: New test. * gcc.target/i386/aggregate-ret4.c: New test. From-SVN: r176828
2011-07-18re PR debug/23205 ([C++/unit-at-a-time] stabs debug info omitted for global ↵Rainer Orth1-5/+2
const variables) toplevel: * configure: Regenerate. config: * elf.m4 (target_elf): Remove *-netware*. contrib: * config-list.mk (i586-netware): Remove. (.PHONY): Remove make-script-dir dependency. (make-script-dir): Remove. ($(LIST)): Remove make-script-dir dependency. gcc: * config.gcc (i[3456x]86-*-netware*): Remove. * gthr-nks.h: Remove. * configure.ac (enable_threads): Remove nks. * configure: Regenerate. * config/i386/i386.c (ix86_encode_section_info): Remove netware reference. * config/i386/i386.h (KEEP_AGGREGATE_RETURN_POINTER): Remove <netware.h> reference. * config/i386/netware-libgcc.c, gcc/config/i386/netware-libgcc.def, gcc/config/i386/netware-libgcc.exp, gcc/config/i386/netware.c, gcc/config/i386/netware.h, gcc/config/i386/netware.opt, gcc/config/i386/nwld.c, gcc/config/i386/nwld.h, gcc/config/i386/t-netware, gcc/config/i386/t-nwld: Remove * doc/extend.texi (Function Attributes, callee_pop_aggregate_return): Remove i?86-netware reference. * doc/install.texi (Configuration, --enable-threads): Remove nks. gcc/testsuite: * g++.dg/ext/bitfield2.C: Remove i?86-*-netware support. * g++.dg/ext/bitfield3.C: Likewise. * g++.dg/ext/bitfield4.C: Likewise. * g++.dg/ext/bitfield5.C: Likewise. * g++.dg/other/PR23205.C: Remove *-*-netware* support. * g++.dg/other/pr23205-2.C: Likewise. * gcc.c-torture/compile/20001109-1.c: Remove dg-xfail-if. * gcc.c-torture/compile/20001109-2.c: Likewise. * gcc.dg/20040813-1.c: Remove *-*-netware* support. * gcc.dg/bitfld-15.c: Remove i?86-*-netware support. * gcc.dg/bitfld-16.c: Likewise. * gcc.dg/bitfld-17.c: Likewise. * gcc.dg/bitfld-18.c: Likewise. * gcc.dg/builtins-config.h: Remove Netware support. * gcc.dg/cdce1.c: Remove *-*-netware* support. Update line number. * gcc.dg/cdce2.c: Likewise. * gcc.dg/cpp/assert4.c: Remove netware support. * gcc.dg/debug/pr35154.c: Remove *-*-netware* support. * gfortran.dg/debug/pr35154-stabs.f: Remove *-*-netware* support. * lib/target-supports.exp (check_visibility_available): Remove NetWare support. (check_profiling_available): Likewise. libgcc: * config.host (i[3456x]86-*-netware*): Remove. * config/i386/netware-crt0.c, config/i386/t-nwld, config/i386/t-slibgcc-nwld: Remove. libstdc++-v3: * crossconfig.m4 (*-netware): Remove. * configure: Regenerate. From-SVN: r176391
2011-07-15invoke.texi (C6X Options): New section.Bernd Schmidt1-0/+40
gcc/ * doc/invoke.texi (C6X Options): New section. * doc/md.texi (TI C6X family): New section. * config.gcc: Handle tic6x, in particular tic6x-*-elf and tic6x-*-uclinux. * longlong.h (add_ssaaaa, __umulsidi3, umul_ppmm, count_leading_zeros, count_trailing_zeros, UMUL_TIME, UDIV_TIME): Provide C6X definitions. * config/c6x/c6x.md: New file. * config/c6x/constraints.md: New file. * config/c6x/predicates.md: New file. * config/c6x/c6x-sched.md.in: New file. * config/c6x/c6x-sched.md: New file. * config/c6x/gensched.sh: New file. * config/c6x/c6x-mult.md.in: New file. * config/c6x/genmult.sh: New file. * config/c6x/c6x-mult.md: New file. * config/c6x/sync.md: New file. * config/c6x/c6x-protos.h: New file. * config/c6x/sfp-machine.h: New file. * config/c6x/c6x.c: New file. * config/c6x/c6x.h: New file. * config/c6x/crti.s: New file. * config/c6x/crtn.s: New file. * config/c6x/lib1funcs.asm: New file. * config/c6x/c6x-modes.def: New file. * config/c6x/genopt.sh: New file. * config/c6x/c6x.opt: New file. * config/c6x/c6x-tables.opt: New file. * config/c6x/c6x-opts.h: New file. * config/c6x/c6x-isas.def: New file. * config/c6x/elf.h: New file. * config/c6x/elf-common.h: New file. * config/c6x/uclinux-elf.h: New file. * config/c6x/t-c6x: New file. * config/c6x/t-c6x-elf: New file. * config/c6x/t-c6x-uclinux: New file. * config/c6x/t-c6x-softfp: New file. * config/c6x/gtd.c: New file. * config/c6x/gtf.c: New file. * config/c6x/ltd.c: New file. * config/c6x/ltf.c: New file. * config/c6x/ged.c: New file. * config/c6x/gef.c: New file. * config/c6x/led.c: New file. * config/c6x/lef.c: New file. * config/c6x/eqd.c: New file. * config/c6x/eqf.c: New file. * config/c6x/libgcc-c6xeabi.ver: New file. contrib/ * gcc_update: Add C6X generated files. * contrib/config-list.mk: Add c6x-elf and c6x-uclinux. libgcc/ * config.host: Handle tic6x-*-*. * config/c6x/c6x-abi.h: New file. From-SVN: r176308
2011-07-14extend.texi (optimize attribute): Fix (another) typo.Matthias Klose1-1/+1
2011-07-14 Matthias Klose <doko@ubuntu.com> * doc/extend.texi (optimize attribute): Fix (another) typo. From-SVN: r176269
2011-07-14extend.texi (optimize attribute): Fix typo.Matthias Klose1-1/+1
2011-07-14 Matthias Klose <doko@ubuntu.com> * doc/extend.texi (optimize attribute): Fix typo. From-SVN: r176268
2011-07-06re PR other/49658 (Typo in gcc/doc/extend.texi)Jonathan Wakely1-1/+1
2011-07-06 Jonathan Wakely <jwakely.gcc@gmail.com> PR other/49658 * doc/extend.texi (Compound Literals): Fix typo. From-SVN: r175928
2011-07-04extend.texi (AVR Built-in Functions): Update documentation of ↵Georg-Johann Lay1-2/+2
__builtin_avr_fmul*. * doc/extend.texi (AVR Built-in Functions): Update documentation of __builtin_avr_fmul*. * config/avr/avr.c (avr_init_builtins): Don't depend on AVR_HAVE_MUL. * config/avr/avr-c.c (avr_cpu_cpp_builtins): Ditto. * config/avr/avr.md (fmul): Rename to fmul_insn. (fmuls): Rename to fmuls_insn. (fmulsu): Rename to fmulsu_insn. (fmul,fmuls,fmulsu): New expander. (*fmul.call,*fmuls.call,*fmulsu.call): New Insn. * config/avr/t-avr (LIB1ASMFUNCS): Add _fmul, _fmuls, _fmulsu. * config/avr/libgcc.S (__fmul): New function. (__fmuls): New function. (__fmulsu,__fmulsu_exit): New function. From-SVN: r175807
2011-06-27builtin-types.def (BT_FN_PTR_CONST_PTR_SIZE_VAR): New.Jakub Jelinek1-0/+22
* builtin-types.def (BT_FN_PTR_CONST_PTR_SIZE_VAR): New. * builtins.def (BUILT_IN_ASSUME_ALIGNED): New builtin. * tree-ssa-structalias.c (find_func_aliases_for_builtin_call, find_func_clobbers): Handle BUILT_IN_ASSUME_ALIGNED. * tree-ssa-ccp.c (bit_value_assume_aligned): New function. (evaluate_stmt, execute_fold_all_builtins): Handle BUILT_IN_ASSUME_ALIGNED. * tree-ssa-dce.c (propagate_necessity): Likewise. * tree-ssa-alias.c (ref_maybe_used_by_call_p_1, call_may_clobber_ref_p_1): Likewise. * builtins.c (is_simple_builtin, expand_builtin): Likewise. (expand_builtin_assume_aligned): New function. * doc/extend.texi (__builtin_assume_aligned): Document. * c-common.c (check_builtin_function_arguments): Handle BUILT_IN_ASSUME_ALIGNED. * gcc.dg/builtin-assume-aligned-1.c: New test. * gcc.dg/builtin-assume-aligned-2.c: New test. * gcc.target/i386/builtin-assume-aligned-1.c: New test. From-SVN: r175541
2011-06-21Makefile.in (lib2funcs): Add _clrsbsi2 and _clrsbdi2.Bernd Schmidt1-0/+16
libgcc/ * Makefile.in (lib2funcs): Add _clrsbsi2 and _clrsbdi2. * libgcc-std.ver.in (GCC_4.7.0): New section. gcc/ * doc/extend.texi (__builtin_clrsb, __builtin_clrsbl, __builtin_clrsbll): Document. * doc/rtl.texi (clrsb): New entry. * optabs.c (widen_leading): Renamed from widen_clz. New argument UNOPTAB. All callers changed. Use UNOPTAB instead of clz_optab. (expand_unop): Handle clrsb_optab. (init_optabs): Initialize it. * optabs.h (enum optab_index): New entry OTI_clrsb. (clrsb_optab): Define. * genopinit.c (optabs): Add an entry for it. * builtins.c (expand_builtin): Handle clrsb builtin functions. * builtins.def (BUILT_IN_CLRSB, BUILT_IN_CLRSBIMAX, BUILT_IN_CLRSBL, BUILT_IN_CLRSBLL): New. * rtl.def (CLRSB): New code. * dwarf2out.c (mem_loc_descriptor): Handle it. * simplify-rtx.c (simplify_const_unary_operation): Likewise. Use op_mode rather than mode when optimizing ffs, clz, ctz, parity and popcount. * libgcc2.c (__clrsbSI2, __clrsbDI2): New functions. * libgcc2.h (__clrsbSI2, __clrsbDI2): Define and declare. (__ctzDI2): Move declaration. * config/bfin/bfin.md (clrsbsi2): New expander. (signbitssi2): Use the CLRSB rtx. (clrsbhi2): Renamed from signbitshi2. Use the CLRSB rtx. * config/bfin/bfin.c (bdesc_1arg): Changed accordingly. gcc/testsuite/ * gcc.c-torture/excute/builtin-bitops-1.c (MAKE_FUNS): Make my_clrsb test functions. (main): Test clrsb. * gcc.dg/builtin-protos-1.c (test_s, test_u, test_sl, test_ul, test_sll, test_ull): Add clrsb tests. * gcc.dg/torture/builtin-attr-1.c: Add tests for clrsb, clrsbl, clrsbll. From-SVN: r175261
2011-05-25Update pause intrinsic.H.J. Lu1-1/+2
2011-05-25 H.J. Lu <hongjiu.lu@intel.com> * doc/extend.texi (X86 Built-in Functions): Update pause intrinsic. From-SVN: r174217
2011-05-25Implement x86 pause intrinsic.H.J. Lu1-0/+7
gcc/ 2011-05-25 H.J. Lu <hongjiu.lu@intel.com> * config/i386/i386.c (ix86_builtins): Add IX86_BUILTIN_PAUSE. (bdesc_special_args): Add pause intrinsic. * config/i386/i386.md (UNSPEC_PAUSE): New. (pause): Likewise. (*pause): Likewise. * config/i386/ia32intrin.h (__pause): Likewise. * doc/extend.texi (X86 Built-in Functions): Add documentation for pause intrinsic. gcc/testsuite/ 2011-05-25 H.J. Lu <hongjiu.lu@intel.com> * gcc.target/i386/pause-1.c: New. From-SVN: r174197
2011-05-04Remove extra spacing at the end of the line.Mike Stump1-41/+41
From-SVN: r173401
2011-04-25c-common.c (struct c_common_resword): Add __underlying_type.Paolo Carlini1-0/+4
/gcc 2011-04-25 Paolo Carlini <paolo.carlini@oracle.com> * c-family/c-common.c (struct c_common_resword): Add __underlying_type. * c-family/c-common.h (enum rid): Add RID_UNDERLYING_TYPE. * doc/extend.texi: Document __underlying_type. /cp 2011-04-25 Paolo Carlini <paolo.carlini@oracle.com> * cp-tree.def: Add a new UNDERLYING_TYPE tree code. * cp-tree.h (enum cp_trait_kind): Add CPTK_UNDERLYING_TYPE, tidy. (UNDERLYING_TYPE_TYPE): Add. * cp-objcp-common.c (cp_common_init_ts): Mark UNDERLYING_TYPE as TS_COMMON. * parser.c (cp_lexer_next_token_is_decl_specifier_keyword, cp_parser_simple_type_specifier): Handle UNDERLYING_TYPE. (cp_parser_trait_expr): Deal with RID_UNDERLYING_TYPE; tidy. * semantics.c (finish_underlying_type): New. * typeck.c (structural_comptypes): Handle UNDERLYING_TYPE. * error.c (dump_type, dump_type_prefix, dump_type_suffix): Likewise. * cxx-pretty-print.c (p_cxx_type_id): Likewise. * tree.c (cp_walk_subtrees): Likewise. * pt.c (for_each_template_parm_r, tsubst, unify, dependent_type_p_r): Likewise. * mangle.c (write_type): Sorry for __underlying_type. /testsuite 2011-04-25 Paolo Carlini <paolo.carlini@oracle.com> * g++.dg/ext/underlying_type1.C: New. * g++.dg/ext/underlying_type2.C: Likewise. * g++.dg/ext/underlying_type3.C: Likewise. * g++.dg/ext/underlying_type4.C: Likewise. * g++.dg/ext/underlying_type5.C: Likewise. * g++.dg/ext/underlying_type6.C: Likewise. * g++.dg/ext/underlying_type7.C: Likewise. * g++.dg/ext/underlying_type8.C: Likewise. * g++.dg/ext/underlying_type9.C: Likewise. * g++.dg/ext/underlying_type10.C: Likewise. From-SVN: r172945
2011-04-24re PR other/48748 (Undocumented type traits used in libstdc++-4.6)Paolo Carlini1-21/+36
2011-04-24 Paolo Carlini <paolo.carlini@oracle.com> PR other/48748 * doc/extend.texi (Type Traits): Document __is_standard_layout, __is_literal_type, and __is_trivial; update throughout about possibly cv-qualified void types. From-SVN: r172911
2011-04-14avr.c: ("insn-codes.h"...Anatoly Sokolov1-0/+39
* config/avr/avr.c: ("insn-codes.h", "optabs.h", "langhooks.h"): New Includes (avr_init_builtins, avr_expand_builtin, avr_expand_delay_cycles, avr_expand_unop_builtin, avr_expand_binop_builtin ): New functions. (avr_builtin_id): New enum (struct avr_builtin_description): New struct (bdesc_1arg, bdesc_2arg): New arrays describing some RTL builtins. (TARGET_INIT_BUILTINS, TARGET_EXPAND_BUILTIN): Define. * config/avr/avr.md (UNSPEC_FMUL, UNSPEC_FMULS, UNSPEC_FMULSU, UNSPECV_ENABLE_IRQS, UNSPECV_NOP, UNSPECV_SLEEP, UNSPECV_WDR, UNSPECV_DELAY_CYCLES): new enumeration values (UNSPEC_SEI, UNSPEC_CLI): Remove enumeration values ("enable_interrupt"): Use UNSPECV_ENABLE_IRQS ("disable_interrupt"): Use UNSPECV_ENABLE_IRQS ("*rotlqi3_4"): rename insn to "rotlqi3_4" ("delay_cycles_1", "delay_cycles_2", "delay_cycles_3", "delay_cycles_4", "nopv", "sleep", "wdr", "fmul", "fmuls", "fmulsu"): New insns * config/avr/avr-c.c: fix line endings (avr_cpu_cpp_builtins): New builtin defines: __BUILTIN_AVR_NOP, __BUILTIN_AVR_SEI, __BUILTIN_AVR_CLI, __BUILTIN_AVR_WDR, __BUILTIN_AVR_SLEEP, __BUILTIN_AVR_SWAP, __BUILTIN_AVR_DELAY_CYCLES, __BUILTIN_AVR_FMUL, __BUILTIN_AVR_FMULS, __BUILTIN_AVR_FMULSU. * doc/extend.texi (AVR Built-in Functions): New node (Target Builtins): Add documentation of AVR built-in functions. Co-Authored-By: Eric Weddington <eric.weddington@atmel.com> Co-Authored-By: Georg-Johann Lay <avr@gjlay.de> From-SVN: r172416
2011-03-23re PR other/48179 (Reference mismatch in documentation chapter 6)Jonathan Wakely1-36/+36
2011-03-23 Jonathan Wakely <jwakely.gcc@gmail.com> PR other/48179 PR other/48221 PR other/48234 * doc/extend.texi (Alignment): Move section to match order in TOC. * doc/invoke.texi (i386 and x86-64 Windows Options): Likewise. (Warning Options): Adjust -Wno-cpp summary and remove stray backslash. From-SVN: r171359
2011-03-22MAINTAINERS (crx port, [...]): Remove.Joseph Myers1-1/+1
* MAINTAINERS (crx port, m68hc11 port): Remove. Move maintainers to Write After Approval. * config-ml.in: Don't handle arc-*-elf*. * configure.ac (arc-*-*, crx-*-*, i[[3456789]]86-*-pe, m68hc11-*-*|m6811-*-*|m68hc12-*-*|m6812-*-*, mcore-*-pe*): Don't handle GCC libraries. * configure: Regenerate. contrib: * compare-all-tests (all_targets): Remove crx and m68hc11. fixincludes: * mkfixinc.sh: Don't handle i?86-moss-msdos* or i?86-*-pe. gcc: * config/alpha/gnu.h: Remove. * config/arc: Remove directory. * config/arm/netbsd.h: Remove. * config/arm/t-pe: Remove. * config/crx: Remove directory. * config/i386/netbsd.h: Remove. * config/m68hc11: Remove directory. * config/m68k/uclinux-oldabi.h: Remove. * config/mcore/mcore-pe.h: Remove. * config/mcore/t-mcore-pe: Remove. * config/netbsd-aout.h: Remove. * config/rs6000/gnu.h: Remove. * config/sh/sh-symbian.h: Remove. * config/sh/symbian-base.c: Remove. * config/sh/symbian-c.c: Remove. * config/sh/symbian-cxx.c: Remove. * config/sh/symbian-post.h: Remove. * config/sh/symbian-pre.h: Remove. * config/sh/t-symbian: Remove. * config/svr3.h: Remove. * config/vax/netbsd.h: Remove. * config.build: Don't handle i[34567]86-*-pe. * config.gcc: Remove handling of deprecations for most deprecated targets. (m68k-*-uclinuxoldabi*): Add to second deprecated list. (alpha*-*-gnu*, arc-*-elf*, arm*-*-netbsd*, arm-*-pe*, crx-*-elf, i[34567]86-*-netbsd*, i[34567]86-*-pe, m68hc11-*-*|m6811-*-*, m68hc12-*-*|m6812-*-*, m68k-*-uclinuxoldabi*, mcore-*-pe*, powerpc64-*-gnu*, powerpc-*-gnu-gnualtivec*, powerpc-*-gnu*, sh-*-symbianelf* | sh[12346l]*-*-symbianelf*, vax-*-netbsd*): Remove cases. * config.host: Don't handle i[34567]86-*-pe. * config/rs6000/linux64.h (LINK_OS_GNU_SPEC): Remove. (ASM_SPEC32): Don't handle -mcall-gnu. * config/rs6000/sysv4.h (SUBTARGET_OVERRIDE_OPTIONS): Don't handle -mcall-gnu. (ASM_SPEC, CC1_SPEC, LINK_START_SPEC, LINK_OS_SPEC, CPP_SPEC, STARTFILE_SPEC, LIB_SPEC, ENDFILE_SPEC): Don't handle -mcall-gnu. (LIB_GNU_SPEC, STARTFILE_GNU_SPEC, ENDFILE_GNU_SPEC, LINK_START_GNU_SPEC, LINK_OS_GNU_SPEC, CPP_OS_GNU_SPEC): Remove. (SUBTARGET_EXTRA_SPECS): Remove *_gnu specs. * config/sh/sh-protos.h, config/sh/sh.c: Remove all code conditional on SYMBIAN. * configure.ac: Don't handle powerpc*-*-gnu*. * configure: Regenerate. * doc/extend.texi (interrupt attribute): Don't mention CRX. * doc/install-old.texi (m6811, m6812): Don't mention. * doc/install.texi (arc-*-elf*): Don't document multilib option. (arc-*-elf, CRX, m6811-elf, m6812-elf): Remove. (m68k-uclinuxoldabi): Don't mention. * doc/invoke.texi (ARC Options, CRX Options, M68hc1x Options): Remove. (-mcall-gnu): Remove. * doc/md.texi (CRX Architecture, Motorola 68HC11 & 68HC12 families): Remove constraint documentation. gcc/testsuite: * gcc.c-torture/execute/920501-8.x: Remove. * gcc.c-torture/execute/930513-1.x: Remove. * gcc.c-torture/execute/960312-1.x: Remove. * gcc.c-torture/compile/20000804-1.c, gcc.c-torture/compile/20001205-1.c, gcc.c-torture/compile/20001226-1.c, gcc.c-torture/compile/20010518-2.c, gcc.c-torture/compile/20020312-1.c, gcc.c-torture/compile/20020604-1.c, gcc.c-torture/compile/920501-12.c, gcc.c-torture/compile/920501-4.c, gcc.c-torture/compile/920520-1.c, gcc.c-torture/compile/980506-1.c, gcc.c-torture/execute/980709-1.x, gcc.c-torture/execute/990826-0.x: Don't XFAIL or use special options for m68hc11. * gcc.dg/cpp/assert4.c: Don't handle ARC. * gcc.dg/sibcall-3.c, gcc.dg/sibcall-4.c: Don't XFAIL for arc or m68hc11. libgcc: * config.host (alpha*-*-gnu*, arc-*-elf*, arm*-*-netbsd*, arm-*-pe*, crx-*-elf, i[34567]86-*-netbsd*, i[34567]86-*-pe, m68hc11-*-*|m6811-*-*, m68hc12-*-*|m6812-*-*, mcore-*-pe*, powerpc64-*-gnu*, powerpc-*-gnu-gnualtivec*, powerpc-*-gnu*, sh-*-symbianelf* | sh[12346l]*-*-symbianelf*, vax-*-netbsd*): Remove cases. libstdc++-v3: * configure.ac: Don't handle powerpc*-*-gnu*. * configure: Regenerate. From-SVN: r171302
2011-03-18c-decl.c (grokfield): Don't allow typedefs for structures or unions with no ↵Joseph Myers1-3/+2
tag by default. * c-decl.c (grokfield): Don't allow typedefs for structures or unions with no tag by default. * doc/extend.texi (Unnamed Fields): Update. testsuite: * gcc.dg/c1x-anon-struct-1.c: Don't test use of typedefs. * gcc.dg/c1x-anon-struct-3.c: New test. * gcc.dg/anon-struct-11.c: Update. From-SVN: r171170
2011-02-28docs: fix Function Attributes table nesting.Ralf Wildenhues1-5/+1
gcc/: * doc/extend.texi (Function Attributes): Avoid deeply (and wrongly) nested tables. From-SVN: r170555
2011-02-03Fix PR target/47272Michael Meissner1-1/+67
From-SVN: r169780
2011-01-30extend.texi: Follow spelling conventions.Kazu Hirata1-3/+3
* doc/extend.texi: Follow spelling conventions. * doc/invoke.texi: Fix a typo. From-SVN: r169420
2011-01-30extend.texi (Thread-Local): Adjust reference to Ulrich Drepper's paper.Gerald Pfeifer1-1/+1
* doc/extend.texi (Thread-Local): Adjust reference to Ulrich Drepper's paper. From-SVN: r169404
2011-01-26c.opt (-fkeep-inline-dllexport): New switch.Dave Korn1-4/+9
gcc/c-family/ChangeLog: * c.opt (-fkeep-inline-dllexport): New switch. gcc/ChangeLog: * tree.c (handle_dll_attribute): Handle it. * doc/extend.texi (@item dllexport): Mention it. * doc/invoke.texi (@item -fno-keep-inline-dllexport): Document it. gcc/cp/ChangeLog: * semantics.c (expand_or_defer_fn_1): Handle it. * decl2.c (decl_needed_p): Likewise. gcc/testsuite/ChangeLog: * gcc.dg/dll-9a.c: New test file. * gcc.dg/dll-11.c: Likewise. * gcc.dg/dll-12.c: Likewise. * gcc.dg/dll-12a.c: Likewise. * gcc.dg/dll-11a.c: Likewise. * gcc.dg/dll-9.c: Likewise. * gcc.dg/dll-10.c: Likewise. * gcc.dg/dll-10a.c: Likewise. * g++.dg/ext/dllexport4a.cc: Likewise. * g++.dg/ext/dllexport4.C: Likewise. * g++.dg/ext/dllexport5.C: Likewise. * g++.dg/ext/dllexport5a.cc: Likewise. From-SVN: r169268
2011-01-24re PR c/21659 ([unit-at-a-time] "weak declaration must precede definition" ↵Jan Hubicka1-2/+1
error missing at >= O1) PR c/21659 * doc/extend.texi (weak pragma): Drop claim that it must appear before definition. * varasm.c (merge_weak, declare_weak): Only sanity check that DECL is not output at a time it is declared weak. From-SVN: r169184
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