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If config.{build,host,gcc} fails, configure currently silently
continues. This then makes it much harder than necessary to notice
you made a stupid pasto in config.gcc (and where exactly).
* configure.ac: If any of the config.* scripts fail, exit 1.
* configure: Regenerate.
From-SVN: r250507
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gcc/
Better ISR prologues by supporting GASes __gcc_isr pseudo insn.
PR target/20296
PR target/81268
* configure.ac [target=avr]: Add GAS check for -mgcc-isr.
(HAVE_AS_AVR_MGCCISR_OPTION): If so, AC_DEFINE it.
* config.in: Regenerate.
* configure: Regenerate.
* doc/extend.texi (AVR Function Attributes) <no_gccisr>: Document it.
* doc/invoke.texi (AVR Options) <-mgas-isr-prologues>: Document it.
* config/avr/avr.opt (-mgas-isr-prologues): New option and...
(TARGET_GASISR_PROLOGUES): ...target mask.
* common/config/avr/avr-common.c
(avr_option_optimization_table) [OPT_LEVELS_1_PLUS_NOT_DEBUG]:
Set -mgas-isr-prologues.
* config/avr/avr-passes.def (avr_pass_pre_proep): Add
INSERT_PASS_BEFORE for it.
* config/avr/avr-protos.h (make_avr_pass_pre_proep): New proto.
* config/avr/avr.c (avr_option_override)
[!HAVE_AS_AVR_MGCCISR_OPTION]: Unset TARGET_GASISR_PROLOGUES.
(avr_no_gccisr_function_p, avr_hregs_split_reg): New static functions.
(avr_attribute_table) <no_gccisr>: Add new function attribute.
(avr_set_current_function) <is_no_gccisr>: Init machine field.
(avr_pass_data_pre_proep, avr_pass_pre_proep): New pass data
and rtl_opt_pass.
(make_avr_pass_pre_proep): New function.
(emit_push_sfr) <treg>: Add argument to function and use it
instead of TMP_REG.
(avr_expand_prologue) [machine->gasisr.maybe]: Emit gasisr insn
and set machine->gasisr.yes.
(avr_expand_epilogue) [machine->gasisr.yes]: Similar.
(avr_asm_function_end_prologue) [machine->gasisr.yes]: Add
__gcc_isr.n_pushed to .L__stack_usage.
(TARGET_ASM_FINAL_POSTSCAN_INSN): Define to...
(avr_asm_final_postscan_insn): ...this new static function.
* config/avr/avr.h (machine_function)
<is_no_gccisr, use_L__stack_usage>: New fields.
<gasisr, gasisr.yes, gasisr.maybe, gasisr.regno>: New fields.
* config/avr/avr.md (UNSPECV_GASISR): Add unspecv enum.
(GASISR_Prologue, GASISR_Epilogue, GASISR_Done): New define_constants.
(gasisr, *gasisr): New expander and insn.
* config/avr/gen-avr-mmcu-specs.c (print_mcu)
[HAVE_AS_AVR_MGCCISR_OPTION]: Print asm_gccisr spec.
* config/avr/specs.h (ASM_SPEC) <asm_gccisr>: Add sub spec.
From-SVN: r250093
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This patch serie adds support for the SPARC M8 processor to GCC.
The SPARC M8 processor implements the Oracle SPARC Architecture 2017.
- bmask* instructions are put in their own instruction type. It makes
little sense to have them in the same category than array
instructions.
- Similarly, VIS compare instructions are put in their own instruction
type. This is to better accommodate subtypes, which are not quite
the same than the subtypes of `visl' instructions.
- The introduction of a new `subtype' insn attribute in sparc.md
avoids the need for adjusting the instruction scheduler DFAs for
previous cpu models every time a new cpu is introduced.
- The full set of SPARC instructions used in sparc.md, and their
position in the type/subtype hierarchy, is documented in a comment.
This eases the modification of the DFA schedulers, and the addition
of new cpus.
- The M7 DFA scheduler is reworked:
+ To use the new type/subtype hierarchy.
+ The v3pipe insn attribute is no longer needed.
+ More accurate latencies for instructions.
+ The C4 core pipeline is documented in a comment in niagara7.md.
- Support for -mcpu=m8 (we are thus suggesting to abandon the niagaraN
denomination for M8 and later processors.)
- Support for a new VIS level, VIS4B, covering the new VIS
instructions introduced in OSA2017 and implemented in the M8. Also
built-ins.
- A M8 DFA scheduler:
+ Also based on the new type/subtype hierarchy.
+ The functional units in the C5 core are explicitly documented in a
comment in m8.md.
gcc/ChangeLog:
* config/sparc/m8.md: New file.
* config/sparc/sparc.md: Include m8.md.
* config/sparc/sparc.opt: New option -mvis4b.
* config/sparc/sparc.c (dump_target_flag_bits): Handle MASK_VIS4B.
(sparc_option_override): Handle VIS4B.
(enum sparc_builtins): Define
SPARC_BUILTIN_DICTUNPACK{8,16,32},
SPARC_BUILTIN_FPCMP{LE,GT,EQ,NE}{8,16,32}SHL,
SPARC_BUILTIN_FPCMPU{LE,GT}{8,16,32}SHL,
SPARC_BUILTIN_FPCMPDE{8,16,32}SHL and
SPARC_BUILTIN_FPCMPUR{8,16,32}SHL.
(check_constant_argument): New function.
(sparc_vis_init_builtins): Define builtins
__builtin_vis_dictunpack{8,16,32},
__builtin_vis_fpcmp{le,gt,eq,ne}{8,16,32}shl,
__builtin_vis_fpcmpu{le,gt}{8,16,32}shl,
__builtin_vis_fpcmpde{8,16,32}shl and
__builtin_vis_fpcmpur{8,16,32}shl.
(sparc_expand_builtin): Check that the constant operands to
__builtin_vis_fpcmp*shl and _builtin_vis_dictunpack* are indeed
constant and in range.
* config/sparc/sparc-c.c (sparc_target_macros): Handle
TARGET_VIS4B.
* config/sparc/sparc.h (SPARC_IMM2_P): Define.
(SPARC_IMM5_P): Likewise.
* config/sparc/sparc.md (cpu_feature): Add new feagure "vis4b".
(enabled): Handle vis4b.
(UNSPEC_DICTUNPACK): New unspec.
(UNSPEC_FPCMPSHL): Likewise.
(UNSPEC_FPUCMPSHL): Likewise.
(UNSPEC_FPCMPDESHL): Likewise.
(UNSPEC_FPCMPURSHL): Likewise.
(cpu_feature): New CPU feature `vis4b'.
(dictunpack{8,16,32}): New insns.
(FPCSMODE): New mode iterator.
(fpcscond): New code iterator.
(fpcsucond): Likewise.
(fpcmp{le,gt,eq,ne}{8,16,32}{si,di}shl): New insns.
(fpcmpu{le,gt}{8,16,32}{si,di}shl): Likewise.
(fpcmpde{8,16,32}{si,di}shl): Likewise.
(fpcmpur{8,16,32}{si,di}shl): Likewise.
* config/sparc/constraints.md: Define constraints `q' for unsigned
2-bit integer constants and `t' for unsigned 5-bit integer
constants.
* config/sparc/predicates.md (imm5_operand_dictunpack8): New
predicate.
(imm5_operand_dictunpack16): Likewise.
(imm5_operand_dictunpack32): Likewise.
(imm2_operand): Likewise.
* doc/invoke.texi (SPARC Options): Document -mvis4b.
* doc/extend.texi (SPARC VIS Built-in Functions): Document the
ditunpack* and fpcmp*shl builtins.
* config.gcc: Handle m8 in --with-{cpu,tune} options.
* config.in: Add HAVE_AS_SPARC6 define.
* config/sparc/driver-sparc.c (cpu_names): Add entry for the SPARC
M8.
* config/sparc/sol2.h (CPP_CPU64_DEFAULT_SPEC): Define for
TARGET_CPU_m8.
(ASM_CPU32_DEFAUILT_SPEC): Likewise.
(CPP_CPU_SPEC): Handle m8.
(ASM_CPU_SPEC): Likewise.
* config/sparc/sparc-opts.h (enum processor_type): Add
PROCESSOR_M8.
* config/sparc/sparc.c (m8_costs): New struct.
(sparc_option_override): Handle TARGET_CPU_m8.
(sparc32_initialize_trampoline): Likewise.
(sparc64_initialize_trampoline): Likewise.
(sparc_issue_rate): Likewise.
(sparc_register_move_cost): Likewise.
* config/sparc/sparc.h (TARGET_CPU_m8): Define.
(CPP_CPU64_DEFAULT_SPEC): Define for M8.
(ASM_CPU64_DEFAULT_SPEC): Likewise.
(CPP_CPU_SPEC): Handle M8.
(ASM_CPU_SPEC): Likewise.
(AS_M8_FLAG): Define.
* config/sparc/sparc.md: Add m8 to the cpu attribute.
* config/sparc/sparc.opt: New option -mcpu=m8 for sparc targets.
* configure.ac (HAVE_AS_SPARC6): Check for assembler support for
M8 instructions.
* configure: Regenerate.
* doc/invoke.texi (SPARC Options): Document -mcpu=m8 and
-mtune=m8.
* config/sparc/niagara7.md: Rework the DFA scheduler to use insn
subtypes.
* config/sparc/sparc.md: Remove the `v3pipe' insn attribute.
("*movdi_insn_sp32"): Do not set v3pipe.
("*movsi_insn"): Likewise.
("*movdi_insn_sp64"): Likewise.
("*movsf_insn"): Likewise.
("*movdf_insn_sp32"): Likewise.
("*movdf_insn_sp64"): Likewise.
("*zero_extendsidi2_insn_sp64"): Likewise.
("*sign_extendsidi2_insn"): Likewise.
("*mov<VM32:mode>_insn"): Likewise.
("*mov<VM64:mode>_insn_sp64"): Likewise.
("*mov<VM64:mode>_insn_sp32"): Likewise.
("<plusminus_insn><VADDSUB:mode>3"): Likewise.
("<vlop:code><VL:mode>3"): Likewise.
("*not_<vlop:code><VL:mode>3"): Likewise.
("*nand<VL:mode>_vis"): Likewise.
("*<vlnotop:code>_not1<VL:mode>_vis"): Likewise.
("*<vlnotop:code>_not2<VL:mode>_vis"): Likewise.
("one_cmpl<VL:mode>2"): Likewise.
("faligndata<VM64:mode>_vis"): Likewise.
("alignaddrsi_vis"): Likewise.
("alignaddrdi_vis"): Likweise.
("alignaddrlsi_vis"): Likewise.
("alignaddrldi_vis"): Likewise.
("fcmp<gcond:code><GCM:gcm_name><P:mode>_vis"): Likewise.
("bmaskdi_vis"): Likewise.
("bmasksi_vis"): Likewise.
("bshuffle<VM64:mode>_vis"): Likewise.
("cmask8<P:mode>_vis"): Likewise.
("cmask16<P:mode>_vis"): Likewise.
("cmask32<P:mode>_vis"): Likewise.
("pdistn<P:mode>_vis"): Likewise.
("<vis3_addsub_ss_patname><VASS:mode>3"): Likewise.
* config/sparc/sparc.md ("subtype"): New insn attribute.
("*wrgsr_sp64"): Set insn subtype.
("*rdgsr_sp64"): Likewise.
("alignaddrsi_vis"): Likewise.
("alignaddrdi_vis"): Likewise.
("alignaddrlsi_vis"): Likewise.
("alignaddrldi_vis"): Likewise.
("<plusminus_insn><VADDSUB:mode>3"): Likewise.
("fexpand_vis"): Likewise.
("fpmerge_vis"): Likewise.
("faligndata<VM64:mode>_vis"): Likewise.
("bshuffle<VM64:mode>_vis"): Likewise.
("cmask8<P:mode>_vis"): Likewise.
("cmask16<P:mode>_vis"): Likewise.
("cmask32<P:mode>_vis"): Likewise.
("fchksm16_vis"): Likewise.
("v<vis3_shift_patname><GCM:mode>3"): Likewise.
("fmean16_vis"): Likewise.
("fp<plusminus_insn>64_vis"): Likewise.
("<plusminus_insn>v8qi3"): Likewise.
("<vis3_addsub_ss_patname><VASS:mode>3"): Likewise.
("<vis4_minmax_patname><VMMAX:mode>3"): Likewise.
("<vis4_uminmax_patname><VMMAX:mode>3"): Likewise.
("<vis3_addsub_ss_patname>v8qi3"): Likewise.
("<vis4_addsub_us_patname><VAUS:mode>3"): Likewise.
("*movqi_insn"): Likewise.
("*movhi_insn"): Likewise.
("*movsi_insn"): Likewise.
("movsi_pic_gotdata_op"): Likewise.
("*movdi_insn_sp32"): Likewise.
("*movdi_insn_sp64"): Likewise.
("movdi_pic_gotdata_op"): Likewise.
("*movsf_insn"): Likewise.
("*movdf_insn_sp32"): Likewise.
("*movdf_insn_sp64"): Likewise.
("*zero_extendhisi2_insn"): Likewise.
("*zero_extendqihi2_insn"): Likewise.
("*zero_extendqisi2_insn"): Likewise.
("*zero_extendqidi2_insn"): Likewise.
("*zero_extendhidi2_insn"): Likewise.
("*zero_extendsidi2_insn_sp64"): Likewise.
("ldfsr"): Likewise.
("prefetch_64"): Likewise.
("prefetch_32"): Likewise.
("tie_ld32"): Likewise.
("tie_ld64"): Likewise.
("*tldo_ldub_sp32"): Likewise.
("*tldo_ldub1_sp32"): Likewise.
("*tldo_ldub2_sp32"): Likewise.
("*tldo_ldub_sp64"): Likewise.
("*tldo_ldub1_sp64"): Likewise.
("*tldo_ldub2_sp64"): Likewise.
("*tldo_ldub3_sp64"): Likewise.
("*tldo_lduh_sp32"): Likewise.
("*tldo_lduh1_sp32"): Likewise.
("*tldo_lduh_sp64"): Likewise.
("*tldo_lduh1_sp64"): Likewise.
("*tldo_lduh2_sp64"): Likewise.
("*tldo_lduw_sp32"): Likewise.
("*tldo_lduw_sp64"): Likewise.
("*tldo_lduw1_sp64"): Likewise.
("*tldo_ldx_sp64"): Likewise.
("*mov<VM32:mode>_insn"): Likewise.
("*mov<VM64:mode>_insn_sp64"): Likewise.
("*mov<VM64:mode>_insn_sp32"): Likewise.
* config/sparc/sparc.md ("type"): New insn type viscmp.
("fcmp<gcond:code><GCM:gcm_name><P:mode>_vis"): Set insn type to
viscmp.
("fpcmp<gcond:code>8<P:mode>_vis"): Likewise.
("fucmp<gcond:code>8<P:mode>_vis"): Likewise.
("fpcmpu<gcond:code><GCM:gcm_name><P:mode>_vis"): Likewise.
* config/sparc/niagara7.md ("n7_vis_logical_v3pipe"): Handle
viscmp.
("n7_vis_logical_11cycle"): Likewise.
* config/sparc/niagara4.md ("n4_vis_logical"): Likewise.
* config/sparc/niagara2.md ("niag3_vis": Likewise.
* config/sparc/niagara.md ("niag_vis"): Likewise.
* config/sparc/ultra3.md ("us3_fga"): Likewise.
* config/sparc/ultra1_2.md ("us1_fga_double"): Likewise.
* config/sparc/sparc.md: New instruction type `bmask'.
(bmaskdi_vis): Use the `bmask' type.
(bmasksi_vis): Likewise.
* config/sparc/ultra3.md (us3_array): Likewise.
* config/sparc/niagara7.md (n7_array): Likewise.
* config/sparc/niagara4.md (n4_array): Likewise.
* config/sparc/niagara2.md (niag2_vis): Likewise.
(niag3_vis): Likewise.
* config/sparc/niagara.md (niag_vis): Likewise.
gcc/testsuite/ChangeLog:
* gcc.target/sparc/dictunpack.c: New file.
* gcc.target/sparc/fpcmpdeshl.c: Likewise.
* gcc.target/sparc/fpcmpshl.c: Likewise.
* gcc.target/sparc/fpcmpurshl.c: Likewise.
* gcc.target/sparc/fpcmpushl.c: Likewise.
From-SVN: r250049
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gcc/
Graceful degrade if Binutils PR21472 is not available.
PR target/81072
* configure.ac [target=avr]: WARN instead of ERROR if avrxmega3
.rodata in flash test fails.
(HAVE_LD_AVR_AVRXMEGA3_RODATA_IN_FLASH): Define it if test passes.
* confgure: Regenerate.
* config.in: Regenerate.
* config/avr/avr.c (avr_asm_named_section)
[HAVE_LD_AVR_AVRXMEGA3_RODATA_IN_FLASH]: Only trigger
__do_copy_data for stuff in .rodata if flash_pm_offset = 0.
(avr_asm_init_sections): Same.
From-SVN: r250000
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* configure.ac (gcc_cv_ld_static_dynamic): Also check stderr for
$gcc_cv_ld --help output.
(gcc_cv_ld_demangle): Likewise.
(gcc_cv_ld_eh_frame_hdr): Likewise.
(gcc_cv_ld_pie): Likewise.
(gcc_cv_ld_as_needed): Likewise. Prefer native forms unless $gnu_ld.
(gcc_cv_ld_buildid): Likewise.
(gcc_cv_ld_sysroot): Likewise.
(ld_bndplt_support): Likewise.
(ld_pushpopstate_support): Likewise.
* configure: Regenerate.
* config/sol2.h [!USE_GLD] (SYSROOT_SPEC): Define.
From-SVN: r249496
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gcc/
Support multilibs and devices that see flash in RAM address range.
PR target/81072
* config/avr/avr-arch.h (avr_arch_id) <ARCH_AVRXMEGA3>: New enum.
(avr_mcu_t) <flash_pm_offset>: New field.
(avr_device_specific_features) <AVR_ISA_RCALL>: New enum.
* config/avr/avr.h (AVR_SHORT_CALLS): New define.
(AVR_HAVE_JMP_CALL): Don't set if AVR_SHORT_CALLS.
(AVR_TINY_PM_OFFSET): Remove macro.
* config/avr/avr.opt (-mshort-calls): New option.
* config/avr/gen-avr-mmcu-specs.c (print_mcu)
[*self_spec]: Add / remove -mshort-calls depending on AVR_ISA_RCALL.
* config/avr/avr-c.c (avr_cpu_cpp_builtins)
<__AVR_SHORT_CALLS__>: Built-in define if AVR_SHORT_CALLS.
<__AVR_HAVE_JMP_CALL__>: Use AVR_HAVE_JMP_CALL as condition
instead of avr_arch->have_jmp_call.
<__AVR_PM_BASE_ADDRESS__>: Built-in define if avr_arch->flash_pm_offset.
[AVR_TINY] <__AVR_TINY_PM_BASE_ADDRESS__>: Use
avr_arch->flash_pm_offset to define.
* config/avr/avr-devices.c (avr_arch_types): Add initializers for
new field flash_pm_offset. Add entry for avrxmega3.
(avr_texinfo): Add entry for avrxmega3.
* config/avr/avr-mcus.def: Add entries for: avrxmega3,
attiny212, attiny214,
attiny412, attiny414, attiny416, attiny417,
attiny814, attiny816, attiny817,
attiny1614, attiny1616, attiny1617,
attiny3214, attiny3216, attiny3217.
* config/avr/avr.c (avr_assemble_integer)[AVR_TINY]: Use
avr_arch->flash_pm_offset instead of AVR_TINY_PM_OFFSET.
(avr_print_operand_address) [AVR_TINY]: Same.
(avr_asm_init_sections) <readonly_data_section>: Only patch
callback if avr_arch->flash_pm_offset = 0.
(avr_asm_named_section) <avr_need_copy_data_p>: Skip setting it
for rodata if avr_arch->flash_pm_offset != 0.
(avr_encode_section_info) [AVR_TINY]: Adjust comment.
* config/avr/genmultilib.awk (dir_rcall, opt_rcall): New vars.
(opts) [AVR_ISA_RCALL]: Append opt_rcall.
(m_options): Append opt_rcall.
(m_dirnames): Append dir_rcall.
* config/avr/t-multilib: Regenerate.
* configure.ac [target=avr]: Check whether avrxmega3 default
linker description file works as needed.
* configure: Regenerate.
* doc/avr-mmcu.texi: Regenerate.
* doc/invoke.texi (AVR Options) <-mshort-calls>: Document it.
<__AVR_ARCH__>: Document avrxmega3 and 103.
<__AVR_HAVE_JMP_CALL__>: Adjust documentation.
<__AVR_SHORT_CALLS__>: Document it.
<__AVR_PM_BASE_ADDRESS__>: Document it.
* doc/extend.texi (AVR Options) <-mshort-calls>: Document it.
(AVR Variable Attributes) <progmem>: Document this is
not needed for avrxmega3.
(AVR Named Address Spaces) <__flash>: Dito.
From-SVN: r249124
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2017-05-04 Thomas Preud'homme <thomas.preudhomme@arm.com>
* configure.ac (--enable-mingw-wildcard): Add new configurable feature.
* configure: Regenerate.
* config.in: Regenerate.
* config/i386/driver-mingw32.c: new file.
* config/i386/x-mingw32: Add rule to build driver-mingw32.o.
* config.host: Link driver-mingw32.o on MinGW host.
* doc/install.texi: Document new --enable-mingw-wildcard configure
option.
From-SVN: r247588
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2017-04-28 Bernd Edlinger <bernd.edlinger@hotmail.de>
* configure.ac (SYSTEM_HEADER_DIR, BUILD_SYSTEM_HEADER_DIR,
target_header_dir): Set correctly.
* configure: Regenerated.
* Makefile.in (BUILD_SYSTEM_HEADER_DIR): New make variabe.
(LIMITS_H_TEST, if_multiarch, stmp-fixinc): Use BUILD_SYSTEM_HEADER_DIR
instead of SYSTEM_HEADER_DIR.
From-SVN: r247397
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2017-02-13 Richard Biener <rguenther@suse.de>
config/
* isl.m4: Remove support for ISL 0.14.
* configure: Re-generate.
gcc/
* configure.ac (HAVE_ISL_OPTIONS_SET_SCHEDULE_SERIALIZE_SCCS):
Remove.
* configure: Re-generate.
* config.in: Likewise.
* graphite-dependences.c: Simplify as if
HAVE_ISL_OPTIONS_SET_SCHEDULE_SERIALIZE_SCCS was defined.
* graphite-isl-ast-to-gimple.c: Likewise.
* graphite-optimize-isl.c: Likewise.
* graphite-poly.c: Likewise.
* graphite-sese-to-poly.c: Likewise.
* graphite.h: Likewise.
* toplev.c: Include isl/version.h and use isl_version () for
printing the ISL version.
* doc/install.texi: Update ISL requirement.
From-SVN: r245382
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* configure.ac (ACX_BUGURL): Update.
* configure: Regenerate.
From-SVN: r245296
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From-SVN: r245225
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PR other/79046
* configure: Regenerated.
config/
* acx.m4 (GCC_BASE_VER): New m4 function.
(ACX_TOOL_DIRS): Require GCC_BASE_VER, for
--with-gcc-major-version-only use just major number from BASE-VER.
gcc/
* configure.ac: Add GCC_BASE_VER.
* Makefile.in (version): Use @get_gcc_base_ver@ instead of cat to get
version from BASE-VER file.
(CFLAGS-gcc.o): Add -DBASEVER=$(BASEVER_s).
(gcc.o): Depend on $(BASEVER).
* common.opt (dumpfullversion): New option.
* gcc.c (driver_handle_option): Handle OPT_dumpfullversion.
* doc/invoke.texi: Document -dumpfullversion.
* doc/install.texi: Document --with-gcc-major-version-only.
* configure: Regenerated.
libatomic/
* configure.ac: Add GCC_BASE_VER.
* Makefile.am (gcc_version): Use @get_gcc_base_ver@ instead of cat to
get version from BASE-VER file.
* testsuite/Makefile.in: Regenerated.
* configure: Regenerated.
* Makefile.in: Regenerated.
libgomp/
* configure.ac: Add GCC_BASE_VER.
* Makefile.am (gcc_version): Use @get_gcc_base_ver@ instead of cat to
get version from BASE-VER file.
* testsuite/Makefile.in: Regenerated.
* configure: Regenerated.
* Makefile.in: Regenerated.
libgcc/
* configure.ac: Add GCC_BASE_VER.
* Makefile.in (version): Use @get_gcc_base_ver@ instead of cat to get
version from BASE-VER file.
* configure: Regenerated.
libssp/
* configure.ac: Add GCC_BASE_VER.
* Makefile.am (gcc_version): Use @get_gcc_base_ver@ instead of cat to
get version from BASE-VER file.
* configure: Regenerated.
* Makefile.in: Regenerated.
liboffloadmic/
* configure.ac: Add GCC_BASE_VER.
* Makefile.am (gcc_version): Use @get_gcc_base_ver@ instead of cat to
get version from BASE-VER file.
* aclocal.m4: Include ../config/acx.m4.
* configure: Regenerated.
* Makefile.in: Regenerated.
libquadmath/
* configure.ac: Add GCC_BASE_VER.
* Makefile.am (gcc_version): Use @get_gcc_base_ver@ instead of cat to
get version from BASE-VER file.
* configure: Regenerated.
* Makefile.in: Regenerated.
libmpx/
* configure.ac: Add GCC_BASE_VER.
* Makefile.am (gcc_version): Use @get_gcc_base_ver@ instead of cat to
get version from BASE-VER file.
* configure: Regenerated.
* Makefile.in: Regenerated.
libada/
* configure.ac: Add GCC_BASE_VER.
* Makefile.in (version): Use @get_gcc_base_ver@ instead of cat to get
version from BASE-VER file.
* configure: Regenerated.
lto-plugin/
* configure.ac: Add GCC_BASE_VER.
* Makefile.am (gcc_version): Use @get_gcc_base_ver@ instead of cat to
get version from BASE-VER file.
* configure: Regenerated.
* Makefile.in: Regenerated.
libitm/
* configure.ac: Add GCC_BASE_VER.
* Makefile.am (gcc_version): Use @get_gcc_base_ver@ instead of cat to
get version from BASE-VER file.
* testsuite/Makefile.in: Regenerated.
* configure: Regenerated.
* Makefile.in: Regenerated.
fixincludes/
* configure.ac: Add GCC_BASE_VER.
* Makefile.in (gcc_version): Use @get_gcc_base_ver@ instead of cat to
get version from BASE-VER file.
* configure: Regenerated.
libcilkrts/
* configure.ac: Add GCC_BASE_VER.
* Makefile.am (gcc_version): Use @get_gcc_base_ver@ instead of cat to
get version from BASE-VER file.
* aclocal.m4: Include ../config/acx.m4.
* configure: Regenerated.
* Makefile.in: Regenerated.
libcc1/
* configure.ac: Add GCC_BASE_VER. For --with-gcc-major-version-only
use just major number from BASE-VER.
* configure: Regenerated.
* Makefile.in: Regenerated.
libobjc/
* configure.ac: Add GCC_BASE_VER.
* Makefile.in (gcc_version): Use @get_gcc_base_ver@ instead of cat to
get version from BASE-VER file.
* configure: Regenerated.
libstdc++-v3/
* configure.ac: Add GCC_BASE_VER.
* fragment.am (gcc_version): Use @get_gcc_base_ver@ instead of cat to
get version from BASE-VER file.
* po/Makefile.in: Regenerated.
* libsupc++/Makefile.in: Regenerated.
* testsuite/Makefile.in: Regenerated.
* src/Makefile.in: Regenerated.
* configure: Regenerated.
* Makefile.in: Regenerated.
* include/Makefile.in: Regenerated.
* doc/Makefile.in: Regenerated.
* python/Makefile.in: Regenerated.
* src/c++11/Makefile.in: Regenerated.
* src/c++98/Makefile.in: Regenerated.
* src/filesystem/Makefile.in: Regenerated.
libvtv/
* configure.ac: Add GCC_BASE_VER.
* Makefile.am (gcc_version): Use @get_gcc_base_ver@ instead of cat to
get version from BASE-VER file.
* testsuite/Makefile.in: Regenerated.
* configure: Regenerated.
* Makefile.in: Regenerated.
libsanitizer/
* configure.ac: Add GCC_BASE_VER.
* Makefile.am (gcc_version): Use @get_gcc_base_ver@ instead of cat to
get version from BASE-VER file.
* libbacktrace/Makefile.in: Regenerated.
* interception/Makefile.in: Regenerated.
* asan/Makefile.in: Regenerated.
* ubsan/Makefile.in: Regenerated.
* configure: Regenerated.
* sanitizer_common/Makefile.in: Regenerated.
* lsan/Makefile.in: Regenerated.
* Makefile.in: Regenerated.
* tsan/Makefile.in: Regenerated.
libgfortran/
* configure.ac: Add GCC_BASE_VER.
* Makefile.am (gcc_version): Use @get_gcc_base_ver@ instead of cat to
get version from BASE-VER file.
* configure: Regenerated.
* Makefile.in: Regenerated.
From-SVN: r244521
|
|
Also fix a stray changelog entry. Some of the regen here is due to
previous changes not being regenerated properly, in part due to the
missing configure dependencies.
* configure: Regenerate.
config/
* picflag.m4: Remove stray \xA0 in comment.
gcc/
* Makefile.in (aclocal_deps): Update and order as per aclocal.m4.
* configure: Regenerate.
* config.in: Regenerate.
libada/
* Makefile.in (configure_deps): Update and order as per
configure.ac sinclude.
* configure: Regenerate.
libgcc/
* Makefile.in (configure_deps): Update.
* configure: Regenerate.
libiberty/
* Makefile.in (configure_deps): Update.
* configure: Regenerate.
libitm/
* Makefile.in: Regenerate.
* testsuite/Makefile.in: Regenerate.
From-SVN: r244049
|
|
Earlier Darwin (esp. Darwin8 and Darwin9) had FAT libraries and suitable header
installations in /usr/include such that one could build a cross-toolchain
(including cross-arch) using a common sysroot (including / for “current” version).
However this is no longer true on a number of levels. A vanilla Darwin system has
no headers installed in /usr and it's certainly not appropriate to try and find
headers/libs for (say) x86-64-darwinNN X powerpc-darwin in /usr on any Darwin NN > 10
(even Darwin10 is incomplete in that it omits the ppc64 multilib). In the latter
example, the catch-all in the current configury to mean that
"foo-darwin" == “foo-version-on-this-system” breaks the cross case
—target=powerpc-apple-darwin —host=some-system-later-than-darwin10.
gcc/
2016-12-11 Iain Sandoe <iain@codesourcery.com>
* configure.ac (CROSS directory tests): Remove the assumption that
Darwin hosts contain suitable target sysroots in "/".
* configure: Regenerate.
From-SVN: r243533
|
|
The method used in the applied patch caused configuration errors on freeBSD and hppa.
2016-11-28 Iain Sandoe <iain@codesourcery.com>
PR target/71767
* configure.ac (with_ld64): Use portable method to extract the
major part of the version number.
* configure: Regenerated.
From-SVN: r242912
|
|
A/ Newer versions of ld64 check the min_version command, and newer versions of
the system assembler inserts this in response to "-mmacosx-version-min=" on
the assembler line. Unless one makes sensible versions, some object is bound
to conflict.
B/ Additionally, there's a difference in behaviour between "as" and "ld" when
presented with xx.yy.zz (ld truncates to xx.yy, as doesn't); net result is
that one needs to pass a truncated version to "as".
So (if the assembler supports minversion commands)
(a) provide a truncated minversion (as asm_macosx_version_min, which is a
driver-only var).
(b) pass this to "as"
(c) Update tests to determine 'HAVE_AS_MMACOSX_VERSION_MIN_OPTION'
(Rainer's patch)
(d) For some reason the testcases are "run" (it's not obvious they need to be,
they are checking compile-time issues)
- anyway, to preserve the status quo, I've left them as exec. However, the
minimum version that can be code-gened for is target-dependent (there are no
released x86 versions before 10.4, for example). To avoid conflicts where
the "as" is assuming some minimum, I've set the testversion to 10.5 (which
is supported by all the archs we have)
(e) We need to ensure that libgcc and crts are generated with a sufficiently
old minversion not to conflict.
gcc/
2016-11-27 Iain Sandoe <iain@codesourcery.com>
Rainer Orth <ro@CeBiTec.Uni-Bielefeld.DE>
PR target/67710
* config.in: Regenerate
* config/darwin-driver.c (darwin_driver_init): Emit a version string
for the assembler.
* config/darwin.h(ASM_MMACOSX_VERSION_MIN_SPEC): New, new tests.
* config/darwin.opt(asm_macosx_version_min): New.
* config/i386/darwin.h: Handle ASM_MMACOSX_VERSION_MIN_SPEC.
* configure: Regenerate
* configure.ac: Check for mmacosx-version-min handling.
gcc/testsuite/
2016-11-27 Iain Sandoe <iain@codesourcery.com>
Rainer Orth <ro@CeBiTec.Uni-Bielefeld.DE>
Dominique d'Humieres <dominiq@lps.ens.fr>
PR target/67710
* gcc.dg/darwin-minversion-1.c: Update min version check.
* gcc.dg/darwin-minversion-2.c: Likewise.
* gcc.dg/darwin-minversion-3.c: Likewise.
libgcc/
2016-11-27 Iain Sandoe <iain@codesourcery.com>
Rainer Orth <ro@CeBiTec.Uni-Bielefeld.DE>
PR target/67710
* config/t-darwin: Default builds to 10.5 codegen.
Co-Authored-By: Dominique d'Humieres <dominiq@lps.ens.fr>
Co-Authored-By: Rainer Orth <ro@CeBiTec.Uni-Bielefeld.DE>
From-SVN: r242898
|
|
This is an initial patch in a series that converts Darwin's configury
to detect ld64 features, rather than the current process of hard-coding
them on target system version.
A ld64-compatible linker is currently required and assumed by Darwin.
If a DEFAULT_LINKER is set via --with-ld= then this will be tested to
see if it is ld64.
The ld64 version is determined for the chosen ld and this is exported for
use in setting a default value for -mtarget-linker (needed for run-time
code-gen changes to section choices).
The support for -rdynamic is converted to be detected at config time, or
by the ld64 version if that is found.
gcc/
2016-11-27 Iain Sandoe <iain@codesourcery.com>
PR target/71767
* configure.ac (with-ld64): New var, set for Darwin, set on
detection of ld64, gcc_cv_ld64_export_dynamic: New, New test.
* config/darwin.h: Use LD64_HAS_DYNAMIC export. DEF_LD64: New,
define.
* config/darwin10.h(DEF_LD64): Update for this target version.
* config/darwin12.h(LINK_GCC_C_SEQUENCE_SPEC): Remove rdynamic
test. (DEF_LD64): Update for this target version.
* configure: Regenerated.
* config.in: Regenerated.
From-SVN: r242894
|
|
gcc/ChangeLog:
2016-08-20 Trevor Saunders <tbsaunde+gcc@tbsaunde.org>
* acinclude.m4 (gcc_GAS_CHECK_FEATURE): Support doing an action
if the feature isn't available.
* configure: Regenerate.
* configure.ac: define HAVE_AS_LEB128 to 0 when not available.
* dwarf2asm.c (dw2_asm_output_data_uleb128): Always compile code
for HAVE_AS_LEB128.
(dw2_asm_output_data_sleb128): Likewise.
(dw2_asm_output_delta_uleb128): Likewise.
(dw2_asm_output_delta_sleb128): Likewise.
* except.c (output_one_function_exception_table): Likewise.
(dw2_size_of_call_site_table): Likewise.
(sjlj_size_of_call_site_table): Likewise.
* dwarf2out.c (output_loc_list): Likewise.
(output_rnglists): Likewise.
From-SVN: r242381
|
|
* configure.ac (.hidden): Change to conftest_s string. Provide string
for AIX assembler.
(gcc_cv_ld_hidden): Yes for AIX.
* configure: Regenerate.
* dwarf2asm.c (USE_LINKONCE_INDIRECT): Don't set for AIX (XCOFF).
* config/rs6000/rs6000-protos.h (rs6000_asm_weaken_decl): Declare
(rs6000_xcoff_asm_output_aligned_decl_common): Declare.
* config/rs6000/xcoff.h (TARGET_ASM_GLOBALIZE_DECL_NAME): Define.
(ASM_OUTPUT_ALIGNED_DECL_COMMON): Define.
(ASM_OUTPUT_ALIGNED_COMMON): Delete.
* config/rs6000/rs6000.c (rs6000_init_builtins): Change clog rename
from #if to if.
(rs6000_xcoff_visibility): New.
(rs6000_xcoff_declare_function_name): Add visibility support.
(rs6000_xcoff_asm_globalize_decl_name): New.
(rs6000_xcoff_asm_output_aligned_decl_common): New.
(rs6000_asm_weaken_decl): New.
(rs6000_code_end): Disable HIDDEN_LINKONCE on XCOFF.
config/rs6000/rs6000.h (ASM_WEAKEN_DECL): Change definition to
reference function.
From-SVN: r241930
|
|
-Woverloaded-virtual checks for warning...
* configure.ac (strict_warn): Merge -Wmissing-format-attribute and
-Woverloaded-virtual checks for warning options.
* configure: Regenerate.
From-SVN: r240721
|
|
2016-09-30 Bernd Edlinger <bernd.edlinger@hotmail.de>
* configure.ac: Split CHECKING_P into CHECKING_P and
ENABLE_EXTRA_CHECKING.
* configure: Regenerated.
* config.in: Adjust commment of CHECKING_P. Add ENABLE_EXTRA_CHECKING.
* common.opt (flag_checking): Use CHECKING_P and ENABLE_EXTRA_CHECKING.
From-SVN: r240677
|
|
Extend this attribute to cover long double ABIs, for 64-bit too.
This patch also corrects an error that crept in to code setting
rs6000_passes_float. See the added comment. Passing IEEE128 values
in vsx regs ought to set both Tag_GNU_Power_ABI_FP and
Tag_GNU_Power_ABI_Vector. Also adds a new option, default on, that
disables output of .gnu_attribute assembly directives.
* config/rs6000/sysv4.opt (mgnu-attribute): New option.
* doc/invoke.texi: Document it.
* config/rs6000/rs6000.c (HAVE_LD_PPC_GNU_ATTR_LONG_DOUBLE): Define.
(rs6000_passes_float): Comment.
(rs6000_passes_long_double): New static var.
(call_ABI_of_interest): Return false unless rs6000_gnu_attr is set.
(init_cumulative_args): Set up to emit fp .gnu_attribute for
ELF 64-bit ABIs as well as 32-bit ELF. Correct rs6000_passes_float
to include fp values returned in vectors.
Set rs6000_passes_long_double.
(rs6000_function_arg_advance_1): Likewise for function args.
(rs6000_elf_file_end): Emit fp .gnu_attribute for ELF 64-bit ABIs,
and SPE. Emit long double tag value too.
(rs6000_opt_vars): Add gnu-attr.
* configure.ac (HAVE_LD_PPC_GNU_ATTR_LONG_DOUBLE): New ppc32 test.
* configure: Regenerate.
* config.in: Regenerate.
From-SVN: r240601
|
|
* configure.ac (gcc_cv_as_aix_dwloc): Fix typo in assembly fragment.
* configure: Regenerate.
From-SVN: r240465
|
|
option (Ubuntu default))
Fix PR target/77267
2016-09-10 Alexander Ivchenko <alexander.ivchenko@intel.com>
PR target/77267
* config.in: Regenerate.
* config/i386/linux-common.h (MPX_LD_AS_NEEDED_GUARD_PUSH):
New macro.
(MPX_LD_AS_NEEDED_GUARD_PUSH): Ditto.
(LIBMPXWRAPPERS_SPEC): Remove "--no-whole-archive" from
static-libmpxwrappers case.
(LIBMPX_SPEC): Add guards with MPX_LD_AS_NEEDED_GUARD_PUSH and
MPX_LD_AS_NEEDED_GUARD_POP.
* configure: Regenerate.
* configure.ac (HAVE_LD_PUSHPOPSTATE_SUPPORT): New variable.
defined if linker support "--push-state"/"--pop-state".
From-SVN: r240057
|
|
gcc/ChangeLog:
* configure.ac (thin_archive_support): New variable. AC_SUBST it.
* configure: Regenerate.
* Makefile.in (THIN_ARCHIVE_SUPPORT): New variable.
(USE_THIN_ARCHIVES): New variable.
(libbackend.a): If USE_THIN_ARCHIVES then pass T to ar to build
this archive as a thin archive.
From-SVN: r238524
|
|
There are extensions to x86-64 psABI:
https://groups.google.com/forum/#!topic/x86-64-abi/de5_KnLHxtI
and i386 psABI:
https://groups.google.com/forum/#!topic/ia32-abi/awsRSvJOJfs
to call tls_get_addr via GOT. X86 assembler and linker in binutils 2.27
implemented
call *__tls_get_addr@GOTPCREL(%rip)
in 64-bit and
call *___tls_get_addr@GOT(%reg)
in 32-bit to access global and local thread loal variables in shared
library. We check if 32-bit x86 assembler and linker work with
call *___tls_get_addr@GOT(%reg)
as 32-bit and 64-bit assembler and linker are enabled togther.
In 32-bit, since any integer register except EAX, which is used to pass
parameter to ___tls_get_addr, and ESP, can be used as GOT base, a new
register class, TLS_GOTBASE_REGS, along with a new constraint, Yb, are
added. They are used to improve register allocation for 32-bit dynamic
TLS patterns.
gcc/
* configure.ac (calling ___tls_get_addr via GOT): New
assembler/linker check.
(HAVE_AS_IX86_TLS_GET_ADDR_GOT): New. Defined to 1 if 32-bit
assembler and linker supports calling ___tls_get_addr via GOT.
Otherise, defined to 0.
* config.in: Regenerated.
* configure: Likewise.
* config/i386/constraints.md (Yb): New constraint.
* config/i386/i386.h (reg_class): Add TLS_GOTBASE_REGS.
(REG_CLASS_NAMES): Likewise.
(REG_CLASS_CONTENTS): Likewise.
* config/i386/i386.md (*tls_global_dynamic_32_gnu): Replace
the b constraint with the Yb constraint. Call ___tls_get_addr
via GOT for GNU TLS with -fno-plt if HAVE_AS_IX86_TLS_GET_ADDR_GOT
is 1.
(*tls_local_dynamic_base_32_gnu): Likewise.
(*tls_global_dynamic_64_<mode>): Call _tls_get_addr via GOT for
GNU TLS with -fno-plt if HAVE_AS_IX86_TLS_GET_ADDR_GOT is 1.
(*tls_local_dynamic_base_64_<mode>): Likewise.
gcc/testsuite/
* gcc.target/i386/noplt-gd-1.c: New test.
* gcc.target/i386/noplt-gd-2.c: Likewise.
* gcc.target/i386/noplt-gd-3.c: Likewise.
* gcc.target/i386/noplt-ld-1.c: Likewise.
* gcc.target/i386/noplt-ld-2.c: Likewise.
* gcc.target/i386/noplt-ld-3.c: Likewise.
* lib/target-supports.exp
(check_effective_target_tls_get_addr_via_got): New.
From-SVN: r237765
|
|
for 32bit target.
* configure.ac (HAVE_AS_GOTOF_IN_DATA): Use $as_ix86_gas_32_opt to
assemble for 32bit target.
(HAVE_AS_IX86_TLSGDPLT): Use $as_ix86_gas_32_opt to assemble
and $ld_ix86_gld_32_opt to link for 32bit target.
(HAVE_AS_IX86_TLSLDMPLT): Ditto.
* configure: Regenerate.
From-SVN: r237758
|
|
From-SVN: r237737
|
|
i386 psABI has been updated to clarify that R_386_GOT32X and R_386_GOT32
relocations can be used to access GOT without base register when PIC is
disabled:
https://groups.google.com/forum/#!topic/ia32-abi/awsRSvJOJfs
32-bit x86 assembler and linker from binutils 2.26.1 and 2.27 support
call/jmp *_start@GOT
cmpl $0, bar@GOT
for both normal and IFUNC functions. We check if 32-bit x86 assembler
and linker have the fix for:
https://sourceware.org/bugzilla/show_bug.cgi?id=20244
before accessing external function via GOT slot for -fno-plt in both PIC
and non-PIC modes.
PR target/66232
PR target/67400
* configure.ac (as_ix86_tls_ldm_opt): Renamed to ...
(as_ix86_gas_32_opt): This.
(ld_ix86_tls_ldm_opt): Renamed to ...
(ld_ix86_gld_32_opt): This.
(R_386_TLS_LDM reloc): Updated.
(R_386_GOT32X reloc): New assembler/linker check.
(HAVE_AS_IX86_GOT32X): New. Defined to 1 if 32-bit assembler and
linker support "jmp *_start@GOT" and "cmpl $0, bar@GOT". Otherise,
defined to 0.
* config.in: Regenerated.
* configure: Likewise.
* config/i386/i386.c (ix86_force_load_from_GOT_p): Return
true if HAVE_AS_IX86_GOT32X is 1 in 32-bit mode.
(ix86_legitimate_address_p): Allow UNSPEC_GOT for -fno-plt
if ix86_force_load_from_GOT_p returns true.
(ix86_print_operand_address_as): Also support UNSPEC_GOT if
ix86_force_load_from_GOT_p returns true.
(ix86_expand_move): Generate UNSPEC_GOT in 32-bit mode to load
the external function address via the GOT slot.
(ix86_nopic_noplt_attribute_p): Check both TARGET_64BIT and
HAVE_AS_IX86_GOT32X before returning false.
(ix86_output_call_insn): Generate "%!jmp/call\t*%p0@GOT" in
32-bit mode if ix86_nopic_noplt_attribute_p returns true.
gcc/testsuite/
PR target/66232
PR target/67400
* gcc.target/i386/pr66232-14.c: New file.
* gcc.target/i386/pr66232-15.c: Likewise.
* gcc.target/i386/pr66232-16.c: Likewise.
* gcc.target/i386/pr66232-17.c: Likewise.
* gcc.target/i386/pr67400-1.c: Don't disable for ia32. Scan for
ia32 if R_386_GOT32X relocation is supported.
* gcc.target/i386/pr67400-2.c: Likewise.
* gcc.target/i386/pr67400-3.c: Likewise.
* gcc.target/i386/pr67400-4.c: Likewise.
* gcc.target/i386/pr67400-6.c: Likewise.
* gcc.target/i386/pr67400-7.c: Likewise.
* lib/target-supports.exp (check_effective_target_got32x_reloc):
New.
From-SVN: r237736
|
|
* configure.ac (gcc_cv_as_compress_debug): Remove
--compress-debug-sections as extra as switch.
Handle gas --compress-debug-sections=type.
(gcc_cv_ld_compess_debug): Remove bogus ld_date check.
Handle gld --compress-debug-sections=type.
* configure: Regenerate.
From-SVN: r237680
|
|
gcc/ChangeLog:
2016-06-21 Trevor Saunders <tbsaunde+gcc@tbsaunde.org>
* config.gcc: Remove support for knetbsd.
* configure.ac: Likewise.
* config/i386/knetbsd-gnu.h: Remove. * config/i386/knetbsd-gnu64.h: Remove.
* config/knetbsd-gnu.h: Remove.
* configure: Regenerate.
libgcc/ChangeLog:
2016-06-21 Trevor Saunders <tbsaunde+gcc@tbsaunde.org>
* config.host: Remove support for knetbsd.
libstdc++-v3/ChangeLog:
2016-06-21 Trevor Saunders <tbsaunde+gcc@tbsaunde.org>
* configure: Regenerate.
* configure.host: Remove support for knetbsd.
* crossconfig.m4: Likewise.
contrib/ChangeLog:
2016-06-21 Trevor Saunders <tbsaunde+gcc@tbsaunde.org>
* config-list.mk: stop testing knetbsd.
From-SVN: r237662
|
|
contrib/ChangeLog:
2016-06-21 Trevor Saunders <tbsaunde+gcc@tbsaunde.org>
* config-list.mk: Remove interix target.
libgcc/ChangeLog:
2016-06-21 Trevor Saunders <tbsaunde+gcc@tbsaunde.org>
* config.host: Remove interix support.
* config/i386/t-interix: Remove.
config/ChangeLog:
2016-06-21 Trevor Saunders <tbsaunde+gcc@tbsaunde.org>
* elf.m4: Remove interix support.
* picflag.m4: Likewise.
fixincludes/ChangeLog:
2016-06-21 Trevor Saunders <tbsaunde+gcc@tbsaunde.org>
* mkfixinc.sh: Remove interix support.
gcc/ChangeLog:
2016-06-21 Trevor Saunders <tbsaunde+gcc@tbsaunde.org>
* config.gcc: Remove interix support.
* config/i386/i386-interix.h: Remove.
* config/i386/interix.opt: Remove.
* config/i386/t-interix: Remove.
* configure: Regenerate.
* configure.ac: Remove interix support.
* doc/install.texi: Remove interix documentation.
gcc/testsuite/ChangeLog:
2016-06-21 Trevor Saunders <tbsaunde+gcc@tbsaunde.org>
* gcc.dg/attr-ms_struct-1.c: Stop testing interix.
* gcc.dg/attr-ms_struct-2.c: Likewise.
* gcc.dg/attr-ms_struct-packed1.c: Likewise.
* gcc.dg/bf-ms-attrib.c: Likewise.
* gcc.dg/bf-ms-layout-2.c: Likewise.
* gcc.dg/bf-ms-layout-3.c: Likewise.
* gcc.dg/bf-ms-layout.c: Likewise.
* gcc.dg/bf-no-ms-layout.c: Likewise.
* gcc.target/i386/bitfield1.c: Likewise.
* gcc.target/i386/bitfield2.c: Likewise.
* gcc.target/i386/bitfield3.c: Likewise.
From-SVN: r237660
|
|
gcc/ChangeLog:
2016-06-06 Jose E. Marchesi <jose.marchesi@oracle.com>
* config/sparc/sparc.md (cpu): Add niagara7 cpu type.
Include the M7 SPARC DFA scheduler.
New attribute v3pipe.
Annotate insns with v3pipe where appropriate.
Define cpu_feature vis4.
Add lzd instruction type and set it on clzdi_sp64 and clzsi_sp64.
Add (V8QI "8") to vbits.
Add insns {add,sub}v8qi3
Add insns ss{add,sub}v8qi3
Add insns us{add,sub}{v8qi,v4hi}3
Add insns {min,max}{v8qi,v4hi,v2si}3
Add insns {minu,maxu}{v8qi,v4hi,v2si}3
Add insns fpcmp{le,gt,ule,ug,ule,ugt}{8,16,32}_vis.
* config/sparc/niagara4.md: Add a comment explaining the
discrepancy between the documented latenty numbers and the
implemented ones.
* config/sparc/niagara7.md: New file.
* configure.ac (HAVE_AS_SPARC5_VIS4): Define if the assembler
supports SPARC5 and VIS 4.0 instructions.
* configure: Regenerate.
* config.in: Likewise.
* config.gcc: niagara7 is a supported cpu in sparc*-*-* targets.
* config/sparc/sol2.h (ASM_CPU32_DEFAUILT_SPEC): Set for
TARGET_CPU_niagara7.
(ASM_CPU64_DEFAULT_SPEC): Likewise.
(CPP_CPU_SPEC): Handle niagara7.
(ASM_CPU_SPEC): Likewise.
* config/sparc/sparc-opts.h (processor_type): Add
PROCESSOR_NIAGARA7.
(mvis4): New option.
* config/sparc/sparc.h (TARGET_CPU_niagara7): Define.
(AS_NIAGARA7_FLAG): Define.
(ASM_CPU64_DEFAULT_SPEC): Set for niagara7.
(CPP_CPU64_DEFAULT_SPEC): Likewise.
(CPP_CPU_SPEC): Handle niagara7.
(ASM_CPU_SPEC): Likewise.
* config/sparc/sparc.c (niagara7_costs): Define.
(sparc_option_override): Handle niagara7 and adjust cache-related
parameters with better values for niagara cpus. Also support VIS4.
(sparc32_initialize_trampoline): Likewise.
(sparc_use_sched_lookahead): Likewise.
(sparc_issue_rate): Likewise.
(sparc_register_move_cost): Likewise.
(dump_target_flag_bits): Support VIS4.
(sparc_vis_init_builtins): Likewise.
(sparc_builtins): Likewise.
* config/sparc/sparc-c.c (sparc_target_macros): Define __VIS__ for
VIS4 4.0.
* config/sparc/driver-sparc.c (cpu_names): Add SPARC-M7 and
UltraSparc M7.
* config/sparc/sparc.opt (sparc_processor_type): New value
niagara7.
* config/sparc/visintrin.h (__attribute__): Prototypes for the
VIS4 builtins.
* doc/invoke.texi (SPARC Options): Document -mcpu=niagara7 and
-mvis4.
* doc/extend.texi (SPARC VIS Built-in Functions): Document the
VIS4 builtins.
gcc/testsuite/ChangeLog:
2016-06-06 Jose E. Marchesi <jose.marchesi@oracle.com>
* gcc.target/sparc/vis4misc.c: New file.
* gcc.target/sparc/fpcmp.c: Likewise.
* gcc.target/sparc/fpcmpu.c: Likewise.
From-SVN: r237132
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|
default (i.e.
* configure.ac: Treat a --with-headers option without argument
the same as the default (i.e. consult sys-include directory).
* configure: Regenerate.
From-SVN: r236825
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|
gnattools/
* configure.ac: Add ACX_NONCANONICAL_HOST.
* configure: Regenerate.
* Makefile.in: Replace host_alias with host_noncanonical.
(gnattools-cross): Do not rename the tools.
gcc/
* configure.ac: Add ACX_NONCANONICAL_HOST.
* configure: Regenerate.
* Makefile.in: Set host_noncanonical.
gcc/ada
* gcc-interface/Make-lang.in (GNATMAKE_FOR_HOST): In the canadian
cross case, use host_noncanonical instead of host as prefix.
(GNATBIND_FOR_HOST): Likewise.
(GNATLINK_FOR_HOST): Likewise.
(GNATLS_FOR_HOST): Likewise.
From-SVN: r236267
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|
* configure.ac (enable_vtable_verify): Handle --enable-vtable-verify.
* configure: Regenerate.
* config.in: Regenerate.
* gcc.c (VTABLE_VERIFICATION_SPEC) [!ENABLE_VTABLE_VERIFY]: Error
on -fvtable-verify.
* config/sol2.h [!ENABLE_VTABLE_VERIFY] (STARTFILE_VTV_SPEC): Define.
(ENDFILE_VTV_SPEC): Define.
From-SVN: r236029
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/
* config.guess: Remove SH5 support.
* config.sub: Likewise.
* configure: Likewise.
* configure.ac: Likewise.
config/
* picflag.m4: Remove SH5 support.
gcc/
* config/sh/t-sh: Remove SH5 support.
* config.gcc: Likewise.
* configure: Likewise.
contrib/
* compare-all-tests: Remove SH5 support.
* config-list.mk: Likewise.
libada/
* configure: Remove SH5 support.
libgcc/
* config.host: Remove SH5 support.
* configure: Likewise.
libiberty/
* configure: Remove SH5 support.
libjava/
* classpath/config.guess: Remove SH5 support.
* classpath/config.sub: Likewise.
From-SVN: r235676
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gcc/
2016-04-28 Claudiu Zissulescu <claziss@synopsys.com>
Joern Rennecke <joern.rennecke@embecosm.com>
* config/arc/arc-protos.h (arc_legitimize_pic_address): Remove
declaration.
(emit_pic_move): Remove.
(arc_eh_uses, insn_is_tls_gd_dispatch): Declare.
* config/arc/arc.c (emit_pic_move): Removed.
(TARGET_HAVE_TLS): Define.
(arc_conditional_register_usage): Test for arc_tp_regno.
(arc_print_operand, arc_print_operand_address): Handle TLS
unspecs.
(arc_needs_pcl_p): New function.
(arc_legitimate_pc_offset_p): Use arc_needs_pcl_p.
(arc_legitimate_pic_addr_p): Handle TLS unspecs.
(arc_raw_symbolic_reference_mentioned_p): Likewise.
(arc_get_tp, arc_emit_call_tls_get_addr): New function.
(arc_legitimize_tls_address): Likewise.
(DTPOFF_ZERO_SYM): Define.
(arc_legitimize_pic_address): Make it static, handle TLS cases.
(arc_output_pic_addr_const): Print TLS unspecs.
(prepare_pic_move): New function, replaces emit_pic_move.
(arc_legitimate_constant_p): Handle TLS unspecs.
(arc_legitimate_address_p): Likewise.
(arc_rewrite_small_data_p): Use assert for TLS constants.
(prepare_move_operands): Use prepare_pic_move.
(arc_legitimize_address): Legitimize tls addresses.
(arc_epilogue_uses): Check for arc_tp_regno.
(arc_eh_uses, insn_is_tls_gd_dispatch): New function.
* config/arc/arc.h [DEFAULT_LIBC != LIBC_UCLIBC] (EXTRA_SPECS):
Define.
[DEFAULT_LIBC != LIBC_UCLIBC] (ARC_TLS_EXTRA_START_SPEC):
Likewise.
[DEFAULT_LIBC != LIBC_UCLIBC] (STARTFILE_SPEC): Add
%(arc_tls_extra_start_spec).
(TARGET_CPU_CPP_BUILTINS): Define __ARC_TLS_REGNO__.
(REGNO_OK_FOR_BASE_P): Check for arc_tp_regno.
(EH_USES): Define.
(INSN_REFERENCES_ARE_DELAYED): Use insn_is_tls_gd_dispatch.
* config/arc/arc.md (UNSPEC_TLS_GD, UNSPEC_TLS_LD, UNSPEC_TLS_IE)
(UNSPEC_TLS_OFF): Add.
(R10_REG): Define.
(tls_load_tp_soft, tls_gd_load, tls_gd_get_addr, tls_gd_dispatch)
(get_thread_pointersi): New patterns.
* config/arc/arc.opt (mtp-regno): New option.
* config/arc/predicates.md (move_src_operand): Handle TLS symbols.
(move_dest_operand): Likewise.
* configure: Regenerate.
* configure.ac: Add arc*-*-* case to test for tls.
* doc/invoke.texi (ARC options): Document mtp-regno.
Co-Authored-By: Joern Rennecke <joern.rennecke@embecosm.com>
From-SVN: r235559
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PR bootstrap/70704
* configure.ac (--enable-stage1-checking): For --disable-checking or
implicit --enable-checking, make sure extra flag matches in between
stage1 and later checking.
* configure: Regenerated.
gcc/
* configure.ac (--enable-checking): Document extra flag, for
non-release builds default to --enable-checking=yes,extra.
If misc checking and extra checking, define CHECKING_P to 2 instead
of 1.
* common.opt (fchecking=): Add.
* doc/invoke.texi (-fchecking=): Document.
* doc/install.texi: Document --enable-checking changes.
* configure: Regenerated.
* config.in: Regenerated.
gcc/cp/
* pt.c (build_non_dependent_expr): Use flag_checking > 1 instead of
just flag_checking.
From-SVN: r235430
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|
2016-01-27 Thomas Klausner <wiz@NetBSD.org>
PR target/68380
* configure.ac: NetBSD provides SSP in its C library.
* configure: Updated.
From-SVN: r232884
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|
* configure.ac (ac_cv_std_swap_in_utility): New test.
* system.h (<algorithm>): Check HAVE_SWAP_IN_UTILITY as well.
* configure: Regenerate.
* config.in: Regenerate.
From-SVN: r232836
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* configure.ac (gcc_cv_as_powerpc_mfcrf, gcc_cv_as_machine_directive):
Detangle.
From-SVN: r232697
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From-SVN: r232675
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reference.
* configure.ac (gcc_cv_as_dwloc): Test support for debug frame section
label reference.
* configure: Regenerate.
From-SVN: r232673
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gcc/
* config/rs6000/ppc-auxv.h: New file.
* config/rs6000/rs6000-builtin.def (cpu_init): Add new builtin.
(cpu_is): Likewise.
(cpu_supports): Likewise.
* config/rs6000/rs6000.c: include "ppc-auxv.h".
(cpu_is_info): New variable.
(cpu_supports_info): Likewise.
(tcb_verification_symbol): Likewise.
(cpu_builtin_p): Likewise.
(cpu_expand_builtin): New function.
(rs6000_expand_ternop_builtin): Add support for CPU builtin functions.
(rs6000_init_builtins): Likewise.
(rs6000_elf_file_end): Emit HWCAP in TCB verification symbol.
* config/rs6000/rs6000.h (TLS_REGNUM): New define.
* configure.ac (gcc_cv_libc_provides_hwcap_in_tcb): New test.
* configure: Regenerate.
* config.in: Likewise.
* doc/extend.texi (PowerPC Built-in Functions): Document
__builtin_cpu_init, __builtin_cpu_is and __builtin_cpu_supports.
gcc/testsuite/
* gcc.target/powerpc/cpu-builtin-1.c: New test.
From-SVN: r232634
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2016-01-19 Martin Jambor <mjambor@suse.cz>
Martin Liska <mliska@suse.cz>
Michael Matz <matz@suse.de>
libgomp/
* plugin/Makefrag.am: Add HSA plugin requirements.
* plugin/configfrag.ac (HSA_RUNTIME_INCLUDE): New variable.
(HSA_RUNTIME_LIB): Likewise.
(HSA_RUNTIME_CPPFLAGS): Likewise.
(HSA_RUNTIME_INCLUDE): New substitution.
(HSA_RUNTIME_LIB): Likewise.
(HSA_RUNTIME_LDFLAGS): Likewise.
(hsa-runtime): New configure option.
(hsa-runtime-include): Likewise.
(hsa-runtime-lib): Likewise.
(PLUGIN_HSA): New substitution variable.
Fill HSA_RUNTIME_INCLUDE and HSA_RUNTIME_LIB according to the new
configure options.
(PLUGIN_HSA_CPPFLAGS): Likewise.
(PLUGIN_HSA_LDFLAGS): Likewise.
(PLUGIN_HSA_LIBS): Likewise.
Check that we have access to HSA run-time.
* libgomp-plugin.h (offload_target_type): New element
OFFLOAD_TARGET_TYPE_HSA.
* libgomp.h (gomp_target_task): New fields firstprivate_copies and
args.
(bool gomp_create_target_task): Updated.
(gomp_device_descr): Extra parameter of run_func and async_run_func,
new field can_run_func.
* libgomp_g.h (GOMP_target_ext): Update prototype.
* oacc-host.c (host_run): Added a new parameter args.
* target.c (calculate_firstprivate_requirements): New function.
(copy_firstprivate_data): Likewise.
(gomp_target_fallback_firstprivate): Use them.
(gomp_target_unshare_firstprivate): New function.
(gomp_get_target_fn_addr): Allow returning NULL for shared memory
devices.
(GOMP_target): Do host fallback for all shared memory devices. Do not
pass any args to plugins.
(GOMP_target_ext): Introduce device-specific argument parameter args.
Allow host fallback if device shares memory. Do not remap data if
device has shared memory.
(gomp_target_task_fn): Likewise. Also treat shared memory devices
like host fallback for mappings.
(GOMP_target_data): Treat shared memory devices like host fallback.
(GOMP_target_data_ext): Likewise.
(GOMP_target_update): Likewise.
(GOMP_target_update_ext): Likewise. Also pass NULL as args to
gomp_create_target_task.
(GOMP_target_enter_exit_data): Likewise.
(omp_target_alloc): Treat shared memory devices like host fallback.
(omp_target_free): Likewise.
(omp_target_is_present): Likewise.
(omp_target_memcpy): Likewise.
(omp_target_memcpy_rect): Likewise.
(omp_target_associate_ptr): Likewise.
(gomp_load_plugin_for_device): Also load can_run.
* task.c (GOMP_PLUGIN_target_task_completion): Free
firstprivate_copies.
(gomp_create_target_task): Accept new argument args and store it to
ttask.
* plugin/plugin-hsa.c: New file.
gcc/
* Makefile.in (OBJS): Add new source files.
(GTFILES): Add hsa.c.
* common.opt (disable_hsa): New variable.
(-Whsa): New warning.
* config.in (ENABLE_HSA): New.
* configure.ac: Treat hsa differently from other accelerators.
(OFFLOAD_TARGETS): Define ENABLE_OFFLOADING according to
$enable_offloading.
(ENABLE_HSA): Define ENABLE_HSA according to $enable_hsa.
* doc/install.texi (Configuration): Document --with-hsa-runtime,
--with-hsa-runtime-include, --with-hsa-runtime-lib and
--with-hsa-kmt-lib.
* doc/invoke.texi (-Whsa): Document.
(hsa-gen-debug-stores): Likewise.
* lto-wrapper.c (compile_images_for_offload_targets): Do not attempt
to invoke offload compiler for hsa acclerator.
* opts.c (common_handle_option): Determine whether HSA offloading
should be performed.
* params.def (PARAM_HSA_GEN_DEBUG_STORES): New parameter.
* builtin-types.def (BT_FN_VOID_UINT_PTR_INT_PTR): New.
(BT_FN_VOID_INT_OMPFN_SIZE_PTR_PTR_PTR_UINT_PTR_INT_INT): Removed.
(BT_FN_VOID_INT_OMPFN_SIZE_PTR_PTR_PTR_UINT_PTR_PTR): New.
* gimple-low.c (lower_stmt): Also handle GIMPLE_OMP_GRID_BODY.
* gimple-pretty-print.c (dump_gimple_omp_for): Also handle
GF_OMP_FOR_KIND_GRID_LOOP.
(dump_gimple_omp_block): Also handle GIMPLE_OMP_GRID_BODY.
(pp_gimple_stmt_1): Likewise.
* gimple-walk.c (walk_gimple_stmt): Likewise.
* gimple.c (gimple_build_omp_grid_body): New function.
(gimple_copy): Also handle GIMPLE_OMP_GRID_BODY.
* gimple.def (GIMPLE_OMP_GRID_BODY): New.
* gimple.h (enum gf_mask): Added GF_OMP_PARALLEL_GRID_PHONY,
GF_OMP_FOR_KIND_GRID_LOOP, GF_OMP_FOR_GRID_PHONY and
GF_OMP_TEAMS_GRID_PHONY.
(gimple_statement_omp_single_layout): Updated comments.
(gimple_build_omp_grid_body): New function.
(gimple_has_substatements): Also handle GIMPLE_OMP_GRID_BODY.
(gimple_omp_for_grid_phony): New function.
(gimple_omp_for_set_grid_phony): Likewise.
(gimple_omp_parallel_grid_phony): Likewise.
(gimple_omp_parallel_set_grid_phony): Likewise.
(gimple_omp_teams_grid_phony): Likewise.
(gimple_omp_teams_set_grid_phony): Likewise.
(gimple_return_set_retbnd): Also handle GIMPLE_OMP_GRID_BODY.
* omp-builtins.def (BUILT_IN_GOMP_OFFLOAD_REGISTER): New.
(BUILT_IN_GOMP_OFFLOAD_UNREGISTER): Likewise.
(BUILT_IN_GOMP_TARGET): Updated type.
* omp-low.c: Include symbol-summary.h, hsa.h and params.h.
(adjust_for_condition): New function.
(get_omp_for_step_from_incr): Likewise.
(extract_omp_for_data): Moved parts to adjust_for_condition and
get_omp_for_step_from_incr.
(build_outer_var_ref): Handle GIMPLE_OMP_GRID_BODY.
(fixup_child_record_type): Bail out if receiver_decl is NULL.
(scan_sharing_clauses): Handle OMP_CLAUSE__GRIDDIM_.
(scan_omp_parallel): Do not create child functions for phony
constructs.
(check_omp_nesting_restrictions): Handle GIMPLE_OMP_GRID_BODY.
(scan_omp_1_op): Checking assert we are not remapping to
ERROR_MARK. Also also handle GIMPLE_OMP_GRID_BODY.
(parallel_needs_hsa_kernel_p): New function.
(expand_parallel_call): Register apprpriate parallel child
functions as HSA kernels.
(grid_launch_attributes_trees): New type.
(grid_attr_trees): New variable.
(grid_create_kernel_launch_attr_types): New function.
(grid_insert_store_range_dim): Likewise.
(grid_get_kernel_launch_attributes): Likewise.
(get_target_argument_identifier_1): Likewise.
(get_target_argument_identifier): Likewise.
(get_target_argument_value): Likewise.
(push_target_argument_according_to_value): Likewise.
(get_target_arguments): Likewise.
(expand_omp_target): Call get_target_arguments instead of looking
up for teams and thread limit.
(grid_expand_omp_for_loop): New function.
(grid_arg_decl_map): New type.
(grid_remap_kernel_arg_accesses): New function.
(grid_expand_target_kernel_body): New function.
(expand_omp): Call it.
(lower_omp_for): Do not emit phony constructs.
(lower_omp_taskreg): Do not emit phony constructs but create for them
a temporary variable receiver_decl.
(lower_omp_taskreg): Do not emit phony constructs.
(lower_omp_teams): Likewise.
(lower_omp_grid_body): New function.
(lower_omp_1): Call it.
(grid_reg_assignment_to_local_var_p): New function.
(grid_seq_only_contains_local_assignments): Likewise.
(grid_find_single_omp_among_assignments_1): Likewise.
(grid_find_single_omp_among_assignments): Likewise.
(grid_find_ungridifiable_statement): Likewise.
(grid_target_follows_gridifiable_pattern): Likewise.
(grid_remap_prebody_decls): Likewise.
(grid_copy_leading_local_assignments): Likewise.
(grid_process_kernel_body_copy): Likewise.
(grid_attempt_target_gridification): Likewise.
(grid_gridify_all_targets_stmt): Likewise.
(grid_gridify_all_targets): Likewise.
(execute_lower_omp): Call grid_gridify_all_targets.
(make_gimple_omp_edges): Handle GIMPLE_OMP_GRID_BODY.
* tree-core.h (omp_clause_code): Added OMP_CLAUSE__GRIDDIM_.
(tree_omp_clause): Added union field dimension.
* tree-pretty-print.c (dump_omp_clause): Handle OMP_CLAUSE__GRIDDIM_.
* tree.c (omp_clause_num_ops): Added number of arguments of
OMP_CLAUSE__GRIDDIM_.
(omp_clause_code_name): Added name of OMP_CLAUSE__GRIDDIM_.
(walk_tree_1): Handle OMP_CLAUSE__GRIDDIM_.
* tree.h (OMP_CLAUSE_GRIDDIM_DIMENSION): New.
(OMP_CLAUSE_SET_GRIDDIM_DIMENSION): Likewise.
(OMP_CLAUSE_GRIDDIM_SIZE): Likewise.
(OMP_CLAUSE_GRIDDIM_GROUP): Likewise.
* passes.def: Schedule pass_ipa_hsa and pass_gen_hsail.
* tree-pass.h (make_pass_gen_hsail): Declare.
(make_pass_ipa_hsa): Likewise.
* ipa-hsa.c: New file.
* lto-section-in.c (lto_section_name): Add hsa section name.
* lto-streamer.h (lto_section_type): Add hsa section.
* timevar.def (TV_IPA_HSA): New.
* hsa-brig-format.h: New file.
* hsa-brig.c: New file.
* hsa-dump.c: Likewise.
* hsa-gen.c: Likewise.
* hsa.c: Likewise.
* hsa.h: Likewise.
* toplev.c (compile_file): Call hsa_output_brig.
* hsa-regalloc.c: New file.
gcc/fortran/
* types.def (BT_FN_VOID_UINT_PTR_INT_PTR): New.
(BT_FN_VOID_INT_OMPFN_SIZE_PTR_PTR_PTR_UINT_PTR_INT_INT): Removed.
(BT_FN_VOID_INT_OMPFN_SIZE_PTR_PTR_PTR_UINT_PTR_PTR): New.
gcc/lto/
* lto-partition.c: Include "hsa.h"
(add_symbol_to_partition_1): Put hsa implementations into the
same partition as host implementations.
liboffloadmic/
* plugin/libgomp-plugin-intelmic.cpp (GOMP_OFFLOAD_async_run): New
unused parameter.
(GOMP_OFFLOAD_run): Likewise.
include/
* gomp-constants.h (GOMP_DEVICE_HSA): New macro.
(GOMP_VERSION_HSA): Likewise.
(GOMP_TARGET_ARG_DEVICE_MASK): Likewise.
(GOMP_TARGET_ARG_DEVICE_ALL): Likewise.
(GOMP_TARGET_ARG_SUBSEQUENT_PARAM): Likewise.
(GOMP_TARGET_ARG_ID_MASK): Likewise.
(GOMP_TARGET_ARG_NUM_TEAMS): Likewise.
(GOMP_TARGET_ARG_THREAD_LIMIT): Likewise.
(GOMP_TARGET_ARG_VALUE_SHIFT): Likewise.
(GOMP_TARGET_ARG_HSA_KERNEL_ATTRIBUTES): Likewise.
From-SVN: r232549
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* configure.ac (isl_options_set_schedule_serialize_sccs): Also
use GMPINC.
* configure: Regenerate.
From-SVN: r232190
|
|
From-SVN: r231784
|
|
gcc:
PR target/67973
* configure.ac (gcc_cv_as_stabs_directive): New test.
* configure: Regenerate.
* config.in: Regenerate.
* config/darwin.h (DBX_DEBUGGING_INFO): Wrap in
HAVE_AS_STABS_DIRECTIVE.
(PREFERRED_DEBUGGING_TYPE): Likewise.
* config/i386/darwin.h (PREFERRED_DEBUGGING_TYPE): Only include
DBX_DEBUG if HAVE_AS_STABS_DIRECTIVE.
* doc/sourcebuild.texi (Effective-Target Keywords, Environment
attributes): Document stabs.
gcc/testsuite:
PR target/67973
* lib/target-supports.exp (check_effective_target_stabs): New
proc.
* g++.dg/cpp0x/alias-decl-debug-0.C: Restrict to stabs targets.
* g++.dg/other/PR23205.C: Likewise.
* g++.dg/other/pr23205-2.C: Likewise.
* gcc.dg/20040813-1.c: Likewise.
* gcc.dg/darwin-20040809-2.c: Likewise.
* objc.dg/stabs-1.m: Likewise.
From-SVN: r231747
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we check for a the isl compute timeout function added in isl 0.13.
That means GCC could still be configured with isl 0.13, 0.14, and 0.15.
* config/isl.m4 (ISL_CHECK_VERSION): Check for
isl_ctx_get_max_operations.
* configure: Regenerate.
gcc/
* config.in: Regenerate.
* configure: Regenerate.
* configure.ac: Remove checks for functions that exist in isl 0.13 or
later.
* graphite-isl-ast-to-gimple.c: Remove #ifdefs and code for isl 0.12.
* graphite-optimize-isl.c: Same.
* graphite-poly.c: Same.
* graphite-sese-to-poly.c: Same.
* graphite.h: Add comment for isl 0.14.
* toplev.c (print_version): Print isl version.
Co-Authored-By: Sebastian Pop <s.pop@samsung.com>
From-SVN: r231706
|