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AgeCommit message (Expand)AuthorFilesLines
2022-05-10Avoid andb %dil when optimizing for size.Roger Sayle2-7/+28
2022-05-10Fix internal error with vectorization on SPARCEric Botcazou1-2/+2
2022-05-10rs6000: avoid peeking eof after __vectorJiufu Guo1-4/+5
2022-05-09i386: Adjust -fzero-call-used-regs to always use XOR [PR101891]Qing Zhao1-65/+28
2022-05-09Implement permutation with pslldq + psrldq + por when pshufb is not available.liuhongt1-0/+107
2022-05-09Optimize vec_setv8{hi,hf}_0 + pmovzxbq to pmovzxbq.liuhongt1-4/+41
2022-05-09RISC-V: Fix wrong expansion for arch-canonicalizeKito Cheng1-3/+5
2022-05-06rs6000: Ignore fusion option flags for inlining test [PR102059]Michael Meissner1-0/+5
2022-05-06aarch64: remove useless GPF_TF_F16 iteratorChristophe Lyon1-3/+0
2022-05-04arm: Restrict support of vectors of boolean immediates (PR target/104662)Christophe Lyon1-0/+3
2022-05-03Objective-C, NeXT: Adjust symbol marking to match host tools.Iain Sandoe1-0/+2
2022-05-03i386: Optimize _mm_storeu_si16 w/o SSE4 [PR105079]Uros Bizjak1-0/+20
2022-05-01rs6000: "Y" is DS-form, not DQ-formSegher Boessenkool1-1/+1
2022-04-29i386: Optimize double-word negation [PR51954]Uros Bizjak1-0/+44
2022-04-28i386: Improve ix86_expand_int_movccJakub Jelinek1-2/+1
2022-04-28i386: Fix up ix86_gimplify_va_arg [PR105331]Jakub Jelinek1-0/+1
2022-04-28loongarch: ignore zero-size fields in calling conventionXi Ruoyao1-0/+3
2022-04-27LoongArch: Add fdiv define_expand template.Lulu Cheng1-0/+6
2022-04-27LoongArch: Add '(clobber (mem:BLK (scratch)))' to PLV instruction templates.Lulu Cheng1-12/+28
2022-04-27PR102024 - IBM Z: Add psabi diagnosticsAndreas Krebbel2-104/+105
2022-04-26rs6000: Move V2DI vec_neg under power8-vector [PR105271]Kewen Lin1-3/+3
2022-04-26GCN: Make "gang-private data-share memory exhausted" error more verboseThomas Schwinge1-2/+3
2022-04-26i386: Fix up ICE with -mveclibabi={acml,svml} [PR105367]Jakub Jelinek1-2/+4
2022-04-25target/89125 - BSD and math functionsSteve Kargl1-1/+1
2022-04-25AVX512F: Add missing macro for mask(z?)_scalf_s[sd] [PR 105339]Hongyu Wang1-20/+56
2022-04-23i386: Improve ix86_expand_int_movcc [PR105338]Jakub Jelinek1-4/+21
2022-04-22rs6000: Fix pack for soft-float (PR105334)Segher Boessenkool1-2/+43
2022-04-21rs6000: Disparage lfiwzx and similarSegher Boessenkool1-11/+11
2022-04-19sparc: Preserve ORIGINAL_REGNO in epilogue_renumber [PR105257]Jakub Jelinek1-2/+14
2022-04-15i386: Correct target attribute for crc32 intrinsicsHongyu Wang1-18/+7
2022-04-14s390: Add scheduler description for z16.Robin Dapp4-6/+2592
2022-04-13aarch64: Make sure the UF divides the VF [PR105254]Richard Sandiford1-4/+8
2022-04-13i386: Fix infinite loop under -mrelax-cmpxchg-loop [PR 103069]Hongyu Wang1-0/+1
2022-04-12Let nvptx-as figure out the target architecture [PR97348]Thomas Schwinge2-6/+0
2022-04-12Revert "[nvptx] Use --no-verify for sm_30"Thomas Schwinge1-1/+1
2022-04-12Revert "[nvptx] Fix ASM_SPEC workaround for sm_30"Thomas Schwinge1-18/+4
2022-04-12arm: remove unnecessary armv9-a multilib variant [PR104144]Przemyslaw Wirkus2-24/+10
2022-04-12i386: i386-expand formatting fixesJakub Jelinek2-18/+31
2022-04-12i386: Fix ICE caused by ix86_emit_i387_log1p [PR105214]Jakub Jelinek1-0/+5
2022-04-12IBM zSystems: Add support for z16 as CPU name.Andreas Krebbel6-24/+25
2022-04-12LoongArch: Fix bug for tmpdir-g++.dg-struct-layout-1/t033.chenglulu1-3/+5
2022-04-11rs6000: Handle pcrel sibcalls to longcall functions [PR104894]Peter Bergner1-2/+11
2022-04-11rs6000: Fix unpack for no-direct-move (PR103623)Segher Boessenkool1-4/+4
2022-04-11RISC-V: Support -misa-spec for arch-canonicalize and multilib-generator. [PR1...Kito Cheng2-9/+37
2022-04-11RISC-V: Sync arch-canonicalize and riscv-common.ccKito Cheng1-21/+37
2022-04-10[committed] Minor bfin codegen bugfixJeff Law1-1/+1
2022-04-08aarch64: PR target/105157 Increase number of cores TARGET_CPU_DEFAULT can encodeAndre Vieira2-6/+16
2022-04-07AArch64: fix ls64 intrinsics expansion [PR104409]Tamar Christina4-3/+13
2022-04-07AArch64: Fix left fold sum reduction RTL patterns [PR104049]Tamar Christina1-42/+28
2022-04-07Refine and/ior/xor/andn masked patterns for V*HFmode.liuhongt1-22/+12
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