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AgeCommit message (Expand)AuthorFilesLines
2016-05-02predicates.md (nonimm_ssenomem_operand): New predicate.Uros Bizjak2-55/+41
2016-05-02Fix warnings, update source code.Claudiu Zissulescu1-4/+5
2016-05-02[ARC] Add new ARCv2 instructions.Claudiu Zissulescu6-157/+304
2016-05-02sh.md (*negnegt, *movtt): Remove.Oleg Endo1-19/+0
2016-05-02re PR target/52898 (SH Target: Inefficient DImode comparisons)Oleg Endo3-115/+13
2016-05-01constraints.md (BC): Only allow -1 operands.Uros Bizjak3-26/+33
2016-05-01sh.md (push, [...]): Remove constraints.Oleg Endo1-17/+17
2016-05-01rs6000.c (altivec_expand_lv_builtin): Do not use switch statement on instruct...Eric Botcazou1-92/+80
2016-05-01sh.h (TARGET_SH4): Remove and use default implementation.Oleg Endo3-69/+59
2016-05-01linux.h (SH_DIV_STRATEGY_DEFAULT, [...]): Remove.Yoshinori Sato2-14/+0
2016-05-01predicates.md (any_register_operand, [...]): Delete.Oleg Endo3-159/+77
2016-04-30config.guess: Remove SH5 support.Oleg Endo1-10/+2
2016-04-30Handle -fcilkplus in Mac OS X LINK_COMMAND_SPECRainer Orth1-0/+1
2016-04-30sh.c (register_sh_passes, [...]): Remove TARGET_SH1 checks.Oleg Endo3-84/+60
2016-04-30[RS6000] Allow saving of fixed regs.Alan Modra1-80/+87
2016-04-30[RS6000] Split SAVRES_STRATEGYAlan Modra1-17/+18
2016-04-30[RS6000] PR69645, -ffixed-reg ignoredAlan Modra1-11/+28
2016-04-30[RS6000] Simplify setting of fixed_regs[RS6000_PIC_OFFSET_TABLE_REGNUM]Alan Modra1-9/+4
2016-04-29altivec.h: Change definitions of vec_xl and vec_xst.Bill Schmidt6-2/+364
2016-04-29re PR target/69810 (PowerPC64: unrecognizable insn)David Edelsohn1-9/+37
2016-04-29i386.md (unspec): Add UNSPEC_PROBE_STACK.Uros Bizjak1-0/+25
2016-04-29i386.md (operations with memory inputs setting flags peephole2): Remove uneed...Uros Bizjak1-35/+40
2016-04-29arc.md (*loadqi_update): Replace use of 'rI' constraint with 'rCm2' constrain...Andrew Burgess1-8/+8
2016-04-29predicates.md (constm1_operand): Fix comparison.Uros Bizjak1-1/+1
2016-04-29longlong.h (umul_ppmm): Remove SHMEDIA checks.Oleg Endo4-39/+19
2016-04-29S/390: Improve documentation of s390_reload_costs.Dominik Vogt1-2/+4
2016-04-29S/390: Replace LDER with LDR.Andreas Krebbel3-10/+10
2016-04-29S/390: Memory constraint cleanupUlrich Weigand5-230/+259
2016-04-29[ARC] Fix unwanted match for sign extend 16-bit constant.Claudiu Zissulescu4-5/+27
2016-04-29i386.md (Load+RegOp to Mov+MemOp peephole2): Use SWI mode iterator.Uros Bizjak1-23/+31
2016-04-28re PR target/70858 (__builtin_ia32_bextr_u64 ICE with '-m32 -march=core-avx2')Jakub Jelinek1-7/+7
2016-04-28rs6000: Clean up rs6000_stack_info a bitSegher Boessenkool1-151/+127
2016-04-28i386.md (peephole2s for operations with memory inputs): Use SWI mode iterator.Uros Bizjak1-52/+34
2016-04-28arc.c (arc_print_operand): Print integer 'H' / 'L'Joern Rennecke1-7/+5
2016-04-28arc.h (SYMBOL_FLAG_CMEM): Define.Joern Rennecke5-57/+429
2016-04-28arc.h (SYMBOL_FLAG_CMEM): Define.Joern Rennecke6-51/+134
2016-04-28rs6000: Rename insn_chain_scanned_p to spe_insn_chain_scanned_pSegher Boessenkool1-4/+4
2016-04-28constraints.md (Usd): Convert to define_constraint.Andrew Burgess1-7/+11
2016-04-28re PR target/70821 (x86_64: __atomic_fetch_add/sub() uses XADD rather than DE...Jakub Jelinek1-0/+30
2016-04-28arc-common.c (arc_handle_option): Add NPS400 support, setup defaults.Andrew Burgess4-1/+16
2016-04-28nds32: Fix casesi (PR70668)Segher Boessenkool1-5/+3
2016-04-28i386.md (zeroing peephole2): Use general_reg_operand.Uros Bizjak1-10/+6
2016-04-28This patch adds support for the signed and unsigned int versions of the...Bill Seurer3-6/+67
2016-04-28i386.md (sse4_1_round<mode>2): Add avx512f alternative.Jakub Jelinek2-14/+19
2016-04-28[ARC] Pass mfpuda to assembler.Claudiu Zissulescu1-1/+1
2016-04-28[ARC] Fix FPX/FPUDA code gen when compiling for big-endian.Claudiu Zissulescu2-18/+21
2016-04-28[AArch64] Define WORD_REGISTER_OPERATIONS to zero and comment whyKyrylo Tkachov1-1/+6
2016-04-28[ARC] Don't use drsub* instructions when selecting fpuda.Claudiu Zissulescu2-4/+11
2016-04-28i386.md (*fop_<mode>_1_mixed): Do not check for mult_operator when calculatin...Uros Bizjak1-41/+47
2016-04-28[ARC] Add TLS support.Claudiu Zissulescu6-147/+477
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