| Age | Commit message (Expand) | Author | Files | Lines |
|---|
| 2013-05-06 | mips.c: Include tree-pass.h. | Steven Bosscher | 1 | -5/+41 |
| 2013-05-06 | re PR target/57106 (-fcompare-debug failure with -O2 -fschedule-insns -funrol... | Uros Bizjak | 1 | -2/+3 |
| 2013-05-06 | linux.h (DEFAULT_ASM_ENDIAN): Define. | Alan Modra | 4 | -11/+17 |
| 2013-05-06 | sysv4.h (ENDIAN_SELECT): Define, extracted from | Alan Modra | 2 | -39/+40 |
| 2013-05-06 | rs6000.md (bswapdi 2nd splitter): Don't swap words twice for little-endian. | Alan Modra | 1 | -11/+23 |
| 2013-05-06 | re PR target/55303 ([SH] Add support for clips / clipu instructions) | Oleg Endo | 4 | -0/+181 |
| 2013-05-05 | config.gcc (hppa*-*-*): Remove MASK_BIG_SWITCH from CPU default. | Steven Bosscher | 7 | -201/+63 |
| 2013-05-05 | sse.md (*vec_extract<ssevecmodelower>_0): Merge from sse2_stored and *sse2_st... | Uros Bizjak | 2 | -77/+65 |
| 2013-05-04 | rs6000.c (INT_P): Reformat. | Segher Boessenkool | 1 | -19/+15 |
| 2013-05-04 | predicates.md (reg_or_add_cint_operand, [...]): Delete "HOST_BITS_PER_WIDE_IN... | Segher Boessenkool | 3 | -300/+33 |
| 2013-05-04 | re PR target/57150 (GCC when targeting power7 spills long double using VSX in... | Michael Meissner | 2 | -6/+20 |
| 2013-05-03 | i386.md (isa): Add x64_sse4_noavx and x64_avx members. | Uros Bizjak | 2 | -57/+28 |
| 2013-05-03 | [AArch64] Correct simd_fabd comment text. | Vidya Praveen | 1 | -1/+1 |
| 2013-05-03 | [AArch64] Support scalar FABD | Vidya Praveen | 1 | -0/+11 |
| 2013-05-02 | re PR rtl-optimization/56732 (ICE in advance_target_bb) | Greta Yorsh | 1 | -1/+2 |
| 2013-05-02 | AArch64 fix for LDR/STR from/to S and D regs | Ian Bolton | 1 | -2/+2 |
| 2013-05-02 | AArch64 Support for BICS in the backend | Ian Bolton | 1 | -0/+66 |
| 2013-05-01 | [AArch64] Refactor reduc_<su>plus patterns. | James Greenhalgh | 5 | -254/+140 |
| 2013-05-01 | [AArch64] Rewrite v<max,min><nm><q><v>_<sfu><8, 16, 32, 64> intrinsics using ... | James Greenhalgh | 1 | -362/+277 |
| 2013-05-01 | [AArch64] Fold max and min reduction builtins to tree. | James Greenhalgh | 1 | -0/+15 |
| 2013-05-01 | [AArch64] Refactor vector max and min RTL and builtins. | James Greenhalgh | 4 | -79/+105 |
| 2013-05-01 | [AArch64] Rewrite vca<ge, gt, le, lt> Neon patterns in C. | James Greenhalgh | 1 | -176/+104 |
| 2013-05-01 | [AArch64] Add combiner patterns for FAC instructions | James Greenhalgh | 2 | -0/+20 |
| 2013-05-01 | [AArch64] Add special case when expanding vcond with arms {-1, -1}, {0, 0}. | James Greenhalgh | 1 | -18/+69 |
| 2013-05-01 | [AArch64] Remap neon vcmp functions to C/TREE | James Greenhalgh | 3 | -339/+1147 |
| 2013-05-01 | [AArch64] Improve description of <F>CM instructions in RTL | James Greenhalgh | 5 | -52/+205 |
| 2013-05-01 | thumb2.md (thumb2_smaxsi3,thumb2_sminsi3): Convert define_insn to define_insn... | Greta Yorsh | 1 | -63/+329 |
| 2013-04-30 | thumb2.md (thumb2_incscc, [...]): Delete. | Greta Yorsh | 1 | -26/+0 |
| 2013-04-30 | Committed as obvious. | Greta Yorsh | 1 | -5/+5 |
| 2013-04-30 | gcc: arm: linux-eabi: fix handling of armv4 bx fixups when linking | Mike Frysinger | 2 | -2/+6 |
| 2013-04-29 | re PR target/44578 (GCC generates MMX instructions but fails to generate "emms") | Uros Bizjak | 1 | -2/+2 |
| 2013-04-29 | re PR target/57098 (ICE: in extract_insn, at recog.c:2154 (unrecognizable ins... | Uros Bizjak | 1 | -3/+3 |
| 2013-04-29 | [AArch64] Support LDR/STR from/to S and D registers | Ian Bolton | 1 | -8/+12 |
| 2013-04-29 | arm.md (store_minmaxsi): Use only when optimize_insn_for_size_p. | Kyrylo Tkachov | 1 | -1/+1 |
| 2013-04-29 | re PR target/57108 ([4.7/4.8/4.9] SH internal compiler error: in int_mode_for... | Christian Bruel | 1 | -1/+1 |
| 2013-04-29 | [AArch64] fcvt instructions - arm_neon.h changes. | James Greenhalgh | 1 | -726/+431 |
| 2013-04-29 | [AArch64] Add vector fix, fixuns, fix_trunc, fixuns_trunc standard patterns | James Greenhalgh | 2 | -0/+28 |
| 2013-04-29 | [AArch64] Vectorize over more math.h functions. | James Greenhalgh | 1 | -0/+18 |
| 2013-04-29 | re PR target/54349 (_mm_cvtsi128_si64 unnecessary stores value at stack) | Uros Bizjak | 6 | -33/+50 |
| 2013-04-29 | [AArch64] Implement vector float->double widening and double->float narrowing. | James Greenhalgh | 2 | -0/+108 |
| 2013-04-29 | [AArch64] Add vector int to float conversions. | James Greenhalgh | 4 | -0/+30 |
| 2013-04-29 | [AArch64] Map fcvt intrinsics to builtin name directly. | James Greenhalgh | 4 | -24/+85 |
| 2013-04-29 | [AArch64] Fix order of modes to lroundmn2 standard names. | James Greenhalgh | 1 | -1/+1 |
| 2013-04-29 | [AArch64] Convert NEON frint implementations to use builtins. | James Greenhalgh | 1 | -165/+139 |
| 2013-04-29 | [AArch64] Map frint intrinsics to standard pattern names directly. | James Greenhalgh | 5 | -25/+23 |
| 2013-04-29 | predicates.md (general_vector_operand): New predicate. | Jakub Jelinek | 3 | -12/+45 |
| 2013-04-27 | * config/i386/i386.c (ix86_expand_call): Make cregs_size unsigned. | Jakub Jelinek | 1 | -1/+2 |
| 2013-04-27 | re PR target/56866 (with '-O3 -march=bdver2' misscompiles glibc-2.17/crypt/sh... | Jakub Jelinek | 2 | -2/+5 |
| 2013-04-26 | i386.md (type, unit): Fix long lines. | Uros Bizjak | 1 | -11/+18 |
| 2013-04-25 | [AArch64] Describe the 'BSL' RTL pattern more accurately. | James Greenhalgh | 2 | -18/+31 |
