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2024-05-07[RISC-V] [PATCH v2] Enable inlining str* by defaultJeff Law2-4/+11
2024-05-07Rename "x86 Windows Options" to "Cygwin and MinGW Options"Zac Walker4-12/+12
2024-05-07aarch64: Add SEH to machine_functionZac Walker1-0/+6
2024-05-07aarch64: Add Cygwin and MinGW environments for AArch64Zac Walker2-0/+177
2024-05-07Exclude i386 functionality from aarch64 buildZac Walker3-3/+18
2024-05-07Rename section and encoding functions from i386 which will be used in aarch64Zac Walker3-26/+26
2024-05-07Reuse MinGW from i386 for AArch64Zac Walker13-10/+13
2024-05-07aarch64: Add aarch64-w64-mingw32 COFFZac Walker1-0/+91
2024-05-07aarch64: Mark x18 register as a fixed register for MS ABIZac Walker2-2/+39
2024-05-07aarch64: Preserve mem info on change of base for ldp/stp [PR114674]Alex Coplan1-4/+4
2024-05-07Remove obsolete Solaris 11.3 supportRainer Orth2-22/+10
2024-05-07Extend usdot_prodv*qi with vpmaddwd when AVXVNNI/AVX512VNNI is not available.liuhongt1-14/+41
2024-05-07Support dot_prod optabs for 64-bit vector.liuhongt1-0/+195
2024-05-07Optimize 64-bit vector permutation with punpcklqdq + 128-bit vector pshuf.liuhongt1-0/+71
2024-05-07pru: New validation pass for minrtDimitar Dimitrov3-0/+76
2024-05-07pru: Refactor to use passes definition fileDimitar Dimitrov5-27/+36
2024-05-07pru: Use HOST_WIDE_INT_1U macroDimitar Dimitrov1-2/+4
2024-05-07pru: Drop usage of ATTRIBUTE_UNUSEDDimitar Dimitrov3-17/+11
2024-05-07pru: Skip register save if function will not returnDimitar Dimitrov1-0/+4
2024-05-07pru: Add pattern variants for zero extending destinationDimitar Dimitrov1-6/+32
2024-05-07pru: Optimize the extzv and insv patternsDimitar Dimitrov1-9/+95
2024-05-07pru: Implement zero fill for 64-bit registersDimitar Dimitrov1-8/+10
2024-05-07pru: Implement TARGET_ADDRESS_COSTDimitar Dimitrov1-0/+25
2024-05-07PR target/106060: Improved SSE vector constant materialization on x86.Roger Sayle2-2/+364
2024-05-06[PATCH 1/1] RISC-V: Add Zfbfmin extension to the -march= optionXiao Zeng1-0/+2
2024-05-06[RISC-V] Add support for _Bfloat16Xiao Zeng5-32/+77
2024-05-06So another constant synthesis improvement.Jeff Law1-2/+58
2024-05-06AVR: ipa/92606 - Don't optimize PROGMEM data against non-PROGMEM.Georg-Johann Lay1-0/+6
2024-05-03RISC-V: miscll comment fixes [NFC]Vineet Gupta2-3/+5
2024-05-02[committed][RISC-V] Fix nearbyint failure on rv32 and formatting nitsJeff Law1-31/+34
2024-05-02[RFA][RISC-V] Improve constant synthesis for constants with 2 bits setJeff Law3-14/+76
2024-05-01[committed] [RISC-V] Trivial pattern cleanupJeff Law2-6/+7
2024-05-01[committed] [RISC-V] Fix detection of store pair fusion casesJeff Law1-20/+37
2024-04-30This is almost exclusively Jivan's work. His original post:Jivan Hakobyan4-22/+204
2024-04-29RISC-V: Refine the condition for add additional vars in RVV cost modeldemin.han1-8/+15
2024-04-29RISC-V: Fix ICE for legitimize move on subreg const_poly_int [PR114885]Pan Li1-0/+44
2024-04-29RISC-V: Fix parsing of Zic* extensionsChristoph Müllner1-2/+2
2024-04-29MIPS: Add MIN/MAX.fmt instructions support for MIPS R6Jie Mei4-4/+58
2024-04-28Adjust alternative *k to ?k for avx512 mask in zero_extend patternsliuhongt1-8/+8
2024-04-28s390: avoid peeking eof after __vectorJiufu Guo1-1/+3
2024-04-27aarch64: Use vec_perm_indices::new_shrunk_vector in aarch64_evpc_reencodeAndrew Pinski1-19/+5
2024-04-27LoongArch: Add constraints for bit string operation define_insn_and_split's [...Xi Ruoyao1-8/+8
2024-04-26RISC-V: Add -X to link specFangrui Song3-0/+3
2024-04-26AArch64: Cleanup memset expansionWilco Dijkstra1-122/+35
2024-04-26AArch64: Remove AARCH64_EXTRA_TUNE_NO_LDP_STP_QREGSWilco Dijkstra6-37/+8
2024-04-26amdgcn: Add gfx90c targetFrederik Harwath7-2/+26
2024-04-25bpf: set PREFERRED_DEBUGGING_TYPE to BTF_DEBUGDavid Faust1-0/+5
2024-04-25bpf: avoid issues with CO-RE and -gtoggleDavid Faust1-2/+5
2024-04-25bpf: default to using pseudo-C assembly syntax by defaultJose E. Marchesi2-2/+4
2024-04-25arm: Zero/Sign extends for CMSE securityRichard Ball1-0/+69
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