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AgeCommit message (Expand)AuthorFilesLines
2018-01-05RTEMS/EPIPHANY: Add RTEMS supportSebastian Huber1-0/+28
2018-01-04re PR target/83554 (ICE: in ix86_mitigate_rop, at config/i386/i386.c:41274 wi...Jakub Jelinek2-4/+4
2018-01-04PR83680: Inverted test in arm_vectorize_vec_perm_constRichard Sandiford1-1/+1
2018-01-04re PR target/83387 (PowerPC64: Infinite loops in do_reload() with -msoft-float)Peter Bergner1-1/+2
2018-01-04PR83675: Restore TARGET_VIS2 check for SPARC vec_perm_constRichard Sandiford1-0/+3
2018-01-04re PR rtl-optimization/83628 (performance regression when accessing arrays on...Uros Bizjak3-30/+41
2018-01-03[AArch64] Rewrite aarch64_simd_valid_immediateRichard Sandiford6-204/+227
2018-01-03poly_int: GET_MODE_SIZERichard Sandiford1-2/+4
2018-01-03poly_int: GET_MODE_BITSIZERichard Sandiford1-1/+3
2018-01-03re PR target/83641 (-fstack-clash-protection generates incorrect CFI on i386)Jeff Law1-4/+22
2018-01-03x86: don't use AVX512BW vmovdqu variants without -mavx512bwJan Beulich1-2/+8
2018-01-03Update copyright years.Jakub Jelinek1528-1543/+1543
2018-01-03poly_int: vec_perm_indices element typeRichard Sandiford1-1/+1
2018-01-03poly_int: PUSH_ROUNDINGRichard Sandiford20-33/+80
2018-01-03poly_int: current_vector_size and TARGET_AUTOVECTORIZE_VECTOR_SIZESRichard Sandiford5-22/+35
2018-01-03poly_int: get_mask_modeRichard Sandiford1-1/+1
2018-01-03rs6000.md (floor<mode>2): Add support for IEEE 128-bit round to integer instr...Michael Meissner1-0/+41
2018-01-02rs6000-string.c (expand_block_move): Allow the use of unaligned VSX load/stor...Aaron Sawdey1-3/+3
2018-01-02rs6000-p8swap.c (swap_feeds_both_load_and_store): New function.Bill Schmidt1-0/+40
2018-01-02RISC-V: Fix for icache flush issue on multicore processors.Andrew Waterman2-0/+8
2018-01-02New CONST_VECTOR layoutRichard Sandiford2-26/+28
2018-01-02Make vec_perm_indices use new vector encodingRichard Sandiford4-21/+12
2018-01-02Remove vec_perm_const optabRichard Sandiford30-684/+334
2018-01-02re PR target/81616 (Update -mtune=generic for the current Intel and AMD proce...Jan Hubicka1-2/+2
2018-01-02re PR target/81616 (Update -mtune=generic for the current Intel and AMD proce...Jan Hubicka1-8/+8
2017-12-31re PR target/83536 (One 'false' too much in r255699 for mingw target (in conf...Jakub Jelinek1-1/+1
2017-12-30sse.md (vgf2p8affineinvqb_<mode><mask_name>, [...]): Formatting fixes.Jakub Jelinek1-145/+154
2017-12-28[rs6000] Use gen_int_mode in ieee_128bit_negative_zeroRichard Sandiford2-2/+2
2017-12-28m68k.md (ashrdi3_const1, [...]): Add CC_STATUS_INIT.Andreas Schwab1-1/+5
2017-12-27aarch64-simd.md (aarch64_ld1x2<VQ:mode>): New.Kugan Vivekanandarajah3-1/+389
2017-12-27Disable -gstatement-frontiers for nvptxTom de Vries1-0/+2
2017-12-25re PR target/83488 (ICE on a CET test-case)Jakub Jelinek6-366/+399
2017-12-22re PR target/83488 (ICE on a CET test-case)Jakub Jelinek2-26/+26
2017-12-22Enable AVX512BITALGJulia Koval12-5/+522
2017-12-22This is a follow up patch for pr83488 to fix an error in setting...Igor Tsimbalist4-45/+45
2017-12-22re PR middle-end/83487 (ICE in expand_call, at calls.c:4098)Jakub Jelinek1-0/+2
2017-12-21t-aarch64-linux (MULTILIB_OSDIRNAMES): Fix triplet for ilp32.Steve Ellcey1-1/+1
2017-12-21t-aarch64-linux (MULTILIB_OSDIRNAMES): Handle multi-arch for ilp32.Andrew Pinski1-1/+1
2017-12-21re PR target/83467 (ICE: in assign_by_spills, at lra-assigns.c:1476: unable t...Uros Bizjak1-10/+16
2017-12-21[patch AArch64] Do not perform a vector splat for vector initialisation if it...James Greenhalgh1-3/+45
2017-12-21[arm] Specify +dotprod support for Cortex-A55 and Cortex-A75 in native system...Kyrylo Tkachov1-2/+2
2017-12-21re PR target/83488 (ICE on a CET test-case)Jakub Jelinek4-200/+175
2017-12-21poly_int: argument sizesRichard Sandiford17-35/+43
2017-12-21poly_int: frame allocationsRichard Sandiford10-10/+10
2017-12-21poly_int: get_inner_reference & co.Richard Sandiford1-1/+1
2017-12-21[AArch64] Tweak aarch64_classify_address interfaceRichard Sandiford4-31/+45
2017-12-20poly_int: TRULY_NOOP_TRUNCATIONRichard Sandiford3-3/+3
2017-12-20constraints.md (J, K, L): Use IN_RANGE macro.Eric Botcazou3-6/+6
2017-12-20[arm] PR target/82975: Guard against reg_renumber being NULL in arm.hKyrylo Tkachov1-4/+1
2017-12-20Enable VPCLMULQDQ supportJulia Koval10-7/+154
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