riscv-gnu-toolchain/gcc.git - Unnamed repository; edit this file 'description' to name the repository.

Age	Commit message (Expand)	Author	Files	Lines
2022-12-27	riscv: Restructure callee-saved register save/restore code	Christoph Müllner	1	-28/+67
2022-12-27	riscv: attr: Synchronize comments with code	Christoph Müllner	1	-1/+4
2022-12-27	gcc: xtensa: use define_c_enums instead of define_constants	Max Filippov	1	-21/+25
2022-12-27	xtensa: Generate density instructions in set_frame_ptr	Takayuki 'January June' Suwa	1	-2/+5
2022-12-27	xtensa: Change GP_RETURN{,_REG_COUNT} to GP_RETURN_{FIRST,LAST}	Takayuki 'January June' Suwa	2	-7/+7
2022-12-27	xtensa: Clean up xtensa_expand_prologue	Takayuki 'January June' Suwa	1	-2/+8
2022-12-27	xtensa: Tabify, and trim trailing spaces	Takayuki 'January June' Suwa	7	-116/+113
2022-12-27	RISC-V: Fix ICE of visiting non-existing block in CFG.	Ju-Zhe Zhong	1	-11/+10
2022-12-27	RISC-V: Fix ICE for avl_info deprecated copy and pp_print error.	Ju-Zhe Zhong	2	-24/+9
2022-12-27	rs6000: Rework option -mpowerpc64 handling [PR106680]	Kewen Lin	1	-9/+28
2022-12-26	x86: Add a new option -mdaz-ftz to enable FTZ and DAZ flags in MXCSR.	liuhongt	2	-1/+5
2022-12-25	Use movss/movsd to implement V4SI/V2DI VEC_PERM on x86.	Roger Sayle	3	-17/+19
2022-12-23	PR target/107548: Handle vec_select in STV on x86.	Roger Sayle	1	-0/+50
2022-12-23	PR target/106933: Limit TImode STV to SSA-like def-use chains on x86.	Roger Sayle	1	-0/+18
2022-12-23	RISC-V: Fix vle constraints	Ju-Zhe Zhong	1	-8/+8
2022-12-23	RISC-V: Support vle.v/vse.v intrinsics	Ju-Zhe Zhong	13	-76/+506
2022-12-23	RISC-V: Update vsetvl/vsetvlmax intrinsics to the latest api name.	Ju-Zhe Zhong	1	-0/+1
2022-12-23	RISC-V: Remove side effects of vsetvl pattern in RTL.	Ju-Zhe Zhong	2	-1/+27
2022-12-23	RISC-V: Remove side effects of vsetvl/vsetvlmax intriniscs in properties	Ju-Zhe Zhong	1	-5/+0
2022-12-23	RISC-V: Fix incorrect annotation	Ju-Zhe Zhong	1	-9/+9
2022-12-23	RISC-V: Fix muti-line condition format	Ju-Zhe Zhong	1	-8/+8
2022-12-22	aarch64: Fix plugin header install	Jakub Jelinek	1	-4/+4
2022-12-22	Zen4 tuning part 2	Jan Hubicka	5	-11/+29
2022-12-22	Update znver4 costs	Jan Hubicka	1	-30/+31
2022-12-21	nvptx: support bar.red instruction	Chung-Lin Tang	2	-0/+131
2022-12-20	rs6000: Fix the wrong location of OPTION_MASK_P10_FUSION setting hunk	Kewen Lin	1	-4/+4
2022-12-20	rs6000: Raise error for __vector_{quad,pair} uses without MMA enabled [PR106736]	Kewen Lin	3	-3/+48
2022-12-20	rs6000: Optimize cmp on rotated 16bits constant	Jiufu Guo	3	-1/+133
2022-12-19	arm: correctly define __ARM_FEATURE_CLZ	Richard Earnshaw	1	-1/+5
2022-12-19	RISC-V: Remove unit-stride store from ta attribute	Ju-Zhe Zhong	1	-1/+1
2022-12-19	RISC-V: Support VSETVL PASS for RVV support	Ju-Zhe Zhong	7	-35/+3075
2022-12-19	RISC-V: Fix RVV machine mode attribute configuration	Ju-Zhe Zhong	1	-19/+19
2022-12-19	aarch64: PR target/108140 Handle NULL target in data intrinsic expansion	Kyrylo Tkachov	1	-1/+1
2022-12-19	hwasan: Add libhwasan_preinit.o	Jakub Jelinek	1	-1/+2
2022-12-19	RISC-V: Change vlmul printing rule	Ju-Zhe Zhong	3	-26/+30
2022-12-19	rs6000: use li;x?oris to build constant	Jiufu Guo	1	-6/+31
2022-12-19	x86: Don't add crtfastmath.o for -shared	liuhongt	1	-1/+1
2022-12-17	rs6000: Add Rust support to traceback table	Segher Boessenkool	1	-0/+1
2022-12-16	Suppress -fstack-protector warning on hppa.	John David Anglin	1	-0/+3
2022-12-16	RISC-V: Fix up some wording in the mcpu/mtune comment	Palmer Dabbelt	1	-1/+1
2022-12-16	Fix intrin name in Intel CMPccXADD	Haochen Jiang	1	-4/+4
2022-12-14	AArch64: div-by-255, ensure that arguments are registers. [PR107988]	Tamar Christina	1	-8/+8
2022-12-13	i386: Fix up concat_{5,6,7} patterns [PR108044]	Jakub Jelinek	1	-15/+32
2022-12-13	AArch64: Fix ILP32 tbranch	Tamar Christina	1	-1/+1
2022-12-13	rs6000: enable cbranchcc4	Haochen Gui	1	-0/+10
2022-12-12	AArch64: Enable TARGET_CONST_ANCHOR	Wilco Dijkstra	2	-1/+14
2022-12-12	AArch64: Fix vector re-interpretation between partial SIMD modes	Tamar Christina	1	-4/+6
2022-12-12	AArch64: Support new tbranch optab.	Tamar Christina	2	-8/+27
2022-12-12	aarch64: Make existing V2HF be usable.	Tamar Christina	4	-39/+86
2022-12-12	aarch64: Add __ARM_FEATURE_PAUTH and __ARM_FEATURE_BTI ACLE defines	Kyrylo Tkachov	2	-0/+7