aboutsummaryrefslogtreecommitdiff
path: root/gcc/config
AgeCommit message (Expand)AuthorFilesLines
2019-06-12Initial TI PRU GCC portDimitar Dimitrov12-0/+5709
2019-06-12[nvptx] Assert fork has at most one join in nvptx_find_parTom de Vries1-0/+1
2019-06-12[arm] Implement usadv16qi and ssadv16qi standard namesPrzemyslaw Wirkus3-0/+31
2019-06-11mips.c (mips_final_postscan_insn): Modify call to `mips_set_text_contents_typ...Faraz Shahbazker1-3/+13
2019-06-11Do not enable -mpcrel by default at the current timeMichael Meissner2-10/+13
2019-06-11re PR target/90811 ([nvptx] ptxas error on OpenMP offloaded code)Jakub Jelinek1-1/+1
2019-06-10* config/i386/i386.md (absneg fp_reg splitter): Fix operator mode.Uros Bizjak1-1/+1
2019-06-10i386-protos.h (ix86_split_fp_absneg_operator): New prototype.Uros Bizjak5-201/+223
2019-06-10[ARC] Update RTX costs.Claudiu Zissulescu1-30/+39
2019-06-10[ARC] Improve code gen when compiling for sizeClaudiu Zissulescu4-121/+342
2019-06-07re PR target/90751 (-fpatchtable-function-entry broken on hppa-linux-gnu-gcc...John David Anglin4-13/+30
2019-06-06RISC-V: Move STARTFILE_PREFIX_SPEC into target OS files.Jim Wilson3-6/+12
2019-06-06Add -march=gfx906 for AMD GCN.Andrew Stubbs2-2/+5
2019-06-06[AArch64] PR tree-optimization/90332: Implement vec_init<M><N> where N is a v...Kyrylo Tkachov3-2/+51
2019-06-06MSP430: Use minimal code size library shift functions when optimizing for sizeJozef Lawrynowicz1-6/+9
2019-06-06MSP430: Emulate 16-bit shifts with rotate insn when src operand is in memoryJozef Lawrynowicz1-6/+9
2019-06-06sse.md (define_mode_suffix vecmemsuffix): New.Hongtao Liu1-3/+7
2019-06-05c-decl.c (start_decl): Adjust quoting and hyphenation in diagnostics.Martin Sebor1-1/+1
2019-06-05alpha.c (direct_return): Move down after struct machine_function definition...Richard Henderson2-187/+109
2019-06-05re PR target/89803 (Missing AVX512 intrinsics)Hongtao Liu5-14/+36
2019-06-05rs6000: Remove wp and wqSegher Boessenkool4-79/+55
2019-06-05rs6000: Add p9kf and p9tf isa valuesSegher Boessenkool1-1/+9
2019-06-05rs6000: More simplificationSegher Boessenkool1-42/+23
2019-06-05rs6000: <VSs> -> <sd>pSegher Boessenkool2-60/+47
2019-06-05rs6000: VSa->wa for some more casesSegher Boessenkool1-3/+3
2019-06-05rs6000: Simplify <VSa> for VSX_TISegher Boessenkool1-4/+4
2019-06-05rs6000: ww -> waSegher Boessenkool5-29/+17
2019-06-05rs6000: Remove Ftrad, Fvsx, Fs; add s and sdSegher Boessenkool2-49/+45
2019-06-05rs6000: Simplify <VSa> for VSX_WSegher Boessenkool1-16/+16
2019-06-05rs6000: Simplify VS[ra]* for VSX_[BDF]Segher Boessenkool1-110/+97
2019-06-04re PR target/78263 (Compile failure with AltiVec library on PPC64le and -std=...Bill Schmidt1-3/+5
2019-06-04rs6000: wf -> waSegher Boessenkool5-51/+37
2019-06-04AARCH64: ILP32: Fix aarch64_asan_shadow_offsetAndrew Pinski1-1/+4
2019-06-04rs6000: wd -> waSegher Boessenkool5-46/+34
2019-06-04rs6000: Delete Fv2Segher Boessenkool1-41/+36
2019-06-04rs6000: Delete VS_64regSegher Boessenkool1-7/+2
2019-06-04rs6000: ws -> waSegher Boessenkool5-38/+30
2019-06-04rs6000: wv -> v+p7vSegher Boessenkool5-28/+20
2019-06-04rs6000: wi->wa, wt->waSegher Boessenkool5-63/+47
2019-06-04aarch64: fix asm visibility for extern symbolsSzabolcs Nagy2-2/+3
2019-06-04PR90689, ICE in extract_insn on ppc64leAlan Modra1-3/+1
2019-06-04rs6000: Delete -mmfpgprSegher Boessenkool6-39/+21
2019-06-04rs6000: Delete wgSegher Boessenkool4-25/+11
2019-06-03aarch64: emit .variant_pcs for aarch64_vector_pcs symbol referencesSzabolcs Nagy3-0/+46
2019-06-03[AArch64] Emit TARGET_DOTPROD-specific sequence for <us>sadv16qiKyrylo Tkachov1-2/+20
2019-06-03re PR target/88837 ([SVE] Poor vector construction code in VL-specific mode)Prathamesh Kulkarni3-1/+270
2019-06-03re PR target/89750 (Wrong code for _mm_comi_round_ss)H.J. Lu1-15/+134
2019-05-31i386: Don't insert ENDBR after NOTE_INSN_DELETED_LABELH.J. Lu1-4/+1
2019-05-31mips.c (mips_expand_builtin_insn): Swap the 1st and 3rd operands of the fmadd...Jeff Law1-0/+13
2019-05-31New .md construct: define_insn_and_rewriteRichard Sandiford1-53/+34
generated by cgit v1.1 at 2024-11-12 16:05:38 +0000