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2022-01-03Update copyright years.Jakub Jelinek1-1/+1
2021-01-04Update copyright years.Jakub Jelinek1-1/+1
2020-01-01Update copyright years.Jakub Jelinek1-1/+1
From-SVN: r279813
2019-04-02linux64.h (ASAN_REJECT_SPEC): New macro.Eric Botcazou1-1/+1
* config/sparc/linux64.h (ASAN_REJECT_SPEC): New macro. (ASAN_CC1_SPEC): Use it in 64-bit mode. * config/sparc/sol2.h (ASAN_REJECT_SPEC): Remove superfluous colon. From-SVN: r270075
2019-01-01Update copyright years.Jakub Jelinek1-1/+1
From-SVN: r267494
2018-11-06Enable libsanitizer on Solaris (PR sanitizer/80953)Rainer Orth1-2/+5
gcc: PR sanitizer/80953 * config/sol2.h (ASAN_CC1_SPEC): Define. (LD_WHOLE_ARCHIVE_OPTION): Define. (LD_NO_WHOLE_ARCHIVE_OPTION): Define. (ASAN_REJECT_SPEC): Provide default. (LIBASAN_EARLY_SPEC): Define. (LIBTSAN_EARLY_SPEC): Define. (LIBLSAN_EARLY_SPEC): Define. * config/i386/sol2.h (CC1_SPEC): Redefine. (ASAN_REJECT_SPEC): Define. * config/sparc/sparc.c (sparc_asan_shadow_offset): Declare. (TARGET_ASAN_SHADOW_OFFSET): Define. (sparc_asan_shadow_offset): New function. * config/sparc/sol2.h (CC1_SPEC): Append ASAN_CC1_SPEC. (ASAN_REJECT_SPEC): Define. gcc/testsuite: PR sanitizer/80953 * c-c++-common/asan/alloca_loop_unpoisoning.c: Require alloca support. (foo): Use __builtin_alloca. libsanitizer: PR sanitizer/80953 * configure.tgt (sparc*-*-solaris2.11*): Enable. (x86_64-*-solaris2.11* | i?86-*-solaris2.11*): Enable. From-SVN: r265837
2018-07-17Fix coding style of ASM_OUTPUT_ALIGN.Martin Liska1-1/+1
2018-07-17 Martin Liska <mliska@suse.cz> * config/i386/att.h (ASM_OUTPUT_ALIGN): Fix spacing in order to fulfil coding style. * config/i386/cygming.h (ASM_OUTPUT_ALIGN): Likewise. * config/i386/gas.h (ASM_OUTPUT_MAX_SKIP_ALIGN): Likewise. * config/i386/x86-64.h (ASM_OUTPUT_MAX_SKIP_PAD): Likewise. * config/iq2000/iq2000.h (ASM_OUTPUT_ALIGN): Likewise. * config/pa/pa.h (ASM_OUTPUT_ALIGN): Likewise. * config/sparc/sol2.h (ASM_OUTPUT_ALIGN_WITH_NOP): Likewise. * config/sparc/sparc.h (ASM_OUTPUT_ALIGN): Likewise. * config/visium/visium.h (ASM_OUTPUT_ALIGN): Likewise. (ASM_OUTPUT_MAX_SKIP_ALIGN): Likewise. From-SVN: r262805
2018-01-03Update copyright years.Jakub Jelinek1-1/+1
From-SVN: r256169
2017-07-07Support for the SPARC M8 cpu.Jose E. Marchesi1-2/+12
This patch serie adds support for the SPARC M8 processor to GCC. The SPARC M8 processor implements the Oracle SPARC Architecture 2017. - bmask* instructions are put in their own instruction type. It makes little sense to have them in the same category than array instructions. - Similarly, VIS compare instructions are put in their own instruction type. This is to better accommodate subtypes, which are not quite the same than the subtypes of `visl' instructions. - The introduction of a new `subtype' insn attribute in sparc.md avoids the need for adjusting the instruction scheduler DFAs for previous cpu models every time a new cpu is introduced. - The full set of SPARC instructions used in sparc.md, and their position in the type/subtype hierarchy, is documented in a comment. This eases the modification of the DFA schedulers, and the addition of new cpus. - The M7 DFA scheduler is reworked: + To use the new type/subtype hierarchy. + The v3pipe insn attribute is no longer needed. + More accurate latencies for instructions. + The C4 core pipeline is documented in a comment in niagara7.md. - Support for -mcpu=m8 (we are thus suggesting to abandon the niagaraN denomination for M8 and later processors.) - Support for a new VIS level, VIS4B, covering the new VIS instructions introduced in OSA2017 and implemented in the M8. Also built-ins. - A M8 DFA scheduler: + Also based on the new type/subtype hierarchy. + The functional units in the C5 core are explicitly documented in a comment in m8.md. gcc/ChangeLog: * config/sparc/m8.md: New file. * config/sparc/sparc.md: Include m8.md. * config/sparc/sparc.opt: New option -mvis4b. * config/sparc/sparc.c (dump_target_flag_bits): Handle MASK_VIS4B. (sparc_option_override): Handle VIS4B. (enum sparc_builtins): Define SPARC_BUILTIN_DICTUNPACK{8,16,32}, SPARC_BUILTIN_FPCMP{LE,GT,EQ,NE}{8,16,32}SHL, SPARC_BUILTIN_FPCMPU{LE,GT}{8,16,32}SHL, SPARC_BUILTIN_FPCMPDE{8,16,32}SHL and SPARC_BUILTIN_FPCMPUR{8,16,32}SHL. (check_constant_argument): New function. (sparc_vis_init_builtins): Define builtins __builtin_vis_dictunpack{8,16,32}, __builtin_vis_fpcmp{le,gt,eq,ne}{8,16,32}shl, __builtin_vis_fpcmpu{le,gt}{8,16,32}shl, __builtin_vis_fpcmpde{8,16,32}shl and __builtin_vis_fpcmpur{8,16,32}shl. (sparc_expand_builtin): Check that the constant operands to __builtin_vis_fpcmp*shl and _builtin_vis_dictunpack* are indeed constant and in range. * config/sparc/sparc-c.c (sparc_target_macros): Handle TARGET_VIS4B. * config/sparc/sparc.h (SPARC_IMM2_P): Define. (SPARC_IMM5_P): Likewise. * config/sparc/sparc.md (cpu_feature): Add new feagure "vis4b". (enabled): Handle vis4b. (UNSPEC_DICTUNPACK): New unspec. (UNSPEC_FPCMPSHL): Likewise. (UNSPEC_FPUCMPSHL): Likewise. (UNSPEC_FPCMPDESHL): Likewise. (UNSPEC_FPCMPURSHL): Likewise. (cpu_feature): New CPU feature `vis4b'. (dictunpack{8,16,32}): New insns. (FPCSMODE): New mode iterator. (fpcscond): New code iterator. (fpcsucond): Likewise. (fpcmp{le,gt,eq,ne}{8,16,32}{si,di}shl): New insns. (fpcmpu{le,gt}{8,16,32}{si,di}shl): Likewise. (fpcmpde{8,16,32}{si,di}shl): Likewise. (fpcmpur{8,16,32}{si,di}shl): Likewise. * config/sparc/constraints.md: Define constraints `q' for unsigned 2-bit integer constants and `t' for unsigned 5-bit integer constants. * config/sparc/predicates.md (imm5_operand_dictunpack8): New predicate. (imm5_operand_dictunpack16): Likewise. (imm5_operand_dictunpack32): Likewise. (imm2_operand): Likewise. * doc/invoke.texi (SPARC Options): Document -mvis4b. * doc/extend.texi (SPARC VIS Built-in Functions): Document the ditunpack* and fpcmp*shl builtins. * config.gcc: Handle m8 in --with-{cpu,tune} options. * config.in: Add HAVE_AS_SPARC6 define. * config/sparc/driver-sparc.c (cpu_names): Add entry for the SPARC M8. * config/sparc/sol2.h (CPP_CPU64_DEFAULT_SPEC): Define for TARGET_CPU_m8. (ASM_CPU32_DEFAUILT_SPEC): Likewise. (CPP_CPU_SPEC): Handle m8. (ASM_CPU_SPEC): Likewise. * config/sparc/sparc-opts.h (enum processor_type): Add PROCESSOR_M8. * config/sparc/sparc.c (m8_costs): New struct. (sparc_option_override): Handle TARGET_CPU_m8. (sparc32_initialize_trampoline): Likewise. (sparc64_initialize_trampoline): Likewise. (sparc_issue_rate): Likewise. (sparc_register_move_cost): Likewise. * config/sparc/sparc.h (TARGET_CPU_m8): Define. (CPP_CPU64_DEFAULT_SPEC): Define for M8. (ASM_CPU64_DEFAULT_SPEC): Likewise. (CPP_CPU_SPEC): Handle M8. (ASM_CPU_SPEC): Likewise. (AS_M8_FLAG): Define. * config/sparc/sparc.md: Add m8 to the cpu attribute. * config/sparc/sparc.opt: New option -mcpu=m8 for sparc targets. * configure.ac (HAVE_AS_SPARC6): Check for assembler support for M8 instructions. * configure: Regenerate. * doc/invoke.texi (SPARC Options): Document -mcpu=m8 and -mtune=m8. * config/sparc/niagara7.md: Rework the DFA scheduler to use insn subtypes. * config/sparc/sparc.md: Remove the `v3pipe' insn attribute. ("*movdi_insn_sp32"): Do not set v3pipe. ("*movsi_insn"): Likewise. ("*movdi_insn_sp64"): Likewise. ("*movsf_insn"): Likewise. ("*movdf_insn_sp32"): Likewise. ("*movdf_insn_sp64"): Likewise. ("*zero_extendsidi2_insn_sp64"): Likewise. ("*sign_extendsidi2_insn"): Likewise. ("*mov<VM32:mode>_insn"): Likewise. ("*mov<VM64:mode>_insn_sp64"): Likewise. ("*mov<VM64:mode>_insn_sp32"): Likewise. ("<plusminus_insn><VADDSUB:mode>3"): Likewise. ("<vlop:code><VL:mode>3"): Likewise. ("*not_<vlop:code><VL:mode>3"): Likewise. ("*nand<VL:mode>_vis"): Likewise. ("*<vlnotop:code>_not1<VL:mode>_vis"): Likewise. ("*<vlnotop:code>_not2<VL:mode>_vis"): Likewise. ("one_cmpl<VL:mode>2"): Likewise. ("faligndata<VM64:mode>_vis"): Likewise. ("alignaddrsi_vis"): Likewise. ("alignaddrdi_vis"): Likweise. ("alignaddrlsi_vis"): Likewise. ("alignaddrldi_vis"): Likewise. ("fcmp<gcond:code><GCM:gcm_name><P:mode>_vis"): Likewise. ("bmaskdi_vis"): Likewise. ("bmasksi_vis"): Likewise. ("bshuffle<VM64:mode>_vis"): Likewise. ("cmask8<P:mode>_vis"): Likewise. ("cmask16<P:mode>_vis"): Likewise. ("cmask32<P:mode>_vis"): Likewise. ("pdistn<P:mode>_vis"): Likewise. ("<vis3_addsub_ss_patname><VASS:mode>3"): Likewise. * config/sparc/sparc.md ("subtype"): New insn attribute. ("*wrgsr_sp64"): Set insn subtype. ("*rdgsr_sp64"): Likewise. ("alignaddrsi_vis"): Likewise. ("alignaddrdi_vis"): Likewise. ("alignaddrlsi_vis"): Likewise. ("alignaddrldi_vis"): Likewise. ("<plusminus_insn><VADDSUB:mode>3"): Likewise. ("fexpand_vis"): Likewise. ("fpmerge_vis"): Likewise. ("faligndata<VM64:mode>_vis"): Likewise. ("bshuffle<VM64:mode>_vis"): Likewise. ("cmask8<P:mode>_vis"): Likewise. ("cmask16<P:mode>_vis"): Likewise. ("cmask32<P:mode>_vis"): Likewise. ("fchksm16_vis"): Likewise. ("v<vis3_shift_patname><GCM:mode>3"): Likewise. ("fmean16_vis"): Likewise. ("fp<plusminus_insn>64_vis"): Likewise. ("<plusminus_insn>v8qi3"): Likewise. ("<vis3_addsub_ss_patname><VASS:mode>3"): Likewise. ("<vis4_minmax_patname><VMMAX:mode>3"): Likewise. ("<vis4_uminmax_patname><VMMAX:mode>3"): Likewise. ("<vis3_addsub_ss_patname>v8qi3"): Likewise. ("<vis4_addsub_us_patname><VAUS:mode>3"): Likewise. ("*movqi_insn"): Likewise. ("*movhi_insn"): Likewise. ("*movsi_insn"): Likewise. ("movsi_pic_gotdata_op"): Likewise. ("*movdi_insn_sp32"): Likewise. ("*movdi_insn_sp64"): Likewise. ("movdi_pic_gotdata_op"): Likewise. ("*movsf_insn"): Likewise. ("*movdf_insn_sp32"): Likewise. ("*movdf_insn_sp64"): Likewise. ("*zero_extendhisi2_insn"): Likewise. ("*zero_extendqihi2_insn"): Likewise. ("*zero_extendqisi2_insn"): Likewise. ("*zero_extendqidi2_insn"): Likewise. ("*zero_extendhidi2_insn"): Likewise. ("*zero_extendsidi2_insn_sp64"): Likewise. ("ldfsr"): Likewise. ("prefetch_64"): Likewise. ("prefetch_32"): Likewise. ("tie_ld32"): Likewise. ("tie_ld64"): Likewise. ("*tldo_ldub_sp32"): Likewise. ("*tldo_ldub1_sp32"): Likewise. ("*tldo_ldub2_sp32"): Likewise. ("*tldo_ldub_sp64"): Likewise. ("*tldo_ldub1_sp64"): Likewise. ("*tldo_ldub2_sp64"): Likewise. ("*tldo_ldub3_sp64"): Likewise. ("*tldo_lduh_sp32"): Likewise. ("*tldo_lduh1_sp32"): Likewise. ("*tldo_lduh_sp64"): Likewise. ("*tldo_lduh1_sp64"): Likewise. ("*tldo_lduh2_sp64"): Likewise. ("*tldo_lduw_sp32"): Likewise. ("*tldo_lduw_sp64"): Likewise. ("*tldo_lduw1_sp64"): Likewise. ("*tldo_ldx_sp64"): Likewise. ("*mov<VM32:mode>_insn"): Likewise. ("*mov<VM64:mode>_insn_sp64"): Likewise. ("*mov<VM64:mode>_insn_sp32"): Likewise. * config/sparc/sparc.md ("type"): New insn type viscmp. ("fcmp<gcond:code><GCM:gcm_name><P:mode>_vis"): Set insn type to viscmp. ("fpcmp<gcond:code>8<P:mode>_vis"): Likewise. ("fucmp<gcond:code>8<P:mode>_vis"): Likewise. ("fpcmpu<gcond:code><GCM:gcm_name><P:mode>_vis"): Likewise. * config/sparc/niagara7.md ("n7_vis_logical_v3pipe"): Handle viscmp. ("n7_vis_logical_11cycle"): Likewise. * config/sparc/niagara4.md ("n4_vis_logical"): Likewise. * config/sparc/niagara2.md ("niag3_vis": Likewise. * config/sparc/niagara.md ("niag_vis"): Likewise. * config/sparc/ultra3.md ("us3_fga"): Likewise. * config/sparc/ultra1_2.md ("us1_fga_double"): Likewise. * config/sparc/sparc.md: New instruction type `bmask'. (bmaskdi_vis): Use the `bmask' type. (bmasksi_vis): Likewise. * config/sparc/ultra3.md (us3_array): Likewise. * config/sparc/niagara7.md (n7_array): Likewise. * config/sparc/niagara4.md (n4_array): Likewise. * config/sparc/niagara2.md (niag2_vis): Likewise. (niag3_vis): Likewise. * config/sparc/niagara.md (niag_vis): Likewise. gcc/testsuite/ChangeLog: * gcc.target/sparc/dictunpack.c: New file. * gcc.target/sparc/fpcmpdeshl.c: Likewise. * gcc.target/sparc/fpcmpshl.c: Likewise. * gcc.target/sparc/fpcmpurshl.c: Likewise. * gcc.target/sparc/fpcmpushl.c: Likewise. From-SVN: r250049
2017-05-18Minor SPARC T4 and M7 fixes and additions.Sheldon Lobo1-1/+1
* config/sparc/sparc.c (sparc_option_override): Set function alignment for -mcpu=niagara7 to 64 to match the I$ line. * config/sparc/sparc.h (BRANCH_COST): Set the SPARC M7 branch latency to 1. * config/sparc/sparc.h (BRANCH_COST): Set the SPARC T4 branch latency to 2. * config/sparc/sol2.h: Fix a ASM_CPU32_DEFAULT_SPEC typo. * gcc.target/sparc/niagara7-align.c: New test. From-SVN: r248184
2017-01-01Update copyright years.Jakub Jelinek1-1/+1
From-SVN: r243994
2016-06-06sparc: support for the SPARC M7 and VIS 4.0Jose E. Marchesi1-2/+12
gcc/ChangeLog: 2016-06-06 Jose E. Marchesi <jose.marchesi@oracle.com> * config/sparc/sparc.md (cpu): Add niagara7 cpu type. Include the M7 SPARC DFA scheduler. New attribute v3pipe. Annotate insns with v3pipe where appropriate. Define cpu_feature vis4. Add lzd instruction type and set it on clzdi_sp64 and clzsi_sp64. Add (V8QI "8") to vbits. Add insns {add,sub}v8qi3 Add insns ss{add,sub}v8qi3 Add insns us{add,sub}{v8qi,v4hi}3 Add insns {min,max}{v8qi,v4hi,v2si}3 Add insns {minu,maxu}{v8qi,v4hi,v2si}3 Add insns fpcmp{le,gt,ule,ug,ule,ugt}{8,16,32}_vis. * config/sparc/niagara4.md: Add a comment explaining the discrepancy between the documented latenty numbers and the implemented ones. * config/sparc/niagara7.md: New file. * configure.ac (HAVE_AS_SPARC5_VIS4): Define if the assembler supports SPARC5 and VIS 4.0 instructions. * configure: Regenerate. * config.in: Likewise. * config.gcc: niagara7 is a supported cpu in sparc*-*-* targets. * config/sparc/sol2.h (ASM_CPU32_DEFAUILT_SPEC): Set for TARGET_CPU_niagara7. (ASM_CPU64_DEFAULT_SPEC): Likewise. (CPP_CPU_SPEC): Handle niagara7. (ASM_CPU_SPEC): Likewise. * config/sparc/sparc-opts.h (processor_type): Add PROCESSOR_NIAGARA7. (mvis4): New option. * config/sparc/sparc.h (TARGET_CPU_niagara7): Define. (AS_NIAGARA7_FLAG): Define. (ASM_CPU64_DEFAULT_SPEC): Set for niagara7. (CPP_CPU64_DEFAULT_SPEC): Likewise. (CPP_CPU_SPEC): Handle niagara7. (ASM_CPU_SPEC): Likewise. * config/sparc/sparc.c (niagara7_costs): Define. (sparc_option_override): Handle niagara7 and adjust cache-related parameters with better values for niagara cpus. Also support VIS4. (sparc32_initialize_trampoline): Likewise. (sparc_use_sched_lookahead): Likewise. (sparc_issue_rate): Likewise. (sparc_register_move_cost): Likewise. (dump_target_flag_bits): Support VIS4. (sparc_vis_init_builtins): Likewise. (sparc_builtins): Likewise. * config/sparc/sparc-c.c (sparc_target_macros): Define __VIS__ for VIS4 4.0. * config/sparc/driver-sparc.c (cpu_names): Add SPARC-M7 and UltraSparc M7. * config/sparc/sparc.opt (sparc_processor_type): New value niagara7. * config/sparc/visintrin.h (__attribute__): Prototypes for the VIS4 builtins. * doc/invoke.texi (SPARC Options): Document -mcpu=niagara7 and -mvis4. * doc/extend.texi (SPARC VIS Built-in Functions): Document the VIS4 builtins. gcc/testsuite/ChangeLog: 2016-06-06 Jose E. Marchesi <jose.marchesi@oracle.com> * gcc.target/sparc/vis4misc.c: New file. * gcc.target/sparc/fpcmp.c: Likewise. * gcc.target/sparc/fpcmpu.c: Likewise. From-SVN: r237132
2016-05-30config.gcc (sparc*-*-*): Support cpu_32, cpu_64, tune_32 and tune_64.Jose E. Marchesi1-3/+23
2016-05-30 Jose E. Marchesi <jose.marchesi@oracle.com> * config.gcc (sparc*-*-*): Support cpu_32, cpu_64, tune_32 and tune_64. * doc/install.texi (--with-cpu-32, --with-cpu-64): Document support on SPARC. * config/sparc/linux64.h (OPTION_DEFAULT_SPECS): Add entries for cpu_32, cpu_64, tune_32 and tune_64. * config/sparc/sol2.h (OPTION_DEFAULT_SPECS): Likewise. From-SVN: r236897
2016-01-04Update copyright years.Jakub Jelinek1-1/+1
From-SVN: r232055
2015-09-24Support PIE on SolarisRainer Orth1-0/+2
gcc/testsuite: * lib/target-supports.exp (check_effective_target_pie): Check for PIE support on Solaris 11.x and 12. libgcc: * config.host (*-*-solaris2*): Add t-crtstuff-pic to tmake_file. Add crtbeginS.o, crtendS.o to extra_parts if libgcc_cv_solaris_crts. * config/sol2/gmon.c: (monstartup): Don't write trailing NUL of messages. (internal_mcount): Likewise. * config/sol2/t-sol2 (crtp.o, crtpg.o, gmon.o): Compile with crt_compile, add CRTSTUFF_T_CFLAGS_S. gcc: * configure.ac (gcc_cv_ld_pie): Check for gld >= 2.26 on Solaris. Check for ld -type pie on Solaris 11.x and 12. * configure: Regenerate. * config.in: Regenerate. * gcc.c (LD_PIE_SPEC): Allow redefinition. * config/sol2.h (STARTFILE_CRTBEGIN_SPEC): Define. (STARTFILE_SPEC): Use it. (ENDFILE_CRTEND_SPEC): Define. (ENDFILE_SPEC): Use it and ENDFILE_ARCH_SPEC. (SUBTARGET_EXTRA_SPECS): Add STARTFILE_CRTBEGIN_SPEC, ENDFILE_ARCH_SPEC, ENDFILE_CRTEND_SPEC. [HAVE_LD_PIE && HAVE_SOLARIS_CRTS] (LD_PIE_SPEC): Define. (!(HAVE_LD_PIE && HAVE_SOLARIS_CRTS)] (LINK_PIE_SPEC): Define. * config/i386/sol2.h (ENDFILE_SPEC): Remove. (ENDFILE_ARCH_SPEC): Define. * config/sparc/sol2.h (ENDFILE_ARCH_SPEC): Define. From-SVN: r228078
2015-05-09bitmap.c, [...]: Add space between string literal and macro name.Jason Merrill1-1/+1
* bitmap.c, c/c-aux-info.c, cfg.c, cfghooks.c, cgraph.c, config/aarch64/aarch64.md config/alpha/vms.h, config/darwin.c, config/darwin.h, config/darwin9.h, config/elfos.h, config/i386/bsd.h, config/ia64/ia64.c, config/lm32/lm32.h, config/microblaze/microblaze.h, config/mips/mips.h, config/mmix/mmix.c, config/msp430/msp430.c, config/nios2/nios2.h, config/nvptx/nvptx.c, config/nvptx/nvptx.h, config/pa/pa.c, config/pa/pa.h, config/rs6000/rs6000.c, config/rs6000/sysv4.h, config/rs6000/xcoff.h, config/rx/rx.h, config/s390/s390.h, config/sparc/sol2.h, config/sparc/sparc.h, config/visium/visium.h, cppbuiltin.c, defaults.h, doc/invoke.texi, dwarf2cfi.c, dwarf2out.c, final.c, gcc.c, gcov-dump.c, gcov.c, ipa-cp.c, ipa-inline.c, ipa-polymorphic-call.c, ipa-profile.c, ipa-prop.c, ira-color.c, ira.c, loop-doloop.c, loop-iv.c, mcf.c, modulo-sched.c, predict.c, profile.c, stor-layout.c, toplev.c, tree-ssa-reassoc.c, value-prof.c, wide-int-print.cc: Add space between string literal and macro name. From-SVN: r222960
2015-01-05Update copyright years.Jakub Jelinek1-1/+1
From-SVN: r219188
2014-04-30Simplify Solaris 2 configurationRainer Orth1-15/+17
* config/sol2-10.h (TARGET_LIBC_HAS_FUNCTION): Move ... * config/sol2.h: ... here. * config/sol2-10.h: Remove. * config/sol2-bi.h (WCHAR_TYPE, WCHAR_TYPE_SIZE, WINT_TYPE) (WINT_TYPE_SIZE, MULTILIB_DEFAULTS, DEF_ARCH32_SPEC) (DEF_ARCH64_SPEC, ASM_CPU_DEFAULT_SPEC, LINK_ARCH64_SPEC_BASE) (LINK_ARCH64_SPEC, ARCH_DEFAULT_EMULATION, TARGET_LD_EMULATION) (LINK_ARCH_SPEC, SUBTARGET_EXTRA_SPECS): Move ... * config/sol2.h: ... here. (SECTION_NAME_FORMAT): Don't redefine. (STARTFILE_ARCH32_SPEC): Rename to ... (STARTFILE_ARCH_SPEC): ... this. (ASM_OUTPUT_ALIGNED_COMMON): Move ... * config/sparc/sol2.h: ... here. (SECTION_NAME_FORMAT): Don't undef. * config/i386/sol2.h (ASM_CPU_DEFAULT_SPEC) (SUBTARGET_EXTRA_SPECS): Remove. * config/sparc/sol2.h (ASM_CPU_DEFAULT_SPEC): Remove. * config/i386/sol2-bi.h (TARGET_SUBTARGET_DEFAULT) (MD_STARTFILE_PREFIX): Remove. (SUBTARGET_OPTIMIZATION_OPTIONS, ASM_CPU32_DEFAULT_SPEC) (ASM_CPU64_DEFAULT_SPEC, ASM_CPU_SPEC, ASM_SPEC, DEFAULT_ARCH32_P) (ARCH64_SUBDIR, ARCH32_EMULATION, ARCH64_EMULATION) (ASM_COMMENT_START, JUMP_TABLES_IN_TEXT_SECTION) (ASM_OUTPUT_DWARF_PCREL, ASM_OUTPUT_ALIGNED_COMMON) (USE_IX86_FRAME_POINTER, USE_X86_64_FRAME_POINTER): Move ... * config/i386/sol2.h: ... here. (TARGET_SUBTARGET_DEFAULT, SIZE_TYPE, PTRDIFF_TYPE): Remove. * config/i386/sol2-bi.h: Remove. * config/sol2.h (MD_STARTFILE_PREFIX): Remove. (LINK_ARCH32_SPEC_BASE): Remove /usr/ccs/lib/libp, /usr/ccs/lib. * config/i386/t-sol2-64: Rename to ... * config/i386/t-sol2: ... this. * config/sparc/t-sol2-64: Rename to ... * config/sparc/t-sol2: ... this. * config.gcc (*-*-solaris2*): Split sol2_tm_file into sol2_tm_file_head, sol2_tm_file_tail. Include ${cpu_type}/sol2.h before sol2.h. Remove sol2-10.h. (i[34567]86-*-solaris2* | x86_64-*-solaris2.1[0-9]*): Include i386/x86-64.h between sol2_tm_file_head and sol2_tm_file_tail. Remove i386/sol2-bi.h, sol2-bi.h from tm_file. Reflect i386/t-sol2-64 renaming. (sparc*-*-solaris2*): Remove sol2-bi.h from tm_file. Reflect sparc/t-sol2-64 renaming. From-SVN: r209931
2014-01-02Update copyright years in gcc/Richard Sandiford1-1/+1
From-SVN: r206289
2013-12-06re PR target/59316 (gcc.dg/atomic/c11-atomic-exec-5.c FAILs on Solaris/SPARC)Eric Botcazou1-0/+3
PR target/59316 * config/sparc/sparc.h (SPARC_LOW_FE_EXCEPT_VALUES): Define. * config/sparc/sol2.h (SPARC_LOW_FE_EXCEPT_VALUES): Redefine. * config/sparc/sparc.c (TARGET_INIT_BUILTINS): Move around. (TARGET_BUILTIN_DECL): Define. (TARGET_ATOMIC_ASSIGN_EXPAND_FENV): Likewise. (sparc32_initialize_trampoline): Adjust call to gen_flush. (enum sparc_builtins): New enumeral type. (sparc_builtins): New static array. (sparc_builtins_icode): Likewise. (def_builtin): Accept a separate icode and save the result. (def_builtin_const): Likewise. (sparc_fpu_init_builtins): New function. (sparc_vis_init_builtins): Pass the builtin code. (sparc_init_builtins): Call it if TARGET_FPU. (sparc_builtin_decl): New function. (sparc_expand_builtin): Deal with SPARC_BUILTIN_{LD,ST}FSR. (sparc_handle_vis_mul8x16): Use the builtin code. (sparc_fold_builtin): Likewise. Deal with SPARC_BUILTIN_{LD,ST}FSR and SPARC_BUILTIN_PDISTN. (compound_expr): New helper function. (sparc_atomic_assign_expand_fenv): New function. * config/sparc/sparc.md (unspecv): Reorder values, add UNSPECV_LDFSR and UNSPECV_STFSR. (flush, flushdi): Merge into single pattern. (ldfsr): New instruction. (stfsr): Likewise. From-SVN: r205735
2013-01-10Update copyright years in gcc/Richard Sandiford1-2/+1
From-SVN: r195098
2013-01-04Update Copyright years for files modified in 2011 and/or 2012.Jakub Jelinek1-1/+1
From-SVN: r194903
2012-11-15Add support for sparc fused compare-and-branch.David S. Miller1-37/+58
gcc/ 2012-11-15 David S. Miller <davem@davemloft.net> * configure.ac: Add check for assembler SPARC4 instruction support. * configure: Rebuild. * config.in: Add HAVE_AS_SPARC4 section. * config/sparc/sparc.opt (mcbcond): New option. * doc/invoke.texi: Document it. * config/sparc/constraints.md: New constraint 'A' for 5-bit signed immediates. * doc/md.texi: Document it. * config/sparc/sparc.c (dump_target_flag_bits): Handle MASK_CBCOND. (sparc_option_override): Likewise. (emit_cbcond_insn): New function. (emit_conditional_branch_insn): Call it. (emit_cbcond_nop): New function. (output_ubranch): Use cbcond, remove label arg. (output_cbcond): New function. * config/sparc/sparc-protos.h (output_ubranch): Update. (output_cbcond): Declare it. (emit_cbcond_nop): Likewise. * config/sparc/sparc.md (type attribute): New types 'cbcond' and uncond_cbcond. (emit_cbcond_nop): New attribute. (length attribute): Handle cbcond and uncond_cbcond. (in_call_delay attribute): Reject cbcond and uncond_cbcond. (in_branch_delay attribute): Likewise. (in_uncond_branch_delay attribute): Likewise. (in_annul_branch_delay attribute): Likewise. (*cbcond_sp32, *cbcond_sp64): New insn patterns. (jump): Rewrite into an expander. (*jump_ubranch, *jump_cbcond): New patterns. * config/sparc/niagara4.md: Match 'cbcond' in 'n4_cti'. * config/sparc/sparc.h (AS_NIAGARA4_FLAG): New macro, use it when target default is niagara4. (SPARC_SIMM5_P): Define. * config/sparc/sol2.h (AS_SPARC64_FLAG): Adjust. (AS_SPARC32_FLAG): Define. (ASM_CPU32_DEFAULT_SPEC, ASM_CPU64_DEFAULT_SPEC): Use AS_NIAGARA4_FLAG as needed. From-SVN: r193543
2012-11-11sparc.h (AS_NIAGARA3_FLAG): Tweak.Eric Botcazou1-2/+2
* config/sparc/sparc.h (AS_NIAGARA3_FLAG): Tweak. * config/sparc/sol2.h (TARGET_CPU_niagara4 support): Fix pasto. From-SVN: r193416
2011-10-14Fix mv8plus, allow targetting Linux or Solaris from other sparc host.David S. Miller1-1/+1
* config/sparc/sol2.h: Protect -m{cpu,tune}=native handling with a more complete cpp test. * config/sparc/linux64.h: Likewise. * config/sparc/linux.h: Likewise. * config/sparc/sparc.opt (sparc_debug): New target variable. (mdebug): New target option. * config/sparc/sparc.h (MASK_DEBUG_OPTIONS, MASK_DEBUG_ALL, TARGET_DEBUG_OPTIONS): New defines. * config/sparc/sparc.c (debug_target_flag_bits, debug_target_flags): New functions. (sparc_option_override): Add name strings back to cpu_table[]. Parse -mdebug string. When TARGET_DEBUG_OPTIONS is true, print out the target flags before and after override processing as well as the selected cpu. If MASK_V8PLUS, make sure that the selected cpu is at least v9. From-SVN: r180021
2011-09-25Add support for floating-point fused multiply-add on Sparc.David S. Miller1-4/+4
* configure.ac: Add feature check to make sure the assembler supports the FMAF, HPC, and VIS 3.0 instructions found on Niagara-3 and later cpus. * configure: Rebuild. * config.in: Likewise. * config/sparc/sparc.opt: New option '-mfmaf'. * config/sparc/sparc.md: Add float fused multiply-add patterns. * config/sparc/sparc.h (AS_NIAGARA3_FLAG): New macro. (ASM_CPU64_DEFAULT_SPEC, ASM_CPU_SPEC): Use it, as needed. * config/sparc/sol2.h (ASM_CPU32_DEFAULT_SPEC, ASM_CPU64_DEFAULT_SPEC, ASM_CPU_SPEC): Likewise. * config/sparc/sparc.c (sparc_option_override): Turn MASK_FMAF on by default for Niagara-3 and later. Turn it off if TARGET_FPU is disabled. (sparc_rtx_costs): Handle 'FMA'. * doc/invoke.texi: Document -mfmaf. From-SVN: r179174
2011-09-05sparc-opts.h (PROCESSOR_NIAGARA3, [...]): New.David S. Miller1-2/+26
* config/sparc/sparc-opts.h (PROCESSOR_NIAGARA3, PROCESSOR_NIAGARA4): New. * config/sparc/sparc.opt: Handle new processor types. * config/sparc/sparc.md: Add to "cpu" attribute. * config/sparc/sparc.h (TARGET_CPU_niagara3, TARGET_CPU_niagara4): New, treat as niagara2. * config/sparc/linux64.h: Handle niagara3 and niagara4 like niagara2. * config/sparc/sol2.h: Likewise. * config/sparc/niagara2.md: Schedule niagara3 like niagara2. * config/sparc/sparc.c (sparc_option_override): Add niagara3 and niagara4 handling. (sparc32_initialize_trampoline): Likewise. (sparc64_initialize_trampoline): Likewise. (sparc_use_sched_lookahead): Likewise. (sparc_issue_rate): Likewise. (sparc_register_move_cost): Likewise. * config/sparc/driver-sparc.c (cpu_names): Use niagara3 and niagara4 as appropriate. * doc/invoke.texi: Document new processor types. From-SVN: r178554
2011-08-08driver-sparc.c: New file.Rainer Orth1-0/+16
gcc: * config/sparc/driver-sparc.c: New file. * config/sparc/x-sparc: New file. * config.host: Use driver-sparc.o, sparc/x-sparc on sparc*-*-solaris2*. * config/sparc/sparc.opt (native): New value for enum processor_type. * config/sparc/sparc-opts.h (PROCESSOR_NATIVE): Declare. * config/sparc/sparc.c (sparc_option_override): Abort if PROCESSOR_NATIVE gets here. * config/sparc/sol2.h [__sparc__] (host_detect_local_cpu): Declare. (EXTRA_SPEC_FUNCTIONS, MCPU_MTUNE_NATIVE_SPECS, DRIVER_SELF_SPECS): Define. * doc/invoke.texi (SPARC Options, -mcpu): Document native. (SPARC Options, -mtune): Likewise. * configure.ac (EXTRA_GCC_LIBS): Check for libkstat. Substitute result. * configure: Regenerate. * Makefile.in (EXTRA_GCC_LIBS): Set. (xgcc$(exeext)): Add $(EXTRA_GCC_LIBS). (cpp$(exeext)): Likewise. gcc/cp: * Make-lang.in (g++$(exeext)): Add $(EXTRA_GCC_LIBS). gcc/fortran: * Make-lang.in (gfortran$(exeext)): Add $(EXTRA_GCC_LIBS). gcc/go: * Make-lang.in (gccgo$(exeext)): Add $(EXTRA_GCC_LIBS). gcc/java: * Make-lang.in ($(XGCJ)$(exeext)): Add $(EXTRA_GCC_LIBS). From-SVN: r177559
2011-08-01re PR debug/49887 (.debug_macro breaks many Solaris/SPARC tests)Rainer Orth1-4/+0
PR debug/49887 * config/sol2.c (solaris_code_end): Rename to solaris_file_end. * config/sol2-protos.h: Likewise. * config/i386/i386.c (ix86_code_end) [TARGET_SOLARIS]: Don't call solaris_code_end. * config/i386/sol2.h [!USE_GAS] (TARGET_ASM_FILE_END): Redefine. * config/sparc/sparc.c (sparc_file_end) [TARGET_SOLARIS]: Call solaris_file_end. * config/sparc/sol2.h (TARGET_ASM_CODE_END): Remove. From-SVN: r177020
2011-07-07re PR target/49660 (64-bit gcc doesn't enable -mv8plus with -m32 on ↵Eric Botcazou1-6/+7
Solaris/SPARC) PR target/49660 * config/sparc/sol2.h [TARGET_64BIT_DEFAULT] (TARGET_DEFAULT): Add MASK_V8PLUS, remove commented out flag and reorder. From-SVN: r176008
2011-07-07re PR bootstrap/39150 (Configure scripts have no 64-Bit Solaris defined ↵Rainer Orth1-10/+0
(only i386-solaris*).) gcc: PR target/39150 * configure.ac (gcc_cv_as_hidden): Also accept x86_64-*-solaris2.1[0-9]*. (gcc_cv_as_cfi_directive): Likewise. (gcc_cv_as_comdat_group_group): Likewise. (set_have_as_tls): Likewise. * configure: Regenerate. * config.gcc (i[34567]86-*-solaris2*): Also handle x86_64-*-solaris2.1[0-9]*. * config.host (i[34567]86-*-solaris2*): Likewise. * config/sparc/sol2.h (ASM_CPU_DEFAULT_SPEC): Remove. * config/sol2-bi.h (ASM_CPU_DEFAULT_SPEC): Redefine. [USE_GLD] (ARCH_DEFAULT_EMULATION): Define. (TARGET_LD_EMULATION): Use it. * config/i386/sol2.h (ASM_CPU_DEFAULT_SPEC): Define. (SUBTARGET_CPU_EXTRA_SPECS): Add asm_cpu_default. * config/i386/sol2-bi.h (ASM_CPU32_DEFAULT_SPEC): Define. (ASM_CPU64_DEFAULT_SPEC): Define. (ASM_CPU_SPEC): Use %(asm_cpu_default). (ASM_SPEC): Redefine. (DEFAULT_ARCH32_P): Define using TARGET_64BIT_DEFAULT. * config/host-solaris.c [__x86_64__] (TRY_EMPTY_VM_SPACE): Reduce. * doc/install.texi (Specific, amd64-*-solaris2.1[0-9]*): Document. (Specific, i?86-*-solaris2.10): Mention x86_64-*-solaris2.1[0-9]* configuration. (Specific, x86_64-*-solaris2.1[0-9]*): Document. gcc/ada: PR target/39150 * gcc-interface/Makefile.in: Handle x86_64-solaris2. libgcc: PR target/39150 * config.host (*-*-solaris2*): Handle x86_64-*-solaris2.1[0-9]* like i?86-*-solaris2.1[0-9]*. (i[34567]86-*-solaris2*): Also handle x86_64-*-solaris2.1[0-9]*. * configure.ac (i?86-*-solaris2*): Likewise. * configure: Regenerate. gcc/testsuite: PR target/39150 * gcc.misc-tests/linkage.exp: Handle x86_64-*-solaris2.1[0-9]*. toplevel: PR target/39150 * configure.ac (i[3456789]86-*-solaris2*): Also accept x86_64-*-solaris2.1[0-9]*. * configure: Regenerate. boehm-gc: PR target/39150 * configure.ac (i?86-*-solaris2.[89]): Also accept x86_64-*-solaris2.1?. * configure: Regenerate. gnattools: PR target/39150 * configure.ac (*86-*-solaris2*): Also accept x86_64-*-solaris2.1[0-9]*. * configure: Regenerate. libcpp: PR target/39150 * configure.ac (host_wide_int): Handle x86_64-*-solaris2.1[0-9] like i[34567]86-*-solaris2.1[0-9]*. * configure: Regenerate. libgo: PR target/39150 * config/libtool.m4: Handle x86_64-*-solaris2.1[0-9]* like i?86-*-solaris*. * configure: Regenerate. libjava: PR target/39150 * configure.host (x86_64-*): Add -Usun to libgcj_flags. (x86_64-*-solaris2.1[0-9]*): New case. (i?86-*-solaris2*): Also accept x86_64-*-solaris2.1[0-9]*. From-SVN: r175958
2011-07-07sol2.h (ASM_SPEC): Split into ...Rainer Orth1-0/+4
* config/sol2.h (ASM_SPEC): Split into ... (ASM_SPEC_BASE, ASM_PIC_SPEC): ... this. * config/i386/sol2.h (ASM_SPEC): Define using ASM_SPEC_BASE. * config/i386/sol2-bi.h (ASM_CPU_SPEC): Redefine. (ASM_SPEC): Use ASM_SPEC_BASE. * config/sparc/sol2.h (ASM_SPEC): Redefine. From-SVN: r175957
2011-06-28sol2-64.h (TARGET_DEFAULT): Remove.Rainer Orth1-1/+7
* config/sparc/sol2-64.h (TARGET_DEFAULT): Remove. (TARGET_64BIT_DEFAULT): Define. * config.gcc (sparc*-*-solaris2*): Move sparc/sol2-64.h to front of tm_file. * config/sparc/sol2.h [TARGET_64BIT_DEFAULT] (TARGET_DEFAULT): Define. From-SVN: r175593
2011-06-21usegld.h: New file.Rainer Orth1-76/+229
* config/usegld.h: New file. * config/sol2.h (PREFERRED_DEBUGGING_TYPE): Remove. (CPP_SUBTARGET_SPEC): Remove -compat-bsd support. (LIB_SPEC): Likewise. Search /lib. (LINK_ARCH32_SPEC_BASE): Remove -compat-bsd support. (RDYNAMIC_SPEC): Handle GNU ld. [HAVE_LD_EH_FRAME_HDR && TARGET_DL_ITERATE_PHDR] (LINK_EH_SPEC): Define. (SUPPORTS_INIT_PRIORITY): Only disable for Sun ld. (SUBTARGET_INSERT_ATTRIBUTES, SUBTARGET_ATTRIBUTE_TABLE): Define. [!USE_GAS] (NO_DBX_BNSYM_ENSYM): Redefine. (STACK_CHECK_STATIC_BUILTIN): Define. * config/sol2.opt (compat-bsd): Remove. * config/sol2-10.h (TARGET_C99_FUNCTIONS): Remove undef. * config/sol2-bi.h: New file. * config/sol2-gld.h: Remove. * config/i386/sol2.h (TLS_COMMON_ASM_OP): Only define if !USE_GAS. (NO_DBX_BNSYM_ENSYM): Remove. (SUBTARGET_INSERT_ATTRIBUTES, SUBTARGET_ATTRIBUTE_TABLE): Remove. (STACK_CHECK_STATIC_BUILTIN): Remove. Test USE_GLD instead of TARGET_GNU_LD. * config/i386/sol2-10.h: Rename to ... * config/i386/sol2-bi.h .. this. (SUBTARGET_EXTRA_SPECS): Redefine. (WCHAR_TYPE, WCHAR_TYPE_SIZE, WINT_TYPE, WINT_TYPE_SIZE): Remove. (MULTILIB_DEFAULTS): Remove. (DEFAULT_ARCH32_P): Define. (LINK_ARCH64_SPEC_BASE, LINK_ARCH64_SPEC): Remove. (ARCH64_SUBDIR): Define. Test USE_GLD instead of TARGET_GNU_LD. (I386_EMULATION): Rename to ... (ARCH32_EMULATION): ... this. (X86_64_EMULATION): Rename to ... (ARCH64_EMULATION): ... this. (TARGET_LD_EMULATION): Remove. (LINK_ARCH_SPEC): Remove. * config/i386/sol2-gas.h: Remove. * config/i386/t-sol2-10: Rename to ... * config/i386/t-sol2-64: ... this. * config/sparc/sol2.h (SPARC_DEFAULT_CMODEL): Redefine. (AS_SPARC64_FLAG): Define. (ASM_CPU32_DEFAULT_SPEC, ASM_CPU64_DEFAULT_SPEC): Redefine. (CPP_CPU64_DEFAULT_SPEC, ASM_CPU32_DEFAULT_SPEC): Redefine depending on TARGET_CPU_DEFAULT. (CPP_CPU_SPEC): Redefine. (ASM_CPU_SPEC): Handle DEFAULT_ARCH32_P. (CPP_CPU_DEFAULT_SPEC, ASM_CPU_DEFAULT_SPEC): Redefine. (CPP_ARCH32_SPEC, CPP_ARCH64_SPEC, CPP_ARCH_SPEC): Redefine. (ASM_ARCH_SPEC, ASM_ARCH32_SPEC, ASM_ARCH64_SPEC, ASM_ARCH_DEFAULT_SPEC): Redefine. (SUBTARGET_EXTRA_SPECS): Add LINK_ARCH32_SPEC, LINK_ARCH64_SPEC, LINK_ARCH_DEFAULT_SPEC. [USE_GLD] (ARCH32_EMULATION, ARCH64_EMULATION): Define. [USE_GLD] (LINK_ARCH32_SPEC, LINK_ARCH64_SPEC): Redefine. (ARCH64_SUBDIR): Define. (LINK_ARCH64_SPEC): Redefine. (CC1_SPEC): Redefine. (OPTION_DEFAULT_SPECS): Redefine. (MULTILIB_DEFAULTS): Define. (WCHAR_TYPE, WCHAR_TYPE_SIZE, WINT_TYPE, WINT_TYPE_SIZE): Redefine. [USE_GAS && HAVE_AS_TLS] (TARGET_SUN_TLS, TARGET_GNU_TLS): Redefine. [USE_GLD] (CTORS_SECTION_ASM_OP, DTORS_SECTION_ASM_OP): Undef. (NO_DBX_BNSYM_ENSYM): Remove. (SUBTARGET_INSERT_ATTRIBUTES, SUBTARGET_ATTRIBUTE_TABLE): Remove. (ASM_OUTPUT_ALIGN_WITH_NOP): Only define if !USE_GAS. (TARGET_ASM_NAMED_SECTION): Likewise. (STACK_CHECK_STATIC_BUILTIN): Remove. * config/sparc/sol2-bi.h: Remove. * config/sparc/sol2-gas-bi.h: Remove. * config/sparc/sol2-gas.h: Remove. * config/sparc/sol2-gld-bi.h: Remove. * config.gcc (i[34567]86-*-solaris2*, sparc*-*-solaris2*): Move common parts ... (*-*-solaris2*): ... here. From-SVN: r175245
2011-06-03linux.h (MD_UNWIND_SUPPORT): Remove.Rainer Orth1-2/+0
gcc: * config/alpha/linux.h (MD_UNWIND_SUPPORT): Remove. * config/alpha/osf5.h (MD_UNWIND_SUPPORT): Remove. * config/alpha/vms.h (MD_UNWIND_SUPPORT): Remove. * config/bfin/linux.h (MD_UNWIND_SUPPORT): Remove. * config/bfin/uclinux.h (MD_UNWIND_SUPPORT): Remove. * config/i386/linux.h (MD_UNWIND_SUPPORT): Remove. * config/i386/linux64.h (MD_UNWIND_SUPPORT): Remove. * config/i386/sol2.h (MD_UNWIND_SUPPORT): Remove. * config/i386/mingw32.h (MD_UNWIND_SUPPORT): Remove. * config/ia64/linux.h (MD_UNWIND_SUPPORT): Remove. * config/ia64/vms.h (MD_UNWIND_SUPPORT): Remove. * config/m68k/linux.h (MD_UNWIND_SUPPORT): Remove. * config/mips/linux.h (MD_UNWIND_SUPPORT): Remove. * config/pa/pa-hpux.h (MD_UNWIND_SUPPORT): Remove. * config/pa/pa32-linux.h (MD_UNWIND_SUPPORT): Remove. * config/rs6000/darwin.h (MD_UNWIND_SUPPORT): Remove. * config/rs6000/linux.h (MD_UNWIND_SUPPORT): Remove. * config/rs6000/linux64.h (MD_UNWIND_SUPPORT): Remove. * config/s390/linux.h (MD_UNWIND_SUPPORT): Remove. * config/s390/tpf.h (MD_UNWIND_SUPPORT): Remove. * config/sh/linux.h (MD_UNWIND_SUPPORT): Remove. * config/sparc/linux.h (MD_UNWIND_SUPPORT): Remove. * config/sparc/linux64.h (MD_UNWIND_SUPPORT): Remove. * config/sparc/sol2.h (MD_UNWIND_SUPPORT): Remove. * config/xtensa/linux.h (MD_UNWIND_SUPPORT): Remove. * config/alpha/linux-unwind.h: Move to ../libgcc/config/alpha. * config/alpha/osf5-unwind.h: Move to ../libgcc/config/alpha. * config/alpha/vms-unwind.h: Move to ../libgcc/config/alpha. * config/bfin/linux-unwind.h: Move to ../libgcc/config/bfin. * config/i386/linux-unwind.h: Move to ../libgcc/config/i386. * config/i386/sol2-unwind.h: Move to ../libgcc/config/i386. * config/i386/w32-unwind.h: Move to ../libgcc/config/i386. * config/ia64/linux-unwind.h: Move to ../libgcc/config/ia64. * config/ia64/vms-unwind.h: Move to ../libgcc/config/ia64. * config/m68k/linux-unwind.h: Move to ../libgcc/config/m68k. * config/mips/linux-unwind.h: Move to ../libgcc/config/mips. * config/pa/hpux-unwind.h: Move to ../libgcc/config/pa. * config/pa/linux-unwind.h: Move to ../libgcc/config/pa. * config/rs6000/darwin-unwind.h: Move to ../libgcc/config/rs6000. * config/rs6000/linux-unwind.h: Move to ../libgcc/config/rs6000. * config/s390/linux-unwind.h: Move to ../libgcc/config/s390. * config/s390/tpf-unwind.h: Move to ../libgcc/config/s390. * config/sh/linux-unwind.h: Move to ../libgcc/config/sh. * config/sparc/linux-unwind.h: Move to ../libgcc/config/sparc. * config/sparc/sol2-unwind.h: Move to ../libgcc/config/sparc. * config/xtensa/linux-unwind.h: Move to ../libgcc/config/xtensa. * config/darwin9.h (DARWIN_LIBSYSTEM_HAS_UNWIND): Remove. * system.h (MD_UNWIND_SUPPORT): Poison. * doc/tm.texi.in (Exception Handling, MD_UNWIND_SUPPORT): Remove. * doc/tm.texi: Regenerate. * unwind-dw2.c: Include md-unwind-support.h instead of MD_UNWIND_SUPPORT. * config/ia64/unwind-ia64.c: Likewise. * config/xtensa/unwind-dw2-xtensa.c: Likewise. libgcc: * config/alpha/linux-unwind.h: Move from ../gcc/config/alpha. * config/alpha/osf5-unwind.h: Move from ../gcc/config/alpha. * config/alpha/vms-unwind.h: Move from ../gcc/config/alpha. * config/bfin/linux-unwind.h: Move from ../gcc/config/bfin. * config/i386/linux-unwind.h: Move from ../gcc/config/i386. * config/i386/sol2-unwind.h: Move from ../gcc/config/i386. * config/i386/w32-unwind.h: Move from ../gcc/config/i386. Wrap in !__MINGW64__. * config/ia64/linux-unwind.h: Move from ../gcc/config/ia64. * config/ia64/vms-unwind.h: Move from ../gcc/config/ia64. * config/m68k/linux-unwind.h: Move from ../gcc/config/m68k. * config/mips/linux-unwind.h: Move from ../gcc/config/mips. * config/pa/hpux-unwind.h: Move from ../gcc/config/pa. * config/pa/linux-unwind.h: Move from ../gcc/config/pa. * config/rs6000/darwin-unwind.h: Move from ../gcc/config/rs6000. Wrap in !__LP64__. * config/rs6000/linux-unwind.h: Move from ../gcc/config/rs6000. * config/s390/linux-unwind.h: Move from ../gcc/config/s390. * config/s390/tpf-unwind.h: Move from ../gcc/config/s390. * config/sh/linux-unwind.h: Move from ../gcc/config/sh. * config/sparc/linux-unwind.h: Move from ../gcc/config/sparc. * config/sparc/sol2-unwind.h: Move from ../gcc/config/sparc. * config/xtensa/linux-unwind.h: Move from ../gcc/config/xtensa. * config/no-unwind.h: New file. * config.host (md_unwind_header): Document. Define. (alpha*-*-linux*, alpha*-dec-osf5.1*, alpha64-dec-*vms*, alpha*-dec-*vms*, bfin*-uclinux*, bfin*-linux-uclibc*, hppa*-*-linux*, hppa[12]*-*-hpux10*, hppa*64*-*-hpux11*, hppa[12]*-*-hpux11*): Set md_unwind_header. (i[34567]86-*-linux*): Handle i[34567]86-*-kopensolaris*-gnu. Set md_unwind_header. (x86_64-*-linux*, i[34567]86-*-solaris2*): Set md_unwind_header. (i[34567]86-*-cygwin*): Split from i[34567]86-*-mingw*. (i[34567]86-*-mingw*, ia64*-*-linux*, ia64-hp-*vms*, m68k-*-uclinux*, m68k-*-linux*, mips64*-*-linux*, mips*-*-linux*, powerpc-*-darwin*, powerpc-*-linux*, s390-*-linux*, s390x-*-linux*, s390x-ibm-tpf*, sh*-*-linux*, sparc-*-linux*, sparc*-*-solaris2*, sparc64-*-linux*, xtensa*-*-linux*): Set md_unwind_header. * configure.ac: Link md-unwind-support.h to $md_unwind_header. * configure: Regenerate. From-SVN: r174613
2011-06-01crtfastmath.c: Include <signal.h>, <ucontext.h>.Rainer Orth1-5/+0
gcc: * config/i386/crtfastmath.c [!__x86_64__ && __sun__ && __svr4__]: Include <signal.h>, <ucontext.h>. (sigill_caught): Define. (sigill_hdlr): New function. (set_fast_math) [!__x86_64__ && __sun__ && __svr4__]: Check if SSE insns can be executed. * config/sol2.h (ENDFILE_SPEC): Use crtfastmath.o if -ffast-math etc. * config/sparc/sol2.h (ENDFILE_SPEC): Remove. libgcc: * config.host (i[34567]86-*-solaris2*): Add i386/t-crtfm to tmake_file. Add crtfastmath.o to extra_parts. From-SVN: r174532
2011-05-19re PR target/40483 (gcc 4.x needs to utilize better COMDAT mechanism under ↵Rainer Orth1-3/+10
Solaris) PR target/40483 * configure.ac (gcc_cv_as_comdat_group_group): Check for Sun as COMDAT group syntax, both SPARC and x86 variants. (HAVE_COMDAT_GROUP): Also define if gcc_cv_as_comdat_group_group. * configure: Regenerate. * config/sol2.h (TARGET_SOLARIS): Define. (PUSHSECTION_FORMAT): Remove. (SECTION_NAME_FORMAT): Define. * config/sol2.c: Include hashtab.h. (solaris_output_init_fini): Replace PUSHSECTION_FORMAT by its expansion, using SECTION_NAME_FORMAT. (solaris_comdat_htab): New variable. (struct comdat_entry): Define. (comdat_hash): New function. (comdat_eq): New function. (solaris_elf_asm_comdat_section): New function. (solaris_define_comdat_signature): New function. (solaris_code_end): New function. * config/sol2-protos.h (solaris_elf_asm_comdat_section): Declare. (solaris_code_end): Declare. * config/t-sol2 (sol2.o): Add $HASHTAB_H dependency. * config/i386/i386.c (ix86_code_end) [TARGET_SOLARIS]: Call solaris_code_end. (i386_solaris_elf_named_section): Wrap in TARGET_SOLARIS. Remove ATTRIBUTE_UNUSED. [!USE_GAS]: Call solaris_elf_asm_comdat_section for SECTION_LINKONCE sections if HAVE_COMDAT_GROUP. * config/sparc/sparc.c (sparc_solaris_elf_asm_named_section): Likewise. * config/i386/sol2-10.h (TARGET_ASM_NAMED_SECTION): Moved ... * config/i386/sol2.h (TARGET_ASM_NAMED_SECTION): ... here. * config/sparc/sol2.h (TARGET_ASM_CODE_END): Redefine. (PUSHSECTION_FORMAT): Remove. (SECTION_NAME_FORMAT): Redefine. From-SVN: r173913
2011-05-05elf.h (ENDFILE_SPEC): Add Ofast.Michael Matz1-1/+1
* config/alpha/elf.h (ENDFILE_SPEC): Add Ofast. * config/alpha/osf5.h (ENDFILE_SPEC): Add Ofast. * config/alpha/netbsd.h (ENDFILE_SPEC): Add Ofast. * config/sparc/linux.h (ENDFILE_SPEC): Add Ofast. * config/sparc/sp64-elf.h (ENDFILE_SPEC): Add Ofast. * config/sparc/sp-elf.h (ENDFILE_SPEC): Add Ofast. * config/sparc/linux64.h (ENDFILE_SPEC): Add Ofast. * config/sparc/freebsd.h (ENDFILE_SPEC): Add Ofast. * config/sparc/sol2.h (ENDFILE_SPEC): Add Ofast. * config/i386/cygwin.h (ENDFILE_SPEC): Add Ofast. * config/i386/gnu-user.h (ENDFILE_SPEC): Add Ofast. * config/i386/gnu-user64.h (ENDFILE_SPEC): Add Ofast. * config/i386/darwin.h (ENDFILE_SPEC): Add Ofast. * config/i386/mingw32.h (ENDFILE_SPEC): Add Ofast. * config/ia64/linux.h (ENDFILE_SPEC): Add Ofast. * config/mips/linux.h (ENDFILE_SPEC): Add Ofast. From-SVN: r173429
2011-05-05sol2.h (ASM_OUTPUT_CALL): Use targetm.asm_out.print_operand.Rainer Orth1-8/+8
* config/sparc/sol2.h (ASM_OUTPUT_CALL): Use targetm.asm_out.print_operand. * config/sol2.c: Include target.h. From-SVN: r173419
2010-12-06sol2.h (PUSHSECTION_FORMAT): Redefine unconditionally.Eric Botcazou1-5/+2
* config/sparc/sol2.h (PUSHSECTION_FORMAT): Redefine unconditionally. * config/sparc/sol2-gas.h (PUSHSECTION_FORMAT): Redefine. From-SVN: r167511
2010-11-20re PR target/31100 (ASM_OUTPUT_ALIGN_WITH_NOP wrong with GNU as)Eric Botcazou1-0/+7
PR target/31100 * config/sparc/sparc.h (ASM_OUTPUT_ALIGN_WITH_NOP): Move to... * config/sparc/sol2.h (ASM_OUTPUT_ALIGN_WITH_NOP): ...here. * config/sparc/sol2-gas.h (ASM_OUTPUT_ALIGN_WITH_NOP): Undefine. From-SVN: r166986
2010-07-02expr.h (emit_stack_probe): Declare.Eric Botcazou1-0/+3
* expr.h (emit_stack_probe): Declare. * explow.c (emit_stack_probe): Make global. (anti_adjust_stack_and_probe): Fix comments. * config/sparc/linux.h (STACK_CHECK_STATIC_BUILTIN): Define to 1. * config/sparc/linux64.h (STACK_CHECK_STATIC_BUILTIN): Likewise. * config/sparc/sol2.h (STACK_CHECK_STATIC_BUILTIN): Likewise. * config/sparc/sparc.c: Include except.h. (sparc_emit_probe_stack_range): New function. (output_probe_stack_range): Likewise. (sparc_expand_prologue): Invoke sparc_emit_probe_stack_range if static built-in stack checking is enabled. * config/sparc/sparc-protos.h (output_probe_stack_range): Declare. * config/sparc/sparc.md (UNSPECV_PROBE_STACK_RANGE): New constant. (probe_stack_range): New insn. From-SVN: r161749
2010-03-31sysv4.h (PUSHSECTION_FORMAT): Remove undef.Rainer Orth1-1/+8
* config/sparc/sysv4.h (PUSHSECTION_FORMAT): Remove undef. (PUSHSECTION_ASM_OP): Remove. (POPSECTION_ASM_OP): Remove. (PUSHSECTION_FORMAT): Remove. * config/sol2.h (PUSHSECTION_FORMAT): Define. * config/sparc/sol2.h [!USE_GAS] (PUSHSECTION_FORMAT): Redefine. * config/sol2.c (solaris_output_init_fini): Use it. From-SVN: r157861
2010-03-24re PR target/38118 (gcc emits non-TLS data as TLS on Solaris 11/SPARC)Rainer Orth1-18/+0
* configure.ac (i[34567]86-*-*): Handle Solaris 2/x86 TLS support and Sun as TLS syntax. (TLS_SECTION_ASM_FLAG) [on_solaris && !gas_flag]: Define. * configure: Regenerate. * config.in: Regenerate. * varasm.c (TLS_SECTION_ASM_FLAG): Define default. (default_elf_asm_named_section): Use it. * config/i386/i386.c (output_pic_addr_const): Lowercase @DTPOFF. (i386_output_dwarf_dtprel): Likewise. (output_addr_const_extra): Likewise. (output_pic_addr_const): Lowercase @GOTTPOFF. (output_addr_const_extra): Likewise. (output_pic_addr_const): Lowercase @GOTNTPOFF. (output_addr_const_extra): Likewise. (output_pic_addr_const): Lowercase @INDNTPOFF. (output_addr_const_extra): Likewise. (output_pic_addr_const): Lowercase @NTPOFF. (output_addr_const_extra): Likewise. (output_pic_addr_const): Lowercase @TPOFF. (output_addr_const_extra): Likewise. * config/i386/i386.md (*tls_global_dynamic_32_gnu): Lowercase @TLSGD. (*tls_global_dynamic_64): Likewise. (*tls_local_dynamic_base_32_gnu): Lowercase @TLSLDM. (*tls_local_dynamic_base_64): Lowercase @TLSLD. * defaults.h (TLS_COMMON_ASM_OP): Provide default. (ASM_OUTPUT_TLS_COMMON): Use it. * config/i386/sol2-gas.h (TLS_COMMON_ASM_OP): Undef. PR target/38118 * config.gcc (sparc*-*-solaris2*) [$gas=yes]: Add usegas.h to tm_file. * config/sparc/sol2.h (ASM_OUTPUT_ALIGNED_COMMON): Move ... * config/sol2.h (ASM_OUTPUT_ALIGNED_COMMON): ... here. * config/i386/sol2-10.h (ASM_OUTPUT_ALIGNED_COMMON): Redefine. * config/i386/sol2.h (TARGET_SUN_TLS): Redefine. From-SVN: r157705
2010-03-02config.gcc (sparc-*-linux*): Do not include sparc/gas.h.Eric Botcazou1-0/+4
* config.gcc (sparc-*-linux*): Do not include sparc/gas.h. (sparc64-*-linux*): Likewise. (sparc64-*-solaris2*): Include assembler files before linker ones. (sparc-*-solaris2*): Simplify and reorder to match previous case. * config/sparc/gas.h: Delete. * config/sparc/sol2-64.h: Add copyright notice. * config/sparc/sol2-gas-bi.h: Likewise. * config/sparc/sol2-gld.h: Likewise. * config/sparc/sysv4.h (TARGET_ASM_NAMED_SECTION): Delete. * config/sparc/sol2.h (TARGET_ASM_NAMED_SECTION): Redefine. * config/sparc/sol2-gas.h (TARGET_ASM_NAMED_SECTION): Likewise. * config/sparc/sparc.c (TARGET_ASM_ALIGNED_SI_OP): Never redefine. (sparc_elf_asm_named_section): Rename into... (sparc_solaris_elf_asm_named_section): ...this. Always define. From-SVN: r157181
2009-10-11re PR target/33743 (unwinding through signal frames)Jose Ruiz1-0/+2
PR target/33743 * config/sparc/sol2.h (MD_UNWIND_SUPPORT): Define. * config/sparc/sol2-unwind.h: New file. Co-Authored-By: Eric Botcazou <ebotcazou@adacore.com> From-SVN: r152649
2008-11-29re PR target/29987 (libgomp.c++/ctor-9.C failure)Jakub Jelinek1-0/+18
PR target/29987 * config/sparc/sol2.h (ASM_OUTPUT_ALIGNED_COMMON): Redefine. From-SVN: r142286
2008-09-18sol2.h (WIDEST_HARDWARE_FP_SIZE): Move to...Eric Botcazou1-3/+0
* config/sparc/sol2.h (WIDEST_HARDWARE_FP_SIZE): Move to... * config/sparc/sparc.h (WIDEST_HARDWARE_FP_SIZE): ...here. From-SVN: r140458
2008-09-09sol2.h (REGISTER_TARGET_PRAGMAS): Move ...Rainer Orth1-1/+4
* config/sol2.h (REGISTER_TARGET_PRAGMAS): Move ... * config/i386/sol2.h (REGISTER_SUBTARGET_PRAGMAS): ... here. * config/sparc/sol2.h (REGISTER_TARGET_PRAGMAS): ... and here. From-SVN: r140157
2007-10-18Add Niagara-2 support.David S. Miller1-0/+6
2007-10-18 David S. Miller <davem@davemloft.net> Add Niagara-2 support. * doc/invoke.texi: Document -m{cpu,tune}=niagara2. * config.gcc: Add niagara2 to cpu and tune lists for sparc. * config/sparc/sparc.md (sparc_cpu_attr): Add niagara2. (include): Add inclusion of niagara2.md * config/sparc/sparc.c (niagara2_costs): New. (sparc_override_options): Add niagara2 entry to cpu_default[] and cpu_table[]. Set align_functions to 32 on Niagara2. Use niagara2_costs when PROCESSOR_NIAGARA2. Handle Niagara2 for PARAM_SIMULTANEOUS_PREFETCHES and PARAM_L1_CACHE_LINE_SIZE. (sparc_initialize_trampoline): Handle niagara2 like niagara. (sparc64_initialize_trampoline): Likewise. (sparc_use_sched_lookahead): Likewise. (sparc_issue_rate): Likewise. * config/sparc/sol2-bi.h: Handle TARGET_CPU_niagara2 and mcpu=niagara2 * config/sparc/sparc.h (TARGET_CPU_niagara2): Define. ({CPP,ASM}_CPU64_DEFAULT_SPEC): Set appropriately for TARGET_CPU_niagara2. (PROCESSOR_NIAGARA2): New. (REGISTER_MOVE_COST): Handle PROCESSOR_NIAGARA2. (BRANCH_COST): Likewise. * config/sparc/linux64.h: Handle TARGET_CPU_niagara2. * config/sparc/sol2.h: Likewise. * config/sparc/niagara2.md: New file. From-SVN: r129472
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