aboutsummaryrefslogtreecommitdiff
path: root/gcc/config/rs6000
AgeCommit message (Expand)AuthorFilesLines
2018-01-02Make vec_perm_indices use new vector encodingRichard Sandiford1-2/+2
2018-01-02Remove vec_perm_const optabRichard Sandiford5-107/+57
2017-12-28[rs6000] Use gen_int_mode in ieee_128bit_negative_zeroRichard Sandiford1-1/+1
2017-12-21poly_int: argument sizesRichard Sandiford3-3/+5
2017-12-19RTEMS/PowerPC: Remove 64-bit soft-float multilibSebastian Huber1-1/+0
2017-12-16poly_int: IN_TARGET_CODERichard Sandiford8-0/+16
2017-12-15tree-core.h (struct attribute_spec): Swap affects_type_identity and handler f...Jakub Jelinek1-13/+13
2017-12-13ppc-auxv.h (PPC_FEATURE2_HTM_NO_SUSPEND): New define.Peter Bergner2-0/+2
2017-12-12re PR target/82190 (Possibly latent miscompilation issue on ppc64le-linux-gnu...Aaron Sawdey1-6/+6
2017-12-12re PR target/83332 (new test case gfortran.dg/vect/pr81303.f fails (r255499))Bill Schmidt1-0/+54
2017-12-11altivec.h (vec_extract_fp32_from_shorth, [...]): Add #defines.Carl Love3-0/+41
2017-12-11rs6000.c (rs6000_gimple_fold_builtin): Add support for early folding of splat...Will Schmidt1-0/+22
2017-12-07PR c/81544 - attribute noreturn and warn_unused_result on the same function a...Martin Sebor1-7/+7
2017-12-07rs6000: Initialise rs6000_cpu correctly (PR43871)Segher Boessenkool1-2/+5
2017-12-07rs6000: Don't use rs6000_cpu_attr directlySegher Boessenkool3-63/+60
2017-12-07rs6000: Split rs6000_cpuSegher Boessenkool3-59/+65
2017-12-04re PR bootstrap/83265 (Bootstrap failure on powerpc64)Segher Boessenkool1-2/+2
2017-12-02rs6000: Improve fusion assembler outputSegher Boessenkool4-22/+9
2017-12-02rs6000: Set rs6000_cpu correctly (PR43871)Segher Boessenkool1-2/+2
2017-12-01re PR target/81959 (PowerPC __float128 optimization fails with integer PRE_IN...Michael Meissner2-1/+8
2017-11-29rs6000: Add second variant of addeSegher Boessenkool1-0/+10
2017-11-28rs6000: Improve comparison rtx_cost (PR81288)Segher Boessenkool1-17/+6
2017-11-28rs6000: Improve scc iselSegher Boessenkool1-4/+32
2017-11-25re PR target/82848 (ICE in expand_expr_real_2, at expr.c:8715)Jakub Jelinek1-0/+6
2017-11-23rs6000.c (rs6000_gimple_fold_builtin): Formatting fixes.Jakub Jelinek1-297/+255
2017-11-21ppc-asm.h (f50, vs50): Fix values.Pat Haugen1-2/+2
2017-11-16Had a small thinko in the implementation of mmintrin.h _mm_add_pi32 that only...Steven Munroe1-2/+2
2017-11-16power9.md (power9fpdiv): New automaton and cpu_unit defined for it.Pat Haugen1-22/+43
2017-11-16rs6000.c (rs6000_expand_builtin): Do not do the switch statement mapping KF b...Michael Meissner1-1/+5
2017-11-15altivec.h (vec_xst_be): New #define.Bill Schmidt6-233/+328
2017-11-15rs6000.c (rs6000_gimple_fold_builtin): Add support for folding of vector comp...Will Schmidt2-21/+114
2017-11-14rs6000.md (bswapdi2): On 32-bit ISA 3.0, don't generate the XXBRD instruction.Michael Meissner1-6/+0
2017-11-14rs6000-c.c (is_float128_p): New helper function.Michael Meissner4-131/+140
2017-11-14rs6000.c (swap_endian_selector_for_mode): Remove le_ and be_ prefixes to swap...Carl Love1-57/+24
2017-11-13altivec.md (altivec_vsumsws_be): Add define_expand.Carl Love1-0/+1
2017-11-13rs6000-c.c (altivec_overloaded_builtins): Add support for builtins...Carl Love4-5/+248
2017-11-12[cr16, powerpcspe, rs6000] Remove semicolon after ASM_OUTPUT_LABELREF macro bodyTom de Vries1-1/+1
2017-11-10rs6000.md (bswaphi2_reg): On ISA 3.0 systems, enable generating XXBRH if the ...Michael Meissner1-14/+35
2017-11-10power9.md (power9-qpdiv): Correct DFU pipe usage.Pat Haugen2-12/+18
2017-11-09rs6000: Separate shrink-wrapping for the TOC registerSegher Boessenkool1-1/+32
2017-11-07rs6000: Use isel for the cstore patternsSegher Boessenkool1-14/+119
2017-11-07[rs6000] Remove semicolon after do {} while (0) in SUBTARGET_OVERRIDE_OPTIONSTom de Vries6-6/+6
2017-11-07rs6000: Don't clear TARGET_ISEL implicitlySegher Boessenkool1-11/+1
2017-11-06rs6000-c.c (P8V_BUILTIN_VEC_REVB): Add power 8 definitions.Carl Love6-25/+146
2017-11-06re PR target/82748 (ICE with __builtin_fabsq and __float128 in copy_to_mode_r...Michael Meissner3-108/+100
2017-11-06[gcc]Bill Schmidt1-1/+44
2017-11-06rs6000: Implement insn_cost for mfcr, mfcrfSegher Boessenkool1-0/+2
2017-11-03rs6000: Remove rs6000_emit_sISELSegher Boessenkool3-12/+3
2017-11-03rs6000: Improve *lt0 patternsSegher Boessenkool1-4/+12
2017-11-03rs6000: move_from_CR_ov_bit is TARGET_PAIRED_FLOAT, not TARGET_ISELSegher Boessenkool1-1/+1