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From-SVN: r279813
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From-SVN: r267494
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This removes the special Xilinx FP support. It was deprecated in
GCC 8.
After this patch all of TARGET_{DOUBLE,SINGLE}_FLOAT,
TARGET_{DF,SF}_INSN, and TARGET_{DF,SF}_FPR are replaced by
TARGET_HARD_FLOAT. Also the fp_type attribute is deleted.
* common/config/rs6000/rs6000-common.c (rs6000_handle_option): Remove
Xilinx FP support.
* config.gcc (powerpc-xilinx-eabi*): Remove.
* config/rs6000/predicates.md (easy_fp_constant): Remove Xilinx FP
support.
(fusion_addis_mem_combo_load): Ditto.
* config/rs6000/rs6000-c.c (rs6000_target_modify_macros): Remove Xilinx
FP support.
(rs6000_cpu_cpp_builtins): Ditto.
* config/rs6000/rs6000-linux.c
(rs6000_linux_float_exceptions_rounding_supported_p): Ditto.
* config/rs6000/rs6000-opts.h (enum fpu_type_t): Delete.
* config/rs6000/rs6000.c (rs6000_debug_reg_global): Remove Xilinx FP
support.
(rs6000_setup_reg_addr_masks): Ditto.
(rs6000_init_hard_regno_mode_ok): Ditto.
(rs6000_option_override_internal): Ditto.
(legitimate_lo_sum_address_p): Ditto.
(rs6000_legitimize_address): Ditto.
(rs6000_legitimize_reload_address): Ditto.
(rs6000_legitimate_address_p): Ditto.
(abi_v4_pass_in_fpr): Ditto.
(setup_incoming_varargs): Ditto.
(rs6000_gimplify_va_arg): Ditto.
(rs6000_split_multireg_move): Ditto.
(rs6000_savres_strategy): Ditto.
(rs6000_emit_prologue_components): Ditto.
(rs6000_emit_epilogue_components): Ditto.
(rs6000_emit_prologue): Ditto.
(rs6000_emit_epilogue): Ditto.
(rs6000_elf_file_end): Ditto.
(rs6000_function_value): Ditto.
(rs6000_libcall_value): Ditto.
* config/rs6000/rs6000.h: Ditto.
(TARGET_MINMAX_SF, TARGET_MINMAX_DF): Delete, merge to ...
(TARGET_MINMAX): ... this. New.
(TARGET_SF_FPR, TARGET_DF_FPR, TARGET_SF_INSN, TARGET_DF_INSN): Delete.
* config/rs6000/rs6000.md: Remove Xilinx FP support.
(*movsi_internal1_single): Delete.
* config/rs6000/rs6000.opt (msingle-float, mdouble-float, msimple-fpu,
mfpu=, mxilinx-fpu): Delete.
* config/rs6000/singlefp.h: Delete.
* config/rs6000/sysv4.h: Remove Xilinx FP support.
* config/rs6000/t-rs6000: Ditto.
* config/rs6000/t-xilinx: Delete.
* gcc/config/rs6000/titan.md: Adjust for fp_type removal.
* gcc/config/rs6000/vsx.md: Remove Xilinx FP support.
(VStype_simple): Delete.
(VSfptype_simple, VSfptype_mul, VSfptype_div, VSfptype_sqrt): Delete.
* config/rs6000/xfpu.h: Delete.
* config/rs6000/xfpu.md: Delete.
* config/rs6000/xilinx.h: Delete.
* config/rs6000/xilinx.opt: Delete.
* gcc/doc/invoke.texi (RS/6000 and PowerPC Options): Remove
-msingle-float, -mdouble-float, -msimple-fpu, -mfpu=, and -mxilinx-fpu.
From-SVN: r259929
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"delayed_cr" is just "cr_logical" with the second source operand not
equal to the destination operand. This patch changes it to be
expressed as type "cr_logical", with a new boolean attribute
"cr_logical_3op" added. This simplifies code.
* config/rs6000/rs6000.md (define_attr "type"): Remove delayed_cr.
(define_attr "cr_logical_3op"): New.
(cceq_ior_compare): Adjust.
(cceq_ior_compare_complement): Adjust.
(*cceq_rev_compare): Adjust.
* config/rs6000/rs6000.c (rs6000_adjust_cost): Adjust.
(is_cracked_insn): Adjust.
(insn_must_be_first_in_group): Adjust.
* config/rs6000/40x.md: Adjust.
* config/rs6000/440.md: Adjust.
* config/rs6000/476.md: Adjust.
* config/rs6000/601.md: Adjust.
* config/rs6000/603.md: Adjust.
* config/rs6000/6xx.md: Adjust.
* config/rs6000/7450.md: Adjust.
* config/rs6000/7xx.md: Adjust.
* config/rs6000/8540.md: Adjust.
* config/rs6000/cell.md: Adjust.
* config/rs6000/e300c2c3.md: Adjust.
* config/rs6000/e500mc.md: Adjust.
* config/rs6000/e500mc64.md: Adjust.
* config/rs6000/e5500.md: Adjust.
* config/rs6000/e6500.md: Adjust.
* config/rs6000/mpc.md: Adjust.
* config/rs6000/power4.md: Adjust.
* config/rs6000/power5.md: Adjust.
* config/rs6000/power6.md: Adjust.
* config/rs6000/power7.md: Adjust.
* config/rs6000/power8.md: Adjust.
* config/rs6000/power9.md: Adjust.
* config/rs6000/rs64.md: Adjust.
* config/rs6000/titan.md: Adjust.
From-SVN: r256716
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From-SVN: r256169
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From-SVN: r243994
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types.
* config/rs6000/rs6000.md ('type' attribute): Add
veclogical,veccmpfx,vecexts,vecmove insn types.
(*abs<mode>2_fpr, *nabs<mode>2_fpr, *neg<mode>2_fpr, *extendsfdf2_fpr,
copysign<mode>3_fcpsgn, trunc<mode>df2_internal1, neg<mode>2_internal,
p8_fmrgow_<mode>, pack<mode>): Change type to fpsimple.
(*xxsel<mode>, copysign<mode>3_hard, neg<mode>2_hw, abs<mode>2_hw,
*nabs<mode>2_hw): Change type to vecmove.
(*and<mode>3_internal, *bool<mode>3_internal, *boolc<mode>3_internal,
*boolcc<mode>3_internal, *eqv<mode>3_internal,
*one_cmpl<mode>3_internal, *ieee_128bit_vsx_neg<mode>2_internal,
*ieee_128bit_vsx_abs<mode>2_internal,
*ieee_128bit_vsx_nabs<mode>2_internal, extendkftf2, trunctfkf2,
*ieee128_mfvsrd_64bit, *ieee128_mfvsrd_32bit, *ieee128_mtvsrd_64bit,
*ieee128_mtvsrd_32bit): Change type to veclogical.
(mov<mode>_hardfloat, *mov<mode>_hardfloat32, *mov<mode>_hardfloat64,
*movdi_internal32, *movdi_internal64): Update insn types.
* config/rs6000/vsx.md (*vsx_le_undo_permute_<mode>,
vsx_extract_<mode>): Change type to veclogical.
(*vsx_xxsel<mode>, *vsx_xxsel<mode>_uns): Change type to vecmove.
(vsx_sign_extend_qi_<mode>, *vsx_sign_extend_hi_<mode>,
*vsx_sign_extend_si_v2di): Change type to vecexts.
* config/rs6000/altivec.md (*altivec_mov<mode>, *altivec_movti): Change
type to veclogical.
(*altivec_eq<mode>, *altivec_gt<mode>, *altivec_gtu<mode>,
*altivec_vcmpequ<VI_char>_p, *altivec_vcmpgts<VI_char>_p,
*altivec_vcmpgtu<VI_char>_p): Change type to veccmpfx.
(*altivec_vsel<mode>, *altivec_vsel<mode>_uns): Change type to vecmove.
* config/rs6000/dfp.md (*negdd2_fpr, *absdd2_fpr, *nabsdd2_fpr,
negtd2, *abstd2_fpr, *nabstd2_fpr): Change type to fpsimple.
* config/rs6000/40x.md (ppc405-float): Add fpsimple.
* config/rs6000/440.md (ppc440-fp): Add fpsimple.
* config/rs6000/476.md (ppc476-fp): Add fpsimple.
* config/rs6000/601.md (ppc601-fp): Add fpsimple.
* config/rs6000/603.md (ppc603-fp): Add fpsimple.
* config/rs6000/6xx.md (ppc604-fp): Add fpsimple.
* config/rs6000/7xx.md (ppc750-fp): Add fpsimple.
(ppc7400-vecsimple): Add veclogical, vecmove, veccmpfx.
* config/rs6000/7450.md (ppc7450-fp): Add fpsimple.
(ppc7450-vecsimple): Add veclogical, vecmove.
(ppc7450-veccmp): Add veccmpfx.
* config/rs6000/8540.md (ppc8540_simple_vector): Add veclogical,
vecmove.
(ppc8540_vector_compare): Add veccmpfx.
* config/rs6000/a2.md (ppca2-fp): Add fpsimple.
* config/rs6000/cell.md (cell-fp): Add fpsimple.
(cell-vecsimple): Add veclogical, vecmove.
(cell-veccmp): Add veccmpfx.
* config/rs6000/e300c2c3.md (ppce300c3_fp): Add fpsimple.
* config/rs6000/e6500.md (e6500_vecsimple): Add veclogical, vecmove,
veccmpfx.
* config/rs6000/mpc.md (mpccore-fp): Add fpsimple.
* config/rs6000/power4.md (power4-fp): Add fpsimple.
(power4-vecsimple): Add veclogical, vecmove.
(power4-veccmp): Add veccmpfx.
* config/rs6000/power5.md (power5-fp): Add fpsimple.
* config/rs6000/power6.md (power6-fp): Add fpsimple.
(power6-vecsimple): Add veclogical, vecmove.
(power6-veccmp): Add veccmpfx.
* config/rs6000/power7.md (power7-fp): Add fpsimple.
(power7-vecsimple): Add veclogical, vecmove, veccmpfx.
* config/rs6000/power8.md (power8-fp): Add fpsimple.
(power8-vecsimple): Add veclogical, vecmove, veccmpfx.
* config/rs6000/rs64.md (rs64a-fp): Add fpsimple.
* config/rs6000/titan.md (titan_fp): Add fpsimple.
* config/rs6000/xfpu.md (fp-default, fp-addsub-s, fp-addsub-d): Add
fpsimple.
* config/rs6000/rs6000.c (rs6000_adjust_cost): Add TYPE_FPSIMPLE.
From-SVN: r237812
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From-SVN: r232055
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From-SVN: r219188
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They are currently just "integer", but the dot version is fast_compare.
This makes them all "logical".
From-SVN: r210872
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They are currently just "integer", but the dot version is fast_compare.
This makes them all "add". Later we should introduce attributes to
distinguish e.g. addc and adde (which aren't currently handled as
separate instructions at all, only in groups).
From-SVN: r210871
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This uses the attributes "var_shift" and "dot" to specify the differences:
var_shift_rotate -> shift var_shift=yes
delayed_compare -> shift var_shift=no dot=yes
var_delayed_compare -> shift var_shift=yes dot=yes
From-SVN: r210870
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This uses the attribute "size" to specify the differences:
idiv -> div size=32
ldiv -> div size=64
It could use "dot" as well, but the current code doesn't handle that.
From-SVN: r210869
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This uses the attribute "size" to specify the differences:
insert_word -> insert size=32
insert_dword -> insert size=64
It could use "dot" as well, but the current code doesn't handle that.
From-SVN: r210868
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This uses the attributes "size" and "dot" to specify the differences:
imul3 -> mul size=8
imul2 -> mul size=16
imul -> mul size=32
lmul -> mul size=64
imul_compare -> mul size=32 dot=yes
lmul_compare -> mul size=64 dot=yes
From-SVN: r210867
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This is for the legacy integer multiply-accumulate instructions.
Quite a mouthful, and "mulhw" is also a terrible name since we already
have a machine instruction called exactly that. Hence "halfmul".
Also fixes the titan automaton description for this.
From-SVN: r210866
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The new attributes replace the instruction types *_ext*, *_u, *_ux.
This simplifies all code that does not care about the addressing modes,
putting the burden on the code that does care (mostly the scheduling
descriptions for certain CPUs).
It fixes a few minor bugs in the process.
The "update" and "indexed" attributes are automatic for any insn that
has a MEM as operand 0 or 1. Other insns have to set it manually, if
they do not like the default (which is "no"). Insns that are type
load/store/fpload/fpstore but have fewer than two operands need to set
it too, or the compiler will crash. There are very few of those.
This tries not to change semantics anywhere; in particular, the string
and multiple instructions set both "update" and "indexed" (although
they are neither).
From-SVN: r210190
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From-SVN: r206289
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From-SVN: r195098
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From-SVN: r194903
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2011-04-25 Segher Boessenkool <segher@kernel.crashing.org>
* config/rs6000/titan.md (automata_option "progress"): Remove.
From-SVN: r172940
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2010-06-28 Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
* config.gcc (powerpc*-*-*): Handle titan.
* config/rs6000/rs6000.c (titan_cost): New costs.
(rs6000_override_options): Add "titan" to processor_target_table.
Add Titan to branch alignment logic.
Correctly set rs6000_cost for titan.
* config/rs6000/rs6000.md (cpu): Add titan. Include "titan.md".
* config/rs6000/titan.md: New file.
* doc/invoke.texi (RS/6000 and PowerPC Options): Document -mcpu=titan.
From-SVN: r161491
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