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path: root/gcc/config/rs6000/rs6000.md
AgeCommit message (Expand)AuthorFilesLines
2016-07-11rs6000.md (stfiwx): Change constraint to 'wu' to prevent generation of 'stxsi...Pat Haugen1-1/+3
2016-07-11[RS6000] Don't allow combine to form doloop patternAlan Modra1-0/+9
2016-07-07rs6000: Make the ctr* patterns allow ints in vector regs (PR71763)Segher Boessenkool1-4/+4
2016-07-05rs6000-protos.h (rs6000_split_signbit): New prototype.Michael Meissner1-2/+53
2016-06-30re PR target/71677 (PowerPC ISA 3.0 DImode load/store needs a fix)Michael Meissner1-8/+8
2016-06-29predicates.md (const_0_to_7_operand): New predicate, recognize 0..7.Michael Meissner1-3/+5
2016-06-28rs6000.md ('type' attribute): Add htmsimple/dfp types.Pat Haugen1-33/+59
2016-06-28rs6000: Fix split of ashdi3_extswsli_dot for memory (PR71670)Segher Boessenkool1-1/+1
2016-06-28rs6000.md ('type' attribute): Add veclogical,veccmpfx,vecexts,vecmove insn ty...Pat Haugen1-40/+41
2016-06-28vsx.md (UNSPEC_P9_MEMORY): New unspec to support loading and storing byte/hal...Michael Meissner1-0/+141
2016-06-24rs6000-builtin.def (BU_FLOAT128_2): New #define.Bill Schmidt1-1/+31
2016-06-15vsx.md (VSINT_84): Add DImode to enable loading DImode constants with XXSPLTI...Michael Meissner1-22/+130
2016-06-03rs6000: Remove the ancient mfcr peepholesSegher Boessenkool1-31/+0
2016-05-26rs6000.c (rs6000_emit_p9_fp_minmax): New function for ISA 3.0 min/max support.Michael Meissner1-124/+103
2016-05-24altivec.md (VParity): New mode iterator for vector parity built-in functions.Michael Meissner1-1/+3
2016-05-10[RS6000] Stop regrename twiddling with split-stack prologueAlan Modra1-1/+3
2016-05-05[RS6000] TARGET_RELOCATABLEAlan Modra1-5/+1
2016-04-29re PR target/69810 (PowerPC64: unrecognizable insn)David Edelsohn1-9/+37
2016-04-12re PR middle-end/70680 (OpenMP SIMD linear variable privatized too eagerly)Michael Meissner1-4/+4
2016-03-25[RS6000] PR70052, ICE compiling _Decimal128 test caseAlan Modra1-8/+18
2016-03-14rs6000: Handle "d" output in the bd*z patterns (PR70098)Segher Boessenkool1-5/+5
2016-03-12re PR target/70131 (PowerPC ISA 2.07 is inefficient at doint (float)(int)x.)Michael Meissner1-6/+8
2016-02-23re PR target/69810 (PowerPC64: unrecognizable insn)David Edelsohn1-36/+8
2016-02-18re PR bootstrap/68404 (PGO/LTO bootstrap failure on ppc64le)Michael Meissner1-3/+3
2016-02-16[RS6000] reload_vsx_from_gprsf splitterAlan Modra1-51/+42
2016-02-05crypto.md (crypto_vpermxor_<mode>): Correct insn type.Pat Haugen1-3/+3
2016-02-04re PR target/69667 (ppc64le -mlra: ICE: Max. number of generated reload insns...Michael Meissner1-4/+4
2016-02-02[RS6000] ABI_V4 init of toc sectionAlan Modra1-0/+4
2016-01-15re PR target/68609 (PowerPC reciprocal estimate missed opportunities)David Edelsohn1-0/+1
2016-01-14Revert 2016-01-13 change.Michael Meissner1-24/+20
2016-01-13rs6000-builtin.def (BU_FLOAT128_2): Add support for pack/unpack functions for...Michael Meissner1-20/+24
2016-01-04Update copyright years.Jakub Jelinek1-1/+1
2015-12-29rs6000.c (init_float128_ieee): Remove IEEE 128-bit comparison functions in cm...Michael Meissner1-3/+58
2015-12-14rs6000: Fix a mistake in cstore_si_as_di (PR68865, PR68879)Segher Boessenkool1-0/+2
2015-12-05re PR target/68609 (PowerPC reciprocal estimate missed opportunities)David Edelsohn1-2/+19
2015-12-04rs6000: Clean up the cstore code a bitSegher Boessenkool1-12/+11
2015-12-04rs6000: Implement cstore for signed Pmode register comparesSegher Boessenkool1-0/+47
2015-12-02rs6000: Optimise SImode cstore on 64-bitSegher Boessenkool1-0/+50
2015-11-25<patch #10>Michael Meissner1-23/+40
2015-11-24rs6000.md (lround<mode>di2): Remove constraints.Michael Meissner1-2/+2
2015-11-24rs6000.md (UNSPEC_XSRDPI): New unspec.David Edelsohn1-38/+68
2015-11-16vsx.md (VSX_L): Do not include IBM extended double 128-bit types...Michael Meissner1-3/+2
2015-11-13constraints.md (we constraint): New constraint for 64-bit power9 vector support.Michael Meissner1-14/+397
2015-11-10constraints.md (wF constraint): New constraints for power9/toc fusion.Michael Meissner1-11/+428
2015-11-09rs6000.opt (-mpower9-fusion): Add new switches for ISA 3.0 (power9).Michael Meissner1-1/+1
2015-10-29rs6000.c (rs6000_init_libfuncs): Split libfunc setup into 3 functions...Michael Meissner1-178/+230
2015-10-06re PR target/67808 (LRA ICEs on simple double to long double conversion test ...Michael Meissner1-33/+36
2015-10-05Remove REAL_VALUE_FROM_CONST_DOUBLERichard Sandiford1-9/+3
2015-10-05Remove remaining uses of CONST_DOUBLE_FROM_REAL_VALUERichard Sandiford1-2/+2
2015-10-02rs6000: Add "cannot_copy" attribute, use it (PR67788, PR67789)Segher Boessenkool1-2/+7
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