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AgeCommit message (Expand)AuthorFilesLines
2020-12-10RISC-V: Explicitly call python when using multilib generatorSimon Cook1-1/+2
2020-12-03RISC-V: Canonicalize --with-archKito Cheng2-75/+110
2020-11-30RISC-V: Always define MULTILIB_DEFAULTSKito Cheng2-51/+9
2020-11-18RISC-V: Support version controling for ISA standard extensionsKito Cheng3-1/+35
2020-11-18RISC-V: Support zicsr and zifencei extension for -march.Kito Cheng3-2/+12
2020-11-13PR target/97682 - Fix to reuse t1 register between call address and epilogue.Monk Chiang2-12/+17
2020-11-13Asan changes for RISC-V.Jim Wilson1-0/+16
2020-11-02RISC-V: Add configure option: --with-multilib-generator to flexible config mu...Kito Cheng2-1/+10
2020-10-22RISC-V: Extend syntax for the multilib-generatorKito Cheng1-7/+102
2020-10-16RISC-V: Handle implied extension in multilib-generatorKito Cheng1-4/+20
2020-10-15RISC-V: Add support for -mcpu option.Kito Cheng6-52/+139
2020-09-29RISC-V: Define __riscv_cmodel_medany for PIC mode.Kito Cheng1-3/+6
2020-09-17RISC-V: fix a typo in riscv.hYeting Kuo1-1/+1
2020-07-31RISC-V: Add support for TLS stack protector canary accessCooper Qu4-0/+161
2020-07-09RISC-V: Implement __builtin_thread_pointerKito Cheng1-0/+8
2020-07-09RISC-V: Disable remove unneeded save-restore call optimization if there are a...Kito Cheng1-0/+6
2020-07-02RISC-V: Handle multi-letter extension for multilib-generatorKito Cheng1-8/+22
2020-06-22RISC-V: Normalize arch string in driver timeKito Cheng1-1/+5
2020-06-22RISC-V: Fix compilation failed for frflags builtin in C++ modeKito Cheng2-2/+5
2020-06-16RISC-V: Fix ICE on riscv_gpr_save_operation_p [PR95683]Kito Cheng1-1/+4
2020-06-15RISC-V: Suppress warning for signed and unsigned integer comparison.Kito Cheng1-3/+3
2020-06-10RISC-V: Unify the output asm pattern between gpr_save and gpr_restore pattern.Kito Cheng4-18/+3
2020-06-10RISC-V: Describe correct USEs for gpr_save pattern [PR95252]Kito Cheng5-5/+109
2020-05-30RISC-V: Optimize si to di zero-extend followed by left shift.Jim Wilson1-0/+22
2020-05-19RISC-V: Handle implied extension for -march parser.Kito Cheng2-2/+7
2020-05-12RISC-V: Make unique SECCAT_SRODATA names start with .srodata (not .sdata2)Keith Packard1-0/+40
2020-05-12RISC-V: Add shorten_memrefs pass.Craig Blackmore7-5/+337
2020-05-06riscv: Fix up riscv_atomic_assign_expand_fenv [PR94950]Jakub Jelinek1-2/+2
2020-03-04PR target/93995 ICE in patch_jump_insn, at cfgrtl.c:1290 on riscv64-linux-gnuKito Cheng1-3/+4
2020-02-24RISC-V: Adjust floating point code gen for LTGT compareKito Cheng1-3/+14
2020-02-19RISC-V: Using fmv.x.w/fmv.w.x rather than fmv.x.s/fmv.s.xKito Cheng1-2/+2
2020-02-08RISC-V: Improve caller-save code generation.Jim Wilson1-0/+7
2020-01-21RISC-V: Fix rtl checking enabled failure with -msave-restore.Jim Wilson1-1/+1
2020-01-21riscv: Fix up riscv_rtx_costs for RTL checking (PR target/93333)Jakub Jelinek1-1/+4
2020-01-21RISC-V: Disallow regrenme if the TO register never used before for interrupt ...Kito Cheng3-0/+17
2020-01-09re PR inline-asm/93202 ([RISCV] ICE when using inline asm 'h' operand modifier)Jakub Jelinek1-1/+2
2020-01-08RISC-V: Disable use of TLS copy relocs.Jim Wilson1-0/+3
2020-01-01Update copyright years.Jakub Jelinek23-23/+23
2019-11-19Initialize a variable due to -Wmaybe-uninitialized.Martin Liska1-1/+1
2019-10-28gcc/riscv: Add a mechanism to remove some calls to _riscv_save_0Andrew Burgess4-0/+491
2019-10-16RISC-V: Include more registers in SIBCALL_REGS.Andrew Burgess2-4/+4
2019-09-18RISC-V: Fix more splitters accidentally calling gen_reg_rtx.Jim Wilson3-23/+33
2019-09-10Add call_used_or_fixed_reg_pRichard Sandiford1-5/+6
2019-09-06RISC-V: Re-enable -msave-restore for shared libraries.Jim Wilson1-10/+0
2019-09-05RISC-V: Fix bad insn splits with paradoxical subregs.Jakub Jelinek1-9/+21
2019-08-30RISC-V: Disable -msave-restore for shared libraries.Jim Wilson1-0/+10
2019-08-20Use function_arg_info for TARGET_FUNCTION_ARG_ADVANCERichard Sandiford1-5/+4
2019-08-20Use function_arg_info for TARGET_FUNCTION_(INCOMING_)ARGRichard Sandiford1-4/+3
2019-08-20Use function_arg_info for TARGET_SETUP_INCOMING_ARGSRichard Sandiford1-4/+5
2019-08-20Use function_arg_info for TARGET_PASS_BY_REFERENCERichard Sandiford1-5/+5